1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #pragma once
16 
17 #ifdef __cplusplus
18 extern "C" {
19 #endif
20 
21 typedef enum {
22     WDT_RWDT = 0,   /*!< RTC Watchdog Timer (RWDT) */
23     WDT_MWDT0,      /*!< Main System Watchdog Timer (MWDT) of Timer Group 0 */
24     WDT_MWDT1,      /*!< Main System Watchdog Timer (MWDT) of Timer Group 1 */
25 } wdt_inst_t;
26 
27 /**
28  * @brief Stages of a Watchdog Timer. A WDT has 4 stages.
29  */
30 typedef enum {
31     WDT_STAGE0 = 0,     /*!< Stage 0 */
32     WDT_STAGE1 = 1,     /*!< Stage 1 */
33     WDT_STAGE2 = 2,     /*!< Stage 2 */
34     WDT_STAGE3 = 3      /*!< Stage 3 */
35 } wdt_stage_t;
36 
37 /**
38  * @brief Behavior of the WDT stage if it times out
39  *
40  * @note These enum values should be compatible with the corresponding register
41  *       field values.
42  */
43 typedef enum {
44     WDT_STAGE_ACTION_OFF = 0,           /*!< Disabled. This stage will have no effects on the system. */
45     WDT_STAGE_ACTION_INT = 1,           /*!< Trigger an interrupt when the stage expires. */
46     WDT_STAGE_ACTION_RESET_CPU = 2,     /*!< Reset a CPU core when the stage expires. */
47     WDT_STAGE_ACTION_RESET_SYSTEM = 3,  /*!< Reset the main system when the stage expires. This includes the CPU and all peripherals. The RTC is an exception and will not be reset. */
48     WDT_STAGE_ACTION_RESET_RTC = 4,     /*!< Reset the main system and the RTC when the stage expires. ONLY AVAILABLE FOR RWDT */
49 } wdt_stage_action_t;
50 
51 /**
52  * @brief Length of CPU or System Reset signals
53  *
54  * @note These enum values should be compatible with the corresponding register
55  *       field values.
56  */
57 typedef enum {
58     WDT_RESET_SIG_LENGTH_100ns = 0,    /*!< 100 ns */
59     WDT_RESET_SIG_LENGTH_200ns = 1,    /*!< 200 ns */
60     WDT_RESET_SIG_LENGTH_300ns = 2,    /*!< 300 ns */
61     WDT_RESET_SIG_LENGTH_400ns = 3,    /*!< 400 ns */
62     WDT_RESET_SIG_LENGTH_500ns = 4,    /*!< 500 ns */
63     WDT_RESET_SIG_LENGTH_800ns = 5,    /*!< 800 ns */
64     WDT_RESET_SIG_LENGTH_1_6us = 6,    /*!< 1.6 us */
65     WDT_RESET_SIG_LENGTH_3_2us = 7     /*!< 3.2 us */
66 } wdt_reset_sig_length_t;
67 
68 
69 #ifdef __cplusplus
70 }
71 #endif
72