1 /* 2 * Copyright (c) 2017, STMicroelectronics - All Rights Reserved 3 * 4 * This file is part of VL53L1 Core and is dual licensed, 5 * either 'STMicroelectronics 6 * Proprietary license' 7 * or 'BSD 3-clause "New" or "Revised" License' , at your option. 8 * 9 ******************************************************************************** 10 * 11 * 'STMicroelectronics Proprietary license' 12 * 13 ******************************************************************************** 14 * 15 * License terms: STMicroelectronics Proprietary in accordance with licensing 16 * terms at www.st.com/sla0081 17 * 18 * STMicroelectronics confidential 19 * Reproduction and Communication of this document is strictly prohibited unless 20 * specifically authorized in writing by STMicroelectronics. 21 * 22 * 23 ******************************************************************************** 24 * 25 * Alternatively, VL53L1 Core may be distributed under the terms of 26 * 'BSD 3-clause "New" or "Revised" License', in which case the following 27 * provisions apply instead of the ones mentioned above : 28 * 29 ******************************************************************************** 30 * 31 * License terms: BSD 3-clause "New" or "Revised" License. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions are met: 35 * 36 * 1. Redistributions of source code must retain the above copyright notice, this 37 * list of conditions and the following disclaimer. 38 * 39 * 2. Redistributions in binary form must reproduce the above copyright notice, 40 * this list of conditions and the following disclaimer in the documentation 41 * and/or other materials provided with the distribution. 42 * 43 * 3. Neither the name of the copyright holder nor the names of its contributors 44 * may be used to endorse or promote products derived from this software 45 * without specific prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 48 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 50 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 54 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 55 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 56 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57 * 58 * 59 ******************************************************************************** 60 * 61 */ 62 63 /** 64 * @file vl53l1_register_map.h 65 * @brief VL53L1 Register Map definitions 66 */ 67 68 #ifndef _VL53L1_REGISTER_MAP_H_ 69 #define _VL53L1_REGISTER_MAP_H_ 70 71 /** @defgroup VL53L1_register_DefineRegisters_group Define Registers * @brief List of all the defined registers 72 * @{ 73 */ 74 75 #define VL53L1_SOFT_RESET 0x0000 76 /*!< 77 info: \n 78 - msb = 0 79 - lsb = 0 80 - i2c_size = 1 81 */ 82 #define VL53L1_I2C_SLAVE__DEVICE_ADDRESS 0x0001 83 /*!< 84 type: uint8_t \n 85 default: EWOK_I2C_DEV_ADDR_DEFAULT \n 86 info: \n 87 - msb = 6 88 - lsb = 0 89 - i2c_size = 1 90 91 groups: \n 92 ['static_nvm_managed', 'system_config'] 93 94 fields: \n 95 - [6:0] = i2c_slave_device_address 96 */ 97 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VDDPIX 0x0002 98 /*!< 99 type: uint8_t \n 100 default: 0x02 \n 101 info: \n 102 - msb = 3 103 - lsb = 0 104 - i2c_size = 1 105 106 groups: \n 107 ['static_nvm_managed', 'analog_config'] 108 109 fields: \n 110 - [3:0] = ref_sel_vddpix 111 */ 112 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VQUENCH 0x0003 113 /*!< 114 type: uint8_t \n 115 default: 0x10 \n 116 info: \n 117 - msb = 6 118 - lsb = 3 119 - i2c_size = 1 120 121 groups: \n 122 ['static_nvm_managed', 'analog_config'] 123 124 fields: \n 125 - [6:3] = ref_sel_vquench 126 */ 127 #define VL53L1_ANA_CONFIG__REG_AVDD1V2_SEL 0x0004 128 /*!< 129 type: uint8_t \n 130 default: 0x00 \n 131 info: \n 132 - msb = 1 133 - lsb = 0 134 - i2c_size = 1 135 136 groups: \n 137 ['static_nvm_managed', 'analog_config'] 138 139 fields: \n 140 - [1:0] = reg_avdd1v2_sel 141 */ 142 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM 0x0005 143 /*!< 144 type: uint8_t \n 145 default: 0x48 \n 146 info: \n 147 - msb = 6 148 - lsb = 0 149 - i2c_size = 1 150 151 groups: \n 152 ['static_nvm_managed', 'analog_config'] 153 154 fields: \n 155 - [6:0] = fast_osc_trim 156 */ 157 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY 0x0006 158 /*!< 159 type: uint16_t \n 160 default: OSC_FREQUENCY \n 161 info: \n 162 - msb = 15 163 - lsb = 0 164 - i2c_size = 2 165 166 groups: \n 167 ['static_nvm_managed', 'analog_config'] 168 169 fields: \n 170 - [15:0] = osc_frequency (fixed point 4.12) 171 */ 172 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_HI 0x0006 173 /*!< 174 info: \n 175 - msb = 0 176 - lsb = 0 177 - i2c_size = 1 178 */ 179 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_LO 0x0007 180 /*!< 181 info: \n 182 - msb = 0 183 - lsb = 0 184 - i2c_size = 1 185 */ 186 #define VL53L1_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008 187 /*!< 188 type: uint8_t \n 189 default: 0x81 \n 190 info: \n 191 - msb = 7 192 - lsb = 0 193 - i2c_size = 1 194 195 groups: \n 196 ['static_nvm_managed', 'vhv_config'] 197 198 fields: \n 199 - [1:0] = vhv_timeout__macrop 200 - [7:2] = vhv_loop_bound 201 */ 202 #define VL53L1_VHV_CONFIG__COUNT_THRESH 0x0009 203 /*!< 204 type: uint8_t \n 205 default: 0x80 \n 206 info: \n 207 - msb = 7 208 - lsb = 0 209 - i2c_size = 1 210 211 groups: \n 212 ['static_nvm_managed', 'vhv_config'] 213 214 fields: \n 215 - [7:0] = vhv_count_thresh 216 */ 217 #define VL53L1_VHV_CONFIG__OFFSET 0x000A 218 /*!< 219 type: uint8_t \n 220 default: 0x07 \n 221 info: \n 222 - msb = 5 223 - lsb = 0 224 - i2c_size = 1 225 226 groups: \n 227 ['static_nvm_managed', 'vhv_config'] 228 229 fields: \n 230 - [5:0] = vhv_step_val 231 */ 232 #define VL53L1_VHV_CONFIG__INIT 0x000B 233 /*!< 234 type: uint8_t \n 235 default: 0x20 \n 236 info: \n 237 - msb = 7 238 - lsb = 0 239 - i2c_size = 1 240 241 groups: \n 242 ['static_nvm_managed', 'vhv_config'] 243 244 fields: \n 245 - [7] = vhv0_init_enable 246 - [5:0] = vhv0_init_value 247 */ 248 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0 0x000D 249 /*!< 250 type: uint8_t \n 251 default: 0x00 \n 252 info: \n 253 - msb = 7 254 - lsb = 0 255 - i2c_size = 1 256 257 groups: \n 258 ['customer_nvm_managed', 'ref_spad_en'] 259 260 fields: \n 261 - [7:0] = spad_enables_ref_0 262 */ 263 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_1 0x000E 264 /*!< 265 type: uint8_t \n 266 default: 0x00 \n 267 info: \n 268 - msb = 7 269 - lsb = 0 270 - i2c_size = 1 271 272 groups: \n 273 ['customer_nvm_managed', 'ref_spad_en'] 274 275 fields: \n 276 - [7:0] = spad_enables_ref_1 277 */ 278 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_2 0x000F 279 /*!< 280 type: uint8_t \n 281 default: 0x00 \n 282 info: \n 283 - msb = 7 284 - lsb = 0 285 - i2c_size = 1 286 287 groups: \n 288 ['customer_nvm_managed', 'ref_spad_en'] 289 290 fields: \n 291 - [7:0] = spad_enables_ref_2 292 */ 293 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_3 0x0010 294 /*!< 295 type: uint8_t \n 296 default: 0x00 \n 297 info: \n 298 - msb = 7 299 - lsb = 0 300 - i2c_size = 1 301 302 groups: \n 303 ['customer_nvm_managed', 'ref_spad_en'] 304 305 fields: \n 306 - [7:0] = spad_enables_ref_3 307 */ 308 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_4 0x0011 309 /*!< 310 type: uint8_t \n 311 default: 0x00 \n 312 info: \n 313 - msb = 7 314 - lsb = 0 315 - i2c_size = 1 316 317 groups: \n 318 ['customer_nvm_managed', 'ref_spad_en'] 319 320 fields: \n 321 - [7:0] = spad_enables_ref_4 322 */ 323 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_5 0x0012 324 /*!< 325 type: uint8_t \n 326 default: 0x00 \n 327 info: \n 328 - msb = 3 329 - lsb = 0 330 - i2c_size = 1 331 332 groups: \n 333 ['customer_nvm_managed', 'ref_spad_en'] 334 335 fields: \n 336 - [3:0] = spad_enables_ref_5 337 */ 338 #define VL53L1_GLOBAL_CONFIG__REF_EN_START_SELECT 0x0013 339 /*!< 340 type: uint8_t \n 341 default: 0x00 \n 342 info: \n 343 - msb = 7 344 - lsb = 0 345 - i2c_size = 1 346 347 groups: \n 348 ['customer_nvm_managed', 'ref_spad_start'] 349 350 fields: \n 351 - [7:0] = ref_en_start_select 352 */ 353 #define VL53L1_REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS 0x0014 354 /*!< 355 type: uint8_t \n 356 default: 0x2C \n 357 info: \n 358 - msb = 5 359 - lsb = 0 360 - i2c_size = 1 361 362 groups: \n 363 ['customer_nvm_managed', 'ref_spad_config'] 364 365 fields: \n 366 - [5:0] = ref_spad_man__num_requested_ref_spad 367 */ 368 #define VL53L1_REF_SPAD_MAN__REF_LOCATION 0x0015 369 /*!< 370 type: uint8_t \n 371 default: 0x00 \n 372 info: \n 373 - msb = 1 374 - lsb = 0 375 - i2c_size = 1 376 377 groups: \n 378 ['customer_nvm_managed', 'ref_spad_config'] 379 380 fields: \n 381 - [1:0] = ref_spad_man__ref_location 382 */ 383 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x0016 384 /*!< 385 type: uint16_t \n 386 default: 0x0000 \n 387 info: \n 388 - msb = 15 389 - lsb = 0 390 - i2c_size = 2 391 392 groups: \n 393 ['customer_nvm_managed', 'algo_config'] 394 395 fields: \n 396 - [15:0] = crosstalk_compensation_plane_offset_kcps (fixed point 7.9) 397 */ 398 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI 0x0016 399 /*!< 400 info: \n 401 - msb = 0 402 - lsb = 0 403 - i2c_size = 1 404 */ 405 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO 0x0017 406 /*!< 407 info: \n 408 - msb = 0 409 - lsb = 0 410 - i2c_size = 1 411 */ 412 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x0018 413 /*!< 414 type: int16_t \n 415 default: 0x0000 \n 416 info: \n 417 - msb = 15 418 - lsb = 0 419 - i2c_size = 2 420 421 groups: \n 422 ['customer_nvm_managed', 'algo_config'] 423 424 fields: \n 425 - [15:0] = crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11) 426 */ 427 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI 0x0018 428 /*!< 429 info: \n 430 - msb = 0 431 - lsb = 0 432 - i2c_size = 1 433 */ 434 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO 0x0019 435 /*!< 436 info: \n 437 - msb = 0 438 - lsb = 0 439 - i2c_size = 1 440 */ 441 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x001A 442 /*!< 443 type: int16_t \n 444 default: 0x0000 \n 445 info: \n 446 - msb = 15 447 - lsb = 0 448 - i2c_size = 2 449 450 groups: \n 451 ['customer_nvm_managed', 'algo_config'] 452 453 fields: \n 454 - [15:0] = crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11) 455 */ 456 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI 0x001A 457 /*!< 458 info: \n 459 - msb = 0 460 - lsb = 0 461 - i2c_size = 1 462 */ 463 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO 0x001B 464 /*!< 465 info: \n 466 - msb = 0 467 - lsb = 0 468 - i2c_size = 1 469 */ 470 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS 0x001C 471 /*!< 472 type: uint16_t \n 473 default: 0x0000 \n 474 info: \n 475 - msb = 15 476 - lsb = 0 477 - i2c_size = 2 478 479 groups: \n 480 ['customer_nvm_managed', 'ref_spad_char'] 481 482 fields: \n 483 - [15:0] = ref_spad_char__total_rate_target_mcps (fixed point 9.7) 484 */ 485 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI 0x001C 486 /*!< 487 info: \n 488 - msb = 0 489 - lsb = 0 490 - i2c_size = 1 491 */ 492 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO 0x001D 493 /*!< 494 info: \n 495 - msb = 0 496 - lsb = 0 497 - i2c_size = 1 498 */ 499 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x001E 500 /*!< 501 type: int16_t \n 502 default: 0x0000 \n 503 info: \n 504 - msb = 12 505 - lsb = 0 506 - i2c_size = 2 507 508 groups: \n 509 ['customer_nvm_managed', 'algo_config'] 510 511 fields: \n 512 - [12:0] = part_to_part_offset_mm (fixed point 11.2) 513 */ 514 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI 0x001E 515 /*!< 516 info: \n 517 - msb = 0 518 - lsb = 0 519 - i2c_size = 1 520 */ 521 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO 0x001F 522 /*!< 523 info: \n 524 - msb = 0 525 - lsb = 0 526 - i2c_size = 1 527 */ 528 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM 0x0020 529 /*!< 530 type: int16_t \n 531 default: 0x0000 \n 532 info: \n 533 - msb = 15 534 - lsb = 0 535 - i2c_size = 2 536 537 groups: \n 538 ['customer_nvm_managed', 'mm_config'] 539 540 fields: \n 541 - [15:0] = mm_config__inner_offset_mm 542 */ 543 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_HI 0x0020 544 /*!< 545 info: \n 546 - msb = 0 547 - lsb = 0 548 - i2c_size = 1 549 */ 550 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_LO 0x0021 551 /*!< 552 info: \n 553 - msb = 0 554 - lsb = 0 555 - i2c_size = 1 556 */ 557 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM 0x0022 558 /*!< 559 type: int16_t \n 560 default: 0x0000 \n 561 info: \n 562 - msb = 15 563 - lsb = 0 564 - i2c_size = 2 565 566 groups: \n 567 ['customer_nvm_managed', 'mm_config'] 568 569 fields: \n 570 - [15:0] = mm_config__outer_offset_mm 571 */ 572 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_HI 0x0022 573 /*!< 574 info: \n 575 - msb = 0 576 - lsb = 0 577 - i2c_size = 1 578 */ 579 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_LO 0x0023 580 /*!< 581 info: \n 582 - msb = 0 583 - lsb = 0 584 - i2c_size = 1 585 */ 586 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS 0x0024 587 /*!< 588 type: uint16_t \n 589 default: 0x0380 \n 590 info: \n 591 - msb = 15 592 - lsb = 0 593 - i2c_size = 2 594 595 groups: \n 596 ['static_config', 'dss_config'] 597 598 fields: \n 599 - [15:0] = dss_config__target_total_rate_mcps (fixed point 9.7) 600 */ 601 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI 0x0024 602 /*!< 603 info: \n 604 - msb = 0 605 - lsb = 0 606 - i2c_size = 1 607 */ 608 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO 0x0025 609 /*!< 610 info: \n 611 - msb = 0 612 - lsb = 0 613 - i2c_size = 1 614 */ 615 #define VL53L1_DEBUG__CTRL 0x0026 616 /*!< 617 type: uint8_t \n 618 default: 0x00 \n 619 info: \n 620 - msb = 0 621 - lsb = 0 622 - i2c_size = 1 623 624 groups: \n 625 ['static_config', 'debug_config'] 626 627 fields: \n 628 - [0] = enable_result_logging 629 */ 630 #define VL53L1_TEST_MODE__CTRL 0x0027 631 /*!< 632 type: uint8_t \n 633 default: 0x00 \n 634 info: \n 635 - msb = 3 636 - lsb = 0 637 - i2c_size = 1 638 639 groups: \n 640 ['static_config', 'test_mode_config'] 641 642 fields: \n 643 - [3:0] = test_mode__cmd 644 */ 645 #define VL53L1_CLK_GATING__CTRL 0x0028 646 /*!< 647 type: uint8_t \n 648 default: 0x00 \n 649 info: \n 650 - msb = 3 651 - lsb = 0 652 - i2c_size = 1 653 654 groups: \n 655 ['static_config', 'clk_config'] 656 657 fields: \n 658 - [0] = clk_gate_en__mcu_bank 659 - [1] = clk_gate_en__mcu_patch_ctrl 660 - [2] = clk_gate_en__mcu_timers 661 - [3] = clk_gate_en__mcu_mult_div 662 */ 663 #define VL53L1_NVM_BIST__CTRL 0x0029 664 /*!< 665 type: uint8_t \n 666 default: 0x00 \n 667 info: \n 668 - msb = 4 669 - lsb = 0 670 - i2c_size = 1 671 672 groups: \n 673 ['static_config', 'nvm_bist_config'] 674 675 fields: \n 676 - [2:0] = nvm_bist__cmd 677 - [4] = nvm_bist__ctrl 678 */ 679 #define VL53L1_NVM_BIST__NUM_NVM_WORDS 0x002A 680 /*!< 681 type: uint8_t \n 682 default: 0x00 \n 683 info: \n 684 - msb = 6 685 - lsb = 0 686 - i2c_size = 1 687 688 groups: \n 689 ['static_config', 'nvm_bist_config'] 690 691 fields: \n 692 - [6:0] = nvm_bist__num_nvm_words 693 */ 694 #define VL53L1_NVM_BIST__START_ADDRESS 0x002B 695 /*!< 696 type: uint8_t \n 697 default: 0x00 \n 698 info: \n 699 - msb = 6 700 - lsb = 0 701 - i2c_size = 1 702 703 groups: \n 704 ['static_config', 'nvm_bist_config'] 705 706 fields: \n 707 - [6:0] = nvm_bist__start_address 708 */ 709 #define VL53L1_HOST_IF__STATUS 0x002C 710 /*!< 711 type: uint8_t \n 712 default: 0x00 \n 713 info: \n 714 - msb = 0 715 - lsb = 0 716 - i2c_size = 1 717 718 groups: \n 719 ['static_config', 'system_status'] 720 721 fields: \n 722 - [0] = host_interface 723 */ 724 #define VL53L1_PAD_I2C_HV__CONFIG 0x002D 725 /*!< 726 type: uint8_t \n 727 default: 0x00 \n 728 info: \n 729 - msb = 7 730 - lsb = 0 731 - i2c_size = 1 732 733 groups: \n 734 ['static_config', 'gpio_config'] 735 736 fields: \n 737 - [0] = pad_scl_sda__vmodeint_hv 738 - [1] = i2c_pad__test_hv 739 - [2] = pad_scl__fpen_hv 740 - [4:3] = pad_scl__progdel_hv 741 - [5] = pad_sda__fpen_hv 742 - [7:6] = pad_sda__progdel_hv 743 */ 744 #define VL53L1_PAD_I2C_HV__EXTSUP_CONFIG 0x002E 745 /*!< 746 type: uint8_t \n 747 default: 0x00 \n 748 info: \n 749 - msb = 0 750 - lsb = 0 751 - i2c_size = 1 752 753 groups: \n 754 ['static_config', 'gpio_config'] 755 756 fields: \n 757 - [0] = pad_scl_sda__extsup_hv 758 */ 759 #define VL53L1_GPIO_HV_PAD__CTRL 0x002F 760 /*!< 761 type: uint8_t \n 762 default: 0x00 \n 763 info: \n 764 - msb = 1 765 - lsb = 0 766 - i2c_size = 1 767 768 groups: \n 769 ['static_config', 'gpio_config'] 770 771 fields: \n 772 - [0] = gpio__extsup_hv 773 - [1] = gpio__vmodeint_hv 774 */ 775 #define VL53L1_GPIO_HV_MUX__CTRL 0x0030 776 /*!< 777 type: uint8_t \n 778 default: 0x11 \n 779 info: \n 780 - msb = 4 781 - lsb = 0 782 - i2c_size = 1 783 784 groups: \n 785 ['static_config', 'gpio_config'] 786 787 fields: \n 788 - [3:0] = gpio__mux_select_hv 789 - [4] = gpio__mux_active_high_hv 790 */ 791 #define VL53L1_GPIO__TIO_HV_STATUS 0x0031 792 /*!< 793 type: uint8_t \n 794 default: 0x02 \n 795 info: \n 796 - msb = 1 797 - lsb = 0 798 - i2c_size = 1 799 800 groups: \n 801 ['static_config', 'gpio_config'] 802 803 fields: \n 804 - [0] = gpio__tio_hv 805 - [1] = fresh_out_of_reset 806 */ 807 #define VL53L1_GPIO__FIO_HV_STATUS 0x0032 808 /*!< 809 type: uint8_t \n 810 default: 0x00 \n 811 info: \n 812 - msb = 1 813 - lsb = 1 814 - i2c_size = 1 815 816 groups: \n 817 ['static_config', 'gpio_config'] 818 819 fields: \n 820 - [1] = gpio__fio_hv 821 */ 822 #define VL53L1_ANA_CONFIG__SPAD_SEL_PSWIDTH 0x0033 823 /*!< 824 type: uint8_t \n 825 default: 0x02 \n 826 info: \n 827 - msb = 2 828 - lsb = 0 829 - i2c_size = 1 830 831 groups: \n 832 ['static_config', 'analog_config'] 833 834 fields: \n 835 - [2:0] = spad_sel_pswidth 836 */ 837 #define VL53L1_ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET 0x0034 838 /*!< 839 type: uint8_t \n 840 default: 0x08 \n 841 info: \n 842 - msb = 4 843 - lsb = 0 844 - i2c_size = 1 845 846 groups: \n 847 ['static_config', 'analog_config'] 848 849 fields: \n 850 - [4:0] = vcsel_pulse_width_offset (fixed point 1.4) 851 */ 852 #define VL53L1_ANA_CONFIG__FAST_OSC__CONFIG_CTRL 0x0035 853 /*!< 854 type: uint8_t \n 855 default: 0x00 \n 856 info: \n 857 - msb = 0 858 - lsb = 0 859 - i2c_size = 1 860 861 groups: \n 862 ['static_config', 'analog_config'] 863 864 fields: \n 865 - [0] = osc_config__latch_bypass 866 */ 867 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS 0x0036 868 /*!< 869 type: uint8_t \n 870 default: 0x00 \n 871 info: \n 872 - msb = 7 873 - lsb = 0 874 - i2c_size = 1 875 876 groups: \n 877 ['static_config', 'algo_config'] 878 879 fields: \n 880 - [7:0] = sigma_estimator__eff_pulse_width 881 */ 882 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS 0x0037 883 /*!< 884 type: uint8_t \n 885 default: 0x00 \n 886 info: \n 887 - msb = 7 888 - lsb = 0 889 - i2c_size = 1 890 891 groups: \n 892 ['static_config', 'algo_config'] 893 894 fields: \n 895 - [7:0] = sigma_estimator__eff_ambient_width 896 */ 897 #define VL53L1_SIGMA_ESTIMATOR__SIGMA_REF_MM 0x0038 898 /*!< 899 type: uint8_t \n 900 default: 0x00 \n 901 info: \n 902 - msb = 7 903 - lsb = 0 904 - i2c_size = 1 905 906 groups: \n 907 ['static_config', 'algo_config'] 908 909 fields: \n 910 - [7:0] = sigma_estimator__sigma_ref 911 */ 912 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM 0x0039 913 /*!< 914 type: uint8_t \n 915 default: 0x14 \n 916 info: \n 917 - msb = 7 918 - lsb = 0 919 - i2c_size = 1 920 921 groups: \n 922 ['static_config', 'algo_config'] 923 924 fields: \n 925 - [7:0] = crosstalk_compensation_valid_height_mm 926 */ 927 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 0x003A 928 /*!< 929 type: uint8_t \n 930 default: 0x00 \n 931 info: \n 932 - msb = 7 933 - lsb = 0 934 - i2c_size = 1 935 936 groups: \n 937 ['static_config', 'algo_config'] 938 939 fields: \n 940 - [7:0] = static_config_spare_0 941 */ 942 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 0x003B 943 /*!< 944 type: uint8_t \n 945 default: 0x00 \n 946 info: \n 947 - msb = 7 948 - lsb = 0 949 - i2c_size = 1 950 951 groups: \n 952 ['static_config', 'algo_config'] 953 954 fields: \n 955 - [7:0] = static_config_spare_1 956 */ 957 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS 0x003C 958 /*!< 959 type: uint16_t \n 960 default: 0x0000 \n 961 info: \n 962 - msb = 15 963 - lsb = 0 964 - i2c_size = 2 965 966 groups: \n 967 ['static_config', 'algo_config'] 968 969 fields: \n 970 - [15:0] = range_ignore_thresh_mcps (fixed point 3.13) 971 */ 972 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI 0x003C 973 /*!< 974 info: \n 975 - msb = 0 976 - lsb = 0 977 - i2c_size = 1 978 */ 979 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO 0x003D 980 /*!< 981 info: \n 982 - msb = 0 983 - lsb = 0 984 - i2c_size = 1 985 */ 986 #define VL53L1_ALGO__RANGE_IGNORE_VALID_HEIGHT_MM 0x003E 987 /*!< 988 type: uint8_t \n 989 default: 0x00 \n 990 info: \n 991 - msb = 7 992 - lsb = 0 993 - i2c_size = 1 994 995 groups: \n 996 ['static_config', 'algo_config'] 997 998 fields: \n 999 - [7:0] = range_ignore_height_mm 1000 */ 1001 #define VL53L1_ALGO__RANGE_MIN_CLIP 0x003F 1002 /*!< 1003 type: uint8_t \n 1004 default: 0x8D \n 1005 info: \n 1006 - msb = 7 1007 - lsb = 0 1008 - i2c_size = 1 1009 1010 groups: \n 1011 ['static_config', 'algo_config'] 1012 1013 fields: \n 1014 - [0] = algo__range_min_clip_enable 1015 - [7:1] = algo__range_min_clip_value_mm 1016 */ 1017 #define VL53L1_ALGO__CONSISTENCY_CHECK__TOLERANCE 0x0040 1018 /*!< 1019 type: uint8_t \n 1020 default: 0x08 \n 1021 info: \n 1022 - msb = 3 1023 - lsb = 0 1024 - i2c_size = 1 1025 1026 groups: \n 1027 ['static_config', 'algo_config'] 1028 1029 fields: \n 1030 - [3:0] = consistency_check_tolerance (fixed point 1.3) 1031 */ 1032 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 0x0041 1033 /*!< 1034 type: uint8_t \n 1035 default: 0x00 \n 1036 info: \n 1037 - msb = 7 1038 - lsb = 0 1039 - i2c_size = 1 1040 1041 groups: \n 1042 ['static_config', 'algo_config'] 1043 1044 fields: \n 1045 - [7:0] = static_config_spare_2 1046 */ 1047 #define VL53L1_SD_CONFIG__RESET_STAGES_MSB 0x0042 1048 /*!< 1049 type: uint8_t \n 1050 default: 0x00 \n 1051 info: \n 1052 - msb = 3 1053 - lsb = 0 1054 - i2c_size = 1 1055 1056 groups: \n 1057 ['static_config', 'sigmadelta_config'] 1058 1059 fields: \n 1060 - [3:0] = loop_init__clear_stage 1061 */ 1062 #define VL53L1_SD_CONFIG__RESET_STAGES_LSB 0x0043 1063 /*!< 1064 type: uint8_t \n 1065 default: 0x00 \n 1066 info: \n 1067 - msb = 7 1068 - lsb = 0 1069 - i2c_size = 1 1070 1071 groups: \n 1072 ['static_config', 'sigmadelta_config'] 1073 1074 fields: \n 1075 - [7:4] = accum_reset__clear_stage 1076 - [3:0] = count_reset__clear_stage 1077 */ 1078 #define VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE 0x0044 1079 /*!< 1080 type: uint8_t \n 1081 default: 0x00 \n 1082 info: \n 1083 - msb = 7 1084 - lsb = 0 1085 - i2c_size = 1 1086 1087 groups: \n 1088 ['general_config', 'roi_config'] 1089 1090 fields: \n 1091 - [7:0] = stream_count_update_value 1092 */ 1093 #define VL53L1_GLOBAL_CONFIG__STREAM_DIVIDER 0x0045 1094 /*!< 1095 type: uint8_t \n 1096 default: 0x00 \n 1097 info: \n 1098 - msb = 7 1099 - lsb = 0 1100 - i2c_size = 1 1101 1102 groups: \n 1103 ['general_config', 'roi_config'] 1104 1105 fields: \n 1106 - [7:0] = stream_count_internal_div 1107 */ 1108 #define VL53L1_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046 1109 /*!< 1110 type: uint8_t \n 1111 default: 0x00 \n 1112 info: \n 1113 - msb = 7 1114 - lsb = 0 1115 - i2c_size = 1 1116 1117 groups: \n 1118 ['general_config', 'gph_config'] 1119 1120 fields: \n 1121 - [1:0] = int_mode_distance 1122 - [3:2] = int_mode_rate 1123 - [4] = int_spare 1124 - [5] = int_new_measure_ready 1125 - [6] = int_no_target_en 1126 - [7] = int_combined_mode 1127 */ 1128 #define VL53L1_CAL_CONFIG__VCSEL_START 0x0047 1129 /*!< 1130 type: uint8_t \n 1131 default: 0x0B \n 1132 info: \n 1133 - msb = 6 1134 - lsb = 0 1135 - i2c_size = 1 1136 1137 groups: \n 1138 ['general_config', 'cal_config'] 1139 1140 fields: \n 1141 - [6:0] = cal_config__vcsel_start 1142 */ 1143 #define VL53L1_CAL_CONFIG__REPEAT_RATE 0x0048 1144 /*!< 1145 type: uint16_t \n 1146 default: 0x0000 \n 1147 info: \n 1148 - msb = 11 1149 - lsb = 0 1150 - i2c_size = 2 1151 1152 groups: \n 1153 ['general_config', 'cal_config'] 1154 1155 fields: \n 1156 - [11:0] = cal_config__repeat_rate 1157 */ 1158 #define VL53L1_CAL_CONFIG__REPEAT_RATE_HI 0x0048 1159 /*!< 1160 info: \n 1161 - msb = 0 1162 - lsb = 0 1163 - i2c_size = 1 1164 */ 1165 #define VL53L1_CAL_CONFIG__REPEAT_RATE_LO 0x0049 1166 /*!< 1167 info: \n 1168 - msb = 0 1169 - lsb = 0 1170 - i2c_size = 1 1171 */ 1172 #define VL53L1_GLOBAL_CONFIG__VCSEL_WIDTH 0x004A 1173 /*!< 1174 type: uint8_t \n 1175 default: 0x02 \n 1176 info: \n 1177 - msb = 6 1178 - lsb = 0 1179 - i2c_size = 1 1180 1181 groups: \n 1182 ['general_config', 'global_config'] 1183 1184 fields: \n 1185 - [6:0] = global_config__vcsel_width 1186 */ 1187 #define VL53L1_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B 1188 /*!< 1189 type: uint8_t \n 1190 default: 0x04 \n 1191 info: \n 1192 - msb = 7 1193 - lsb = 0 1194 - i2c_size = 1 1195 1196 groups: \n 1197 ['general_config', 'phasecal_config'] 1198 1199 fields: \n 1200 - [7:0] = phasecal_config__timeout_macrop 1201 */ 1202 #define VL53L1_PHASECAL_CONFIG__TARGET 0x004C 1203 /*!< 1204 type: uint8_t \n 1205 default: 0x21 \n 1206 info: \n 1207 - msb = 7 1208 - lsb = 0 1209 - i2c_size = 1 1210 1211 groups: \n 1212 ['general_config', 'phasecal_config'] 1213 1214 fields: \n 1215 - [7:0] = algo_phasecal_lim 1216 */ 1217 #define VL53L1_PHASECAL_CONFIG__OVERRIDE 0x004D 1218 /*!< 1219 type: uint8_t \n 1220 default: 0x00 \n 1221 info: \n 1222 - msb = 0 1223 - lsb = 0 1224 - i2c_size = 1 1225 1226 groups: \n 1227 ['general_config', 'phasecal_config'] 1228 1229 fields: \n 1230 - [0] = phasecal_config__override 1231 */ 1232 #define VL53L1_DSS_CONFIG__ROI_MODE_CONTROL 0x004F 1233 /*!< 1234 type: uint8_t \n 1235 default: 0x01 \n 1236 info: \n 1237 - msb = 2 1238 - lsb = 0 1239 - i2c_size = 1 1240 1241 groups: \n 1242 ['general_config', 'dss_config'] 1243 1244 fields: \n 1245 - [1:0] = dss_config__input_mode 1246 - [2] = calculate_roi_enable 1247 */ 1248 #define VL53L1_SYSTEM__THRESH_RATE_HIGH 0x0050 1249 /*!< 1250 type: uint16_t \n 1251 default: 0x0000 \n 1252 info: \n 1253 - msb = 15 1254 - lsb = 0 1255 - i2c_size = 2 1256 1257 groups: \n 1258 ['general_config', 'gph_config'] 1259 1260 fields: \n 1261 - [15:0] = thresh_rate_high (fixed point 9.7) 1262 */ 1263 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_HI 0x0050 1264 /*!< 1265 info: \n 1266 - msb = 0 1267 - lsb = 0 1268 - i2c_size = 1 1269 */ 1270 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_LO 0x0051 1271 /*!< 1272 info: \n 1273 - msb = 0 1274 - lsb = 0 1275 - i2c_size = 1 1276 */ 1277 #define VL53L1_SYSTEM__THRESH_RATE_LOW 0x0052 1278 /*!< 1279 type: uint16_t \n 1280 default: 0x0000 \n 1281 info: \n 1282 - msb = 15 1283 - lsb = 0 1284 - i2c_size = 2 1285 1286 groups: \n 1287 ['general_config', 'gph_config'] 1288 1289 fields: \n 1290 - [15:0] = thresh_rate_low (fixed point 9.7) 1291 */ 1292 #define VL53L1_SYSTEM__THRESH_RATE_LOW_HI 0x0052 1293 /*!< 1294 info: \n 1295 - msb = 0 1296 - lsb = 0 1297 - i2c_size = 1 1298 */ 1299 #define VL53L1_SYSTEM__THRESH_RATE_LOW_LO 0x0053 1300 /*!< 1301 info: \n 1302 - msb = 0 1303 - lsb = 0 1304 - i2c_size = 1 1305 */ 1306 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0054 1307 /*!< 1308 type: uint16_t \n 1309 default: 0x0000 \n 1310 info: \n 1311 - msb = 15 1312 - lsb = 0 1313 - i2c_size = 2 1314 1315 groups: \n 1316 ['general_config', 'dss_config'] 1317 1318 fields: \n 1319 - [15:0] = dss_config__manual_effective_spads_select 1320 */ 1321 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0054 1322 /*!< 1323 info: \n 1324 - msb = 0 1325 - lsb = 0 1326 - i2c_size = 1 1327 */ 1328 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0055 1329 /*!< 1330 info: \n 1331 - msb = 0 1332 - lsb = 0 1333 - i2c_size = 1 1334 */ 1335 #define VL53L1_DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0056 1336 /*!< 1337 type: uint8_t \n 1338 default: 0x00 \n 1339 info: \n 1340 - msb = 7 1341 - lsb = 0 1342 - i2c_size = 1 1343 1344 groups: \n 1345 ['general_config', 'dss_config'] 1346 1347 fields: \n 1348 - [7:0] = dss_config__manual_block_select 1349 */ 1350 #define VL53L1_DSS_CONFIG__APERTURE_ATTENUATION 0x0057 1351 /*!< 1352 type: uint8_t \n 1353 default: 0x33 \n 1354 info: \n 1355 - msb = 7 1356 - lsb = 0 1357 - i2c_size = 1 1358 1359 groups: \n 1360 ['general_config', 'dss_config'] 1361 1362 fields: \n 1363 - [7:0] = dss_config__aperture_attenuation 1364 */ 1365 #define VL53L1_DSS_CONFIG__MAX_SPADS_LIMIT 0x0058 1366 /*!< 1367 type: uint8_t \n 1368 default: 0xFF \n 1369 info: \n 1370 - msb = 7 1371 - lsb = 0 1372 - i2c_size = 1 1373 1374 groups: \n 1375 ['general_config', 'dss_config'] 1376 1377 fields: \n 1378 - [7:0] = dss_config__max_spads_limit 1379 */ 1380 #define VL53L1_DSS_CONFIG__MIN_SPADS_LIMIT 0x0059 1381 /*!< 1382 type: uint8_t \n 1383 default: 0x01 \n 1384 info: \n 1385 - msb = 7 1386 - lsb = 0 1387 - i2c_size = 1 1388 1389 groups: \n 1390 ['general_config', 'dss_config'] 1391 1392 fields: \n 1393 - [7:0] = dss_config__min_spads_limit 1394 */ 1395 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI 0x005A 1396 /*!< 1397 type: uint8_t \n 1398 default: 0x00 \n 1399 info: \n 1400 - msb = 3 1401 - lsb = 0 1402 - i2c_size = 1 1403 1404 groups: \n 1405 ['timing_config', 'mm_config'] 1406 1407 fields: \n 1408 - [3:0] = mm_config__config_timeout_macrop_a_hi 1409 */ 1410 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_LO 0x005B 1411 /*!< 1412 type: uint8_t \n 1413 default: 0x06 \n 1414 info: \n 1415 - msb = 7 1416 - lsb = 0 1417 - i2c_size = 1 1418 1419 groups: \n 1420 ['timing_config', 'mm_config'] 1421 1422 fields: \n 1423 - [7:0] = mm_config__config_timeout_macrop_a_lo 1424 */ 1425 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_HI 0x005C 1426 /*!< 1427 type: uint8_t \n 1428 default: 0x00 \n 1429 info: \n 1430 - msb = 3 1431 - lsb = 0 1432 - i2c_size = 1 1433 1434 groups: \n 1435 ['timing_config', 'mm_config'] 1436 1437 fields: \n 1438 - [3:0] = mm_config__config_timeout_macrop_b_hi 1439 */ 1440 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_LO 0x005D 1441 /*!< 1442 type: uint8_t \n 1443 default: 0x06 \n 1444 info: \n 1445 - msb = 7 1446 - lsb = 0 1447 - i2c_size = 1 1448 1449 groups: \n 1450 ['timing_config', 'mm_config'] 1451 1452 fields: \n 1453 - [7:0] = mm_config__config_timeout_macrop_b_lo 1454 */ 1455 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x005E 1456 /*!< 1457 type: uint8_t \n 1458 default: 0x01 \n 1459 info: \n 1460 - msb = 3 1461 - lsb = 0 1462 - i2c_size = 1 1463 1464 groups: \n 1465 ['timing_config', 'range_config'] 1466 1467 fields: \n 1468 - [3:0] = range_timeout_overall_periods_macrop_a_hi 1469 */ 1470 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x005F 1471 /*!< 1472 type: uint8_t \n 1473 default: 0x92 \n 1474 info: \n 1475 - msb = 7 1476 - lsb = 0 1477 - i2c_size = 1 1478 1479 groups: \n 1480 ['timing_config', 'range_config'] 1481 1482 fields: \n 1483 - [7:0] = range_timeout_overall_periods_macrop_a_lo 1484 */ 1485 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060 1486 /*!< 1487 type: uint8_t \n 1488 default: 0x0B \n 1489 info: \n 1490 - msb = 5 1491 - lsb = 0 1492 - i2c_size = 1 1493 1494 groups: \n 1495 ['timing_config', 'range_config'] 1496 1497 fields: \n 1498 - [5:0] = range_config__vcsel_period_a 1499 */ 1500 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0061 1501 /*!< 1502 type: uint8_t \n 1503 default: 0x01 \n 1504 info: \n 1505 - msb = 3 1506 - lsb = 0 1507 - i2c_size = 1 1508 1509 groups: \n 1510 ['timing_config', 'range_config'] 1511 1512 fields: \n 1513 - [3:0] = range_timeout_overall_periods_macrop_b_hi 1514 */ 1515 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0062 1516 /*!< 1517 type: uint8_t \n 1518 default: 0x92 \n 1519 info: \n 1520 - msb = 7 1521 - lsb = 0 1522 - i2c_size = 1 1523 1524 groups: \n 1525 ['timing_config', 'range_config'] 1526 1527 fields: \n 1528 - [7:0] = range_timeout_overall_periods_macrop_b_lo 1529 */ 1530 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063 1531 /*!< 1532 type: uint8_t \n 1533 default: 0x09 \n 1534 info: \n 1535 - msb = 5 1536 - lsb = 0 1537 - i2c_size = 1 1538 1539 groups: \n 1540 ['timing_config', 'range_config'] 1541 1542 fields: \n 1543 - [5:0] = range_config__vcsel_period_b 1544 */ 1545 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH 0x0064 1546 /*!< 1547 type: uint16_t \n 1548 default: 0x0080 \n 1549 info: \n 1550 - msb = 15 1551 - lsb = 0 1552 - i2c_size = 2 1553 1554 groups: \n 1555 ['timing_config', 'range_config'] 1556 1557 fields: \n 1558 - [15:0] = range_config__sigma_thresh (fixed point 14.2) 1559 */ 1560 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_HI 0x0064 1561 /*!< 1562 info: \n 1563 - msb = 0 1564 - lsb = 0 1565 - i2c_size = 1 1566 */ 1567 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_LO 0x0065 1568 /*!< 1569 info: \n 1570 - msb = 0 1571 - lsb = 0 1572 - i2c_size = 1 1573 */ 1574 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0066 1575 /*!< 1576 type: uint16_t \n 1577 default: 0x0000 \n 1578 info: \n 1579 - msb = 15 1580 - lsb = 0 1581 - i2c_size = 2 1582 1583 groups: \n 1584 ['timing_config', 'range_config'] 1585 1586 fields: \n 1587 - [15:0] = range_config__min_count_rate_rtn_limit_mcps (fixed point 9.7) 1588 */ 1589 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0066 1590 /*!< 1591 info: \n 1592 - msb = 0 1593 - lsb = 0 1594 - i2c_size = 1 1595 */ 1596 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0067 1597 /*!< 1598 info: \n 1599 - msb = 0 1600 - lsb = 0 1601 - i2c_size = 1 1602 */ 1603 #define VL53L1_RANGE_CONFIG__VALID_PHASE_LOW 0x0068 1604 /*!< 1605 type: uint8_t \n 1606 default: 0x08 \n 1607 info: \n 1608 - msb = 7 1609 - lsb = 0 1610 - i2c_size = 1 1611 1612 groups: \n 1613 ['timing_config', 'range_config'] 1614 1615 fields: \n 1616 - [7:0] = range_config__valid_phase_low (fixed point 5.3) 1617 */ 1618 #define VL53L1_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069 1619 /*!< 1620 type: uint8_t \n 1621 default: 0x80 \n 1622 info: \n 1623 - msb = 7 1624 - lsb = 0 1625 - i2c_size = 1 1626 1627 groups: \n 1628 ['timing_config', 'range_config'] 1629 1630 fields: \n 1631 - [7:0] = range_config__valid_phase_high (fixed point 5.3) 1632 */ 1633 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C 1634 /*!< 1635 type: uint32_t \n 1636 default: 0x00000000 \n 1637 info: \n 1638 - msb = 31 1639 - lsb = 0 1640 - i2c_size = 4 1641 1642 groups: \n 1643 ['timing_config', 'system_config'] 1644 1645 fields: \n 1646 - [31:0] = intermeasurement_period 1647 */ 1648 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_3 0x006C 1649 /*!< 1650 info: \n 1651 - msb = 0 1652 - lsb = 0 1653 - i2c_size = 1 1654 */ 1655 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_2 0x006D 1656 /*!< 1657 info: \n 1658 - msb = 0 1659 - lsb = 0 1660 - i2c_size = 1 1661 */ 1662 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_1 0x006E 1663 /*!< 1664 info: \n 1665 - msb = 0 1666 - lsb = 0 1667 - i2c_size = 1 1668 */ 1669 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_0 0x006F 1670 /*!< 1671 info: \n 1672 - msb = 0 1673 - lsb = 0 1674 - i2c_size = 1 1675 */ 1676 #define VL53L1_SYSTEM__FRACTIONAL_ENABLE 0x0070 1677 /*!< 1678 type: uint8_t \n 1679 default: 0x00 \n 1680 info: \n 1681 - msb = 0 1682 - lsb = 0 1683 - i2c_size = 1 1684 1685 groups: \n 1686 ['timing_config', 'system_config'] 1687 1688 fields: \n 1689 - [0] = range_fractional_enable 1690 */ 1691 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0 0x0071 1692 /*!< 1693 type: uint8_t \n 1694 default: 0x00 \n 1695 info: \n 1696 - msb = 1 1697 - lsb = 0 1698 - i2c_size = 1 1699 1700 groups: \n 1701 ['dynamic_config', 'gph_config'] 1702 1703 fields: \n 1704 - [0] = grouped_parameter_hold 1705 - [1] = grouped_parameter_hold_id 1706 */ 1707 #define VL53L1_SYSTEM__THRESH_HIGH 0x0072 1708 /*!< 1709 type: uint16_t \n 1710 default: 0x0000 \n 1711 info: \n 1712 - msb = 15 1713 - lsb = 0 1714 - i2c_size = 2 1715 1716 groups: \n 1717 ['dynamic_config', 'gph_config'] 1718 1719 fields: \n 1720 - [15:0] = thresh_high 1721 */ 1722 #define VL53L1_SYSTEM__THRESH_HIGH_HI 0x0072 1723 /*!< 1724 info: \n 1725 - msb = 0 1726 - lsb = 0 1727 - i2c_size = 1 1728 */ 1729 #define VL53L1_SYSTEM__THRESH_HIGH_LO 0x0073 1730 /*!< 1731 info: \n 1732 - msb = 0 1733 - lsb = 0 1734 - i2c_size = 1 1735 */ 1736 #define VL53L1_SYSTEM__THRESH_LOW 0x0074 1737 /*!< 1738 type: uint16_t \n 1739 default: 0x0000 \n 1740 info: \n 1741 - msb = 15 1742 - lsb = 0 1743 - i2c_size = 2 1744 1745 groups: \n 1746 ['dynamic_config', 'gph_config'] 1747 1748 fields: \n 1749 - [15:0] = thresh_low 1750 */ 1751 #define VL53L1_SYSTEM__THRESH_LOW_HI 0x0074 1752 /*!< 1753 info: \n 1754 - msb = 0 1755 - lsb = 0 1756 - i2c_size = 1 1757 */ 1758 #define VL53L1_SYSTEM__THRESH_LOW_LO 0x0075 1759 /*!< 1760 info: \n 1761 - msb = 0 1762 - lsb = 0 1763 - i2c_size = 1 1764 */ 1765 #define VL53L1_SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x0076 1766 /*!< 1767 type: uint8_t \n 1768 default: 0x00 \n 1769 info: \n 1770 - msb = 0 1771 - lsb = 0 1772 - i2c_size = 1 1773 1774 groups: \n 1775 ['dynamic_config', 'gph_config'] 1776 1777 fields: \n 1778 - [0] = system__enable_xtalk_per_quadrant 1779 */ 1780 #define VL53L1_SYSTEM__SEED_CONFIG 0x0077 1781 /*!< 1782 type: uint8_t \n 1783 default: 0x00 \n 1784 info: \n 1785 - msb = 2 1786 - lsb = 0 1787 - i2c_size = 1 1788 1789 groups: \n 1790 ['dynamic_config', 'gph_config'] 1791 1792 fields: \n 1793 - [1:0] = system__seed_config 1794 - [2] = system__fw_pause_ctrl 1795 */ 1796 #define VL53L1_SD_CONFIG__WOI_SD0 0x0078 1797 /*!< 1798 type: uint8_t \n 1799 default: 0x04 \n 1800 info: \n 1801 - msb = 7 1802 - lsb = 0 1803 - i2c_size = 1 1804 1805 groups: \n 1806 ['dynamic_config', 'gph_config'] 1807 1808 fields: \n 1809 - [7:0] = sd_config__woi_sd0 1810 */ 1811 #define VL53L1_SD_CONFIG__WOI_SD1 0x0079 1812 /*!< 1813 type: uint8_t \n 1814 default: 0x04 \n 1815 info: \n 1816 - msb = 7 1817 - lsb = 0 1818 - i2c_size = 1 1819 1820 groups: \n 1821 ['dynamic_config', 'gph_config'] 1822 1823 fields: \n 1824 - [7:0] = sd_config__woi_sd1 1825 */ 1826 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD0 0x007A 1827 /*!< 1828 type: uint8_t \n 1829 default: 0x03 \n 1830 info: \n 1831 - msb = 6 1832 - lsb = 0 1833 - i2c_size = 1 1834 1835 groups: \n 1836 ['dynamic_config', 'gph_config'] 1837 1838 fields: \n 1839 - [6:0] = sd_config__initial_phase_sd0 1840 */ 1841 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD1 0x007B 1842 /*!< 1843 type: uint8_t \n 1844 default: 0x03 \n 1845 info: \n 1846 - msb = 6 1847 - lsb = 0 1848 - i2c_size = 1 1849 1850 groups: \n 1851 ['dynamic_config', 'gph_config'] 1852 1853 fields: \n 1854 - [6:0] = sd_config__initial_phase_sd1 1855 */ 1856 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_1 0x007C 1857 /*!< 1858 type: uint8_t \n 1859 default: 0x00 \n 1860 info: \n 1861 - msb = 1 1862 - lsb = 0 1863 - i2c_size = 1 1864 1865 groups: \n 1866 ['dynamic_config', 'gph_config'] 1867 1868 fields: \n 1869 - [0] = grouped_parameter_hold 1870 - [1] = grouped_parameter_hold_id 1871 */ 1872 #define VL53L1_SD_CONFIG__FIRST_ORDER_SELECT 0x007D 1873 /*!< 1874 type: uint8_t \n 1875 default: 0x00 \n 1876 info: \n 1877 - msb = 1 1878 - lsb = 0 1879 - i2c_size = 1 1880 1881 groups: \n 1882 ['dynamic_config', 'gph_config'] 1883 1884 fields: \n 1885 - [0] = sd_config__first_order_select_rtn 1886 - [1] = sd_config__first_order_select_ref 1887 */ 1888 #define VL53L1_SD_CONFIG__QUANTIFIER 0x007E 1889 /*!< 1890 type: uint8_t \n 1891 default: 0x00 \n 1892 info: \n 1893 - msb = 3 1894 - lsb = 0 1895 - i2c_size = 1 1896 1897 groups: \n 1898 ['dynamic_config', 'gph_config'] 1899 1900 fields: \n 1901 - [3:0] = sd_config__quantifier 1902 */ 1903 #define VL53L1_ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x007F 1904 /*!< 1905 type: uint8_t \n 1906 default: 0x00 \n 1907 info: \n 1908 - msb = 7 1909 - lsb = 0 1910 - i2c_size = 1 1911 1912 groups: \n 1913 ['dynamic_config', 'gph_config'] 1914 1915 fields: \n 1916 - [7:0] = user_roi_center_spad 1917 */ 1918 #define VL53L1_ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x0080 1919 /*!< 1920 type: uint8_t \n 1921 default: 0x00 \n 1922 info: \n 1923 - msb = 7 1924 - lsb = 0 1925 - i2c_size = 1 1926 1927 groups: \n 1928 ['dynamic_config', 'gph_config'] 1929 1930 fields: \n 1931 - [7:0] = roi_config__user_roi_requested_global_xy_size 1932 */ 1933 #define VL53L1_SYSTEM__SEQUENCE_CONFIG 0x0081 1934 /*!< 1935 type: uint8_t \n 1936 default: 0xFF \n 1937 info: \n 1938 - msb = 7 1939 - lsb = 0 1940 - i2c_size = 1 1941 1942 groups: \n 1943 ['dynamic_config', 'gph_config'] 1944 1945 fields: \n 1946 - [0] = sequence_vhv_en 1947 - [1] = sequence_phasecal_en 1948 - [2] = sequence_reference_phase_en 1949 - [3] = sequence_dss1_en 1950 - [4] = sequence_dss2_en 1951 - [5] = sequence_mm1_en 1952 - [6] = sequence_mm2_en 1953 - [7] = sequence_range_en 1954 */ 1955 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD 0x0082 1956 /*!< 1957 type: uint8_t \n 1958 default: 0x00 \n 1959 info: \n 1960 - msb = 1 1961 - lsb = 0 1962 - i2c_size = 1 1963 1964 groups: \n 1965 ['dynamic_config', 'gph_config'] 1966 1967 fields: \n 1968 - [0] = grouped_parameter_hold 1969 - [1] = grouped_parameter_hold_id 1970 */ 1971 #define VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE 0x0083 1972 /*!< 1973 type: uint8_t \n 1974 default: 0x00 \n 1975 info: \n 1976 - msb = 0 1977 - lsb = 0 1978 - i2c_size = 1 1979 1980 groups: \n 1981 ['system_control', 'pwrman_ctrl'] 1982 1983 fields: \n 1984 - [0] = go1_dig_powerforce 1985 */ 1986 #define VL53L1_SYSTEM__STREAM_COUNT_CTRL 0x0084 1987 /*!< 1988 type: uint8_t \n 1989 default: 0x00 \n 1990 info: \n 1991 - msb = 0 1992 - lsb = 0 1993 - i2c_size = 1 1994 1995 groups: \n 1996 ['system_control', 'stream_ctrl'] 1997 1998 fields: \n 1999 - [0] = retain_stream_count 2000 */ 2001 #define VL53L1_FIRMWARE__ENABLE 0x0085 2002 /*!< 2003 type: uint8_t \n 2004 default: 0x01 \n 2005 info: \n 2006 - msb = 0 2007 - lsb = 0 2008 - i2c_size = 1 2009 2010 groups: \n 2011 ['system_control', 'firmware_ctrl'] 2012 2013 fields: \n 2014 - [0] = firmware_enable 2015 */ 2016 #define VL53L1_SYSTEM__INTERRUPT_CLEAR 0x0086 2017 /*!< 2018 type: uint8_t \n 2019 default: 0x00 \n 2020 info: \n 2021 - msb = 1 2022 - lsb = 0 2023 - i2c_size = 1 2024 2025 groups: \n 2026 ['system_control', 'system_int_clr'] 2027 2028 fields: \n 2029 - [0] = sys_interrupt_clear_range 2030 - [1] = sys_interrupt_clear_error 2031 */ 2032 #define VL53L1_SYSTEM__MODE_START 0x0087 2033 /*!< 2034 type: uint8_t \n 2035 default: 0x00 \n 2036 info: \n 2037 - msb = 7 2038 - lsb = 0 2039 - i2c_size = 1 2040 2041 groups: \n 2042 ['system_control', 'system_start'] 2043 2044 fields: \n 2045 - [1:0] = scheduler_mode 2046 - [3:2] = readout_mode 2047 - [4] = mode_range__single_shot 2048 - [5] = mode_range__back_to_back 2049 - [6] = mode_range__timed 2050 - [7] = mode_range__abort 2051 */ 2052 #define VL53L1_RESULT__INTERRUPT_STATUS 0x0088 2053 /*!< 2054 type: uint8_t \n 2055 default: 0x00 \n 2056 info: \n 2057 - msb = 5 2058 - lsb = 0 2059 - i2c_size = 1 2060 2061 groups: \n 2062 ['system_results', 'results'] 2063 2064 fields: \n 2065 - [2:0] = int_status 2066 - [4:3] = int_error_status 2067 - [5] = gph_id_gpio_status 2068 */ 2069 #define VL53L1_RESULT__RANGE_STATUS 0x0089 2070 /*!< 2071 type: uint8_t \n 2072 default: 0x00 \n 2073 info: \n 2074 - msb = 7 2075 - lsb = 0 2076 - i2c_size = 1 2077 2078 groups: \n 2079 ['system_results', 'results'] 2080 2081 fields: \n 2082 - [4:0] = range_status 2083 - [5] = max_threshold_hit 2084 - [6] = min_threshold_hit 2085 - [7] = gph_id_range_status 2086 */ 2087 #define VL53L1_RESULT__REPORT_STATUS 0x008A 2088 /*!< 2089 type: uint8_t \n 2090 default: 0x00 \n 2091 info: \n 2092 - msb = 3 2093 - lsb = 0 2094 - i2c_size = 1 2095 2096 groups: \n 2097 ['system_results', 'results'] 2098 2099 fields: \n 2100 - [3:0] = report_status 2101 */ 2102 #define VL53L1_RESULT__STREAM_COUNT 0x008B 2103 /*!< 2104 type: uint8_t \n 2105 default: 0x00 \n 2106 info: \n 2107 - msb = 7 2108 - lsb = 0 2109 - i2c_size = 1 2110 2111 groups: \n 2112 ['system_results', 'results'] 2113 2114 fields: \n 2115 - [7:0] = result__stream_count 2116 */ 2117 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x008C 2118 /*!< 2119 type: uint16_t \n 2120 default: 0x0000 \n 2121 info: \n 2122 - msb = 15 2123 - lsb = 0 2124 - i2c_size = 2 2125 2126 groups: \n 2127 ['system_results', 'results'] 2128 2129 fields: \n 2130 - [15:0] = result__dss_actual_effective_spads_sd0 (fixed point 8.8) 2131 */ 2132 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x008C 2133 /*!< 2134 info: \n 2135 - msb = 0 2136 - lsb = 0 2137 - i2c_size = 1 2138 */ 2139 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x008D 2140 /*!< 2141 info: \n 2142 - msb = 0 2143 - lsb = 0 2144 - i2c_size = 1 2145 */ 2146 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x008E 2147 /*!< 2148 type: uint16_t \n 2149 default: 0x0000 \n 2150 info: \n 2151 - msb = 15 2152 - lsb = 0 2153 - i2c_size = 2 2154 2155 groups: \n 2156 ['system_results', 'results'] 2157 2158 fields: \n 2159 - [15:0] = result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 2160 */ 2161 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x008E 2162 /*!< 2163 info: \n 2164 - msb = 0 2165 - lsb = 0 2166 - i2c_size = 1 2167 */ 2168 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x008F 2169 /*!< 2170 info: \n 2171 - msb = 0 2172 - lsb = 0 2173 - i2c_size = 1 2174 */ 2175 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0090 2176 /*!< 2177 type: uint16_t \n 2178 default: 0x0000 \n 2179 info: \n 2180 - msb = 15 2181 - lsb = 0 2182 - i2c_size = 2 2183 2184 groups: \n 2185 ['system_results', 'results'] 2186 2187 fields: \n 2188 - [15:0] = result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 2189 */ 2190 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0090 2191 /*!< 2192 info: \n 2193 - msb = 0 2194 - lsb = 0 2195 - i2c_size = 1 2196 */ 2197 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0091 2198 /*!< 2199 info: \n 2200 - msb = 0 2201 - lsb = 0 2202 - i2c_size = 1 2203 */ 2204 #define VL53L1_RESULT__SIGMA_SD0 0x0092 2205 /*!< 2206 type: uint16_t \n 2207 default: 0x0000 \n 2208 info: \n 2209 - msb = 15 2210 - lsb = 0 2211 - i2c_size = 2 2212 2213 groups: \n 2214 ['system_results', 'results'] 2215 2216 fields: \n 2217 - [15:0] = result__sigma_sd0 (fixed point 14.2) 2218 */ 2219 #define VL53L1_RESULT__SIGMA_SD0_HI 0x0092 2220 /*!< 2221 info: \n 2222 - msb = 0 2223 - lsb = 0 2224 - i2c_size = 1 2225 */ 2226 #define VL53L1_RESULT__SIGMA_SD0_LO 0x0093 2227 /*!< 2228 info: \n 2229 - msb = 0 2230 - lsb = 0 2231 - i2c_size = 1 2232 */ 2233 #define VL53L1_RESULT__PHASE_SD0 0x0094 2234 /*!< 2235 type: uint16_t \n 2236 default: 0x0000 \n 2237 info: \n 2238 - msb = 15 2239 - lsb = 0 2240 - i2c_size = 2 2241 2242 groups: \n 2243 ['system_results', 'results'] 2244 2245 fields: \n 2246 - [15:0] = result__phase_sd0 (fixed point 5.11) 2247 */ 2248 #define VL53L1_RESULT__PHASE_SD0_HI 0x0094 2249 /*!< 2250 info: \n 2251 - msb = 0 2252 - lsb = 0 2253 - i2c_size = 1 2254 */ 2255 #define VL53L1_RESULT__PHASE_SD0_LO 0x0095 2256 /*!< 2257 info: \n 2258 - msb = 0 2259 - lsb = 0 2260 - i2c_size = 1 2261 */ 2262 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096 2263 /*!< 2264 type: uint16_t \n 2265 default: 0x0000 \n 2266 info: \n 2267 - msb = 15 2268 - lsb = 0 2269 - i2c_size = 2 2270 2271 groups: \n 2272 ['system_results', 'results'] 2273 2274 fields: \n 2275 - [15:0] = result__final_crosstalk_corrected_range_mm_sd0 2276 */ 2277 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0096 2278 /*!< 2279 info: \n 2280 - msb = 0 2281 - lsb = 0 2282 - i2c_size = 1 2283 */ 2284 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0097 2285 /*!< 2286 info: \n 2287 - msb = 0 2288 - lsb = 0 2289 - i2c_size = 1 2290 */ 2291 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0098 2292 /*!< 2293 type: uint16_t \n 2294 default: 0x0000 \n 2295 info: \n 2296 - msb = 15 2297 - lsb = 0 2298 - i2c_size = 2 2299 2300 groups: \n 2301 ['system_results', 'results'] 2302 2303 fields: \n 2304 - [15:0] = result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 2305 */ 2306 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0098 2307 /*!< 2308 info: \n 2309 - msb = 0 2310 - lsb = 0 2311 - i2c_size = 1 2312 */ 2313 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0099 2314 /*!< 2315 info: \n 2316 - msb = 0 2317 - lsb = 0 2318 - i2c_size = 1 2319 */ 2320 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009A 2321 /*!< 2322 type: uint16_t \n 2323 default: 0x0000 \n 2324 info: \n 2325 - msb = 15 2326 - lsb = 0 2327 - i2c_size = 2 2328 2329 groups: \n 2330 ['system_results', 'results'] 2331 2332 fields: \n 2333 - [15:0] = result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 2334 */ 2335 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009A 2336 /*!< 2337 info: \n 2338 - msb = 0 2339 - lsb = 0 2340 - i2c_size = 1 2341 */ 2342 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009B 2343 /*!< 2344 info: \n 2345 - msb = 0 2346 - lsb = 0 2347 - i2c_size = 1 2348 */ 2349 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009C 2350 /*!< 2351 type: uint16_t \n 2352 default: 0x0000 \n 2353 info: \n 2354 - msb = 15 2355 - lsb = 0 2356 - i2c_size = 2 2357 2358 groups: \n 2359 ['system_results', 'results'] 2360 2361 fields: \n 2362 - [15:0] = result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 2363 */ 2364 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009C 2365 /*!< 2366 info: \n 2367 - msb = 0 2368 - lsb = 0 2369 - i2c_size = 1 2370 */ 2371 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009D 2372 /*!< 2373 info: \n 2374 - msb = 0 2375 - lsb = 0 2376 - i2c_size = 1 2377 */ 2378 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x009E 2379 /*!< 2380 type: uint16_t \n 2381 default: 0x0000 \n 2382 info: \n 2383 - msb = 15 2384 - lsb = 0 2385 - i2c_size = 2 2386 2387 groups: \n 2388 ['system_results', 'results'] 2389 2390 fields: \n 2391 - [15:0] = result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 2392 */ 2393 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x009E 2394 /*!< 2395 info: \n 2396 - msb = 0 2397 - lsb = 0 2398 - i2c_size = 1 2399 */ 2400 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x009F 2401 /*!< 2402 info: \n 2403 - msb = 0 2404 - lsb = 0 2405 - i2c_size = 1 2406 */ 2407 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x00A0 2408 /*!< 2409 type: uint16_t \n 2410 default: 0x0000 \n 2411 info: \n 2412 - msb = 15 2413 - lsb = 0 2414 - i2c_size = 2 2415 2416 groups: \n 2417 ['system_results', 'results'] 2418 2419 fields: \n 2420 - [15:0] = result__dss_actual_effective_spads_sd1 (fixed point 8.8) 2421 */ 2422 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x00A0 2423 /*!< 2424 info: \n 2425 - msb = 0 2426 - lsb = 0 2427 - i2c_size = 1 2428 */ 2429 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x00A1 2430 /*!< 2431 info: \n 2432 - msb = 0 2433 - lsb = 0 2434 - i2c_size = 1 2435 */ 2436 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x00A2 2437 /*!< 2438 type: uint16_t \n 2439 default: 0x0000 \n 2440 info: \n 2441 - msb = 15 2442 - lsb = 0 2443 - i2c_size = 2 2444 2445 groups: \n 2446 ['system_results', 'results'] 2447 2448 fields: \n 2449 - [15:0] = result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 2450 */ 2451 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x00A2 2452 /*!< 2453 info: \n 2454 - msb = 0 2455 - lsb = 0 2456 - i2c_size = 1 2457 */ 2458 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x00A3 2459 /*!< 2460 info: \n 2461 - msb = 0 2462 - lsb = 0 2463 - i2c_size = 1 2464 */ 2465 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x00A4 2466 /*!< 2467 type: uint16_t \n 2468 default: 0x0000 \n 2469 info: \n 2470 - msb = 15 2471 - lsb = 0 2472 - i2c_size = 2 2473 2474 groups: \n 2475 ['system_results', 'results'] 2476 2477 fields: \n 2478 - [15:0] = result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 2479 */ 2480 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x00A4 2481 /*!< 2482 info: \n 2483 - msb = 0 2484 - lsb = 0 2485 - i2c_size = 1 2486 */ 2487 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x00A5 2488 /*!< 2489 info: \n 2490 - msb = 0 2491 - lsb = 0 2492 - i2c_size = 1 2493 */ 2494 #define VL53L1_RESULT__SIGMA_SD1 0x00A6 2495 /*!< 2496 type: uint16_t \n 2497 default: 0x0000 \n 2498 info: \n 2499 - msb = 15 2500 - lsb = 0 2501 - i2c_size = 2 2502 2503 groups: \n 2504 ['system_results', 'results'] 2505 2506 fields: \n 2507 - [15:0] = result__sigma_sd1 (fixed point 14.2) 2508 */ 2509 #define VL53L1_RESULT__SIGMA_SD1_HI 0x00A6 2510 /*!< 2511 info: \n 2512 - msb = 0 2513 - lsb = 0 2514 - i2c_size = 1 2515 */ 2516 #define VL53L1_RESULT__SIGMA_SD1_LO 0x00A7 2517 /*!< 2518 info: \n 2519 - msb = 0 2520 - lsb = 0 2521 - i2c_size = 1 2522 */ 2523 #define VL53L1_RESULT__PHASE_SD1 0x00A8 2524 /*!< 2525 type: uint16_t \n 2526 default: 0x0000 \n 2527 info: \n 2528 - msb = 15 2529 - lsb = 0 2530 - i2c_size = 2 2531 2532 groups: \n 2533 ['system_results', 'results'] 2534 2535 fields: \n 2536 - [15:0] = result__phase_sd1 (fixed point 5.11) 2537 */ 2538 #define VL53L1_RESULT__PHASE_SD1_HI 0x00A8 2539 /*!< 2540 info: \n 2541 - msb = 0 2542 - lsb = 0 2543 - i2c_size = 1 2544 */ 2545 #define VL53L1_RESULT__PHASE_SD1_LO 0x00A9 2546 /*!< 2547 info: \n 2548 - msb = 0 2549 - lsb = 0 2550 - i2c_size = 1 2551 */ 2552 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x00AA 2553 /*!< 2554 type: uint16_t \n 2555 default: 0x0000 \n 2556 info: \n 2557 - msb = 15 2558 - lsb = 0 2559 - i2c_size = 2 2560 2561 groups: \n 2562 ['system_results', 'results'] 2563 2564 fields: \n 2565 - [15:0] = result__final_crosstalk_corrected_range_mm_sd1 2566 */ 2567 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x00AA 2568 /*!< 2569 info: \n 2570 - msb = 0 2571 - lsb = 0 2572 - i2c_size = 1 2573 */ 2574 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x00AB 2575 /*!< 2576 info: \n 2577 - msb = 0 2578 - lsb = 0 2579 - i2c_size = 1 2580 */ 2581 #define VL53L1_RESULT__SPARE_0_SD1 0x00AC 2582 /*!< 2583 type: uint16_t \n 2584 default: 0x0000 \n 2585 info: \n 2586 - msb = 15 2587 - lsb = 0 2588 - i2c_size = 2 2589 2590 groups: \n 2591 ['system_results', 'results'] 2592 2593 fields: \n 2594 - [15:0] = result__spare_0_sd1 2595 */ 2596 #define VL53L1_RESULT__SPARE_0_SD1_HI 0x00AC 2597 /*!< 2598 info: \n 2599 - msb = 0 2600 - lsb = 0 2601 - i2c_size = 1 2602 */ 2603 #define VL53L1_RESULT__SPARE_0_SD1_LO 0x00AD 2604 /*!< 2605 info: \n 2606 - msb = 0 2607 - lsb = 0 2608 - i2c_size = 1 2609 */ 2610 #define VL53L1_RESULT__SPARE_1_SD1 0x00AE 2611 /*!< 2612 type: uint16_t \n 2613 default: 0x0000 \n 2614 info: \n 2615 - msb = 15 2616 - lsb = 0 2617 - i2c_size = 2 2618 2619 groups: \n 2620 ['system_results', 'results'] 2621 2622 fields: \n 2623 - [15:0] = result__spare_1_sd1 2624 */ 2625 #define VL53L1_RESULT__SPARE_1_SD1_HI 0x00AE 2626 /*!< 2627 info: \n 2628 - msb = 0 2629 - lsb = 0 2630 - i2c_size = 1 2631 */ 2632 #define VL53L1_RESULT__SPARE_1_SD1_LO 0x00AF 2633 /*!< 2634 info: \n 2635 - msb = 0 2636 - lsb = 0 2637 - i2c_size = 1 2638 */ 2639 #define VL53L1_RESULT__SPARE_2_SD1 0x00B0 2640 /*!< 2641 type: uint16_t \n 2642 default: 0x0000 \n 2643 info: \n 2644 - msb = 15 2645 - lsb = 0 2646 - i2c_size = 2 2647 2648 groups: \n 2649 ['system_results', 'results'] 2650 2651 fields: \n 2652 - [15:0] = result__spare_2_sd1 2653 */ 2654 #define VL53L1_RESULT__SPARE_2_SD1_HI 0x00B0 2655 /*!< 2656 info: \n 2657 - msb = 0 2658 - lsb = 0 2659 - i2c_size = 1 2660 */ 2661 #define VL53L1_RESULT__SPARE_2_SD1_LO 0x00B1 2662 /*!< 2663 info: \n 2664 - msb = 0 2665 - lsb = 0 2666 - i2c_size = 1 2667 */ 2668 #define VL53L1_RESULT__SPARE_3_SD1 0x00B2 2669 /*!< 2670 type: uint8_t \n 2671 default: 0x00 \n 2672 info: \n 2673 - msb = 7 2674 - lsb = 0 2675 - i2c_size = 1 2676 2677 groups: \n 2678 ['system_results', 'results'] 2679 2680 fields: \n 2681 - [7:0] = result__spare_3_sd1 2682 */ 2683 #define VL53L1_RESULT__THRESH_INFO 0x00B3 2684 /*!< 2685 type: uint8_t \n 2686 default: 0x00 \n 2687 info: \n 2688 - msb = 7 2689 - lsb = 0 2690 - i2c_size = 1 2691 2692 groups: \n 2693 ['system_results', 'results'] 2694 2695 fields: \n 2696 - [3:0] = result__distance_int_info 2697 - [7:4] = result__rate_int_info 2698 */ 2699 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x00B4 2700 /*!< 2701 type: uint32_t \n 2702 default: 0x00000000 \n 2703 info: \n 2704 - msb = 31 2705 - lsb = 0 2706 - i2c_size = 4 2707 2708 groups: \n 2709 ['core_results', 'ranging_core_results'] 2710 2711 fields: \n 2712 - [31:0] = result_core__ambient_window_events_sd0 2713 */ 2714 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x00B4 2715 /*!< 2716 info: \n 2717 - msb = 0 2718 - lsb = 0 2719 - i2c_size = 1 2720 */ 2721 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x00B5 2722 /*!< 2723 info: \n 2724 - msb = 0 2725 - lsb = 0 2726 - i2c_size = 1 2727 */ 2728 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x00B6 2729 /*!< 2730 info: \n 2731 - msb = 0 2732 - lsb = 0 2733 - i2c_size = 1 2734 */ 2735 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x00B7 2736 /*!< 2737 info: \n 2738 - msb = 0 2739 - lsb = 0 2740 - i2c_size = 1 2741 */ 2742 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x00B8 2743 /*!< 2744 type: uint32_t \n 2745 default: 0x00000000 \n 2746 info: \n 2747 - msb = 31 2748 - lsb = 0 2749 - i2c_size = 4 2750 2751 groups: \n 2752 ['core_results', 'ranging_core_results'] 2753 2754 fields: \n 2755 - [31:0] = result_core__ranging_total_events_sd0 2756 */ 2757 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x00B8 2758 /*!< 2759 info: \n 2760 - msb = 0 2761 - lsb = 0 2762 - i2c_size = 1 2763 */ 2764 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x00B9 2765 /*!< 2766 info: \n 2767 - msb = 0 2768 - lsb = 0 2769 - i2c_size = 1 2770 */ 2771 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x00BA 2772 /*!< 2773 info: \n 2774 - msb = 0 2775 - lsb = 0 2776 - i2c_size = 1 2777 */ 2778 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x00BB 2779 /*!< 2780 info: \n 2781 - msb = 0 2782 - lsb = 0 2783 - i2c_size = 1 2784 */ 2785 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x00BC 2786 /*!< 2787 type: int32_t \n 2788 default: 0x00000000 \n 2789 info: \n 2790 - msb = 31 2791 - lsb = 0 2792 - i2c_size = 4 2793 2794 groups: \n 2795 ['core_results', 'ranging_core_results'] 2796 2797 fields: \n 2798 - [31:0] = result_core__signal_total_events_sd0 2799 */ 2800 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x00BC 2801 /*!< 2802 info: \n 2803 - msb = 0 2804 - lsb = 0 2805 - i2c_size = 1 2806 */ 2807 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x00BD 2808 /*!< 2809 info: \n 2810 - msb = 0 2811 - lsb = 0 2812 - i2c_size = 1 2813 */ 2814 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x00BE 2815 /*!< 2816 info: \n 2817 - msb = 0 2818 - lsb = 0 2819 - i2c_size = 1 2820 */ 2821 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x00BF 2822 /*!< 2823 info: \n 2824 - msb = 0 2825 - lsb = 0 2826 - i2c_size = 1 2827 */ 2828 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x00C0 2829 /*!< 2830 type: uint32_t \n 2831 default: 0x00000000 \n 2832 info: \n 2833 - msb = 31 2834 - lsb = 0 2835 - i2c_size = 4 2836 2837 groups: \n 2838 ['core_results', 'ranging_core_results'] 2839 2840 fields: \n 2841 - [31:0] = result_core__total_periods_elapsed_sd0 2842 */ 2843 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x00C0 2844 /*!< 2845 info: \n 2846 - msb = 0 2847 - lsb = 0 2848 - i2c_size = 1 2849 */ 2850 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x00C1 2851 /*!< 2852 info: \n 2853 - msb = 0 2854 - lsb = 0 2855 - i2c_size = 1 2856 */ 2857 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x00C2 2858 /*!< 2859 info: \n 2860 - msb = 0 2861 - lsb = 0 2862 - i2c_size = 1 2863 */ 2864 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x00C3 2865 /*!< 2866 info: \n 2867 - msb = 0 2868 - lsb = 0 2869 - i2c_size = 1 2870 */ 2871 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x00C4 2872 /*!< 2873 type: uint32_t \n 2874 default: 0x00000000 \n 2875 info: \n 2876 - msb = 31 2877 - lsb = 0 2878 - i2c_size = 4 2879 2880 groups: \n 2881 ['core_results', 'ranging_core_results'] 2882 2883 fields: \n 2884 - [31:0] = result_core__ambient_window_events_sd1 2885 */ 2886 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x00C4 2887 /*!< 2888 info: \n 2889 - msb = 0 2890 - lsb = 0 2891 - i2c_size = 1 2892 */ 2893 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x00C5 2894 /*!< 2895 info: \n 2896 - msb = 0 2897 - lsb = 0 2898 - i2c_size = 1 2899 */ 2900 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x00C6 2901 /*!< 2902 info: \n 2903 - msb = 0 2904 - lsb = 0 2905 - i2c_size = 1 2906 */ 2907 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x00C7 2908 /*!< 2909 info: \n 2910 - msb = 0 2911 - lsb = 0 2912 - i2c_size = 1 2913 */ 2914 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x00C8 2915 /*!< 2916 type: uint32_t \n 2917 default: 0x00000000 \n 2918 info: \n 2919 - msb = 31 2920 - lsb = 0 2921 - i2c_size = 4 2922 2923 groups: \n 2924 ['core_results', 'ranging_core_results'] 2925 2926 fields: \n 2927 - [31:0] = result_core__ranging_total_events_sd1 2928 */ 2929 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x00C8 2930 /*!< 2931 info: \n 2932 - msb = 0 2933 - lsb = 0 2934 - i2c_size = 1 2935 */ 2936 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x00C9 2937 /*!< 2938 info: \n 2939 - msb = 0 2940 - lsb = 0 2941 - i2c_size = 1 2942 */ 2943 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x00CA 2944 /*!< 2945 info: \n 2946 - msb = 0 2947 - lsb = 0 2948 - i2c_size = 1 2949 */ 2950 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x00CB 2951 /*!< 2952 info: \n 2953 - msb = 0 2954 - lsb = 0 2955 - i2c_size = 1 2956 */ 2957 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x00CC 2958 /*!< 2959 type: int32_t \n 2960 default: 0x00000000 \n 2961 info: \n 2962 - msb = 31 2963 - lsb = 0 2964 - i2c_size = 4 2965 2966 groups: \n 2967 ['core_results', 'ranging_core_results'] 2968 2969 fields: \n 2970 - [31:0] = result_core__signal_total_events_sd1 2971 */ 2972 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x00CC 2973 /*!< 2974 info: \n 2975 - msb = 0 2976 - lsb = 0 2977 - i2c_size = 1 2978 */ 2979 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x00CD 2980 /*!< 2981 info: \n 2982 - msb = 0 2983 - lsb = 0 2984 - i2c_size = 1 2985 */ 2986 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x00CE 2987 /*!< 2988 info: \n 2989 - msb = 0 2990 - lsb = 0 2991 - i2c_size = 1 2992 */ 2993 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x00CF 2994 /*!< 2995 info: \n 2996 - msb = 0 2997 - lsb = 0 2998 - i2c_size = 1 2999 */ 3000 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x00D0 3001 /*!< 3002 type: uint32_t \n 3003 default: 0x00000000 \n 3004 info: \n 3005 - msb = 31 3006 - lsb = 0 3007 - i2c_size = 4 3008 3009 groups: \n 3010 ['core_results', 'ranging_core_results'] 3011 3012 fields: \n 3013 - [31:0] = result_core__total_periods_elapsed_sd1 3014 */ 3015 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x00D0 3016 /*!< 3017 info: \n 3018 - msb = 0 3019 - lsb = 0 3020 - i2c_size = 1 3021 */ 3022 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x00D1 3023 /*!< 3024 info: \n 3025 - msb = 0 3026 - lsb = 0 3027 - i2c_size = 1 3028 */ 3029 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x00D2 3030 /*!< 3031 info: \n 3032 - msb = 0 3033 - lsb = 0 3034 - i2c_size = 1 3035 */ 3036 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x00D3 3037 /*!< 3038 info: \n 3039 - msb = 0 3040 - lsb = 0 3041 - i2c_size = 1 3042 */ 3043 #define VL53L1_RESULT_CORE__SPARE_0 0x00D4 3044 /*!< 3045 type: uint8_t \n 3046 default: 0x00 \n 3047 info: \n 3048 - msb = 7 3049 - lsb = 0 3050 - i2c_size = 1 3051 3052 groups: \n 3053 ['core_results', 'ranging_core_results'] 3054 3055 fields: \n 3056 - [7:0] = result_core__spare_0 3057 */ 3058 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE 0x00D6 3059 /*!< 3060 type: uint16_t \n 3061 default: 0x0000 \n 3062 info: \n 3063 - msb = 15 3064 - lsb = 0 3065 - i2c_size = 2 3066 3067 groups: \n 3068 ['debug_results', 'phasecal_results'] 3069 3070 fields: \n 3071 - [15:0] = result_phasecal__reference_phase (fixed point 5.11) 3072 */ 3073 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x00D6 3074 /*!< 3075 info: \n 3076 - msb = 0 3077 - lsb = 0 3078 - i2c_size = 1 3079 */ 3080 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x00D7 3081 /*!< 3082 info: \n 3083 - msb = 0 3084 - lsb = 0 3085 - i2c_size = 1 3086 */ 3087 #define VL53L1_PHASECAL_RESULT__VCSEL_START 0x00D8 3088 /*!< 3089 type: uint8_t \n 3090 default: 0x00 \n 3091 info: \n 3092 - msb = 6 3093 - lsb = 0 3094 - i2c_size = 1 3095 3096 groups: \n 3097 ['debug_results', 'phasecal_results'] 3098 3099 fields: \n 3100 - [6:0] = result_phasecal__vcsel_start 3101 */ 3102 #define VL53L1_REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS 0x00D9 3103 /*!< 3104 type: uint8_t \n 3105 default: 0x00 \n 3106 info: \n 3107 - msb = 5 3108 - lsb = 0 3109 - i2c_size = 1 3110 3111 groups: \n 3112 ['debug_results', 'ref_spad_status'] 3113 3114 fields: \n 3115 - [5:0] = ref_spad_char_result__num_actual_ref_spads 3116 */ 3117 #define VL53L1_REF_SPAD_CHAR_RESULT__REF_LOCATION 0x00DA 3118 /*!< 3119 type: uint8_t \n 3120 default: 0x00 \n 3121 info: \n 3122 - msb = 1 3123 - lsb = 0 3124 - i2c_size = 1 3125 3126 groups: \n 3127 ['debug_results', 'ref_spad_status'] 3128 3129 fields: \n 3130 - [1:0] = ref_spad_char_result__ref_location 3131 */ 3132 #define VL53L1_VHV_RESULT__COLDBOOT_STATUS 0x00DB 3133 /*!< 3134 type: uint8_t \n 3135 default: 0x00 \n 3136 info: \n 3137 - msb = 0 3138 - lsb = 0 3139 - i2c_size = 1 3140 3141 groups: \n 3142 ['debug_results', 'vhv_results'] 3143 3144 fields: \n 3145 - [0] = vhv_result__coldboot_status 3146 */ 3147 #define VL53L1_VHV_RESULT__SEARCH_RESULT 0x00DC 3148 /*!< 3149 type: uint8_t \n 3150 default: 0x00 \n 3151 info: \n 3152 - msb = 5 3153 - lsb = 0 3154 - i2c_size = 1 3155 3156 groups: \n 3157 ['debug_results', 'vhv_results'] 3158 3159 fields: \n 3160 - [5:0] = cp_sel_result 3161 */ 3162 #define VL53L1_VHV_RESULT__LATEST_SETTING 0x00DD 3163 /*!< 3164 type: uint8_t \n 3165 default: 0x00 \n 3166 info: \n 3167 - msb = 5 3168 - lsb = 0 3169 - i2c_size = 1 3170 3171 groups: \n 3172 ['debug_results', 'vhv_results'] 3173 3174 fields: \n 3175 - [5:0] = cp_sel_latest_setting 3176 */ 3177 #define VL53L1_RESULT__OSC_CALIBRATE_VAL 0x00DE 3178 /*!< 3179 type: uint16_t \n 3180 default: 0x0000 \n 3181 info: \n 3182 - msb = 9 3183 - lsb = 0 3184 - i2c_size = 2 3185 3186 groups: \n 3187 ['debug_results', 'misc_results'] 3188 3189 fields: \n 3190 - [9:0] = osc_calibrate_val 3191 */ 3192 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_HI 0x00DE 3193 /*!< 3194 info: \n 3195 - msb = 0 3196 - lsb = 0 3197 - i2c_size = 1 3198 */ 3199 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_LO 0x00DF 3200 /*!< 3201 info: \n 3202 - msb = 0 3203 - lsb = 0 3204 - i2c_size = 1 3205 */ 3206 #define VL53L1_ANA_CONFIG__POWERDOWN_GO1 0x00E0 3207 /*!< 3208 type: uint8_t \n 3209 default: 0x02 \n 3210 info: \n 3211 - msb = 1 3212 - lsb = 0 3213 - i2c_size = 1 3214 3215 groups: \n 3216 ['debug_results', 'analog_config'] 3217 3218 fields: \n 3219 - [0] = go2_ref_bg_disable_avdd 3220 - [1] = go2_regdvdd1v2_enable_avdd 3221 */ 3222 #define VL53L1_ANA_CONFIG__REF_BG_CTRL 0x00E1 3223 /*!< 3224 type: uint8_t \n 3225 default: 0x00 \n 3226 info: \n 3227 - msb = 1 3228 - lsb = 0 3229 - i2c_size = 1 3230 3231 groups: \n 3232 ['debug_results', 'analog_config'] 3233 3234 fields: \n 3235 - [0] = go2_ref_overdrvbg_avdd 3236 - [1] = go2_ref_forcebgison_avdd 3237 */ 3238 #define VL53L1_ANA_CONFIG__REGDVDD1V2_CTRL 0x00E2 3239 /*!< 3240 type: uint8_t \n 3241 default: 0x01 \n 3242 info: \n 3243 - msb = 3 3244 - lsb = 0 3245 - i2c_size = 1 3246 3247 groups: \n 3248 ['debug_results', 'analog_config'] 3249 3250 fields: \n 3251 - [0] = go2_regdvdd1v2_sel_pulldown_avdd 3252 - [1] = go2_regdvdd1v2_sel_boost_avdd 3253 - [3:2] = go2_regdvdd1v2_selv_avdd 3254 */ 3255 #define VL53L1_ANA_CONFIG__OSC_SLOW_CTRL 0x00E3 3256 /*!< 3257 type: uint8_t \n 3258 default: 0x02 \n 3259 info: \n 3260 - msb = 2 3261 - lsb = 0 3262 - i2c_size = 1 3263 3264 groups: \n 3265 ['debug_results', 'analog_config'] 3266 3267 fields: \n 3268 - [0] = osc_slow_en 3269 - [1] = osc_slow_op_en 3270 - [2] = osc_slow_freq_sel 3271 */ 3272 #define VL53L1_TEST_MODE__STATUS 0x00E4 3273 /*!< 3274 type: uint8_t \n 3275 default: 0x00 \n 3276 info: \n 3277 - msb = 0 3278 - lsb = 0 3279 - i2c_size = 1 3280 3281 groups: \n 3282 ['debug_results', 'test_mode_status'] 3283 3284 fields: \n 3285 - [0] = test_mode_status 3286 */ 3287 #define VL53L1_FIRMWARE__SYSTEM_STATUS 0x00E5 3288 /*!< 3289 type: uint8_t \n 3290 default: 0x02 \n 3291 info: \n 3292 - msb = 1 3293 - lsb = 0 3294 - i2c_size = 1 3295 3296 groups: \n 3297 ['debug_results', 'firmware_status'] 3298 3299 fields: \n 3300 - [0] = firmware_bootup 3301 - [1] = firmware_first_range 3302 */ 3303 #define VL53L1_FIRMWARE__MODE_STATUS 0x00E6 3304 /*!< 3305 type: uint8_t \n 3306 default: 0x00 \n 3307 info: \n 3308 - msb = 7 3309 - lsb = 0 3310 - i2c_size = 1 3311 3312 groups: \n 3313 ['debug_results', 'firmware_status'] 3314 3315 fields: \n 3316 - [7:0] = firmware_mode_status 3317 */ 3318 #define VL53L1_FIRMWARE__SECONDARY_MODE_STATUS 0x00E7 3319 /*!< 3320 type: uint8_t \n 3321 default: 0x00 \n 3322 info: \n 3323 - msb = 7 3324 - lsb = 0 3325 - i2c_size = 1 3326 3327 groups: \n 3328 ['debug_results', 'firmware_status'] 3329 3330 fields: \n 3331 - [7:0] = fw_secondary_mode_status 3332 */ 3333 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER 0x00E8 3334 /*!< 3335 type: uint16_t \n 3336 default: 0x0000 \n 3337 info: \n 3338 - msb = 11 3339 - lsb = 0 3340 - i2c_size = 2 3341 3342 groups: \n 3343 ['debug_results', 'firmware_status'] 3344 3345 fields: \n 3346 - [11:0] = firmware_cal_repeat_rate 3347 */ 3348 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI 0x00E8 3349 /*!< 3350 info: \n 3351 - msb = 0 3352 - lsb = 0 3353 - i2c_size = 1 3354 */ 3355 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO 0x00E9 3356 /*!< 3357 info: \n 3358 - msb = 0 3359 - lsb = 0 3360 - i2c_size = 1 3361 */ 3362 #define VL53L1_FIRMWARE__HISTOGRAM_BIN 0x00EA 3363 /*!< 3364 info: \n 3365 - msb = 0 3366 - lsb = 0 3367 - i2c_size = 1 3368 */ 3369 #define VL53L1_GPH__SYSTEM__THRESH_HIGH 0x00EC 3370 /*!< 3371 type: uint16_t \n 3372 default: 0x0000 \n 3373 info: \n 3374 - msb = 15 3375 - lsb = 0 3376 - i2c_size = 2 3377 3378 groups: \n 3379 ['debug_results', 'gph_actual'] 3380 3381 fields: \n 3382 - [15:0] = shadow_thresh_high 3383 */ 3384 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_HI 0x00EC 3385 /*!< 3386 info: \n 3387 - msb = 0 3388 - lsb = 0 3389 - i2c_size = 1 3390 */ 3391 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_LO 0x00ED 3392 /*!< 3393 info: \n 3394 - msb = 0 3395 - lsb = 0 3396 - i2c_size = 1 3397 */ 3398 #define VL53L1_GPH__SYSTEM__THRESH_LOW 0x00EE 3399 /*!< 3400 type: uint16_t \n 3401 default: 0x0000 \n 3402 info: \n 3403 - msb = 15 3404 - lsb = 0 3405 - i2c_size = 2 3406 3407 groups: \n 3408 ['debug_results', 'gph_actual'] 3409 3410 fields: \n 3411 - [15:0] = shadow_thresh_low 3412 */ 3413 #define VL53L1_GPH__SYSTEM__THRESH_LOW_HI 0x00EE 3414 /*!< 3415 info: \n 3416 - msb = 0 3417 - lsb = 0 3418 - i2c_size = 1 3419 */ 3420 #define VL53L1_GPH__SYSTEM__THRESH_LOW_LO 0x00EF 3421 /*!< 3422 info: \n 3423 - msb = 0 3424 - lsb = 0 3425 - i2c_size = 1 3426 */ 3427 #define VL53L1_GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x00F0 3428 /*!< 3429 type: uint8_t \n 3430 default: 0x00 \n 3431 info: \n 3432 - msb = 0 3433 - lsb = 0 3434 - i2c_size = 1 3435 3436 groups: \n 3437 ['debug_results', 'gph_actual'] 3438 3439 fields: \n 3440 - [0] = shadow__enable_xtalk_per_quadrant 3441 */ 3442 #define VL53L1_GPH__SPARE_0 0x00F1 3443 /*!< 3444 type: uint8_t \n 3445 default: 0x00 \n 3446 info: \n 3447 - msb = 2 3448 - lsb = 0 3449 - i2c_size = 1 3450 3451 groups: \n 3452 ['debug_results', 'gph_actual'] 3453 3454 fields: \n 3455 - [0] = fw_safe_to_disable 3456 - [1] = shadow__spare_0 3457 - [2] = shadow__spare_1 3458 */ 3459 #define VL53L1_GPH__SD_CONFIG__WOI_SD0 0x00F2 3460 /*!< 3461 type: uint8_t \n 3462 default: 0x04 \n 3463 info: \n 3464 - msb = 7 3465 - lsb = 0 3466 - i2c_size = 1 3467 3468 groups: \n 3469 ['debug_results', 'gph_actual'] 3470 3471 fields: \n 3472 - [7:0] = shadow_sd_config__woi_sd0 3473 */ 3474 #define VL53L1_GPH__SD_CONFIG__WOI_SD1 0x00F3 3475 /*!< 3476 type: uint8_t \n 3477 default: 0x04 \n 3478 info: \n 3479 - msb = 7 3480 - lsb = 0 3481 - i2c_size = 1 3482 3483 groups: \n 3484 ['debug_results', 'gph_actual'] 3485 3486 fields: \n 3487 - [7:0] = shadow_sd_config__woi_sd1 3488 */ 3489 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD0 0x00F4 3490 /*!< 3491 type: uint8_t \n 3492 default: 0x03 \n 3493 info: \n 3494 - msb = 6 3495 - lsb = 0 3496 - i2c_size = 1 3497 3498 groups: \n 3499 ['debug_results', 'gph_actual'] 3500 3501 fields: \n 3502 - [6:0] = shadow_sd_config__initial_phase_sd0 3503 */ 3504 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD1 0x00F5 3505 /*!< 3506 type: uint8_t \n 3507 default: 0x03 \n 3508 info: \n 3509 - msb = 6 3510 - lsb = 0 3511 - i2c_size = 1 3512 3513 groups: \n 3514 ['debug_results', 'gph_actual'] 3515 3516 fields: \n 3517 - [6:0] = shadow_sd_config__initial_phase_sd1 3518 */ 3519 #define VL53L1_GPH__SD_CONFIG__FIRST_ORDER_SELECT 0x00F6 3520 /*!< 3521 type: uint8_t \n 3522 default: 0x00 \n 3523 info: \n 3524 - msb = 1 3525 - lsb = 0 3526 - i2c_size = 1 3527 3528 groups: \n 3529 ['debug_results', 'gph_actual'] 3530 3531 fields: \n 3532 - [0] = shadow_sd_config__first_order_select_rtn 3533 - [1] = shadow_sd_config__first_order_select_ref 3534 */ 3535 #define VL53L1_GPH__SD_CONFIG__QUANTIFIER 0x00F7 3536 /*!< 3537 type: uint8_t \n 3538 default: 0x00 \n 3539 info: \n 3540 - msb = 3 3541 - lsb = 0 3542 - i2c_size = 1 3543 3544 groups: \n 3545 ['debug_results', 'gph_actual'] 3546 3547 fields: \n 3548 - [3:0] = shadow_sd_config__quantifier 3549 */ 3550 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x00F8 3551 /*!< 3552 type: uint8_t \n 3553 default: 0x00 \n 3554 info: \n 3555 - msb = 7 3556 - lsb = 0 3557 - i2c_size = 1 3558 3559 groups: \n 3560 ['debug_results', 'gph_actual'] 3561 3562 fields: \n 3563 - [7:0] = shadow_user_roi_center_spad_q0 3564 */ 3565 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x00F9 3566 /*!< 3567 type: uint8_t \n 3568 default: 0x00 \n 3569 info: \n 3570 - msb = 7 3571 - lsb = 0 3572 - i2c_size = 1 3573 3574 groups: \n 3575 ['debug_results', 'gph_actual'] 3576 3577 fields: \n 3578 - [7:0] = shadow_user_roi_requested_global_xy_size 3579 */ 3580 #define VL53L1_GPH__SYSTEM__SEQUENCE_CONFIG 0x00FA 3581 /*!< 3582 type: uint8_t \n 3583 default: 0x00 \n 3584 info: \n 3585 - msb = 7 3586 - lsb = 0 3587 - i2c_size = 1 3588 3589 groups: \n 3590 ['debug_results', 'gph_actual'] 3591 3592 fields: \n 3593 - [0] = shadow_sequence_vhv_en 3594 - [1] = shadow_sequence_phasecal_en 3595 - [2] = shadow_sequence_reference_phase_en 3596 - [3] = shadow_sequence_dss1_en 3597 - [4] = shadow_sequence_dss2_en 3598 - [5] = shadow_sequence_mm1_en 3599 - [6] = shadow_sequence_mm2_en 3600 - [7] = shadow_sequence_range_en 3601 */ 3602 #define VL53L1_GPH__GPH_ID 0x00FB 3603 /*!< 3604 type: uint8_t \n 3605 default: 0x00 \n 3606 info: \n 3607 - msb = 0 3608 - lsb = 0 3609 - i2c_size = 1 3610 3611 groups: \n 3612 ['debug_results', 'gph_actual'] 3613 3614 fields: \n 3615 - [0] = shadow_gph_id 3616 */ 3617 #define VL53L1_SYSTEM__INTERRUPT_SET 0x00FC 3618 /*!< 3619 type: uint8_t \n 3620 default: 0x00 \n 3621 info: \n 3622 - msb = 1 3623 - lsb = 0 3624 - i2c_size = 1 3625 3626 groups: \n 3627 ['debug_results', 'system_int_set'] 3628 3629 fields: \n 3630 - [0] = sys_interrupt_set_range 3631 - [1] = sys_interrupt_set_error 3632 */ 3633 #define VL53L1_INTERRUPT_MANAGER__ENABLES 0x00FD 3634 /*!< 3635 type: uint8_t \n 3636 default: 0x00 \n 3637 info: \n 3638 - msb = 4 3639 - lsb = 0 3640 - i2c_size = 1 3641 3642 groups: \n 3643 ['debug_results', 'interrupt_manager'] 3644 3645 fields: \n 3646 - [0] = interrupt_enable__single_shot 3647 - [1] = interrupt_enable__back_to_back 3648 - [2] = interrupt_enable__timed 3649 - [3] = interrupt_enable__abort 3650 - [4] = interrupt_enable__test 3651 */ 3652 #define VL53L1_INTERRUPT_MANAGER__CLEAR 0x00FE 3653 /*!< 3654 type: uint8_t \n 3655 default: 0x00 \n 3656 info: \n 3657 - msb = 4 3658 - lsb = 0 3659 - i2c_size = 1 3660 3661 groups: \n 3662 ['debug_results', 'interrupt_manager'] 3663 3664 fields: \n 3665 - [0] = interrupt_clear__single_shot 3666 - [1] = interrupt_clear__back_to_back 3667 - [2] = interrupt_clear__timed 3668 - [3] = interrupt_clear__abort 3669 - [4] = interrupt_clear__test 3670 */ 3671 #define VL53L1_INTERRUPT_MANAGER__STATUS 0x00FF 3672 /*!< 3673 type: uint8_t \n 3674 default: 0x00 \n 3675 info: \n 3676 - msb = 4 3677 - lsb = 0 3678 - i2c_size = 1 3679 3680 groups: \n 3681 ['debug_results', 'interrupt_manager'] 3682 3683 fields: \n 3684 - [0] = interrupt_status__single_shot 3685 - [1] = interrupt_status__back_to_back 3686 - [2] = interrupt_status__timed 3687 - [3] = interrupt_status__abort 3688 - [4] = interrupt_status__test 3689 */ 3690 #define VL53L1_MCU_TO_HOST_BANK__WR_ACCESS_EN 0x0100 3691 /*!< 3692 type: uint8_t \n 3693 default: 0x00 \n 3694 info: \n 3695 - msb = 0 3696 - lsb = 0 3697 - i2c_size = 1 3698 3699 groups: \n 3700 ['debug_results', 'host_bank_ctrl'] 3701 3702 fields: \n 3703 - [0] = mcu_to_host_bank_wr_en 3704 */ 3705 #define VL53L1_POWER_MANAGEMENT__GO1_RESET_STATUS 0x0101 3706 /*!< 3707 type: uint8_t \n 3708 default: 0x00 \n 3709 info: \n 3710 - msb = 0 3711 - lsb = 0 3712 - i2c_size = 1 3713 3714 groups: \n 3715 ['debug_results', 'power_man_status'] 3716 3717 fields: \n 3718 - [0] = go1_status 3719 */ 3720 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO 0x0102 3721 /*!< 3722 type: uint8_t \n 3723 default: 0x00 \n 3724 info: \n 3725 - msb = 1 3726 - lsb = 0 3727 - i2c_size = 1 3728 3729 groups: \n 3730 ['debug_results', 'pad_config'] 3731 3732 fields: \n 3733 - [0] = pad_atest1_val_ro 3734 - [1] = pad_atest2_val_ro 3735 */ 3736 #define VL53L1_PAD_STARTUP_MODE__VALUE_CTRL 0x0103 3737 /*!< 3738 type: uint8_t \n 3739 default: 0x30 \n 3740 info: \n 3741 - msb = 5 3742 - lsb = 0 3743 - i2c_size = 1 3744 3745 groups: \n 3746 ['debug_results', 'pad_config'] 3747 3748 fields: \n 3749 - [0] = pad_atest1_val 3750 - [1] = pad_atest2_val 3751 - [4] = pad_atest1_dig_enable 3752 - [5] = pad_atest2_dig_enable 3753 */ 3754 #define VL53L1_PLL_PERIOD_US 0x0104 3755 /*!< 3756 type: uint32_t \n 3757 default: 0x00000000 \n 3758 info: \n 3759 - msb = 17 3760 - lsb = 0 3761 - i2c_size = 4 3762 3763 groups: \n 3764 ['debug_results', 'pll_config'] 3765 3766 fields: \n 3767 - [17:0] = pll_period_us (fixed point 0.24) 3768 */ 3769 #define VL53L1_PLL_PERIOD_US_3 0x0104 3770 /*!< 3771 info: \n 3772 - msb = 0 3773 - lsb = 0 3774 - i2c_size = 1 3775 */ 3776 #define VL53L1_PLL_PERIOD_US_2 0x0105 3777 /*!< 3778 info: \n 3779 - msb = 0 3780 - lsb = 0 3781 - i2c_size = 1 3782 */ 3783 #define VL53L1_PLL_PERIOD_US_1 0x0106 3784 /*!< 3785 info: \n 3786 - msb = 0 3787 - lsb = 0 3788 - i2c_size = 1 3789 */ 3790 #define VL53L1_PLL_PERIOD_US_0 0x0107 3791 /*!< 3792 info: \n 3793 - msb = 0 3794 - lsb = 0 3795 - i2c_size = 1 3796 */ 3797 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT 0x0108 3798 /*!< 3799 type: uint32_t \n 3800 default: 0x00000000 \n 3801 info: \n 3802 - msb = 31 3803 - lsb = 0 3804 - i2c_size = 4 3805 3806 groups: \n 3807 ['debug_results', 'debug_timer'] 3808 3809 fields: \n 3810 - [31:0] = interrupt_scheduler_data_out 3811 */ 3812 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_3 0x0108 3813 /*!< 3814 info: \n 3815 - msb = 0 3816 - lsb = 0 3817 - i2c_size = 1 3818 */ 3819 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_2 0x0109 3820 /*!< 3821 info: \n 3822 - msb = 0 3823 - lsb = 0 3824 - i2c_size = 1 3825 */ 3826 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_1 0x010A 3827 /*!< 3828 info: \n 3829 - msb = 0 3830 - lsb = 0 3831 - i2c_size = 1 3832 */ 3833 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_0 0x010B 3834 /*!< 3835 info: \n 3836 - msb = 0 3837 - lsb = 0 3838 - i2c_size = 1 3839 */ 3840 #define VL53L1_NVM_BIST__COMPLETE 0x010C 3841 /*!< 3842 type: uint8_t \n 3843 default: 0x00 \n 3844 info: \n 3845 - msb = 0 3846 - lsb = 0 3847 - i2c_size = 1 3848 3849 groups: \n 3850 ['debug_results', 'nvm_bist_status'] 3851 3852 fields: \n 3853 - [0] = nvm_bist__complete 3854 */ 3855 #define VL53L1_NVM_BIST__STATUS 0x010D 3856 /*!< 3857 type: uint8_t \n 3858 default: 0x00 \n 3859 info: \n 3860 - msb = 0 3861 - lsb = 0 3862 - i2c_size = 1 3863 3864 groups: \n 3865 ['debug_results', 'nvm_bist_status'] 3866 3867 fields: \n 3868 - [0] = nvm_bist__status 3869 */ 3870 #define VL53L1_IDENTIFICATION__MODEL_ID 0x010F 3871 /*!< 3872 type: uint8_t \n 3873 default: 0xEA \n 3874 info: \n 3875 - msb = 7 3876 - lsb = 0 3877 - i2c_size = 1 3878 3879 groups: \n 3880 ['nvm_copy_data', 'identification'] 3881 3882 fields: \n 3883 - [7:0] = model_id 3884 */ 3885 #define VL53L1_IDENTIFICATION__MODULE_TYPE 0x0110 3886 /*!< 3887 type: uint8_t \n 3888 default: 0xAA \n 3889 info: \n 3890 - msb = 7 3891 - lsb = 0 3892 - i2c_size = 1 3893 3894 groups: \n 3895 ['nvm_copy_data', 'identification'] 3896 3897 fields: \n 3898 - [7:0] = module_type 3899 */ 3900 #define VL53L1_IDENTIFICATION__REVISION_ID 0x0111 3901 /*!< 3902 type: uint8_t \n 3903 default: 0x00 \n 3904 info: \n 3905 - msb = 7 3906 - lsb = 0 3907 - i2c_size = 1 3908 3909 groups: \n 3910 ['nvm_copy_data', 'identification'] 3911 3912 fields: \n 3913 - [3:0] = nvm_revision_id 3914 - [7:4] = mask_revision_id 3915 */ 3916 #define VL53L1_IDENTIFICATION__MODULE_ID 0x0112 3917 /*!< 3918 type: uint16_t \n 3919 default: 0x0000 \n 3920 info: \n 3921 - msb = 15 3922 - lsb = 0 3923 - i2c_size = 2 3924 3925 groups: \n 3926 ['nvm_copy_data', 'identification'] 3927 3928 fields: \n 3929 - [15:0] = module_id 3930 */ 3931 #define VL53L1_IDENTIFICATION__MODULE_ID_HI 0x0112 3932 /*!< 3933 info: \n 3934 - msb = 0 3935 - lsb = 0 3936 - i2c_size = 1 3937 */ 3938 #define VL53L1_IDENTIFICATION__MODULE_ID_LO 0x0113 3939 /*!< 3940 info: \n 3941 - msb = 0 3942 - lsb = 0 3943 - i2c_size = 1 3944 */ 3945 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM_MAX 0x0114 3946 /*!< 3947 type: uint8_t \n 3948 default: OSC_TRIM_DEFAULT \n 3949 info: \n 3950 - msb = 6 3951 - lsb = 0 3952 - i2c_size = 1 3953 3954 groups: \n 3955 ['nvm_copy_data', 'analog_config'] 3956 3957 fields: \n 3958 - [6:0] = osc_trim_max 3959 */ 3960 #define VL53L1_ANA_CONFIG__FAST_OSC__FREQ_SET 0x0115 3961 /*!< 3962 type: uint8_t \n 3963 default: OSC_FREQ_SET_DEFAULT \n 3964 info: \n 3965 - msb = 2 3966 - lsb = 0 3967 - i2c_size = 1 3968 3969 groups: \n 3970 ['nvm_copy_data', 'analog_config'] 3971 3972 fields: \n 3973 - [2:0] = osc_freq_set 3974 */ 3975 #define VL53L1_ANA_CONFIG__VCSEL_TRIM 0x0116 3976 /*!< 3977 type: uint8_t \n 3978 default: 0x00 \n 3979 info: \n 3980 - msb = 2 3981 - lsb = 0 3982 - i2c_size = 1 3983 3984 groups: \n 3985 ['nvm_copy_data', 'analog_config'] 3986 3987 fields: \n 3988 - [2:0] = vcsel_trim 3989 */ 3990 #define VL53L1_ANA_CONFIG__VCSEL_SELION 0x0117 3991 /*!< 3992 type: uint8_t \n 3993 default: 0x00 \n 3994 info: \n 3995 - msb = 5 3996 - lsb = 0 3997 - i2c_size = 1 3998 3999 groups: \n 4000 ['nvm_copy_data', 'analog_config'] 4001 4002 fields: \n 4003 - [5:0] = vcsel_selion 4004 */ 4005 #define VL53L1_ANA_CONFIG__VCSEL_SELION_MAX 0x0118 4006 /*!< 4007 type: uint8_t \n 4008 default: 0x00 \n 4009 info: \n 4010 - msb = 5 4011 - lsb = 0 4012 - i2c_size = 1 4013 4014 groups: \n 4015 ['nvm_copy_data', 'analog_config'] 4016 4017 fields: \n 4018 - [5:0] = vcsel_selion_max 4019 */ 4020 #define VL53L1_PROTECTED_LASER_SAFETY__LOCK_BIT 0x0119 4021 /*!< 4022 type: uint8_t \n 4023 default: 0x00 \n 4024 info: \n 4025 - msb = 0 4026 - lsb = 0 4027 - i2c_size = 1 4028 4029 groups: \n 4030 ['nvm_copy_data', 'laser_safety'] 4031 4032 fields: \n 4033 - [0] = laser_safety__lock_bit 4034 */ 4035 #define VL53L1_LASER_SAFETY__KEY 0x011A 4036 /*!< 4037 type: uint8_t \n 4038 default: 0x00 \n 4039 info: \n 4040 - msb = 6 4041 - lsb = 0 4042 - i2c_size = 1 4043 4044 groups: \n 4045 ['nvm_copy_data', 'laser_safety'] 4046 4047 fields: \n 4048 - [6:0] = laser_safety__key 4049 */ 4050 #define VL53L1_LASER_SAFETY__KEY_RO 0x011B 4051 /*!< 4052 type: uint8_t \n 4053 default: 0x00 \n 4054 info: \n 4055 - msb = 0 4056 - lsb = 0 4057 - i2c_size = 1 4058 4059 groups: \n 4060 ['nvm_copy_data', 'laser_safety'] 4061 4062 fields: \n 4063 - [0] = laser_safety__key_ro 4064 */ 4065 #define VL53L1_LASER_SAFETY__CLIP 0x011C 4066 /*!< 4067 type: uint8_t \n 4068 default: 0x02 \n 4069 info: \n 4070 - msb = 5 4071 - lsb = 0 4072 - i2c_size = 1 4073 4074 groups: \n 4075 ['nvm_copy_data', 'laser_safety'] 4076 4077 fields: \n 4078 - [5:0] = vcsel_pulse_width_clip 4079 */ 4080 #define VL53L1_LASER_SAFETY__MULT 0x011D 4081 /*!< 4082 type: uint8_t \n 4083 default: 0x32 \n 4084 info: \n 4085 - msb = 5 4086 - lsb = 0 4087 - i2c_size = 1 4088 4089 groups: \n 4090 ['nvm_copy_data', 'laser_safety'] 4091 4092 fields: \n 4093 - [5:0] = vcsel_pulse_width_mult 4094 */ 4095 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 0x011E 4096 /*!< 4097 type: uint8_t \n 4098 default: 0x00 \n 4099 info: \n 4100 - msb = 7 4101 - lsb = 0 4102 - i2c_size = 1 4103 4104 groups: \n 4105 ['nvm_copy_data', 'ret_spad_config'] 4106 4107 fields: \n 4108 - [7:0] = spad_enables_rtn_0 4109 */ 4110 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 0x011F 4111 /*!< 4112 type: uint8_t \n 4113 default: 0x00 \n 4114 info: \n 4115 - msb = 7 4116 - lsb = 0 4117 - i2c_size = 1 4118 4119 groups: \n 4120 ['nvm_copy_data', 'ret_spad_config'] 4121 4122 fields: \n 4123 - [7:0] = spad_enables_rtn_1 4124 */ 4125 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 0x0120 4126 /*!< 4127 type: uint8_t \n 4128 default: 0x00 \n 4129 info: \n 4130 - msb = 7 4131 - lsb = 0 4132 - i2c_size = 1 4133 4134 groups: \n 4135 ['nvm_copy_data', 'ret_spad_config'] 4136 4137 fields: \n 4138 - [7:0] = spad_enables_rtn_2 4139 */ 4140 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 0x0121 4141 /*!< 4142 type: uint8_t \n 4143 default: 0x00 \n 4144 info: \n 4145 - msb = 7 4146 - lsb = 0 4147 - i2c_size = 1 4148 4149 groups: \n 4150 ['nvm_copy_data', 'ret_spad_config'] 4151 4152 fields: \n 4153 - [7:0] = spad_enables_rtn_3 4154 */ 4155 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 0x0122 4156 /*!< 4157 type: uint8_t \n 4158 default: 0x00 \n 4159 info: \n 4160 - msb = 7 4161 - lsb = 0 4162 - i2c_size = 1 4163 4164 groups: \n 4165 ['nvm_copy_data', 'ret_spad_config'] 4166 4167 fields: \n 4168 - [7:0] = spad_enables_rtn_4 4169 */ 4170 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 0x0123 4171 /*!< 4172 type: uint8_t \n 4173 default: 0x00 \n 4174 info: \n 4175 - msb = 7 4176 - lsb = 0 4177 - i2c_size = 1 4178 4179 groups: \n 4180 ['nvm_copy_data', 'ret_spad_config'] 4181 4182 fields: \n 4183 - [7:0] = spad_enables_rtn_5 4184 */ 4185 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 0x0124 4186 /*!< 4187 type: uint8_t \n 4188 default: 0x00 \n 4189 info: \n 4190 - msb = 7 4191 - lsb = 0 4192 - i2c_size = 1 4193 4194 groups: \n 4195 ['nvm_copy_data', 'ret_spad_config'] 4196 4197 fields: \n 4198 - [7:0] = spad_enables_rtn_6 4199 */ 4200 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 0x0125 4201 /*!< 4202 type: uint8_t \n 4203 default: 0x00 \n 4204 info: \n 4205 - msb = 7 4206 - lsb = 0 4207 - i2c_size = 1 4208 4209 groups: \n 4210 ['nvm_copy_data', 'ret_spad_config'] 4211 4212 fields: \n 4213 - [7:0] = spad_enables_rtn_7 4214 */ 4215 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 0x0126 4216 /*!< 4217 type: uint8_t \n 4218 default: 0x00 \n 4219 info: \n 4220 - msb = 7 4221 - lsb = 0 4222 - i2c_size = 1 4223 4224 groups: \n 4225 ['nvm_copy_data', 'ret_spad_config'] 4226 4227 fields: \n 4228 - [7:0] = spad_enables_rtn_8 4229 */ 4230 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 0x0127 4231 /*!< 4232 type: uint8_t \n 4233 default: 0x00 \n 4234 info: \n 4235 - msb = 7 4236 - lsb = 0 4237 - i2c_size = 1 4238 4239 groups: \n 4240 ['nvm_copy_data', 'ret_spad_config'] 4241 4242 fields: \n 4243 - [7:0] = spad_enables_rtn_9 4244 */ 4245 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 0x0128 4246 /*!< 4247 type: uint8_t \n 4248 default: 0x00 \n 4249 info: \n 4250 - msb = 7 4251 - lsb = 0 4252 - i2c_size = 1 4253 4254 groups: \n 4255 ['nvm_copy_data', 'ret_spad_config'] 4256 4257 fields: \n 4258 - [7:0] = spad_enables_rtn_10 4259 */ 4260 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 0x0129 4261 /*!< 4262 type: uint8_t \n 4263 default: 0x00 \n 4264 info: \n 4265 - msb = 7 4266 - lsb = 0 4267 - i2c_size = 1 4268 4269 groups: \n 4270 ['nvm_copy_data', 'ret_spad_config'] 4271 4272 fields: \n 4273 - [7:0] = spad_enables_rtn_11 4274 */ 4275 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 0x012A 4276 /*!< 4277 type: uint8_t \n 4278 default: 0x00 \n 4279 info: \n 4280 - msb = 7 4281 - lsb = 0 4282 - i2c_size = 1 4283 4284 groups: \n 4285 ['nvm_copy_data', 'ret_spad_config'] 4286 4287 fields: \n 4288 - [7:0] = spad_enables_rtn_12 4289 */ 4290 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 0x012B 4291 /*!< 4292 type: uint8_t \n 4293 default: 0x00 \n 4294 info: \n 4295 - msb = 7 4296 - lsb = 0 4297 - i2c_size = 1 4298 4299 groups: \n 4300 ['nvm_copy_data', 'ret_spad_config'] 4301 4302 fields: \n 4303 - [7:0] = spad_enables_rtn_13 4304 */ 4305 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 0x012C 4306 /*!< 4307 type: uint8_t \n 4308 default: 0x00 \n 4309 info: \n 4310 - msb = 7 4311 - lsb = 0 4312 - i2c_size = 1 4313 4314 groups: \n 4315 ['nvm_copy_data', 'ret_spad_config'] 4316 4317 fields: \n 4318 - [7:0] = spad_enables_rtn_14 4319 */ 4320 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 0x012D 4321 /*!< 4322 type: uint8_t \n 4323 default: 0x00 \n 4324 info: \n 4325 - msb = 7 4326 - lsb = 0 4327 - i2c_size = 1 4328 4329 groups: \n 4330 ['nvm_copy_data', 'ret_spad_config'] 4331 4332 fields: \n 4333 - [7:0] = spad_enables_rtn_15 4334 */ 4335 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 0x012E 4336 /*!< 4337 type: uint8_t \n 4338 default: 0x00 \n 4339 info: \n 4340 - msb = 7 4341 - lsb = 0 4342 - i2c_size = 1 4343 4344 groups: \n 4345 ['nvm_copy_data', 'ret_spad_config'] 4346 4347 fields: \n 4348 - [7:0] = spad_enables_rtn_16 4349 */ 4350 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 0x012F 4351 /*!< 4352 type: uint8_t \n 4353 default: 0x00 \n 4354 info: \n 4355 - msb = 7 4356 - lsb = 0 4357 - i2c_size = 1 4358 4359 groups: \n 4360 ['nvm_copy_data', 'ret_spad_config'] 4361 4362 fields: \n 4363 - [7:0] = spad_enables_rtn_17 4364 */ 4365 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 0x0130 4366 /*!< 4367 type: uint8_t \n 4368 default: 0x00 \n 4369 info: \n 4370 - msb = 7 4371 - lsb = 0 4372 - i2c_size = 1 4373 4374 groups: \n 4375 ['nvm_copy_data', 'ret_spad_config'] 4376 4377 fields: \n 4378 - [7:0] = spad_enables_rtn_18 4379 */ 4380 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 0x0131 4381 /*!< 4382 type: uint8_t \n 4383 default: 0x00 \n 4384 info: \n 4385 - msb = 7 4386 - lsb = 0 4387 - i2c_size = 1 4388 4389 groups: \n 4390 ['nvm_copy_data', 'ret_spad_config'] 4391 4392 fields: \n 4393 - [7:0] = spad_enables_rtn_19 4394 */ 4395 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 0x0132 4396 /*!< 4397 type: uint8_t \n 4398 default: 0x00 \n 4399 info: \n 4400 - msb = 7 4401 - lsb = 0 4402 - i2c_size = 1 4403 4404 groups: \n 4405 ['nvm_copy_data', 'ret_spad_config'] 4406 4407 fields: \n 4408 - [7:0] = spad_enables_rtn_20 4409 */ 4410 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 0x0133 4411 /*!< 4412 type: uint8_t \n 4413 default: 0x00 \n 4414 info: \n 4415 - msb = 7 4416 - lsb = 0 4417 - i2c_size = 1 4418 4419 groups: \n 4420 ['nvm_copy_data', 'ret_spad_config'] 4421 4422 fields: \n 4423 - [7:0] = spad_enables_rtn_21 4424 */ 4425 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 0x0134 4426 /*!< 4427 type: uint8_t \n 4428 default: 0x00 \n 4429 info: \n 4430 - msb = 7 4431 - lsb = 0 4432 - i2c_size = 1 4433 4434 groups: \n 4435 ['nvm_copy_data', 'ret_spad_config'] 4436 4437 fields: \n 4438 - [7:0] = spad_enables_rtn_22 4439 */ 4440 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 0x0135 4441 /*!< 4442 type: uint8_t \n 4443 default: 0x00 \n 4444 info: \n 4445 - msb = 7 4446 - lsb = 0 4447 - i2c_size = 1 4448 4449 groups: \n 4450 ['nvm_copy_data', 'ret_spad_config'] 4451 4452 fields: \n 4453 - [7:0] = spad_enables_rtn_23 4454 */ 4455 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 0x0136 4456 /*!< 4457 type: uint8_t \n 4458 default: 0x00 \n 4459 info: \n 4460 - msb = 7 4461 - lsb = 0 4462 - i2c_size = 1 4463 4464 groups: \n 4465 ['nvm_copy_data', 'ret_spad_config'] 4466 4467 fields: \n 4468 - [7:0] = spad_enables_rtn_24 4469 */ 4470 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 0x0137 4471 /*!< 4472 type: uint8_t \n 4473 default: 0x00 \n 4474 info: \n 4475 - msb = 7 4476 - lsb = 0 4477 - i2c_size = 1 4478 4479 groups: \n 4480 ['nvm_copy_data', 'ret_spad_config'] 4481 4482 fields: \n 4483 - [7:0] = spad_enables_rtn_25 4484 */ 4485 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 0x0138 4486 /*!< 4487 type: uint8_t \n 4488 default: 0x00 \n 4489 info: \n 4490 - msb = 7 4491 - lsb = 0 4492 - i2c_size = 1 4493 4494 groups: \n 4495 ['nvm_copy_data', 'ret_spad_config'] 4496 4497 fields: \n 4498 - [7:0] = spad_enables_rtn_26 4499 */ 4500 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 0x0139 4501 /*!< 4502 type: uint8_t \n 4503 default: 0x00 \n 4504 info: \n 4505 - msb = 7 4506 - lsb = 0 4507 - i2c_size = 1 4508 4509 groups: \n 4510 ['nvm_copy_data', 'ret_spad_config'] 4511 4512 fields: \n 4513 - [7:0] = spad_enables_rtn_27 4514 */ 4515 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 0x013A 4516 /*!< 4517 type: uint8_t \n 4518 default: 0x00 \n 4519 info: \n 4520 - msb = 7 4521 - lsb = 0 4522 - i2c_size = 1 4523 4524 groups: \n 4525 ['nvm_copy_data', 'ret_spad_config'] 4526 4527 fields: \n 4528 - [7:0] = spad_enables_rtn_28 4529 */ 4530 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 0x013B 4531 /*!< 4532 type: uint8_t \n 4533 default: 0x00 \n 4534 info: \n 4535 - msb = 7 4536 - lsb = 0 4537 - i2c_size = 1 4538 4539 groups: \n 4540 ['nvm_copy_data', 'ret_spad_config'] 4541 4542 fields: \n 4543 - [7:0] = spad_enables_rtn_29 4544 */ 4545 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 0x013C 4546 /*!< 4547 type: uint8_t \n 4548 default: 0x00 \n 4549 info: \n 4550 - msb = 7 4551 - lsb = 0 4552 - i2c_size = 1 4553 4554 groups: \n 4555 ['nvm_copy_data', 'ret_spad_config'] 4556 4557 fields: \n 4558 - [7:0] = spad_enables_rtn_30 4559 */ 4560 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 0x013D 4561 /*!< 4562 type: uint8_t \n 4563 default: 0x00 \n 4564 info: \n 4565 - msb = 7 4566 - lsb = 0 4567 - i2c_size = 1 4568 4569 groups: \n 4570 ['nvm_copy_data', 'ret_spad_config'] 4571 4572 fields: \n 4573 - [7:0] = spad_enables_rtn_31 4574 */ 4575 #define VL53L1_ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x013E 4576 /*!< 4577 type: uint8_t \n 4578 default: 0x00 \n 4579 info: \n 4580 - msb = 7 4581 - lsb = 0 4582 - i2c_size = 1 4583 4584 groups: \n 4585 ['nvm_copy_data', 'roi_config'] 4586 4587 fields: \n 4588 - [7:0] = mode_roi_center_spad 4589 */ 4590 #define VL53L1_ROI_CONFIG__MODE_ROI_XY_SIZE 0x013F 4591 /*!< 4592 type: uint8_t \n 4593 default: 0x00 \n 4594 info: \n 4595 - msb = 7 4596 - lsb = 0 4597 - i2c_size = 1 4598 4599 groups: \n 4600 ['nvm_copy_data', 'roi_config'] 4601 4602 fields: \n 4603 - [7:0] = mode_roi_xy_size 4604 */ 4605 #define VL53L1_GO2_HOST_BANK_ACCESS__OVERRIDE 0x0300 4606 /*!< 4607 info: \n 4608 - msb = 0 4609 - lsb = 0 4610 - i2c_size = 1 4611 */ 4612 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND 0x0400 4613 /*!< 4614 info: \n 4615 - msb = 0 4616 - lsb = 0 4617 - i2c_size = 1 4618 */ 4619 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 0x0400 4620 /*!< 4621 info: \n 4622 - msb = 0 4623 - lsb = 0 4624 - i2c_size = 1 4625 */ 4626 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 0x0401 4627 /*!< 4628 info: \n 4629 - msb = 0 4630 - lsb = 0 4631 - i2c_size = 1 4632 */ 4633 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 0x0402 4634 /*!< 4635 info: \n 4636 - msb = 0 4637 - lsb = 0 4638 - i2c_size = 1 4639 */ 4640 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 0x0403 4641 /*!< 4642 info: \n 4643 - msb = 0 4644 - lsb = 0 4645 - i2c_size = 1 4646 */ 4647 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER 0x0404 4648 /*!< 4649 info: \n 4650 - msb = 0 4651 - lsb = 0 4652 - i2c_size = 1 4653 */ 4654 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_3 0x0404 4655 /*!< 4656 info: \n 4657 - msb = 0 4658 - lsb = 0 4659 - i2c_size = 1 4660 */ 4661 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_2 0x0405 4662 /*!< 4663 info: \n 4664 - msb = 0 4665 - lsb = 0 4666 - i2c_size = 1 4667 */ 4668 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_1 0x0406 4669 /*!< 4670 info: \n 4671 - msb = 0 4672 - lsb = 0 4673 - i2c_size = 1 4674 */ 4675 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_0 0x0407 4676 /*!< 4677 info: \n 4678 - msb = 0 4679 - lsb = 0 4680 - i2c_size = 1 4681 */ 4682 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI 0x0408 4683 /*!< 4684 info: \n 4685 - msb = 0 4686 - lsb = 0 4687 - i2c_size = 1 4688 */ 4689 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 0x0408 4690 /*!< 4691 info: \n 4692 - msb = 0 4693 - lsb = 0 4694 - i2c_size = 1 4695 */ 4696 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 0x0409 4697 /*!< 4698 info: \n 4699 - msb = 0 4700 - lsb = 0 4701 - i2c_size = 1 4702 */ 4703 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 0x040A 4704 /*!< 4705 info: \n 4706 - msb = 0 4707 - lsb = 0 4708 - i2c_size = 1 4709 */ 4710 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 0x040B 4711 /*!< 4712 info: \n 4713 - msb = 0 4714 - lsb = 0 4715 - i2c_size = 1 4716 */ 4717 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO 0x040C 4718 /*!< 4719 info: \n 4720 - msb = 0 4721 - lsb = 0 4722 - i2c_size = 1 4723 */ 4724 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 0x040C 4725 /*!< 4726 info: \n 4727 - msb = 0 4728 - lsb = 0 4729 - i2c_size = 1 4730 */ 4731 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 0x040D 4732 /*!< 4733 info: \n 4734 - msb = 0 4735 - lsb = 0 4736 - i2c_size = 1 4737 */ 4738 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 0x040E 4739 /*!< 4740 info: \n 4741 - msb = 0 4742 - lsb = 0 4743 - i2c_size = 1 4744 */ 4745 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 0x040F 4746 /*!< 4747 info: \n 4748 - msb = 0 4749 - lsb = 0 4750 - i2c_size = 1 4751 */ 4752 #define VL53L1_MCU_UTIL_MULTIPLIER__START 0x0410 4753 /*!< 4754 info: \n 4755 - msb = 0 4756 - lsb = 0 4757 - i2c_size = 1 4758 */ 4759 #define VL53L1_MCU_UTIL_MULTIPLIER__STATUS 0x0411 4760 /*!< 4761 info: \n 4762 - msb = 0 4763 - lsb = 0 4764 - i2c_size = 1 4765 */ 4766 #define VL53L1_MCU_UTIL_DIVIDER__START 0x0412 4767 /*!< 4768 info: \n 4769 - msb = 0 4770 - lsb = 0 4771 - i2c_size = 1 4772 */ 4773 #define VL53L1_MCU_UTIL_DIVIDER__STATUS 0x0413 4774 /*!< 4775 info: \n 4776 - msb = 0 4777 - lsb = 0 4778 - i2c_size = 1 4779 */ 4780 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND 0x0414 4781 /*!< 4782 info: \n 4783 - msb = 0 4784 - lsb = 0 4785 - i2c_size = 1 4786 */ 4787 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_3 0x0414 4788 /*!< 4789 info: \n 4790 - msb = 0 4791 - lsb = 0 4792 - i2c_size = 1 4793 */ 4794 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_2 0x0415 4795 /*!< 4796 info: \n 4797 - msb = 0 4798 - lsb = 0 4799 - i2c_size = 1 4800 */ 4801 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_1 0x0416 4802 /*!< 4803 info: \n 4804 - msb = 0 4805 - lsb = 0 4806 - i2c_size = 1 4807 */ 4808 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_0 0x0417 4809 /*!< 4810 info: \n 4811 - msb = 0 4812 - lsb = 0 4813 - i2c_size = 1 4814 */ 4815 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR 0x0418 4816 /*!< 4817 info: \n 4818 - msb = 0 4819 - lsb = 0 4820 - i2c_size = 1 4821 */ 4822 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_3 0x0418 4823 /*!< 4824 info: \n 4825 - msb = 0 4826 - lsb = 0 4827 - i2c_size = 1 4828 */ 4829 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_2 0x0419 4830 /*!< 4831 info: \n 4832 - msb = 0 4833 - lsb = 0 4834 - i2c_size = 1 4835 */ 4836 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_1 0x041A 4837 /*!< 4838 info: \n 4839 - msb = 0 4840 - lsb = 0 4841 - i2c_size = 1 4842 */ 4843 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_0 0x041B 4844 /*!< 4845 info: \n 4846 - msb = 0 4847 - lsb = 0 4848 - i2c_size = 1 4849 */ 4850 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT 0x041C 4851 /*!< 4852 info: \n 4853 - msb = 0 4854 - lsb = 0 4855 - i2c_size = 1 4856 */ 4857 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_3 0x041C 4858 /*!< 4859 info: \n 4860 - msb = 0 4861 - lsb = 0 4862 - i2c_size = 1 4863 */ 4864 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_2 0x041D 4865 /*!< 4866 info: \n 4867 - msb = 0 4868 - lsb = 0 4869 - i2c_size = 1 4870 */ 4871 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_1 0x041E 4872 /*!< 4873 info: \n 4874 - msb = 0 4875 - lsb = 0 4876 - i2c_size = 1 4877 */ 4878 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_0 0x041F 4879 /*!< 4880 info: \n 4881 - msb = 0 4882 - lsb = 0 4883 - i2c_size = 1 4884 */ 4885 #define VL53L1_TIMER0__VALUE_IN 0x0420 4886 /*!< 4887 info: \n 4888 - msb = 0 4889 - lsb = 0 4890 - i2c_size = 1 4891 */ 4892 #define VL53L1_TIMER0__VALUE_IN_3 0x0420 4893 /*!< 4894 info: \n 4895 - msb = 0 4896 - lsb = 0 4897 - i2c_size = 1 4898 */ 4899 #define VL53L1_TIMER0__VALUE_IN_2 0x0421 4900 /*!< 4901 info: \n 4902 - msb = 0 4903 - lsb = 0 4904 - i2c_size = 1 4905 */ 4906 #define VL53L1_TIMER0__VALUE_IN_1 0x0422 4907 /*!< 4908 info: \n 4909 - msb = 0 4910 - lsb = 0 4911 - i2c_size = 1 4912 */ 4913 #define VL53L1_TIMER0__VALUE_IN_0 0x0423 4914 /*!< 4915 info: \n 4916 - msb = 0 4917 - lsb = 0 4918 - i2c_size = 1 4919 */ 4920 #define VL53L1_TIMER1__VALUE_IN 0x0424 4921 /*!< 4922 info: \n 4923 - msb = 0 4924 - lsb = 0 4925 - i2c_size = 1 4926 */ 4927 #define VL53L1_TIMER1__VALUE_IN_3 0x0424 4928 /*!< 4929 info: \n 4930 - msb = 0 4931 - lsb = 0 4932 - i2c_size = 1 4933 */ 4934 #define VL53L1_TIMER1__VALUE_IN_2 0x0425 4935 /*!< 4936 info: \n 4937 - msb = 0 4938 - lsb = 0 4939 - i2c_size = 1 4940 */ 4941 #define VL53L1_TIMER1__VALUE_IN_1 0x0426 4942 /*!< 4943 info: \n 4944 - msb = 0 4945 - lsb = 0 4946 - i2c_size = 1 4947 */ 4948 #define VL53L1_TIMER1__VALUE_IN_0 0x0427 4949 /*!< 4950 info: \n 4951 - msb = 0 4952 - lsb = 0 4953 - i2c_size = 1 4954 */ 4955 #define VL53L1_TIMER0__CTRL 0x0428 4956 /*!< 4957 info: \n 4958 - msb = 0 4959 - lsb = 0 4960 - i2c_size = 1 4961 */ 4962 #define VL53L1_TIMER1__CTRL 0x0429 4963 /*!< 4964 info: \n 4965 - msb = 0 4966 - lsb = 0 4967 - i2c_size = 1 4968 */ 4969 #define VL53L1_MCU_GENERAL_PURPOSE__GP_0 0x042C 4970 /*!< 4971 type: uint8_t \n 4972 default: 0x00 \n 4973 info: \n 4974 - msb = 7 4975 - lsb = 0 4976 - i2c_size = 1 4977 4978 groups: \n 4979 [''] 4980 4981 fields: \n 4982 - [7:0] = mcu_gp_0 4983 */ 4984 #define VL53L1_MCU_GENERAL_PURPOSE__GP_1 0x042D 4985 /*!< 4986 type: uint8_t \n 4987 default: 0x00 \n 4988 info: \n 4989 - msb = 7 4990 - lsb = 0 4991 - i2c_size = 1 4992 4993 groups: \n 4994 [''] 4995 4996 fields: \n 4997 - [7:0] = mcu_gp_1 4998 */ 4999 #define VL53L1_MCU_GENERAL_PURPOSE__GP_2 0x042E 5000 /*!< 5001 type: uint8_t \n 5002 default: 0x00 \n 5003 info: \n 5004 - msb = 7 5005 - lsb = 0 5006 - i2c_size = 1 5007 5008 groups: \n 5009 [''] 5010 5011 fields: \n 5012 - [7:0] = mcu_gp_2 5013 */ 5014 #define VL53L1_MCU_GENERAL_PURPOSE__GP_3 0x042F 5015 /*!< 5016 type: uint8_t \n 5017 default: 0x00 \n 5018 info: \n 5019 - msb = 7 5020 - lsb = 0 5021 - i2c_size = 1 5022 5023 groups: \n 5024 [''] 5025 5026 fields: \n 5027 - [7:0] = mcu_gp_3 5028 */ 5029 #define VL53L1_MCU_RANGE_CALC__CONFIG 0x0430 5030 /*!< 5031 type: uint8_t \n 5032 default: 0x00 \n 5033 info: \n 5034 - msb = 7 5035 - lsb = 0 5036 - i2c_size = 1 5037 5038 groups: \n 5039 [''] 5040 5041 fields: \n 5042 - [0] = fw_calc__sigma_delta_sel 5043 - [2] = fw_calc__phase_output_en 5044 - [3] = fw_calc__peak_signal_rate_en 5045 - [4] = fw_calc__ambient_rate_en 5046 - [5] = fw_calc__total_rate_per_spad_en 5047 - [6] = fw_calc__snr_avg_signal_rate_en 5048 - [7] = fw_calc__sigma_en 5049 */ 5050 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE 0x0432 5051 /*!< 5052 type: uint16_t \n 5053 default: 0x0000 \n 5054 info: \n 5055 - msb = 15 5056 - lsb = 0 5057 - i2c_size = 2 5058 5059 groups: \n 5060 [''] 5061 5062 fields: \n 5063 - [15:0] = offset_corrected_range 5064 */ 5065 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI 0x0432 5066 /*!< 5067 info: \n 5068 - msb = 0 5069 - lsb = 0 5070 - i2c_size = 1 5071 */ 5072 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO 0x0433 5073 /*!< 5074 info: \n 5075 - msb = 0 5076 - lsb = 0 5077 - i2c_size = 1 5078 */ 5079 #define VL53L1_MCU_RANGE_CALC__SPARE_4 0x0434 5080 /*!< 5081 type: uint32_t \n 5082 default: 0x00000000 \n 5083 info: \n 5084 - msb = 16 5085 - lsb = 0 5086 - i2c_size = 4 5087 5088 groups: \n 5089 [''] 5090 5091 fields: \n 5092 - [16:0] = mcu_calc__spare_4 5093 */ 5094 #define VL53L1_MCU_RANGE_CALC__SPARE_4_3 0x0434 5095 /*!< 5096 info: \n 5097 - msb = 0 5098 - lsb = 0 5099 - i2c_size = 1 5100 */ 5101 #define VL53L1_MCU_RANGE_CALC__SPARE_4_2 0x0435 5102 /*!< 5103 info: \n 5104 - msb = 0 5105 - lsb = 0 5106 - i2c_size = 1 5107 */ 5108 #define VL53L1_MCU_RANGE_CALC__SPARE_4_1 0x0436 5109 /*!< 5110 info: \n 5111 - msb = 0 5112 - lsb = 0 5113 - i2c_size = 1 5114 */ 5115 #define VL53L1_MCU_RANGE_CALC__SPARE_4_0 0x0437 5116 /*!< 5117 info: \n 5118 - msb = 0 5119 - lsb = 0 5120 - i2c_size = 1 5121 */ 5122 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC 0x0438 5123 /*!< 5124 type: uint16_t \n 5125 default: 0x0000 \n 5126 info: \n 5127 - msb = 13 5128 - lsb = 0 5129 - i2c_size = 2 5130 5131 groups: \n 5132 [''] 5133 5134 fields: \n 5135 - [13:0] = ambient_duration_prec_calc 5136 */ 5137 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI 0x0438 5138 /*!< 5139 info: \n 5140 - msb = 0 5141 - lsb = 0 5142 - i2c_size = 1 5143 */ 5144 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO 0x0439 5145 /*!< 5146 info: \n 5147 - msb = 0 5148 - lsb = 0 5149 - i2c_size = 1 5150 */ 5151 #define VL53L1_MCU_RANGE_CALC__ALGO_VCSEL_PERIOD 0x043C 5152 /*!< 5153 type: uint8_t \n 5154 default: 0x00 \n 5155 info: \n 5156 - msb = 7 5157 - lsb = 0 5158 - i2c_size = 1 5159 5160 groups: \n 5161 [''] 5162 5163 fields: \n 5164 - [7:0] = algo_vcsel_period 5165 */ 5166 #define VL53L1_MCU_RANGE_CALC__SPARE_5 0x043D 5167 /*!< 5168 type: uint8_t \n 5169 default: 0x00 \n 5170 info: \n 5171 - msb = 7 5172 - lsb = 0 5173 - i2c_size = 1 5174 5175 groups: \n 5176 [''] 5177 5178 fields: \n 5179 - [7:0] = mcu_calc__spare_5 5180 */ 5181 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS 0x043E 5182 /*!< 5183 type: uint16_t \n 5184 default: 0x0000 \n 5185 info: \n 5186 - msb = 15 5187 - lsb = 0 5188 - i2c_size = 2 5189 5190 groups: \n 5191 [''] 5192 5193 fields: \n 5194 - [15:0] = algo_total_periods 5195 */ 5196 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI 0x043E 5197 /*!< 5198 info: \n 5199 - msb = 0 5200 - lsb = 0 5201 - i2c_size = 1 5202 */ 5203 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO 0x043F 5204 /*!< 5205 info: \n 5206 - msb = 0 5207 - lsb = 0 5208 - i2c_size = 1 5209 */ 5210 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE 0x0440 5211 /*!< 5212 type: uint32_t \n 5213 default: 0x00000000 \n 5214 info: \n 5215 - msb = 31 5216 - lsb = 0 5217 - i2c_size = 4 5218 5219 groups: \n 5220 [''] 5221 5222 fields: \n 5223 - [31:0] = algo_accum_phase 5224 */ 5225 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 0x0440 5226 /*!< 5227 info: \n 5228 - msb = 0 5229 - lsb = 0 5230 - i2c_size = 1 5231 */ 5232 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 0x0441 5233 /*!< 5234 info: \n 5235 - msb = 0 5236 - lsb = 0 5237 - i2c_size = 1 5238 */ 5239 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 0x0442 5240 /*!< 5241 info: \n 5242 - msb = 0 5243 - lsb = 0 5244 - i2c_size = 1 5245 */ 5246 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 0x0443 5247 /*!< 5248 info: \n 5249 - msb = 0 5250 - lsb = 0 5251 - i2c_size = 1 5252 */ 5253 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS 0x0444 5254 /*!< 5255 type: uint32_t \n 5256 default: 0x00000000 \n 5257 info: \n 5258 - msb = 31 5259 - lsb = 0 5260 - i2c_size = 4 5261 5262 groups: \n 5263 [''] 5264 5265 fields: \n 5266 - [31:0] = algo_signal_events 5267 */ 5268 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 0x0444 5269 /*!< 5270 info: \n 5271 - msb = 0 5272 - lsb = 0 5273 - i2c_size = 1 5274 */ 5275 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 0x0445 5276 /*!< 5277 info: \n 5278 - msb = 0 5279 - lsb = 0 5280 - i2c_size = 1 5281 */ 5282 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 0x0446 5283 /*!< 5284 info: \n 5285 - msb = 0 5286 - lsb = 0 5287 - i2c_size = 1 5288 */ 5289 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 0x0447 5290 /*!< 5291 info: \n 5292 - msb = 0 5293 - lsb = 0 5294 - i2c_size = 1 5295 */ 5296 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS 0x0448 5297 /*!< 5298 type: uint32_t \n 5299 default: 0x00000000 \n 5300 info: \n 5301 - msb = 31 5302 - lsb = 0 5303 - i2c_size = 4 5304 5305 groups: \n 5306 [''] 5307 5308 fields: \n 5309 - [31:0] = algo_ambient_events 5310 */ 5311 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 0x0448 5312 /*!< 5313 info: \n 5314 - msb = 0 5315 - lsb = 0 5316 - i2c_size = 1 5317 */ 5318 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 0x0449 5319 /*!< 5320 info: \n 5321 - msb = 0 5322 - lsb = 0 5323 - i2c_size = 1 5324 */ 5325 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 0x044A 5326 /*!< 5327 info: \n 5328 - msb = 0 5329 - lsb = 0 5330 - i2c_size = 1 5331 */ 5332 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 0x044B 5333 /*!< 5334 info: \n 5335 - msb = 0 5336 - lsb = 0 5337 - i2c_size = 1 5338 */ 5339 #define VL53L1_MCU_RANGE_CALC__SPARE_6 0x044C 5340 /*!< 5341 type: uint16_t \n 5342 default: 0x0000 \n 5343 info: \n 5344 - msb = 15 5345 - lsb = 0 5346 - i2c_size = 2 5347 5348 groups: \n 5349 [''] 5350 5351 fields: \n 5352 - [15:0] = mcu_calc__spare_6 5353 */ 5354 #define VL53L1_MCU_RANGE_CALC__SPARE_6_HI 0x044C 5355 /*!< 5356 info: \n 5357 - msb = 0 5358 - lsb = 0 5359 - i2c_size = 1 5360 */ 5361 #define VL53L1_MCU_RANGE_CALC__SPARE_6_LO 0x044D 5362 /*!< 5363 info: \n 5364 - msb = 0 5365 - lsb = 0 5366 - i2c_size = 1 5367 */ 5368 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD 0x044E 5369 /*!< 5370 type: uint16_t \n 5371 default: 0x0000 \n 5372 info: \n 5373 - msb = 15 5374 - lsb = 0 5375 - i2c_size = 2 5376 5377 groups: \n 5378 [''] 5379 5380 fields: \n 5381 - [15:0] = algo_adjust_vcsel_period 5382 */ 5383 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI 0x044E 5384 /*!< 5385 info: \n 5386 - msb = 0 5387 - lsb = 0 5388 - i2c_size = 1 5389 */ 5390 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO 0x044F 5391 /*!< 5392 info: \n 5393 - msb = 0 5394 - lsb = 0 5395 - i2c_size = 1 5396 */ 5397 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS 0x0450 5398 /*!< 5399 type: uint16_t \n 5400 default: 0x0000 \n 5401 info: \n 5402 - msb = 15 5403 - lsb = 0 5404 - i2c_size = 2 5405 5406 groups: \n 5407 [''] 5408 5409 fields: \n 5410 - [15:0] = num_spads 5411 */ 5412 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_HI 0x0450 5413 /*!< 5414 info: \n 5415 - msb = 0 5416 - lsb = 0 5417 - i2c_size = 1 5418 */ 5419 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_LO 0x0451 5420 /*!< 5421 info: \n 5422 - msb = 0 5423 - lsb = 0 5424 - i2c_size = 1 5425 */ 5426 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT 0x0452 5427 /*!< 5428 type: uint16_t \n 5429 default: 0x0000 \n 5430 info: \n 5431 - msb = 15 5432 - lsb = 0 5433 - i2c_size = 2 5434 5435 groups: \n 5436 [''] 5437 5438 fields: \n 5439 - [15:0] = phase_output 5440 */ 5441 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_HI 0x0452 5442 /*!< 5443 info: \n 5444 - msb = 0 5445 - lsb = 0 5446 - i2c_size = 1 5447 */ 5448 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_LO 0x0453 5449 /*!< 5450 info: \n 5451 - msb = 0 5452 - lsb = 0 5453 - i2c_size = 1 5454 */ 5455 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS 0x0454 5456 /*!< 5457 type: uint32_t \n 5458 default: 0x00000000 \n 5459 info: \n 5460 - msb = 19 5461 - lsb = 0 5462 - i2c_size = 4 5463 5464 groups: \n 5465 [''] 5466 5467 fields: \n 5468 - [19:0] = rate_per_spad_mcps 5469 */ 5470 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 0x0454 5471 /*!< 5472 info: \n 5473 - msb = 0 5474 - lsb = 0 5475 - i2c_size = 1 5476 */ 5477 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 0x0455 5478 /*!< 5479 info: \n 5480 - msb = 0 5481 - lsb = 0 5482 - i2c_size = 1 5483 */ 5484 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 0x0456 5485 /*!< 5486 info: \n 5487 - msb = 0 5488 - lsb = 0 5489 - i2c_size = 1 5490 */ 5491 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 0x0457 5492 /*!< 5493 info: \n 5494 - msb = 0 5495 - lsb = 0 5496 - i2c_size = 1 5497 */ 5498 #define VL53L1_MCU_RANGE_CALC__SPARE_7 0x0458 5499 /*!< 5500 type: uint8_t \n 5501 default: 0x00 \n 5502 info: \n 5503 - msb = 7 5504 - lsb = 0 5505 - i2c_size = 1 5506 5507 groups: \n 5508 [''] 5509 5510 fields: \n 5511 - [7:0] = mcu_calc__spare_7 5512 */ 5513 #define VL53L1_MCU_RANGE_CALC__SPARE_8 0x0459 5514 /*!< 5515 type: uint8_t \n 5516 default: 0x00 \n 5517 info: \n 5518 - msb = 7 5519 - lsb = 0 5520 - i2c_size = 1 5521 5522 groups: \n 5523 [''] 5524 5525 fields: \n 5526 - [7:0] = mcu_calc__spare_8 5527 */ 5528 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS 0x045A 5529 /*!< 5530 type: uint16_t \n 5531 default: 0x0000 \n 5532 info: \n 5533 - msb = 15 5534 - lsb = 0 5535 - i2c_size = 2 5536 5537 groups: \n 5538 [''] 5539 5540 fields: \n 5541 - [15:0] = peak_signal_rate 5542 */ 5543 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI 0x045A 5544 /*!< 5545 info: \n 5546 - msb = 0 5547 - lsb = 0 5548 - i2c_size = 1 5549 */ 5550 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO 0x045B 5551 /*!< 5552 info: \n 5553 - msb = 0 5554 - lsb = 0 5555 - i2c_size = 1 5556 */ 5557 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS 0x045C 5558 /*!< 5559 type: uint16_t \n 5560 default: 0x0000 \n 5561 info: \n 5562 - msb = 15 5563 - lsb = 0 5564 - i2c_size = 2 5565 5566 groups: \n 5567 [''] 5568 5569 fields: \n 5570 - [15:0] = avg_signal_rate 5571 */ 5572 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI 0x045C 5573 /*!< 5574 info: \n 5575 - msb = 0 5576 - lsb = 0 5577 - i2c_size = 1 5578 */ 5579 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO 0x045D 5580 /*!< 5581 info: \n 5582 - msb = 0 5583 - lsb = 0 5584 - i2c_size = 1 5585 */ 5586 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS 0x045E 5587 /*!< 5588 type: uint16_t \n 5589 default: 0x0000 \n 5590 info: \n 5591 - msb = 15 5592 - lsb = 0 5593 - i2c_size = 2 5594 5595 groups: \n 5596 [''] 5597 5598 fields: \n 5599 - [15:0] = ambient_rate 5600 */ 5601 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI 0x045E 5602 /*!< 5603 info: \n 5604 - msb = 0 5605 - lsb = 0 5606 - i2c_size = 1 5607 */ 5608 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO 0x045F 5609 /*!< 5610 info: \n 5611 - msb = 0 5612 - lsb = 0 5613 - i2c_size = 1 5614 */ 5615 #define VL53L1_MCU_RANGE_CALC__XTALK 0x0460 5616 /*!< 5617 type: uint16_t \n 5618 default: 0x0000 \n 5619 info: \n 5620 - msb = 15 5621 - lsb = 0 5622 - i2c_size = 2 5623 5624 groups: \n 5625 [''] 5626 5627 fields: \n 5628 - [15:0] = crosstalk (fixed point 9.7) 5629 */ 5630 #define VL53L1_MCU_RANGE_CALC__XTALK_HI 0x0460 5631 /*!< 5632 info: \n 5633 - msb = 0 5634 - lsb = 0 5635 - i2c_size = 1 5636 */ 5637 #define VL53L1_MCU_RANGE_CALC__XTALK_LO 0x0461 5638 /*!< 5639 info: \n 5640 - msb = 0 5641 - lsb = 0 5642 - i2c_size = 1 5643 */ 5644 #define VL53L1_MCU_RANGE_CALC__CALC_STATUS 0x0462 5645 /*!< 5646 type: uint8_t \n 5647 default: 0x00 \n 5648 info: \n 5649 - msb = 7 5650 - lsb = 0 5651 - i2c_size = 1 5652 5653 groups: \n 5654 [''] 5655 5656 fields: \n 5657 - [7:0] = calc_status 5658 */ 5659 #define VL53L1_MCU_RANGE_CALC__DEBUG 0x0463 5660 /*!< 5661 type: uint8_t \n 5662 default: 0x00 \n 5663 info: \n 5664 - msb = 0 5665 - lsb = 0 5666 - i2c_size = 1 5667 5668 groups: \n 5669 [''] 5670 5671 fields: \n 5672 - [0] = calc_debug__divide_by_zero 5673 */ 5674 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS 0x0464 5675 /*!< 5676 type: uint16_t \n 5677 default: 0x0000 \n 5678 info: \n 5679 - msb = 15 5680 - lsb = 0 5681 - i2c_size = 2 5682 5683 groups: \n 5684 [''] 5685 5686 fields: \n 5687 - [15:0] = peak_signal_rate_xtalk_corr 5688 */ 5689 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI 0x0464 5690 /*!< 5691 info: \n 5692 - msb = 0 5693 - lsb = 0 5694 - i2c_size = 1 5695 */ 5696 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO 0x0465 5697 /*!< 5698 info: \n 5699 - msb = 0 5700 - lsb = 0 5701 - i2c_size = 1 5702 */ 5703 #define VL53L1_MCU_RANGE_CALC__SPARE_0 0x0468 5704 /*!< 5705 type: uint8_t \n 5706 default: 0x00 \n 5707 info: \n 5708 - msb = 7 5709 - lsb = 0 5710 - i2c_size = 1 5711 5712 groups: \n 5713 [''] 5714 5715 fields: \n 5716 - [7:0] = mcu_calc__spare_0 5717 */ 5718 #define VL53L1_MCU_RANGE_CALC__SPARE_1 0x0469 5719 /*!< 5720 type: uint8_t \n 5721 default: 0x00 \n 5722 info: \n 5723 - msb = 7 5724 - lsb = 0 5725 - i2c_size = 1 5726 5727 groups: \n 5728 [''] 5729 5730 fields: \n 5731 - [7:0] = mcu_calc__spare_1 5732 */ 5733 #define VL53L1_MCU_RANGE_CALC__SPARE_2 0x046A 5734 /*!< 5735 type: uint8_t \n 5736 default: 0x00 \n 5737 info: \n 5738 - msb = 7 5739 - lsb = 0 5740 - i2c_size = 1 5741 5742 groups: \n 5743 [''] 5744 5745 fields: \n 5746 - [7:0] = mcu_calc__spare_2 5747 */ 5748 #define VL53L1_MCU_RANGE_CALC__SPARE_3 0x046B 5749 /*!< 5750 type: uint8_t \n 5751 default: 0x00 \n 5752 info: \n 5753 - msb = 7 5754 - lsb = 0 5755 - i2c_size = 1 5756 5757 groups: \n 5758 [''] 5759 5760 fields: \n 5761 - [7:0] = mcu_calc__spare_3 5762 */ 5763 #define VL53L1_PATCH__CTRL 0x0470 5764 /*!< 5765 info: \n 5766 - msb = 0 5767 - lsb = 0 5768 - i2c_size = 1 5769 */ 5770 #define VL53L1_PATCH__JMP_ENABLES 0x0472 5771 /*!< 5772 info: \n 5773 - msb = 0 5774 - lsb = 0 5775 - i2c_size = 1 5776 */ 5777 #define VL53L1_PATCH__JMP_ENABLES_HI 0x0472 5778 /*!< 5779 info: \n 5780 - msb = 0 5781 - lsb = 0 5782 - i2c_size = 1 5783 */ 5784 #define VL53L1_PATCH__JMP_ENABLES_LO 0x0473 5785 /*!< 5786 info: \n 5787 - msb = 0 5788 - lsb = 0 5789 - i2c_size = 1 5790 */ 5791 #define VL53L1_PATCH__DATA_ENABLES 0x0474 5792 /*!< 5793 info: \n 5794 - msb = 0 5795 - lsb = 0 5796 - i2c_size = 1 5797 */ 5798 #define VL53L1_PATCH__DATA_ENABLES_HI 0x0474 5799 /*!< 5800 info: \n 5801 - msb = 0 5802 - lsb = 0 5803 - i2c_size = 1 5804 */ 5805 #define VL53L1_PATCH__DATA_ENABLES_LO 0x0475 5806 /*!< 5807 info: \n 5808 - msb = 0 5809 - lsb = 0 5810 - i2c_size = 1 5811 */ 5812 #define VL53L1_PATCH__OFFSET_0 0x0476 5813 /*!< 5814 info: \n 5815 - msb = 0 5816 - lsb = 0 5817 - i2c_size = 1 5818 */ 5819 #define VL53L1_PATCH__OFFSET_0_HI 0x0476 5820 /*!< 5821 info: \n 5822 - msb = 0 5823 - lsb = 0 5824 - i2c_size = 1 5825 */ 5826 #define VL53L1_PATCH__OFFSET_0_LO 0x0477 5827 /*!< 5828 info: \n 5829 - msb = 0 5830 - lsb = 0 5831 - i2c_size = 1 5832 */ 5833 #define VL53L1_PATCH__OFFSET_1 0x0478 5834 /*!< 5835 info: \n 5836 - msb = 0 5837 - lsb = 0 5838 - i2c_size = 1 5839 */ 5840 #define VL53L1_PATCH__OFFSET_1_HI 0x0478 5841 /*!< 5842 info: \n 5843 - msb = 0 5844 - lsb = 0 5845 - i2c_size = 1 5846 */ 5847 #define VL53L1_PATCH__OFFSET_1_LO 0x0479 5848 /*!< 5849 info: \n 5850 - msb = 0 5851 - lsb = 0 5852 - i2c_size = 1 5853 */ 5854 #define VL53L1_PATCH__OFFSET_2 0x047A 5855 /*!< 5856 info: \n 5857 - msb = 0 5858 - lsb = 0 5859 - i2c_size = 1 5860 */ 5861 #define VL53L1_PATCH__OFFSET_2_HI 0x047A 5862 /*!< 5863 info: \n 5864 - msb = 0 5865 - lsb = 0 5866 - i2c_size = 1 5867 */ 5868 #define VL53L1_PATCH__OFFSET_2_LO 0x047B 5869 /*!< 5870 info: \n 5871 - msb = 0 5872 - lsb = 0 5873 - i2c_size = 1 5874 */ 5875 #define VL53L1_PATCH__OFFSET_3 0x047C 5876 /*!< 5877 info: \n 5878 - msb = 0 5879 - lsb = 0 5880 - i2c_size = 1 5881 */ 5882 #define VL53L1_PATCH__OFFSET_3_HI 0x047C 5883 /*!< 5884 info: \n 5885 - msb = 0 5886 - lsb = 0 5887 - i2c_size = 1 5888 */ 5889 #define VL53L1_PATCH__OFFSET_3_LO 0x047D 5890 /*!< 5891 info: \n 5892 - msb = 0 5893 - lsb = 0 5894 - i2c_size = 1 5895 */ 5896 #define VL53L1_PATCH__OFFSET_4 0x047E 5897 /*!< 5898 info: \n 5899 - msb = 0 5900 - lsb = 0 5901 - i2c_size = 1 5902 */ 5903 #define VL53L1_PATCH__OFFSET_4_HI 0x047E 5904 /*!< 5905 info: \n 5906 - msb = 0 5907 - lsb = 0 5908 - i2c_size = 1 5909 */ 5910 #define VL53L1_PATCH__OFFSET_4_LO 0x047F 5911 /*!< 5912 info: \n 5913 - msb = 0 5914 - lsb = 0 5915 - i2c_size = 1 5916 */ 5917 #define VL53L1_PATCH__OFFSET_5 0x0480 5918 /*!< 5919 info: \n 5920 - msb = 0 5921 - lsb = 0 5922 - i2c_size = 1 5923 */ 5924 #define VL53L1_PATCH__OFFSET_5_HI 0x0480 5925 /*!< 5926 info: \n 5927 - msb = 0 5928 - lsb = 0 5929 - i2c_size = 1 5930 */ 5931 #define VL53L1_PATCH__OFFSET_5_LO 0x0481 5932 /*!< 5933 info: \n 5934 - msb = 0 5935 - lsb = 0 5936 - i2c_size = 1 5937 */ 5938 #define VL53L1_PATCH__OFFSET_6 0x0482 5939 /*!< 5940 info: \n 5941 - msb = 0 5942 - lsb = 0 5943 - i2c_size = 1 5944 */ 5945 #define VL53L1_PATCH__OFFSET_6_HI 0x0482 5946 /*!< 5947 info: \n 5948 - msb = 0 5949 - lsb = 0 5950 - i2c_size = 1 5951 */ 5952 #define VL53L1_PATCH__OFFSET_6_LO 0x0483 5953 /*!< 5954 info: \n 5955 - msb = 0 5956 - lsb = 0 5957 - i2c_size = 1 5958 */ 5959 #define VL53L1_PATCH__OFFSET_7 0x0484 5960 /*!< 5961 info: \n 5962 - msb = 0 5963 - lsb = 0 5964 - i2c_size = 1 5965 */ 5966 #define VL53L1_PATCH__OFFSET_7_HI 0x0484 5967 /*!< 5968 info: \n 5969 - msb = 0 5970 - lsb = 0 5971 - i2c_size = 1 5972 */ 5973 #define VL53L1_PATCH__OFFSET_7_LO 0x0485 5974 /*!< 5975 info: \n 5976 - msb = 0 5977 - lsb = 0 5978 - i2c_size = 1 5979 */ 5980 #define VL53L1_PATCH__OFFSET_8 0x0486 5981 /*!< 5982 info: \n 5983 - msb = 0 5984 - lsb = 0 5985 - i2c_size = 1 5986 */ 5987 #define VL53L1_PATCH__OFFSET_8_HI 0x0486 5988 /*!< 5989 info: \n 5990 - msb = 0 5991 - lsb = 0 5992 - i2c_size = 1 5993 */ 5994 #define VL53L1_PATCH__OFFSET_8_LO 0x0487 5995 /*!< 5996 info: \n 5997 - msb = 0 5998 - lsb = 0 5999 - i2c_size = 1 6000 */ 6001 #define VL53L1_PATCH__OFFSET_9 0x0488 6002 /*!< 6003 info: \n 6004 - msb = 0 6005 - lsb = 0 6006 - i2c_size = 1 6007 */ 6008 #define VL53L1_PATCH__OFFSET_9_HI 0x0488 6009 /*!< 6010 info: \n 6011 - msb = 0 6012 - lsb = 0 6013 - i2c_size = 1 6014 */ 6015 #define VL53L1_PATCH__OFFSET_9_LO 0x0489 6016 /*!< 6017 info: \n 6018 - msb = 0 6019 - lsb = 0 6020 - i2c_size = 1 6021 */ 6022 #define VL53L1_PATCH__OFFSET_10 0x048A 6023 /*!< 6024 info: \n 6025 - msb = 0 6026 - lsb = 0 6027 - i2c_size = 1 6028 */ 6029 #define VL53L1_PATCH__OFFSET_10_HI 0x048A 6030 /*!< 6031 info: \n 6032 - msb = 0 6033 - lsb = 0 6034 - i2c_size = 1 6035 */ 6036 #define VL53L1_PATCH__OFFSET_10_LO 0x048B 6037 /*!< 6038 info: \n 6039 - msb = 0 6040 - lsb = 0 6041 - i2c_size = 1 6042 */ 6043 #define VL53L1_PATCH__OFFSET_11 0x048C 6044 /*!< 6045 info: \n 6046 - msb = 0 6047 - lsb = 0 6048 - i2c_size = 1 6049 */ 6050 #define VL53L1_PATCH__OFFSET_11_HI 0x048C 6051 /*!< 6052 info: \n 6053 - msb = 0 6054 - lsb = 0 6055 - i2c_size = 1 6056 */ 6057 #define VL53L1_PATCH__OFFSET_11_LO 0x048D 6058 /*!< 6059 info: \n 6060 - msb = 0 6061 - lsb = 0 6062 - i2c_size = 1 6063 */ 6064 #define VL53L1_PATCH__OFFSET_12 0x048E 6065 /*!< 6066 info: \n 6067 - msb = 0 6068 - lsb = 0 6069 - i2c_size = 1 6070 */ 6071 #define VL53L1_PATCH__OFFSET_12_HI 0x048E 6072 /*!< 6073 info: \n 6074 - msb = 0 6075 - lsb = 0 6076 - i2c_size = 1 6077 */ 6078 #define VL53L1_PATCH__OFFSET_12_LO 0x048F 6079 /*!< 6080 info: \n 6081 - msb = 0 6082 - lsb = 0 6083 - i2c_size = 1 6084 */ 6085 #define VL53L1_PATCH__OFFSET_13 0x0490 6086 /*!< 6087 info: \n 6088 - msb = 0 6089 - lsb = 0 6090 - i2c_size = 1 6091 */ 6092 #define VL53L1_PATCH__OFFSET_13_HI 0x0490 6093 /*!< 6094 info: \n 6095 - msb = 0 6096 - lsb = 0 6097 - i2c_size = 1 6098 */ 6099 #define VL53L1_PATCH__OFFSET_13_LO 0x0491 6100 /*!< 6101 info: \n 6102 - msb = 0 6103 - lsb = 0 6104 - i2c_size = 1 6105 */ 6106 #define VL53L1_PATCH__OFFSET_14 0x0492 6107 /*!< 6108 info: \n 6109 - msb = 0 6110 - lsb = 0 6111 - i2c_size = 1 6112 */ 6113 #define VL53L1_PATCH__OFFSET_14_HI 0x0492 6114 /*!< 6115 info: \n 6116 - msb = 0 6117 - lsb = 0 6118 - i2c_size = 1 6119 */ 6120 #define VL53L1_PATCH__OFFSET_14_LO 0x0493 6121 /*!< 6122 info: \n 6123 - msb = 0 6124 - lsb = 0 6125 - i2c_size = 1 6126 */ 6127 #define VL53L1_PATCH__OFFSET_15 0x0494 6128 /*!< 6129 info: \n 6130 - msb = 0 6131 - lsb = 0 6132 - i2c_size = 1 6133 */ 6134 #define VL53L1_PATCH__OFFSET_15_HI 0x0494 6135 /*!< 6136 info: \n 6137 - msb = 0 6138 - lsb = 0 6139 - i2c_size = 1 6140 */ 6141 #define VL53L1_PATCH__OFFSET_15_LO 0x0495 6142 /*!< 6143 info: \n 6144 - msb = 0 6145 - lsb = 0 6146 - i2c_size = 1 6147 */ 6148 #define VL53L1_PATCH__ADDRESS_0 0x0496 6149 /*!< 6150 info: \n 6151 - msb = 0 6152 - lsb = 0 6153 - i2c_size = 1 6154 */ 6155 #define VL53L1_PATCH__ADDRESS_0_HI 0x0496 6156 /*!< 6157 info: \n 6158 - msb = 0 6159 - lsb = 0 6160 - i2c_size = 1 6161 */ 6162 #define VL53L1_PATCH__ADDRESS_0_LO 0x0497 6163 /*!< 6164 info: \n 6165 - msb = 0 6166 - lsb = 0 6167 - i2c_size = 1 6168 */ 6169 #define VL53L1_PATCH__ADDRESS_1 0x0498 6170 /*!< 6171 info: \n 6172 - msb = 0 6173 - lsb = 0 6174 - i2c_size = 1 6175 */ 6176 #define VL53L1_PATCH__ADDRESS_1_HI 0x0498 6177 /*!< 6178 info: \n 6179 - msb = 0 6180 - lsb = 0 6181 - i2c_size = 1 6182 */ 6183 #define VL53L1_PATCH__ADDRESS_1_LO 0x0499 6184 /*!< 6185 info: \n 6186 - msb = 0 6187 - lsb = 0 6188 - i2c_size = 1 6189 */ 6190 #define VL53L1_PATCH__ADDRESS_2 0x049A 6191 /*!< 6192 info: \n 6193 - msb = 0 6194 - lsb = 0 6195 - i2c_size = 1 6196 */ 6197 #define VL53L1_PATCH__ADDRESS_2_HI 0x049A 6198 /*!< 6199 info: \n 6200 - msb = 0 6201 - lsb = 0 6202 - i2c_size = 1 6203 */ 6204 #define VL53L1_PATCH__ADDRESS_2_LO 0x049B 6205 /*!< 6206 info: \n 6207 - msb = 0 6208 - lsb = 0 6209 - i2c_size = 1 6210 */ 6211 #define VL53L1_PATCH__ADDRESS_3 0x049C 6212 /*!< 6213 info: \n 6214 - msb = 0 6215 - lsb = 0 6216 - i2c_size = 1 6217 */ 6218 #define VL53L1_PATCH__ADDRESS_3_HI 0x049C 6219 /*!< 6220 info: \n 6221 - msb = 0 6222 - lsb = 0 6223 - i2c_size = 1 6224 */ 6225 #define VL53L1_PATCH__ADDRESS_3_LO 0x049D 6226 /*!< 6227 info: \n 6228 - msb = 0 6229 - lsb = 0 6230 - i2c_size = 1 6231 */ 6232 #define VL53L1_PATCH__ADDRESS_4 0x049E 6233 /*!< 6234 info: \n 6235 - msb = 0 6236 - lsb = 0 6237 - i2c_size = 1 6238 */ 6239 #define VL53L1_PATCH__ADDRESS_4_HI 0x049E 6240 /*!< 6241 info: \n 6242 - msb = 0 6243 - lsb = 0 6244 - i2c_size = 1 6245 */ 6246 #define VL53L1_PATCH__ADDRESS_4_LO 0x049F 6247 /*!< 6248 info: \n 6249 - msb = 0 6250 - lsb = 0 6251 - i2c_size = 1 6252 */ 6253 #define VL53L1_PATCH__ADDRESS_5 0x04A0 6254 /*!< 6255 info: \n 6256 - msb = 0 6257 - lsb = 0 6258 - i2c_size = 1 6259 */ 6260 #define VL53L1_PATCH__ADDRESS_5_HI 0x04A0 6261 /*!< 6262 info: \n 6263 - msb = 0 6264 - lsb = 0 6265 - i2c_size = 1 6266 */ 6267 #define VL53L1_PATCH__ADDRESS_5_LO 0x04A1 6268 /*!< 6269 info: \n 6270 - msb = 0 6271 - lsb = 0 6272 - i2c_size = 1 6273 */ 6274 #define VL53L1_PATCH__ADDRESS_6 0x04A2 6275 /*!< 6276 info: \n 6277 - msb = 0 6278 - lsb = 0 6279 - i2c_size = 1 6280 */ 6281 #define VL53L1_PATCH__ADDRESS_6_HI 0x04A2 6282 /*!< 6283 info: \n 6284 - msb = 0 6285 - lsb = 0 6286 - i2c_size = 1 6287 */ 6288 #define VL53L1_PATCH__ADDRESS_6_LO 0x04A3 6289 /*!< 6290 info: \n 6291 - msb = 0 6292 - lsb = 0 6293 - i2c_size = 1 6294 */ 6295 #define VL53L1_PATCH__ADDRESS_7 0x04A4 6296 /*!< 6297 info: \n 6298 - msb = 0 6299 - lsb = 0 6300 - i2c_size = 1 6301 */ 6302 #define VL53L1_PATCH__ADDRESS_7_HI 0x04A4 6303 /*!< 6304 info: \n 6305 - msb = 0 6306 - lsb = 0 6307 - i2c_size = 1 6308 */ 6309 #define VL53L1_PATCH__ADDRESS_7_LO 0x04A5 6310 /*!< 6311 info: \n 6312 - msb = 0 6313 - lsb = 0 6314 - i2c_size = 1 6315 */ 6316 #define VL53L1_PATCH__ADDRESS_8 0x04A6 6317 /*!< 6318 info: \n 6319 - msb = 0 6320 - lsb = 0 6321 - i2c_size = 1 6322 */ 6323 #define VL53L1_PATCH__ADDRESS_8_HI 0x04A6 6324 /*!< 6325 info: \n 6326 - msb = 0 6327 - lsb = 0 6328 - i2c_size = 1 6329 */ 6330 #define VL53L1_PATCH__ADDRESS_8_LO 0x04A7 6331 /*!< 6332 info: \n 6333 - msb = 0 6334 - lsb = 0 6335 - i2c_size = 1 6336 */ 6337 #define VL53L1_PATCH__ADDRESS_9 0x04A8 6338 /*!< 6339 info: \n 6340 - msb = 0 6341 - lsb = 0 6342 - i2c_size = 1 6343 */ 6344 #define VL53L1_PATCH__ADDRESS_9_HI 0x04A8 6345 /*!< 6346 info: \n 6347 - msb = 0 6348 - lsb = 0 6349 - i2c_size = 1 6350 */ 6351 #define VL53L1_PATCH__ADDRESS_9_LO 0x04A9 6352 /*!< 6353 info: \n 6354 - msb = 0 6355 - lsb = 0 6356 - i2c_size = 1 6357 */ 6358 #define VL53L1_PATCH__ADDRESS_10 0x04AA 6359 /*!< 6360 info: \n 6361 - msb = 0 6362 - lsb = 0 6363 - i2c_size = 1 6364 */ 6365 #define VL53L1_PATCH__ADDRESS_10_HI 0x04AA 6366 /*!< 6367 info: \n 6368 - msb = 0 6369 - lsb = 0 6370 - i2c_size = 1 6371 */ 6372 #define VL53L1_PATCH__ADDRESS_10_LO 0x04AB 6373 /*!< 6374 info: \n 6375 - msb = 0 6376 - lsb = 0 6377 - i2c_size = 1 6378 */ 6379 #define VL53L1_PATCH__ADDRESS_11 0x04AC 6380 /*!< 6381 info: \n 6382 - msb = 0 6383 - lsb = 0 6384 - i2c_size = 1 6385 */ 6386 #define VL53L1_PATCH__ADDRESS_11_HI 0x04AC 6387 /*!< 6388 info: \n 6389 - msb = 0 6390 - lsb = 0 6391 - i2c_size = 1 6392 */ 6393 #define VL53L1_PATCH__ADDRESS_11_LO 0x04AD 6394 /*!< 6395 info: \n 6396 - msb = 0 6397 - lsb = 0 6398 - i2c_size = 1 6399 */ 6400 #define VL53L1_PATCH__ADDRESS_12 0x04AE 6401 /*!< 6402 info: \n 6403 - msb = 0 6404 - lsb = 0 6405 - i2c_size = 1 6406 */ 6407 #define VL53L1_PATCH__ADDRESS_12_HI 0x04AE 6408 /*!< 6409 info: \n 6410 - msb = 0 6411 - lsb = 0 6412 - i2c_size = 1 6413 */ 6414 #define VL53L1_PATCH__ADDRESS_12_LO 0x04AF 6415 /*!< 6416 info: \n 6417 - msb = 0 6418 - lsb = 0 6419 - i2c_size = 1 6420 */ 6421 #define VL53L1_PATCH__ADDRESS_13 0x04B0 6422 /*!< 6423 info: \n 6424 - msb = 0 6425 - lsb = 0 6426 - i2c_size = 1 6427 */ 6428 #define VL53L1_PATCH__ADDRESS_13_HI 0x04B0 6429 /*!< 6430 info: \n 6431 - msb = 0 6432 - lsb = 0 6433 - i2c_size = 1 6434 */ 6435 #define VL53L1_PATCH__ADDRESS_13_LO 0x04B1 6436 /*!< 6437 info: \n 6438 - msb = 0 6439 - lsb = 0 6440 - i2c_size = 1 6441 */ 6442 #define VL53L1_PATCH__ADDRESS_14 0x04B2 6443 /*!< 6444 info: \n 6445 - msb = 0 6446 - lsb = 0 6447 - i2c_size = 1 6448 */ 6449 #define VL53L1_PATCH__ADDRESS_14_HI 0x04B2 6450 /*!< 6451 info: \n 6452 - msb = 0 6453 - lsb = 0 6454 - i2c_size = 1 6455 */ 6456 #define VL53L1_PATCH__ADDRESS_14_LO 0x04B3 6457 /*!< 6458 info: \n 6459 - msb = 0 6460 - lsb = 0 6461 - i2c_size = 1 6462 */ 6463 #define VL53L1_PATCH__ADDRESS_15 0x04B4 6464 /*!< 6465 info: \n 6466 - msb = 0 6467 - lsb = 0 6468 - i2c_size = 1 6469 */ 6470 #define VL53L1_PATCH__ADDRESS_15_HI 0x04B4 6471 /*!< 6472 info: \n 6473 - msb = 0 6474 - lsb = 0 6475 - i2c_size = 1 6476 */ 6477 #define VL53L1_PATCH__ADDRESS_15_LO 0x04B5 6478 /*!< 6479 info: \n 6480 - msb = 0 6481 - lsb = 0 6482 - i2c_size = 1 6483 */ 6484 #define VL53L1_SPI_ASYNC_MUX__CTRL 0x04C0 6485 /*!< 6486 info: \n 6487 - msb = 0 6488 - lsb = 0 6489 - i2c_size = 1 6490 */ 6491 #define VL53L1_CLK__CONFIG 0x04C4 6492 /*!< 6493 type: uint8_t \n 6494 default: 0x01 \n 6495 info: \n 6496 - msb = 0 6497 - lsb = 0 6498 - i2c_size = 1 6499 6500 groups: \n 6501 [''] 6502 6503 fields: \n 6504 - [0] = clk_mcu_en 6505 */ 6506 #define VL53L1_GPIO_LV_MUX__CTRL 0x04CC 6507 /*!< 6508 type: uint8_t \n 6509 default: 0x08 \n 6510 info: \n 6511 - msb = 4 6512 - lsb = 0 6513 - i2c_size = 1 6514 6515 groups: \n 6516 [''] 6517 6518 fields: \n 6519 - [3:0] = gpio__mux_select_lv 6520 - [4] = gpio__mux_active_high_lv 6521 */ 6522 #define VL53L1_GPIO_LV_PAD__CTRL 0x04CD 6523 /*!< 6524 type: uint8_t \n 6525 default: 0x00 \n 6526 info: \n 6527 - msb = 0 6528 - lsb = 0 6529 - i2c_size = 1 6530 6531 groups: \n 6532 [''] 6533 6534 fields: \n 6535 - [0] = gpio__extsup_lv 6536 */ 6537 #define VL53L1_PAD_I2C_LV__CONFIG 0x04D0 6538 /*!< 6539 info: \n 6540 - msb = 0 6541 - lsb = 0 6542 - i2c_size = 1 6543 */ 6544 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO_GO1 0x04D4 6545 /*!< 6546 type: uint8_t \n 6547 default: 0x00 \n 6548 info: \n 6549 - msb = 0 6550 - lsb = 0 6551 - i2c_size = 1 6552 6553 groups: \n 6554 [''] 6555 6556 fields: \n 6557 - [0] = pad_spi_csn_val_ro 6558 */ 6559 #define VL53L1_HOST_IF__STATUS_GO1 0x04D5 6560 /*!< 6561 type: uint8_t \n 6562 default: 0x00 \n 6563 info: \n 6564 - msb = 0 6565 - lsb = 0 6566 - i2c_size = 1 6567 6568 groups: \n 6569 [''] 6570 6571 fields: \n 6572 - [0] = host_interface_lv 6573 */ 6574 #define VL53L1_MCU_CLK_GATING__CTRL 0x04D8 6575 /*!< 6576 type: uint8_t \n 6577 default: 0x00 \n 6578 info: \n 6579 - msb = 3 6580 - lsb = 0 6581 - i2c_size = 1 6582 6583 groups: \n 6584 [''] 6585 6586 fields: \n 6587 - [0] = clk_gate_en__go1_mcu_bank 6588 - [1] = clk_gate_en__go1_mcu_patch_ctrl 6589 - [2] = clk_gate_en__go1_mcu_timers 6590 - [3] = clk_gate_en__go1_mcu_mult_div 6591 */ 6592 #define VL53L1_TEST__BIST_ROM_CTRL 0x04E0 6593 /*!< 6594 info: \n 6595 - msb = 0 6596 - lsb = 0 6597 - i2c_size = 1 6598 */ 6599 #define VL53L1_TEST__BIST_ROM_RESULT 0x04E1 6600 /*!< 6601 info: \n 6602 - msb = 0 6603 - lsb = 0 6604 - i2c_size = 1 6605 */ 6606 #define VL53L1_TEST__BIST_ROM_MCU_SIG 0x04E2 6607 /*!< 6608 info: \n 6609 - msb = 0 6610 - lsb = 0 6611 - i2c_size = 1 6612 */ 6613 #define VL53L1_TEST__BIST_ROM_MCU_SIG_HI 0x04E2 6614 /*!< 6615 info: \n 6616 - msb = 0 6617 - lsb = 0 6618 - i2c_size = 1 6619 */ 6620 #define VL53L1_TEST__BIST_ROM_MCU_SIG_LO 0x04E3 6621 /*!< 6622 info: \n 6623 - msb = 0 6624 - lsb = 0 6625 - i2c_size = 1 6626 */ 6627 #define VL53L1_TEST__BIST_RAM_CTRL 0x04E4 6628 /*!< 6629 info: \n 6630 - msb = 0 6631 - lsb = 0 6632 - i2c_size = 1 6633 */ 6634 #define VL53L1_TEST__BIST_RAM_RESULT 0x04E5 6635 /*!< 6636 info: \n 6637 - msb = 0 6638 - lsb = 0 6639 - i2c_size = 1 6640 */ 6641 #define VL53L1_TEST__TMC 0x04E8 6642 /*!< 6643 info: \n 6644 - msb = 0 6645 - lsb = 0 6646 - i2c_size = 1 6647 */ 6648 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD 0x04F0 6649 /*!< 6650 info: \n 6651 - msb = 0 6652 - lsb = 0 6653 - i2c_size = 1 6654 */ 6655 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_HI 0x04F0 6656 /*!< 6657 info: \n 6658 - msb = 0 6659 - lsb = 0 6660 - i2c_size = 1 6661 */ 6662 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_LO 0x04F1 6663 /*!< 6664 info: \n 6665 - msb = 0 6666 - lsb = 0 6667 - i2c_size = 1 6668 */ 6669 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD 0x04F2 6670 /*!< 6671 info: \n 6672 - msb = 0 6673 - lsb = 0 6674 - i2c_size = 1 6675 */ 6676 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_HI 0x04F2 6677 /*!< 6678 info: \n 6679 - msb = 0 6680 - lsb = 0 6681 - i2c_size = 1 6682 */ 6683 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_LO 0x04F3 6684 /*!< 6685 info: \n 6686 - msb = 0 6687 - lsb = 0 6688 - i2c_size = 1 6689 */ 6690 #define VL53L1_TEST__PLL_BIST_COUNT_OUT 0x04F4 6691 /*!< 6692 info: \n 6693 - msb = 0 6694 - lsb = 0 6695 - i2c_size = 1 6696 */ 6697 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_HI 0x04F4 6698 /*!< 6699 info: \n 6700 - msb = 0 6701 - lsb = 0 6702 - i2c_size = 1 6703 */ 6704 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_LO 0x04F5 6705 /*!< 6706 info: \n 6707 - msb = 0 6708 - lsb = 0 6709 - i2c_size = 1 6710 */ 6711 #define VL53L1_TEST__PLL_BIST_GONOGO 0x04F6 6712 /*!< 6713 info: \n 6714 - msb = 0 6715 - lsb = 0 6716 - i2c_size = 1 6717 */ 6718 #define VL53L1_TEST__PLL_BIST_CTRL 0x04F7 6719 /*!< 6720 info: \n 6721 - msb = 0 6722 - lsb = 0 6723 - i2c_size = 1 6724 */ 6725 #define VL53L1_RANGING_CORE__DEVICE_ID 0x0680 6726 /*!< 6727 info: \n 6728 - msb = 0 6729 - lsb = 0 6730 - i2c_size = 1 6731 */ 6732 #define VL53L1_RANGING_CORE__REVISION_ID 0x0681 6733 /*!< 6734 info: \n 6735 - msb = 0 6736 - lsb = 0 6737 - i2c_size = 1 6738 */ 6739 #define VL53L1_RANGING_CORE__CLK_CTRL1 0x0683 6740 /*!< 6741 info: \n 6742 - msb = 0 6743 - lsb = 0 6744 - i2c_size = 1 6745 */ 6746 #define VL53L1_RANGING_CORE__CLK_CTRL2 0x0684 6747 /*!< 6748 info: \n 6749 - msb = 0 6750 - lsb = 0 6751 - i2c_size = 1 6752 */ 6753 #define VL53L1_RANGING_CORE__WOI_1 0x0685 6754 /*!< 6755 info: \n 6756 - msb = 0 6757 - lsb = 0 6758 - i2c_size = 1 6759 */ 6760 #define VL53L1_RANGING_CORE__WOI_REF_1 0x0686 6761 /*!< 6762 info: \n 6763 - msb = 0 6764 - lsb = 0 6765 - i2c_size = 1 6766 */ 6767 #define VL53L1_RANGING_CORE__START_RANGING 0x0687 6768 /*!< 6769 info: \n 6770 - msb = 0 6771 - lsb = 0 6772 - i2c_size = 1 6773 */ 6774 #define VL53L1_RANGING_CORE__LOW_LIMIT_1 0x0690 6775 /*!< 6776 info: \n 6777 - msb = 0 6778 - lsb = 0 6779 - i2c_size = 1 6780 */ 6781 #define VL53L1_RANGING_CORE__HIGH_LIMIT_1 0x0691 6782 /*!< 6783 info: \n 6784 - msb = 0 6785 - lsb = 0 6786 - i2c_size = 1 6787 */ 6788 #define VL53L1_RANGING_CORE__LOW_LIMIT_REF_1 0x0692 6789 /*!< 6790 info: \n 6791 - msb = 0 6792 - lsb = 0 6793 - i2c_size = 1 6794 */ 6795 #define VL53L1_RANGING_CORE__HIGH_LIMIT_REF_1 0x0693 6796 /*!< 6797 info: \n 6798 - msb = 0 6799 - lsb = 0 6800 - i2c_size = 1 6801 */ 6802 #define VL53L1_RANGING_CORE__QUANTIFIER_1_MSB 0x0694 6803 /*!< 6804 info: \n 6805 - msb = 0 6806 - lsb = 0 6807 - i2c_size = 1 6808 */ 6809 #define VL53L1_RANGING_CORE__QUANTIFIER_1_LSB 0x0695 6810 /*!< 6811 info: \n 6812 - msb = 0 6813 - lsb = 0 6814 - i2c_size = 1 6815 */ 6816 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_MSB 0x0696 6817 /*!< 6818 info: \n 6819 - msb = 0 6820 - lsb = 0 6821 - i2c_size = 1 6822 */ 6823 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_LSB 0x0697 6824 /*!< 6825 info: \n 6826 - msb = 0 6827 - lsb = 0 6828 - i2c_size = 1 6829 */ 6830 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_MSB 0x0698 6831 /*!< 6832 info: \n 6833 - msb = 0 6834 - lsb = 0 6835 - i2c_size = 1 6836 */ 6837 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_LSB 0x0699 6838 /*!< 6839 info: \n 6840 - msb = 0 6841 - lsb = 0 6842 - i2c_size = 1 6843 */ 6844 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB 0x069A 6845 /*!< 6846 info: \n 6847 - msb = 0 6848 - lsb = 0 6849 - i2c_size = 1 6850 */ 6851 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB 0x069B 6852 /*!< 6853 info: \n 6854 - msb = 0 6855 - lsb = 0 6856 - i2c_size = 1 6857 */ 6858 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_1 0x069C 6859 /*!< 6860 info: \n 6861 - msb = 0 6862 - lsb = 0 6863 - i2c_size = 1 6864 */ 6865 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_REF_1 0x069D 6866 /*!< 6867 info: \n 6868 - msb = 0 6869 - lsb = 0 6870 - i2c_size = 1 6871 */ 6872 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB 0x069E 6873 /*!< 6874 info: \n 6875 - msb = 0 6876 - lsb = 0 6877 - i2c_size = 1 6878 */ 6879 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB 0x069F 6880 /*!< 6881 info: \n 6882 - msb = 0 6883 - lsb = 0 6884 - i2c_size = 1 6885 */ 6886 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB 0x06A0 6887 /*!< 6888 info: \n 6889 - msb = 0 6890 - lsb = 0 6891 - i2c_size = 1 6892 */ 6893 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB 0x06A1 6894 /*!< 6895 info: \n 6896 - msb = 0 6897 - lsb = 0 6898 - i2c_size = 1 6899 */ 6900 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB 0x06A4 6901 /*!< 6902 info: \n 6903 - msb = 0 6904 - lsb = 0 6905 - i2c_size = 1 6906 */ 6907 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB 0x06A5 6908 /*!< 6909 info: \n 6910 - msb = 0 6911 - lsb = 0 6912 - i2c_size = 1 6913 */ 6914 #define VL53L1_RANGING_CORE__INVERT_HW 0x06A6 6915 /*!< 6916 info: \n 6917 - msb = 0 6918 - lsb = 0 6919 - i2c_size = 1 6920 */ 6921 #define VL53L1_RANGING_CORE__FORCE_HW 0x06A7 6922 /*!< 6923 info: \n 6924 - msb = 0 6925 - lsb = 0 6926 - i2c_size = 1 6927 */ 6928 #define VL53L1_RANGING_CORE__STATIC_HW_VALUE 0x06A8 6929 /*!< 6930 info: \n 6931 - msb = 0 6932 - lsb = 0 6933 - i2c_size = 1 6934 */ 6935 #define VL53L1_RANGING_CORE__FORCE_CONTINUOUS_AMBIENT 0x06A9 6936 /*!< 6937 info: \n 6938 - msb = 0 6939 - lsb = 0 6940 - i2c_size = 1 6941 */ 6942 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER 0x06AA 6943 /*!< 6944 info: \n 6945 - msb = 0 6946 - lsb = 0 6947 - i2c_size = 1 6948 */ 6949 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN 0x06AB 6950 /*!< 6951 info: \n 6952 - msb = 0 6953 - lsb = 0 6954 - i2c_size = 1 6955 */ 6956 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_1 0x06AC 6957 /*!< 6958 info: \n 6959 - msb = 0 6960 - lsb = 0 6961 - i2c_size = 1 6962 */ 6963 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 0x06AD 6964 /*!< 6965 info: \n 6966 - msb = 0 6967 - lsb = 0 6968 - i2c_size = 1 6969 */ 6970 #define VL53L1_RANGING_CORE__FORCE_UP_IN 0x06AE 6971 /*!< 6972 info: \n 6973 - msb = 0 6974 - lsb = 0 6975 - i2c_size = 1 6976 */ 6977 #define VL53L1_RANGING_CORE__FORCE_DN_IN 0x06AF 6978 /*!< 6979 info: \n 6980 - msb = 0 6981 - lsb = 0 6982 - i2c_size = 1 6983 */ 6984 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_1 0x06B0 6985 /*!< 6986 info: \n 6987 - msb = 0 6988 - lsb = 0 6989 - i2c_size = 1 6990 */ 6991 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_REF_1 0x06B1 6992 /*!< 6993 info: \n 6994 - msb = 0 6995 - lsb = 0 6996 - i2c_size = 1 6997 */ 6998 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_1 0x06B2 6999 /*!< 7000 info: \n 7001 - msb = 0 7002 - lsb = 0 7003 - i2c_size = 1 7004 */ 7005 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_REF_1 0x06B3 7006 /*!< 7007 info: \n 7008 - msb = 0 7009 - lsb = 0 7010 - i2c_size = 1 7011 */ 7012 #define VL53L1_RANGING_CORE__MONITOR_UP_DN 0x06B4 7013 /*!< 7014 info: \n 7015 - msb = 0 7016 - lsb = 0 7017 - i2c_size = 1 7018 */ 7019 #define VL53L1_RANGING_CORE__INVERT_UP_DN 0x06B5 7020 /*!< 7021 info: \n 7022 - msb = 0 7023 - lsb = 0 7024 - i2c_size = 1 7025 */ 7026 #define VL53L1_RANGING_CORE__CPUMP_1 0x06B6 7027 /*!< 7028 info: \n 7029 - msb = 0 7030 - lsb = 0 7031 - i2c_size = 1 7032 */ 7033 #define VL53L1_RANGING_CORE__CPUMP_2 0x06B7 7034 /*!< 7035 info: \n 7036 - msb = 0 7037 - lsb = 0 7038 - i2c_size = 1 7039 */ 7040 #define VL53L1_RANGING_CORE__CPUMP_3 0x06B8 7041 /*!< 7042 info: \n 7043 - msb = 0 7044 - lsb = 0 7045 - i2c_size = 1 7046 */ 7047 #define VL53L1_RANGING_CORE__OSC_1 0x06B9 7048 /*!< 7049 info: \n 7050 - msb = 0 7051 - lsb = 0 7052 - i2c_size = 1 7053 */ 7054 #define VL53L1_RANGING_CORE__PLL_1 0x06BB 7055 /*!< 7056 info: \n 7057 - msb = 0 7058 - lsb = 0 7059 - i2c_size = 1 7060 */ 7061 #define VL53L1_RANGING_CORE__PLL_2 0x06BC 7062 /*!< 7063 info: \n 7064 - msb = 0 7065 - lsb = 0 7066 - i2c_size = 1 7067 */ 7068 #define VL53L1_RANGING_CORE__REFERENCE_1 0x06BD 7069 /*!< 7070 info: \n 7071 - msb = 0 7072 - lsb = 0 7073 - i2c_size = 1 7074 */ 7075 #define VL53L1_RANGING_CORE__REFERENCE_3 0x06BF 7076 /*!< 7077 info: \n 7078 - msb = 0 7079 - lsb = 0 7080 - i2c_size = 1 7081 */ 7082 #define VL53L1_RANGING_CORE__REFERENCE_4 0x06C0 7083 /*!< 7084 info: \n 7085 - msb = 0 7086 - lsb = 0 7087 - i2c_size = 1 7088 */ 7089 #define VL53L1_RANGING_CORE__REFERENCE_5 0x06C1 7090 /*!< 7091 info: \n 7092 - msb = 0 7093 - lsb = 0 7094 - i2c_size = 1 7095 */ 7096 #define VL53L1_RANGING_CORE__REGAVDD1V2 0x06C3 7097 /*!< 7098 info: \n 7099 - msb = 0 7100 - lsb = 0 7101 - i2c_size = 1 7102 */ 7103 #define VL53L1_RANGING_CORE__CALIB_1 0x06C4 7104 /*!< 7105 info: \n 7106 - msb = 0 7107 - lsb = 0 7108 - i2c_size = 1 7109 */ 7110 #define VL53L1_RANGING_CORE__CALIB_2 0x06C5 7111 /*!< 7112 info: \n 7113 - msb = 0 7114 - lsb = 0 7115 - i2c_size = 1 7116 */ 7117 #define VL53L1_RANGING_CORE__CALIB_3 0x06C6 7118 /*!< 7119 info: \n 7120 - msb = 0 7121 - lsb = 0 7122 - i2c_size = 1 7123 */ 7124 #define VL53L1_RANGING_CORE__TST_MUX_SEL1 0x06C9 7125 /*!< 7126 info: \n 7127 - msb = 0 7128 - lsb = 0 7129 - i2c_size = 1 7130 */ 7131 #define VL53L1_RANGING_CORE__TST_MUX_SEL2 0x06CA 7132 /*!< 7133 info: \n 7134 - msb = 0 7135 - lsb = 0 7136 - i2c_size = 1 7137 */ 7138 #define VL53L1_RANGING_CORE__TST_MUX 0x06CB 7139 /*!< 7140 info: \n 7141 - msb = 0 7142 - lsb = 0 7143 - i2c_size = 1 7144 */ 7145 #define VL53L1_RANGING_CORE__GPIO_OUT_TESTMUX 0x06CC 7146 /*!< 7147 info: \n 7148 - msb = 0 7149 - lsb = 0 7150 - i2c_size = 1 7151 */ 7152 #define VL53L1_RANGING_CORE__CUSTOM_FE 0x06CD 7153 /*!< 7154 info: \n 7155 - msb = 0 7156 - lsb = 0 7157 - i2c_size = 1 7158 */ 7159 #define VL53L1_RANGING_CORE__CUSTOM_FE_2 0x06CE 7160 /*!< 7161 info: \n 7162 - msb = 0 7163 - lsb = 0 7164 - i2c_size = 1 7165 */ 7166 #define VL53L1_RANGING_CORE__SPAD_READOUT 0x06CF 7167 /*!< 7168 info: \n 7169 - msb = 0 7170 - lsb = 0 7171 - i2c_size = 1 7172 */ 7173 #define VL53L1_RANGING_CORE__SPAD_READOUT_1 0x06D0 7174 /*!< 7175 info: \n 7176 - msb = 0 7177 - lsb = 0 7178 - i2c_size = 1 7179 */ 7180 #define VL53L1_RANGING_CORE__SPAD_READOUT_2 0x06D1 7181 /*!< 7182 info: \n 7183 - msb = 0 7184 - lsb = 0 7185 - i2c_size = 1 7186 */ 7187 #define VL53L1_RANGING_CORE__SPAD_PS 0x06D2 7188 /*!< 7189 info: \n 7190 - msb = 0 7191 - lsb = 0 7192 - i2c_size = 1 7193 */ 7194 #define VL53L1_RANGING_CORE__LASER_SAFETY_2 0x06D4 7195 /*!< 7196 info: \n 7197 - msb = 0 7198 - lsb = 0 7199 - i2c_size = 1 7200 */ 7201 #define VL53L1_RANGING_CORE__NVM_CTRL__MODE 0x0780 7202 /*!< 7203 info: \n 7204 - msb = 0 7205 - lsb = 0 7206 - i2c_size = 1 7207 */ 7208 #define VL53L1_RANGING_CORE__NVM_CTRL__PDN 0x0781 7209 /*!< 7210 info: \n 7211 - msb = 0 7212 - lsb = 0 7213 - i2c_size = 1 7214 */ 7215 #define VL53L1_RANGING_CORE__NVM_CTRL__PROGN 0x0782 7216 /*!< 7217 info: \n 7218 - msb = 0 7219 - lsb = 0 7220 - i2c_size = 1 7221 */ 7222 #define VL53L1_RANGING_CORE__NVM_CTRL__READN 0x0783 7223 /*!< 7224 info: \n 7225 - msb = 0 7226 - lsb = 0 7227 - i2c_size = 1 7228 */ 7229 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB 0x0784 7230 /*!< 7231 info: \n 7232 - msb = 0 7233 - lsb = 0 7234 - i2c_size = 1 7235 */ 7236 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB 0x0785 7237 /*!< 7238 info: \n 7239 - msb = 0 7240 - lsb = 0 7241 - i2c_size = 1 7242 */ 7243 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_MSB 0x0786 7244 /*!< 7245 info: \n 7246 - msb = 0 7247 - lsb = 0 7248 - i2c_size = 1 7249 */ 7250 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_LSB 0x0787 7251 /*!< 7252 info: \n 7253 - msb = 0 7254 - lsb = 0 7255 - i2c_size = 1 7256 */ 7257 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_MSB 0x0788 7258 /*!< 7259 info: \n 7260 - msb = 0 7261 - lsb = 0 7262 - i2c_size = 1 7263 */ 7264 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_LSB 0x0789 7265 /*!< 7266 info: \n 7267 - msb = 0 7268 - lsb = 0 7269 - i2c_size = 1 7270 */ 7271 #define VL53L1_RANGING_CORE__NVM_CTRL__TST 0x078A 7272 /*!< 7273 info: \n 7274 - msb = 0 7275 - lsb = 0 7276 - i2c_size = 1 7277 */ 7278 #define VL53L1_RANGING_CORE__NVM_CTRL__TESTREAD 0x078B 7279 /*!< 7280 info: \n 7281 - msb = 0 7282 - lsb = 0 7283 - i2c_size = 1 7284 */ 7285 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_MMM 0x078C 7286 /*!< 7287 info: \n 7288 - msb = 0 7289 - lsb = 0 7290 - i2c_size = 1 7291 */ 7292 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LMM 0x078D 7293 /*!< 7294 info: \n 7295 - msb = 0 7296 - lsb = 0 7297 - i2c_size = 1 7298 */ 7299 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLM 0x078E 7300 /*!< 7301 info: \n 7302 - msb = 0 7303 - lsb = 0 7304 - i2c_size = 1 7305 */ 7306 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLL 0x078F 7307 /*!< 7308 info: \n 7309 - msb = 0 7310 - lsb = 0 7311 - i2c_size = 1 7312 */ 7313 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM 0x0790 7314 /*!< 7315 info: \n 7316 - msb = 0 7317 - lsb = 0 7318 - i2c_size = 1 7319 */ 7320 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LMM 0x0791 7321 /*!< 7322 info: \n 7323 - msb = 0 7324 - lsb = 0 7325 - i2c_size = 1 7326 */ 7327 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLM 0x0792 7328 /*!< 7329 info: \n 7330 - msb = 0 7331 - lsb = 0 7332 - i2c_size = 1 7333 */ 7334 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLL 0x0793 7335 /*!< 7336 info: \n 7337 - msb = 0 7338 - lsb = 0 7339 - i2c_size = 1 7340 */ 7341 #define VL53L1_RANGING_CORE__NVM_CTRL__ADDR 0x0794 7342 /*!< 7343 info: \n 7344 - msb = 0 7345 - lsb = 0 7346 - i2c_size = 1 7347 */ 7348 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_ECC 0x0795 7349 /*!< 7350 info: \n 7351 - msb = 0 7352 - lsb = 0 7353 - i2c_size = 1 7354 */ 7355 #define VL53L1_RANGING_CORE__RET_SPAD_EN_0 0x0796 7356 /*!< 7357 info: \n 7358 - msb = 0 7359 - lsb = 0 7360 - i2c_size = 1 7361 */ 7362 #define VL53L1_RANGING_CORE__RET_SPAD_EN_1 0x0797 7363 /*!< 7364 info: \n 7365 - msb = 0 7366 - lsb = 0 7367 - i2c_size = 1 7368 */ 7369 #define VL53L1_RANGING_CORE__RET_SPAD_EN_2 0x0798 7370 /*!< 7371 info: \n 7372 - msb = 0 7373 - lsb = 0 7374 - i2c_size = 1 7375 */ 7376 #define VL53L1_RANGING_CORE__RET_SPAD_EN_3 0x0799 7377 /*!< 7378 info: \n 7379 - msb = 0 7380 - lsb = 0 7381 - i2c_size = 1 7382 */ 7383 #define VL53L1_RANGING_CORE__RET_SPAD_EN_4 0x079A 7384 /*!< 7385 info: \n 7386 - msb = 0 7387 - lsb = 0 7388 - i2c_size = 1 7389 */ 7390 #define VL53L1_RANGING_CORE__RET_SPAD_EN_5 0x079B 7391 /*!< 7392 info: \n 7393 - msb = 0 7394 - lsb = 0 7395 - i2c_size = 1 7396 */ 7397 #define VL53L1_RANGING_CORE__RET_SPAD_EN_6 0x079C 7398 /*!< 7399 info: \n 7400 - msb = 0 7401 - lsb = 0 7402 - i2c_size = 1 7403 */ 7404 #define VL53L1_RANGING_CORE__RET_SPAD_EN_7 0x079D 7405 /*!< 7406 info: \n 7407 - msb = 0 7408 - lsb = 0 7409 - i2c_size = 1 7410 */ 7411 #define VL53L1_RANGING_CORE__RET_SPAD_EN_8 0x079E 7412 /*!< 7413 info: \n 7414 - msb = 0 7415 - lsb = 0 7416 - i2c_size = 1 7417 */ 7418 #define VL53L1_RANGING_CORE__RET_SPAD_EN_9 0x079F 7419 /*!< 7420 info: \n 7421 - msb = 0 7422 - lsb = 0 7423 - i2c_size = 1 7424 */ 7425 #define VL53L1_RANGING_CORE__RET_SPAD_EN_10 0x07A0 7426 /*!< 7427 info: \n 7428 - msb = 0 7429 - lsb = 0 7430 - i2c_size = 1 7431 */ 7432 #define VL53L1_RANGING_CORE__RET_SPAD_EN_11 0x07A1 7433 /*!< 7434 info: \n 7435 - msb = 0 7436 - lsb = 0 7437 - i2c_size = 1 7438 */ 7439 #define VL53L1_RANGING_CORE__RET_SPAD_EN_12 0x07A2 7440 /*!< 7441 info: \n 7442 - msb = 0 7443 - lsb = 0 7444 - i2c_size = 1 7445 */ 7446 #define VL53L1_RANGING_CORE__RET_SPAD_EN_13 0x07A3 7447 /*!< 7448 info: \n 7449 - msb = 0 7450 - lsb = 0 7451 - i2c_size = 1 7452 */ 7453 #define VL53L1_RANGING_CORE__RET_SPAD_EN_14 0x07A4 7454 /*!< 7455 info: \n 7456 - msb = 0 7457 - lsb = 0 7458 - i2c_size = 1 7459 */ 7460 #define VL53L1_RANGING_CORE__RET_SPAD_EN_15 0x07A5 7461 /*!< 7462 info: \n 7463 - msb = 0 7464 - lsb = 0 7465 - i2c_size = 1 7466 */ 7467 #define VL53L1_RANGING_CORE__RET_SPAD_EN_16 0x07A6 7468 /*!< 7469 info: \n 7470 - msb = 0 7471 - lsb = 0 7472 - i2c_size = 1 7473 */ 7474 #define VL53L1_RANGING_CORE__RET_SPAD_EN_17 0x07A7 7475 /*!< 7476 info: \n 7477 - msb = 0 7478 - lsb = 0 7479 - i2c_size = 1 7480 */ 7481 #define VL53L1_RANGING_CORE__SPAD_SHIFT_EN 0x07BA 7482 /*!< 7483 info: \n 7484 - msb = 0 7485 - lsb = 0 7486 - i2c_size = 1 7487 */ 7488 #define VL53L1_RANGING_CORE__SPAD_DISABLE_CTRL 0x07BB 7489 /*!< 7490 info: \n 7491 - msb = 0 7492 - lsb = 0 7493 - i2c_size = 1 7494 */ 7495 #define VL53L1_RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG 0x07BC 7496 /*!< 7497 info: \n 7498 - msb = 0 7499 - lsb = 0 7500 - i2c_size = 1 7501 */ 7502 #define VL53L1_RANGING_CORE__SPI_MODE 0x07BD 7503 /*!< 7504 info: \n 7505 - msb = 0 7506 - lsb = 0 7507 - i2c_size = 1 7508 */ 7509 #define VL53L1_RANGING_CORE__GPIO_DIR 0x07BE 7510 /*!< 7511 info: \n 7512 - msb = 0 7513 - lsb = 0 7514 - i2c_size = 1 7515 */ 7516 #define VL53L1_RANGING_CORE__VCSEL_PERIOD 0x0880 7517 /*!< 7518 info: \n 7519 - msb = 0 7520 - lsb = 0 7521 - i2c_size = 1 7522 */ 7523 #define VL53L1_RANGING_CORE__VCSEL_START 0x0881 7524 /*!< 7525 info: \n 7526 - msb = 0 7527 - lsb = 0 7528 - i2c_size = 1 7529 */ 7530 #define VL53L1_RANGING_CORE__VCSEL_STOP 0x0882 7531 /*!< 7532 info: \n 7533 - msb = 0 7534 - lsb = 0 7535 - i2c_size = 1 7536 */ 7537 #define VL53L1_RANGING_CORE__VCSEL_1 0x0885 7538 /*!< 7539 info: \n 7540 - msb = 0 7541 - lsb = 0 7542 - i2c_size = 1 7543 */ 7544 #define VL53L1_RANGING_CORE__VCSEL_STATUS 0x088D 7545 /*!< 7546 info: \n 7547 - msb = 0 7548 - lsb = 0 7549 - i2c_size = 1 7550 */ 7551 #define VL53L1_RANGING_CORE__STATUS 0x0980 7552 /*!< 7553 info: \n 7554 - msb = 0 7555 - lsb = 0 7556 - i2c_size = 1 7557 */ 7558 #define VL53L1_RANGING_CORE__LASER_CONTINUITY_STATE 0x0981 7559 /*!< 7560 info: \n 7561 - msb = 0 7562 - lsb = 0 7563 - i2c_size = 1 7564 */ 7565 #define VL53L1_RANGING_CORE__RANGE_1_MMM 0x0982 7566 /*!< 7567 info: \n 7568 - msb = 0 7569 - lsb = 0 7570 - i2c_size = 1 7571 */ 7572 #define VL53L1_RANGING_CORE__RANGE_1_LMM 0x0983 7573 /*!< 7574 info: \n 7575 - msb = 0 7576 - lsb = 0 7577 - i2c_size = 1 7578 */ 7579 #define VL53L1_RANGING_CORE__RANGE_1_LLM 0x0984 7580 /*!< 7581 info: \n 7582 - msb = 0 7583 - lsb = 0 7584 - i2c_size = 1 7585 */ 7586 #define VL53L1_RANGING_CORE__RANGE_1_LLL 0x0985 7587 /*!< 7588 info: \n 7589 - msb = 0 7590 - lsb = 0 7591 - i2c_size = 1 7592 */ 7593 #define VL53L1_RANGING_CORE__RANGE_REF_1_MMM 0x0986 7594 /*!< 7595 info: \n 7596 - msb = 0 7597 - lsb = 0 7598 - i2c_size = 1 7599 */ 7600 #define VL53L1_RANGING_CORE__RANGE_REF_1_LMM 0x0987 7601 /*!< 7602 info: \n 7603 - msb = 0 7604 - lsb = 0 7605 - i2c_size = 1 7606 */ 7607 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLM 0x0988 7608 /*!< 7609 info: \n 7610 - msb = 0 7611 - lsb = 0 7612 - i2c_size = 1 7613 */ 7614 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLL 0x0989 7615 /*!< 7616 info: \n 7617 - msb = 0 7618 - lsb = 0 7619 - i2c_size = 1 7620 */ 7621 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM 0x098A 7622 /*!< 7623 info: \n 7624 - msb = 0 7625 - lsb = 0 7626 - i2c_size = 1 7627 */ 7628 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM 0x098B 7629 /*!< 7630 info: \n 7631 - msb = 0 7632 - lsb = 0 7633 - i2c_size = 1 7634 */ 7635 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM 0x098C 7636 /*!< 7637 info: \n 7638 - msb = 0 7639 - lsb = 0 7640 - i2c_size = 1 7641 */ 7642 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL 0x098D 7643 /*!< 7644 info: \n 7645 - msb = 0 7646 - lsb = 0 7647 - i2c_size = 1 7648 */ 7649 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM 0x098E 7650 /*!< 7651 info: \n 7652 - msb = 0 7653 - lsb = 0 7654 - i2c_size = 1 7655 */ 7656 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM 0x098F 7657 /*!< 7658 info: \n 7659 - msb = 0 7660 - lsb = 0 7661 - i2c_size = 1 7662 */ 7663 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM 0x0990 7664 /*!< 7665 info: \n 7666 - msb = 0 7667 - lsb = 0 7668 - i2c_size = 1 7669 */ 7670 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL 0x0991 7671 /*!< 7672 info: \n 7673 - msb = 0 7674 - lsb = 0 7675 - i2c_size = 1 7676 */ 7677 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM 0x0992 7678 /*!< 7679 info: \n 7680 - msb = 0 7681 - lsb = 0 7682 - i2c_size = 1 7683 */ 7684 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM 0x0993 7685 /*!< 7686 info: \n 7687 - msb = 0 7688 - lsb = 0 7689 - i2c_size = 1 7690 */ 7691 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM 0x0994 7692 /*!< 7693 info: \n 7694 - msb = 0 7695 - lsb = 0 7696 - i2c_size = 1 7697 */ 7698 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL 0x0995 7699 /*!< 7700 info: \n 7701 - msb = 0 7702 - lsb = 0 7703 - i2c_size = 1 7704 */ 7705 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM 0x0996 7706 /*!< 7707 info: \n 7708 - msb = 0 7709 - lsb = 0 7710 - i2c_size = 1 7711 */ 7712 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM 0x0997 7713 /*!< 7714 info: \n 7715 - msb = 0 7716 - lsb = 0 7717 - i2c_size = 1 7718 */ 7719 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL 0x0998 7720 /*!< 7721 info: \n 7722 - msb = 0 7723 - lsb = 0 7724 - i2c_size = 1 7725 */ 7726 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_MM 0x0999 7727 /*!< 7728 info: \n 7729 - msb = 0 7730 - lsb = 0 7731 - i2c_size = 1 7732 */ 7733 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LM 0x099A 7734 /*!< 7735 info: \n 7736 - msb = 0 7737 - lsb = 0 7738 - i2c_size = 1 7739 */ 7740 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LL 0x099B 7741 /*!< 7742 info: \n 7743 - msb = 0 7744 - lsb = 0 7745 - i2c_size = 1 7746 */ 7747 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM 0x099C 7748 /*!< 7749 info: \n 7750 - msb = 0 7751 - lsb = 0 7752 - i2c_size = 1 7753 */ 7754 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM 0x099D 7755 /*!< 7756 info: \n 7757 - msb = 0 7758 - lsb = 0 7759 - i2c_size = 1 7760 */ 7761 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM 0x099E 7762 /*!< 7763 info: \n 7764 - msb = 0 7765 - lsb = 0 7766 - i2c_size = 1 7767 */ 7768 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL 0x099F 7769 /*!< 7770 info: \n 7771 - msb = 0 7772 - lsb = 0 7773 - i2c_size = 1 7774 */ 7775 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM 0x09A0 7776 /*!< 7777 info: \n 7778 - msb = 0 7779 - lsb = 0 7780 - i2c_size = 1 7781 */ 7782 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM 0x09A1 7783 /*!< 7784 info: \n 7785 - msb = 0 7786 - lsb = 0 7787 - i2c_size = 1 7788 */ 7789 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM 0x09A2 7790 /*!< 7791 info: \n 7792 - msb = 0 7793 - lsb = 0 7794 - i2c_size = 1 7795 */ 7796 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL 0x09A3 7797 /*!< 7798 info: \n 7799 - msb = 0 7800 - lsb = 0 7801 - i2c_size = 1 7802 */ 7803 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM 0x09A4 7804 /*!< 7805 info: \n 7806 - msb = 0 7807 - lsb = 0 7808 - i2c_size = 1 7809 */ 7810 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM 0x09A5 7811 /*!< 7812 info: \n 7813 - msb = 0 7814 - lsb = 0 7815 - i2c_size = 1 7816 */ 7817 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM 0x09A6 7818 /*!< 7819 info: \n 7820 - msb = 0 7821 - lsb = 0 7822 - i2c_size = 1 7823 */ 7824 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL 0x09A7 7825 /*!< 7826 info: \n 7827 - msb = 0 7828 - lsb = 0 7829 - i2c_size = 1 7830 */ 7831 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM 0x09A8 7832 /*!< 7833 info: \n 7834 - msb = 0 7835 - lsb = 0 7836 - i2c_size = 1 7837 */ 7838 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM 0x09A9 7839 /*!< 7840 info: \n 7841 - msb = 0 7842 - lsb = 0 7843 - i2c_size = 1 7844 */ 7845 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL 0x09AA 7846 /*!< 7847 info: \n 7848 - msb = 0 7849 - lsb = 0 7850 - i2c_size = 1 7851 */ 7852 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_MM 0x09AB 7853 /*!< 7854 info: \n 7855 - msb = 0 7856 - lsb = 0 7857 - i2c_size = 1 7858 */ 7859 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LM 0x09AC 7860 /*!< 7861 info: \n 7862 - msb = 0 7863 - lsb = 0 7864 - i2c_size = 1 7865 */ 7866 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LL 0x09AD 7867 /*!< 7868 info: \n 7869 - msb = 0 7870 - lsb = 0 7871 - i2c_size = 1 7872 */ 7873 #define VL53L1_RANGING_CORE__GPIO_CONFIG__A0 0x0A00 7874 /*!< 7875 info: \n 7876 - msb = 0 7877 - lsb = 0 7878 - i2c_size = 1 7879 */ 7880 #define VL53L1_RANGING_CORE__RESET_CONTROL__A0 0x0A01 7881 /*!< 7882 info: \n 7883 - msb = 0 7884 - lsb = 0 7885 - i2c_size = 1 7886 */ 7887 #define VL53L1_RANGING_CORE__INTR_MANAGER__A0 0x0A02 7888 /*!< 7889 info: \n 7890 - msb = 0 7891 - lsb = 0 7892 - i2c_size = 1 7893 */ 7894 #define VL53L1_RANGING_CORE__POWER_FSM_TIME_OSC__A0 0x0A06 7895 /*!< 7896 info: \n 7897 - msb = 0 7898 - lsb = 0 7899 - i2c_size = 1 7900 */ 7901 #define VL53L1_RANGING_CORE__VCSEL_ATEST__A0 0x0A07 7902 /*!< 7903 info: \n 7904 - msb = 0 7905 - lsb = 0 7906 - i2c_size = 1 7907 */ 7908 #define VL53L1_RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 0x0A08 7909 /*!< 7910 info: \n 7911 - msb = 0 7912 - lsb = 0 7913 - i2c_size = 1 7914 */ 7915 #define VL53L1_RANGING_CORE__VCSEL_STOP_CLIPPED__A0 0x0A09 7916 /*!< 7917 info: \n 7918 - msb = 0 7919 - lsb = 0 7920 - i2c_size = 1 7921 */ 7922 #define VL53L1_RANGING_CORE__CALIB_2__A0 0x0A0A 7923 /*!< 7924 info: \n 7925 - msb = 0 7926 - lsb = 0 7927 - i2c_size = 1 7928 */ 7929 #define VL53L1_RANGING_CORE__STOP_CONDITION__A0 0x0A0B 7930 /*!< 7931 info: \n 7932 - msb = 0 7933 - lsb = 0 7934 - i2c_size = 1 7935 */ 7936 #define VL53L1_RANGING_CORE__STATUS_RESET__A0 0x0A0C 7937 /*!< 7938 info: \n 7939 - msb = 0 7940 - lsb = 0 7941 - i2c_size = 1 7942 */ 7943 #define VL53L1_RANGING_CORE__READOUT_CFG__A0 0x0A0D 7944 /*!< 7945 info: \n 7946 - msb = 0 7947 - lsb = 0 7948 - i2c_size = 1 7949 */ 7950 #define VL53L1_RANGING_CORE__WINDOW_SETTING__A0 0x0A0E 7951 /*!< 7952 info: \n 7953 - msb = 0 7954 - lsb = 0 7955 - i2c_size = 1 7956 */ 7957 #define VL53L1_RANGING_CORE__VCSEL_DELAY__A0 0x0A1A 7958 /*!< 7959 info: \n 7960 - msb = 0 7961 - lsb = 0 7962 - i2c_size = 1 7963 */ 7964 #define VL53L1_RANGING_CORE__REFERENCE_2__A0 0x0A1B 7965 /*!< 7966 info: \n 7967 - msb = 0 7968 - lsb = 0 7969 - i2c_size = 1 7970 */ 7971 #define VL53L1_RANGING_CORE__REGAVDD1V2__A0 0x0A1D 7972 /*!< 7973 info: \n 7974 - msb = 0 7975 - lsb = 0 7976 - i2c_size = 1 7977 */ 7978 #define VL53L1_RANGING_CORE__TST_MUX__A0 0x0A1F 7979 /*!< 7980 info: \n 7981 - msb = 0 7982 - lsb = 0 7983 - i2c_size = 1 7984 */ 7985 #define VL53L1_RANGING_CORE__CUSTOM_FE_2__A0 0x0A20 7986 /*!< 7987 info: \n 7988 - msb = 0 7989 - lsb = 0 7990 - i2c_size = 1 7991 */ 7992 #define VL53L1_RANGING_CORE__SPAD_READOUT__A0 0x0A21 7993 /*!< 7994 info: \n 7995 - msb = 0 7996 - lsb = 0 7997 - i2c_size = 1 7998 */ 7999 #define VL53L1_RANGING_CORE__CPUMP_1__A0 0x0A22 8000 /*!< 8001 info: \n 8002 - msb = 0 8003 - lsb = 0 8004 - i2c_size = 1 8005 */ 8006 #define VL53L1_RANGING_CORE__SPARE_REGISTER__A0 0x0A23 8007 /*!< 8008 info: \n 8009 - msb = 0 8010 - lsb = 0 8011 - i2c_size = 1 8012 */ 8013 #define VL53L1_RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 0x0A24 8014 /*!< 8015 info: \n 8016 - msb = 0 8017 - lsb = 0 8018 - i2c_size = 1 8019 */ 8020 #define VL53L1_RANGING_CORE__RET_SPAD_EN_18 0x0A25 8021 /*!< 8022 info: \n 8023 - msb = 0 8024 - lsb = 0 8025 - i2c_size = 1 8026 */ 8027 #define VL53L1_RANGING_CORE__RET_SPAD_EN_19 0x0A26 8028 /*!< 8029 info: \n 8030 - msb = 0 8031 - lsb = 0 8032 - i2c_size = 1 8033 */ 8034 #define VL53L1_RANGING_CORE__RET_SPAD_EN_20 0x0A27 8035 /*!< 8036 info: \n 8037 - msb = 0 8038 - lsb = 0 8039 - i2c_size = 1 8040 */ 8041 #define VL53L1_RANGING_CORE__RET_SPAD_EN_21 0x0A28 8042 /*!< 8043 info: \n 8044 - msb = 0 8045 - lsb = 0 8046 - i2c_size = 1 8047 */ 8048 #define VL53L1_RANGING_CORE__RET_SPAD_EN_22 0x0A29 8049 /*!< 8050 info: \n 8051 - msb = 0 8052 - lsb = 0 8053 - i2c_size = 1 8054 */ 8055 #define VL53L1_RANGING_CORE__RET_SPAD_EN_23 0x0A2A 8056 /*!< 8057 info: \n 8058 - msb = 0 8059 - lsb = 0 8060 - i2c_size = 1 8061 */ 8062 #define VL53L1_RANGING_CORE__RET_SPAD_EN_24 0x0A2B 8063 /*!< 8064 info: \n 8065 - msb = 0 8066 - lsb = 0 8067 - i2c_size = 1 8068 */ 8069 #define VL53L1_RANGING_CORE__RET_SPAD_EN_25 0x0A2C 8070 /*!< 8071 info: \n 8072 - msb = 0 8073 - lsb = 0 8074 - i2c_size = 1 8075 */ 8076 #define VL53L1_RANGING_CORE__RET_SPAD_EN_26 0x0A2D 8077 /*!< 8078 info: \n 8079 - msb = 0 8080 - lsb = 0 8081 - i2c_size = 1 8082 */ 8083 #define VL53L1_RANGING_CORE__RET_SPAD_EN_27 0x0A2E 8084 /*!< 8085 info: \n 8086 - msb = 0 8087 - lsb = 0 8088 - i2c_size = 1 8089 */ 8090 #define VL53L1_RANGING_CORE__RET_SPAD_EN_28 0x0A2F 8091 /*!< 8092 info: \n 8093 - msb = 0 8094 - lsb = 0 8095 - i2c_size = 1 8096 */ 8097 #define VL53L1_RANGING_CORE__RET_SPAD_EN_29 0x0A30 8098 /*!< 8099 info: \n 8100 - msb = 0 8101 - lsb = 0 8102 - i2c_size = 1 8103 */ 8104 #define VL53L1_RANGING_CORE__RET_SPAD_EN_30 0x0A31 8105 /*!< 8106 info: \n 8107 - msb = 0 8108 - lsb = 0 8109 - i2c_size = 1 8110 */ 8111 #define VL53L1_RANGING_CORE__RET_SPAD_EN_31 0x0A32 8112 /*!< 8113 info: \n 8114 - msb = 0 8115 - lsb = 0 8116 - i2c_size = 1 8117 */ 8118 #define VL53L1_RANGING_CORE__REF_SPAD_EN_0__EWOK 0x0A33 8119 /*!< 8120 info: \n 8121 - msb = 0 8122 - lsb = 0 8123 - i2c_size = 1 8124 */ 8125 #define VL53L1_RANGING_CORE__REF_SPAD_EN_1__EWOK 0x0A34 8126 /*!< 8127 info: \n 8128 - msb = 0 8129 - lsb = 0 8130 - i2c_size = 1 8131 */ 8132 #define VL53L1_RANGING_CORE__REF_SPAD_EN_2__EWOK 0x0A35 8133 /*!< 8134 info: \n 8135 - msb = 0 8136 - lsb = 0 8137 - i2c_size = 1 8138 */ 8139 #define VL53L1_RANGING_CORE__REF_SPAD_EN_3__EWOK 0x0A36 8140 /*!< 8141 info: \n 8142 - msb = 0 8143 - lsb = 0 8144 - i2c_size = 1 8145 */ 8146 #define VL53L1_RANGING_CORE__REF_SPAD_EN_4__EWOK 0x0A37 8147 /*!< 8148 info: \n 8149 - msb = 0 8150 - lsb = 0 8151 - i2c_size = 1 8152 */ 8153 #define VL53L1_RANGING_CORE__REF_SPAD_EN_5__EWOK 0x0A38 8154 /*!< 8155 info: \n 8156 - msb = 0 8157 - lsb = 0 8158 - i2c_size = 1 8159 */ 8160 #define VL53L1_RANGING_CORE__REF_EN_START_SELECT 0x0A39 8161 /*!< 8162 info: \n 8163 - msb = 0 8164 - lsb = 0 8165 - i2c_size = 1 8166 */ 8167 #define VL53L1_RANGING_CORE__REGDVDD1V2_ATEST__EWOK 0x0A41 8168 /*!< 8169 info: \n 8170 - msb = 0 8171 - lsb = 0 8172 - i2c_size = 1 8173 */ 8174 #define VL53L1_SOFT_RESET_GO1 0x0B00 8175 /*!< 8176 info: \n 8177 - msb = 0 8178 - lsb = 0 8179 - i2c_size = 1 8180 */ 8181 #define VL53L1_PRIVATE__PATCH_BASE_ADDR_RSLV 0x0E00 8182 /*!< 8183 info: \n 8184 - msb = 0 8185 - lsb = 0 8186 - i2c_size = 1 8187 */ 8188 #define VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS 0x0ED0 8189 /*!< 8190 type: uint8_t \n 8191 default: 0x00 \n 8192 info: \n 8193 - msb = 5 8194 - lsb = 0 8195 - i2c_size = 1 8196 8197 groups: \n 8198 ['prev_shadow_system_results', 'results'] 8199 8200 fields: \n 8201 - [2:0] = prev_shadow_int_status 8202 - [4:3] = prev_shadow_int_error_status 8203 - [5] = prev_shadow_gph_id_gpio_status 8204 */ 8205 #define VL53L1_PREV_SHADOW_RESULT__RANGE_STATUS 0x0ED1 8206 /*!< 8207 type: uint8_t \n 8208 default: 0x00 \n 8209 info: \n 8210 - msb = 7 8211 - lsb = 0 8212 - i2c_size = 1 8213 8214 groups: \n 8215 ['prev_shadow_system_results', 'results'] 8216 8217 fields: \n 8218 - [4:0] = prev_shadow_range_status 8219 - [5] = prev_shadow_max_threshold_hit 8220 - [6] = prev_shadow_min_threshold_hit 8221 - [7] = prev_shadow_gph_id_range_status 8222 */ 8223 #define VL53L1_PREV_SHADOW_RESULT__REPORT_STATUS 0x0ED2 8224 /*!< 8225 type: uint8_t \n 8226 default: 0x00 \n 8227 info: \n 8228 - msb = 3 8229 - lsb = 0 8230 - i2c_size = 1 8231 8232 groups: \n 8233 ['prev_shadow_system_results', 'results'] 8234 8235 fields: \n 8236 - [3:0] = prev_shadow_report_status 8237 */ 8238 #define VL53L1_PREV_SHADOW_RESULT__STREAM_COUNT 0x0ED3 8239 /*!< 8240 type: uint8_t \n 8241 default: 0x00 \n 8242 info: \n 8243 - msb = 7 8244 - lsb = 0 8245 - i2c_size = 1 8246 8247 groups: \n 8248 ['prev_shadow_system_results', 'results'] 8249 8250 fields: \n 8251 - [7:0] = prev_shadow_result__stream_count 8252 */ 8253 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0ED4 8254 /*!< 8255 type: uint16_t \n 8256 default: 0x0000 \n 8257 info: \n 8258 - msb = 15 8259 - lsb = 0 8260 - i2c_size = 2 8261 8262 groups: \n 8263 ['prev_shadow_system_results', 'results'] 8264 8265 fields: \n 8266 - [15:0] = prev_shadow_result__dss_actual_effective_spads_sd0 (fixed point 8.8) 8267 */ 8268 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0ED4 8269 /*!< 8270 info: \n 8271 - msb = 0 8272 - lsb = 0 8273 - i2c_size = 1 8274 */ 8275 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0ED5 8276 /*!< 8277 info: \n 8278 - msb = 0 8279 - lsb = 0 8280 - i2c_size = 1 8281 */ 8282 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0ED6 8283 /*!< 8284 type: uint16_t \n 8285 default: 0x0000 \n 8286 info: \n 8287 - msb = 15 8288 - lsb = 0 8289 - i2c_size = 2 8290 8291 groups: \n 8292 ['prev_shadow_system_results', 'results'] 8293 8294 fields: \n 8295 - [15:0] = prev_shadow_result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 8296 */ 8297 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0ED6 8298 /*!< 8299 info: \n 8300 - msb = 0 8301 - lsb = 0 8302 - i2c_size = 1 8303 */ 8304 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0ED7 8305 /*!< 8306 info: \n 8307 - msb = 0 8308 - lsb = 0 8309 - i2c_size = 1 8310 */ 8311 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0ED8 8312 /*!< 8313 type: uint16_t \n 8314 default: 0x0000 \n 8315 info: \n 8316 - msb = 15 8317 - lsb = 0 8318 - i2c_size = 2 8319 8320 groups: \n 8321 ['prev_shadow_system_results', 'results'] 8322 8323 fields: \n 8324 - [15:0] = prev_shadow_result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 8325 */ 8326 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0ED8 8327 /*!< 8328 info: \n 8329 - msb = 0 8330 - lsb = 0 8331 - i2c_size = 1 8332 */ 8333 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0ED9 8334 /*!< 8335 info: \n 8336 - msb = 0 8337 - lsb = 0 8338 - i2c_size = 1 8339 */ 8340 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0 0x0EDA 8341 /*!< 8342 type: uint16_t \n 8343 default: 0x0000 \n 8344 info: \n 8345 - msb = 15 8346 - lsb = 0 8347 - i2c_size = 2 8348 8349 groups: \n 8350 ['prev_shadow_system_results', 'results'] 8351 8352 fields: \n 8353 - [15:0] = prev_shadow_result__sigma_sd0 (fixed point 14.2) 8354 */ 8355 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_HI 0x0EDA 8356 /*!< 8357 info: \n 8358 - msb = 0 8359 - lsb = 0 8360 - i2c_size = 1 8361 */ 8362 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_LO 0x0EDB 8363 /*!< 8364 info: \n 8365 - msb = 0 8366 - lsb = 0 8367 - i2c_size = 1 8368 */ 8369 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0 0x0EDC 8370 /*!< 8371 type: uint16_t \n 8372 default: 0x0000 \n 8373 info: \n 8374 - msb = 15 8375 - lsb = 0 8376 - i2c_size = 2 8377 8378 groups: \n 8379 ['prev_shadow_system_results', 'results'] 8380 8381 fields: \n 8382 - [15:0] = prev_shadow_result__phase_sd0 (fixed point 5.11) 8383 */ 8384 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_HI 0x0EDC 8385 /*!< 8386 info: \n 8387 - msb = 0 8388 - lsb = 0 8389 - i2c_size = 1 8390 */ 8391 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_LO 0x0EDD 8392 /*!< 8393 info: \n 8394 - msb = 0 8395 - lsb = 0 8396 - i2c_size = 1 8397 */ 8398 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0EDE 8399 /*!< 8400 type: uint16_t \n 8401 default: 0x0000 \n 8402 info: \n 8403 - msb = 15 8404 - lsb = 0 8405 - i2c_size = 2 8406 8407 groups: \n 8408 ['prev_shadow_system_results', 'results'] 8409 8410 fields: \n 8411 - [15:0] = prev_shadow_result__final_crosstalk_corrected_range_mm_sd0 8412 */ 8413 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0EDE 8414 /*!< 8415 info: \n 8416 - msb = 0 8417 - lsb = 0 8418 - i2c_size = 1 8419 */ 8420 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0EDF 8421 /*!< 8422 info: \n 8423 - msb = 0 8424 - lsb = 0 8425 - i2c_size = 1 8426 */ 8427 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0EE0 8428 /*!< 8429 type: uint16_t \n 8430 default: 0x0000 \n 8431 info: \n 8432 - msb = 15 8433 - lsb = 0 8434 - i2c_size = 2 8435 8436 groups: \n 8437 ['prev_shadow_system_results', 'results'] 8438 8439 fields: \n 8440 - [15:0] = prev_shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 8441 */ 8442 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0EE0 8443 /*!< 8444 info: \n 8445 - msb = 0 8446 - lsb = 0 8447 - i2c_size = 1 8448 */ 8449 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0EE1 8450 /*!< 8451 info: \n 8452 - msb = 0 8453 - lsb = 0 8454 - i2c_size = 1 8455 */ 8456 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE2 8457 /*!< 8458 type: uint16_t \n 8459 default: 0x0000 \n 8460 info: \n 8461 - msb = 15 8462 - lsb = 0 8463 - i2c_size = 2 8464 8465 groups: \n 8466 ['prev_shadow_system_results', 'results'] 8467 8468 fields: \n 8469 - [15:0] = prev_shadow_result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 8470 */ 8471 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE2 8472 /*!< 8473 info: \n 8474 - msb = 0 8475 - lsb = 0 8476 - i2c_size = 1 8477 */ 8478 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE3 8479 /*!< 8480 info: \n 8481 - msb = 0 8482 - lsb = 0 8483 - i2c_size = 1 8484 */ 8485 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE4 8486 /*!< 8487 type: uint16_t \n 8488 default: 0x0000 \n 8489 info: \n 8490 - msb = 15 8491 - lsb = 0 8492 - i2c_size = 2 8493 8494 groups: \n 8495 ['prev_shadow_system_results', 'results'] 8496 8497 fields: \n 8498 - [15:0] = prev_shadow_result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 8499 */ 8500 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE4 8501 /*!< 8502 info: \n 8503 - msb = 0 8504 - lsb = 0 8505 - i2c_size = 1 8506 */ 8507 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE5 8508 /*!< 8509 info: \n 8510 - msb = 0 8511 - lsb = 0 8512 - i2c_size = 1 8513 */ 8514 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0EE6 8515 /*!< 8516 type: uint16_t \n 8517 default: 0x0000 \n 8518 info: \n 8519 - msb = 15 8520 - lsb = 0 8521 - i2c_size = 2 8522 8523 groups: \n 8524 ['prev_shadow_system_results', 'results'] 8525 8526 fields: \n 8527 - [15:0] = prev_shadow_result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 8528 */ 8529 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0EE6 8530 /*!< 8531 info: \n 8532 - msb = 0 8533 - lsb = 0 8534 - i2c_size = 1 8535 */ 8536 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0EE7 8537 /*!< 8538 info: \n 8539 - msb = 0 8540 - lsb = 0 8541 - i2c_size = 1 8542 */ 8543 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0EE8 8544 /*!< 8545 type: uint16_t \n 8546 default: 0x0000 \n 8547 info: \n 8548 - msb = 15 8549 - lsb = 0 8550 - i2c_size = 2 8551 8552 groups: \n 8553 ['prev_shadow_system_results', 'results'] 8554 8555 fields: \n 8556 - [15:0] = prev_shadow_result__dss_actual_effective_spads_sd1 (fixed point 8.8) 8557 */ 8558 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0EE8 8559 /*!< 8560 info: \n 8561 - msb = 0 8562 - lsb = 0 8563 - i2c_size = 1 8564 */ 8565 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0EE9 8566 /*!< 8567 info: \n 8568 - msb = 0 8569 - lsb = 0 8570 - i2c_size = 1 8571 */ 8572 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0EEA 8573 /*!< 8574 type: uint16_t \n 8575 default: 0x0000 \n 8576 info: \n 8577 - msb = 15 8578 - lsb = 0 8579 - i2c_size = 2 8580 8581 groups: \n 8582 ['prev_shadow_system_results', 'results'] 8583 8584 fields: \n 8585 - [15:0] = prev_shadow_result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 8586 */ 8587 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0EEA 8588 /*!< 8589 info: \n 8590 - msb = 0 8591 - lsb = 0 8592 - i2c_size = 1 8593 */ 8594 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0EEB 8595 /*!< 8596 info: \n 8597 - msb = 0 8598 - lsb = 0 8599 - i2c_size = 1 8600 */ 8601 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0EEC 8602 /*!< 8603 type: uint16_t \n 8604 default: 0x0000 \n 8605 info: \n 8606 - msb = 15 8607 - lsb = 0 8608 - i2c_size = 2 8609 8610 groups: \n 8611 ['prev_shadow_system_results', 'results'] 8612 8613 fields: \n 8614 - [15:0] = prev_shadow_result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 8615 */ 8616 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0EEC 8617 /*!< 8618 info: \n 8619 - msb = 0 8620 - lsb = 0 8621 - i2c_size = 1 8622 */ 8623 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0EED 8624 /*!< 8625 info: \n 8626 - msb = 0 8627 - lsb = 0 8628 - i2c_size = 1 8629 */ 8630 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1 0x0EEE 8631 /*!< 8632 type: uint16_t \n 8633 default: 0x0000 \n 8634 info: \n 8635 - msb = 15 8636 - lsb = 0 8637 - i2c_size = 2 8638 8639 groups: \n 8640 ['prev_shadow_system_results', 'results'] 8641 8642 fields: \n 8643 - [15:0] = prev_shadow_result__sigma_sd1 (fixed point 14.2) 8644 */ 8645 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_HI 0x0EEE 8646 /*!< 8647 info: \n 8648 - msb = 0 8649 - lsb = 0 8650 - i2c_size = 1 8651 */ 8652 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_LO 0x0EEF 8653 /*!< 8654 info: \n 8655 - msb = 0 8656 - lsb = 0 8657 - i2c_size = 1 8658 */ 8659 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1 0x0EF0 8660 /*!< 8661 type: uint16_t \n 8662 default: 0x0000 \n 8663 info: \n 8664 - msb = 15 8665 - lsb = 0 8666 - i2c_size = 2 8667 8668 groups: \n 8669 ['prev_shadow_system_results', 'results'] 8670 8671 fields: \n 8672 - [15:0] = prev_shadow_result__phase_sd1 (fixed point 5.11) 8673 */ 8674 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_HI 0x0EF0 8675 /*!< 8676 info: \n 8677 - msb = 0 8678 - lsb = 0 8679 - i2c_size = 1 8680 */ 8681 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_LO 0x0EF1 8682 /*!< 8683 info: \n 8684 - msb = 0 8685 - lsb = 0 8686 - i2c_size = 1 8687 */ 8688 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0EF2 8689 /*!< 8690 type: uint16_t \n 8691 default: 0x0000 \n 8692 info: \n 8693 - msb = 15 8694 - lsb = 0 8695 - i2c_size = 2 8696 8697 groups: \n 8698 ['prev_shadow_system_results', 'results'] 8699 8700 fields: \n 8701 - [15:0] = prev_shadow_result__final_crosstalk_corrected_range_mm_sd1 8702 */ 8703 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0EF2 8704 /*!< 8705 info: \n 8706 - msb = 0 8707 - lsb = 0 8708 - i2c_size = 1 8709 */ 8710 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0EF3 8711 /*!< 8712 info: \n 8713 - msb = 0 8714 - lsb = 0 8715 - i2c_size = 1 8716 */ 8717 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1 0x0EF4 8718 /*!< 8719 type: uint16_t \n 8720 default: 0x0000 \n 8721 info: \n 8722 - msb = 15 8723 - lsb = 0 8724 - i2c_size = 2 8725 8726 groups: \n 8727 ['prev_shadow_system_results', 'results'] 8728 8729 fields: \n 8730 - [15:0] = prev_shadow_result__spare_0_sd1 8731 */ 8732 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_HI 0x0EF4 8733 /*!< 8734 info: \n 8735 - msb = 0 8736 - lsb = 0 8737 - i2c_size = 1 8738 */ 8739 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_LO 0x0EF5 8740 /*!< 8741 info: \n 8742 - msb = 0 8743 - lsb = 0 8744 - i2c_size = 1 8745 */ 8746 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1 0x0EF6 8747 /*!< 8748 type: uint16_t \n 8749 default: 0x0000 \n 8750 info: \n 8751 - msb = 15 8752 - lsb = 0 8753 - i2c_size = 2 8754 8755 groups: \n 8756 ['prev_shadow_system_results', 'results'] 8757 8758 fields: \n 8759 - [15:0] = prev_shadow_result__spare_1_sd1 8760 */ 8761 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_HI 0x0EF6 8762 /*!< 8763 info: \n 8764 - msb = 0 8765 - lsb = 0 8766 - i2c_size = 1 8767 */ 8768 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_LO 0x0EF7 8769 /*!< 8770 info: \n 8771 - msb = 0 8772 - lsb = 0 8773 - i2c_size = 1 8774 */ 8775 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1 0x0EF8 8776 /*!< 8777 type: uint16_t \n 8778 default: 0x0000 \n 8779 info: \n 8780 - msb = 15 8781 - lsb = 0 8782 - i2c_size = 2 8783 8784 groups: \n 8785 ['prev_shadow_system_results', 'results'] 8786 8787 fields: \n 8788 - [15:0] = prev_shadow_result__spare_2_sd1 8789 */ 8790 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_HI 0x0EF8 8791 /*!< 8792 info: \n 8793 - msb = 0 8794 - lsb = 0 8795 - i2c_size = 1 8796 */ 8797 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_LO 0x0EF9 8798 /*!< 8799 info: \n 8800 - msb = 0 8801 - lsb = 0 8802 - i2c_size = 1 8803 */ 8804 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1 0x0EFA 8805 /*!< 8806 type: uint16_t \n 8807 default: 0x0000 \n 8808 info: \n 8809 - msb = 15 8810 - lsb = 0 8811 - i2c_size = 2 8812 8813 groups: \n 8814 ['prev_shadow_system_results', 'results'] 8815 8816 fields: \n 8817 - [15:0] = prev_shadow_result__spare_3_sd1 8818 */ 8819 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_HI 0x0EFA 8820 /*!< 8821 info: \n 8822 - msb = 0 8823 - lsb = 0 8824 - i2c_size = 1 8825 */ 8826 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_LO 0x0EFB 8827 /*!< 8828 info: \n 8829 - msb = 0 8830 - lsb = 0 8831 - i2c_size = 1 8832 */ 8833 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0EFC 8834 /*!< 8835 type: uint32_t \n 8836 default: 0x00000000 \n 8837 info: \n 8838 - msb = 31 8839 - lsb = 0 8840 - i2c_size = 4 8841 8842 groups: \n 8843 ['prev_shadow_core_results', 'ranging_core_results'] 8844 8845 fields: \n 8846 - [31:0] = prev_shadow_result_core__ambient_window_events_sd0 8847 */ 8848 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0EFC 8849 /*!< 8850 info: \n 8851 - msb = 0 8852 - lsb = 0 8853 - i2c_size = 1 8854 */ 8855 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0EFD 8856 /*!< 8857 info: \n 8858 - msb = 0 8859 - lsb = 0 8860 - i2c_size = 1 8861 */ 8862 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0EFE 8863 /*!< 8864 info: \n 8865 - msb = 0 8866 - lsb = 0 8867 - i2c_size = 1 8868 */ 8869 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0EFF 8870 /*!< 8871 info: \n 8872 - msb = 0 8873 - lsb = 0 8874 - i2c_size = 1 8875 */ 8876 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0F00 8877 /*!< 8878 type: uint32_t \n 8879 default: 0x00000000 \n 8880 info: \n 8881 - msb = 31 8882 - lsb = 0 8883 - i2c_size = 4 8884 8885 groups: \n 8886 ['prev_shadow_core_results', 'ranging_core_results'] 8887 8888 fields: \n 8889 - [31:0] = prev_shadow_result_core__ranging_total_events_sd0 8890 */ 8891 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0F00 8892 /*!< 8893 info: \n 8894 - msb = 0 8895 - lsb = 0 8896 - i2c_size = 1 8897 */ 8898 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0F01 8899 /*!< 8900 info: \n 8901 - msb = 0 8902 - lsb = 0 8903 - i2c_size = 1 8904 */ 8905 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0F02 8906 /*!< 8907 info: \n 8908 - msb = 0 8909 - lsb = 0 8910 - i2c_size = 1 8911 */ 8912 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0F03 8913 /*!< 8914 info: \n 8915 - msb = 0 8916 - lsb = 0 8917 - i2c_size = 1 8918 */ 8919 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0F04 8920 /*!< 8921 type: int32_t \n 8922 default: 0x00000000 \n 8923 info: \n 8924 - msb = 31 8925 - lsb = 0 8926 - i2c_size = 4 8927 8928 groups: \n 8929 ['prev_shadow_core_results', 'ranging_core_results'] 8930 8931 fields: \n 8932 - [31:0] = prev_shadow_result_core__signal_total_events_sd0 8933 */ 8934 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0F04 8935 /*!< 8936 info: \n 8937 - msb = 0 8938 - lsb = 0 8939 - i2c_size = 1 8940 */ 8941 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0F05 8942 /*!< 8943 info: \n 8944 - msb = 0 8945 - lsb = 0 8946 - i2c_size = 1 8947 */ 8948 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0F06 8949 /*!< 8950 info: \n 8951 - msb = 0 8952 - lsb = 0 8953 - i2c_size = 1 8954 */ 8955 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0F07 8956 /*!< 8957 info: \n 8958 - msb = 0 8959 - lsb = 0 8960 - i2c_size = 1 8961 */ 8962 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0F08 8963 /*!< 8964 type: uint32_t \n 8965 default: 0x00000000 \n 8966 info: \n 8967 - msb = 31 8968 - lsb = 0 8969 - i2c_size = 4 8970 8971 groups: \n 8972 ['prev_shadow_core_results', 'ranging_core_results'] 8973 8974 fields: \n 8975 - [31:0] = prev_shadow_result_core__total_periods_elapsed_sd0 8976 */ 8977 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0F08 8978 /*!< 8979 info: \n 8980 - msb = 0 8981 - lsb = 0 8982 - i2c_size = 1 8983 */ 8984 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0F09 8985 /*!< 8986 info: \n 8987 - msb = 0 8988 - lsb = 0 8989 - i2c_size = 1 8990 */ 8991 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0F0A 8992 /*!< 8993 info: \n 8994 - msb = 0 8995 - lsb = 0 8996 - i2c_size = 1 8997 */ 8998 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0F0B 8999 /*!< 9000 info: \n 9001 - msb = 0 9002 - lsb = 0 9003 - i2c_size = 1 9004 */ 9005 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0F0C 9006 /*!< 9007 type: uint32_t \n 9008 default: 0x00000000 \n 9009 info: \n 9010 - msb = 31 9011 - lsb = 0 9012 - i2c_size = 4 9013 9014 groups: \n 9015 ['prev_shadow_core_results', 'ranging_core_results'] 9016 9017 fields: \n 9018 - [31:0] = prev_shadow_result_core__ambient_window_events_sd1 9019 */ 9020 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0F0C 9021 /*!< 9022 info: \n 9023 - msb = 0 9024 - lsb = 0 9025 - i2c_size = 1 9026 */ 9027 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0F0D 9028 /*!< 9029 info: \n 9030 - msb = 0 9031 - lsb = 0 9032 - i2c_size = 1 9033 */ 9034 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0F0E 9035 /*!< 9036 info: \n 9037 - msb = 0 9038 - lsb = 0 9039 - i2c_size = 1 9040 */ 9041 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0F0F 9042 /*!< 9043 info: \n 9044 - msb = 0 9045 - lsb = 0 9046 - i2c_size = 1 9047 */ 9048 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0F10 9049 /*!< 9050 type: uint32_t \n 9051 default: 0x00000000 \n 9052 info: \n 9053 - msb = 31 9054 - lsb = 0 9055 - i2c_size = 4 9056 9057 groups: \n 9058 ['prev_shadow_core_results', 'ranging_core_results'] 9059 9060 fields: \n 9061 - [31:0] = prev_shadow_result_core__ranging_total_events_sd1 9062 */ 9063 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0F10 9064 /*!< 9065 info: \n 9066 - msb = 0 9067 - lsb = 0 9068 - i2c_size = 1 9069 */ 9070 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0F11 9071 /*!< 9072 info: \n 9073 - msb = 0 9074 - lsb = 0 9075 - i2c_size = 1 9076 */ 9077 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0F12 9078 /*!< 9079 info: \n 9080 - msb = 0 9081 - lsb = 0 9082 - i2c_size = 1 9083 */ 9084 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0F13 9085 /*!< 9086 info: \n 9087 - msb = 0 9088 - lsb = 0 9089 - i2c_size = 1 9090 */ 9091 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0F14 9092 /*!< 9093 type: int32_t \n 9094 default: 0x00000000 \n 9095 info: \n 9096 - msb = 31 9097 - lsb = 0 9098 - i2c_size = 4 9099 9100 groups: \n 9101 ['prev_shadow_core_results', 'ranging_core_results'] 9102 9103 fields: \n 9104 - [31:0] = prev_shadow_result_core__signal_total_events_sd1 9105 */ 9106 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0F14 9107 /*!< 9108 info: \n 9109 - msb = 0 9110 - lsb = 0 9111 - i2c_size = 1 9112 */ 9113 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0F15 9114 /*!< 9115 info: \n 9116 - msb = 0 9117 - lsb = 0 9118 - i2c_size = 1 9119 */ 9120 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0F16 9121 /*!< 9122 info: \n 9123 - msb = 0 9124 - lsb = 0 9125 - i2c_size = 1 9126 */ 9127 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0F17 9128 /*!< 9129 info: \n 9130 - msb = 0 9131 - lsb = 0 9132 - i2c_size = 1 9133 */ 9134 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0F18 9135 /*!< 9136 type: uint32_t \n 9137 default: 0x00000000 \n 9138 info: \n 9139 - msb = 31 9140 - lsb = 0 9141 - i2c_size = 4 9142 9143 groups: \n 9144 ['prev_shadow_core_results', 'ranging_core_results'] 9145 9146 fields: \n 9147 - [31:0] = prev_shadow_result_core__total_periods_elapsed_sd1 9148 */ 9149 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0F18 9150 /*!< 9151 info: \n 9152 - msb = 0 9153 - lsb = 0 9154 - i2c_size = 1 9155 */ 9156 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0F19 9157 /*!< 9158 info: \n 9159 - msb = 0 9160 - lsb = 0 9161 - i2c_size = 1 9162 */ 9163 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0F1A 9164 /*!< 9165 info: \n 9166 - msb = 0 9167 - lsb = 0 9168 - i2c_size = 1 9169 */ 9170 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0F1B 9171 /*!< 9172 info: \n 9173 - msb = 0 9174 - lsb = 0 9175 - i2c_size = 1 9176 */ 9177 #define VL53L1_PREV_SHADOW_RESULT_CORE__SPARE_0 0x0F1C 9178 /*!< 9179 type: uint8_t \n 9180 default: 0x00 \n 9181 info: \n 9182 - msb = 7 9183 - lsb = 0 9184 - i2c_size = 1 9185 9186 groups: \n 9187 ['prev_shadow_core_results', 'ranging_core_results'] 9188 9189 fields: \n 9190 - [7:0] = prev_shadow_result_core__spare_0 9191 */ 9192 #define VL53L1_RESULT__DEBUG_STATUS 0x0F20 9193 /*!< 9194 type: uint8_t \n 9195 default: 0x00 \n 9196 info: \n 9197 - msb = 7 9198 - lsb = 0 9199 - i2c_size = 1 9200 9201 groups: \n 9202 ['patch_debug', 'misc_results'] 9203 9204 fields: \n 9205 - [7:0] = result_debug_status 9206 */ 9207 #define VL53L1_RESULT__DEBUG_STAGE 0x0F21 9208 /*!< 9209 type: uint8_t \n 9210 default: 0x00 \n 9211 info: \n 9212 - msb = 7 9213 - lsb = 0 9214 - i2c_size = 1 9215 9216 groups: \n 9217 ['patch_debug', 'misc_results'] 9218 9219 fields: \n 9220 - [7:0] = result_debug_stage 9221 */ 9222 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH 0x0F24 9223 /*!< 9224 type: uint16_t \n 9225 default: 0x0000 \n 9226 info: \n 9227 - msb = 15 9228 - lsb = 0 9229 - i2c_size = 2 9230 9231 groups: \n 9232 ['gph_general_config', 'dss_config'] 9233 9234 fields: \n 9235 - [15:0] = gph__system_thresh_rate_high (fixed point 9.7) 9236 */ 9237 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_HI 0x0F24 9238 /*!< 9239 info: \n 9240 - msb = 0 9241 - lsb = 0 9242 - i2c_size = 1 9243 */ 9244 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_LO 0x0F25 9245 /*!< 9246 info: \n 9247 - msb = 0 9248 - lsb = 0 9249 - i2c_size = 1 9250 */ 9251 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW 0x0F26 9252 /*!< 9253 type: uint16_t \n 9254 default: 0x0000 \n 9255 info: \n 9256 - msb = 15 9257 - lsb = 0 9258 - i2c_size = 2 9259 9260 groups: \n 9261 ['gph_general_config', 'dss_config'] 9262 9263 fields: \n 9264 - [15:0] = gph__system_thresh_rate_low (fixed point 9.7) 9265 */ 9266 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_HI 0x0F26 9267 /*!< 9268 info: \n 9269 - msb = 0 9270 - lsb = 0 9271 - i2c_size = 1 9272 */ 9273 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_LO 0x0F27 9274 /*!< 9275 info: \n 9276 - msb = 0 9277 - lsb = 0 9278 - i2c_size = 1 9279 */ 9280 #define VL53L1_GPH__SYSTEM__INTERRUPT_CONFIG_GPIO 0x0F28 9281 /*!< 9282 type: uint8_t \n 9283 default: 0x00 \n 9284 info: \n 9285 - msb = 7 9286 - lsb = 0 9287 - i2c_size = 1 9288 9289 groups: \n 9290 ['gph_general_config', 'gph_config'] 9291 9292 fields: \n 9293 - [1:0] = gph__int_mode_distance 9294 - [3:2] = gph__int_mode_rate 9295 - [4] = gph__int_spare 9296 - [5] = gph__int_new_measure_ready 9297 - [6] = gph__int_no_target_en 9298 - [7] = gph__int_combined_mode 9299 */ 9300 #define VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL 0x0F2F 9301 /*!< 9302 type: uint8_t \n 9303 default: 0x01 \n 9304 info: \n 9305 - msb = 2 9306 - lsb = 0 9307 - i2c_size = 1 9308 9309 groups: \n 9310 ['gph_static_config', 'dss_config'] 9311 9312 fields: \n 9313 - [1:0] = gph__dss_config__input_mode 9314 - [2] = gph__calculate_roi_enable 9315 */ 9316 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0F30 9317 /*!< 9318 type: uint16_t \n 9319 default: 0x0000 \n 9320 info: \n 9321 - msb = 15 9322 - lsb = 0 9323 - i2c_size = 2 9324 9325 groups: \n 9326 ['gph_static_config', 'dss_config'] 9327 9328 fields: \n 9329 - [15:0] = gph__dss_config__manual_effective_spads_select 9330 */ 9331 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0F30 9332 /*!< 9333 info: \n 9334 - msb = 0 9335 - lsb = 0 9336 - i2c_size = 1 9337 */ 9338 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0F31 9339 /*!< 9340 info: \n 9341 - msb = 0 9342 - lsb = 0 9343 - i2c_size = 1 9344 */ 9345 #define VL53L1_GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0F32 9346 /*!< 9347 type: uint8_t \n 9348 default: 0x00 \n 9349 info: \n 9350 - msb = 7 9351 - lsb = 0 9352 - i2c_size = 1 9353 9354 groups: \n 9355 ['gph_static_config', 'dss_config'] 9356 9357 fields: \n 9358 - [7:0] = gph__dss_config__manual_block_select 9359 */ 9360 #define VL53L1_GPH__DSS_CONFIG__MAX_SPADS_LIMIT 0x0F33 9361 /*!< 9362 type: uint8_t \n 9363 default: 0xFF \n 9364 info: \n 9365 - msb = 7 9366 - lsb = 0 9367 - i2c_size = 1 9368 9369 groups: \n 9370 ['gph_static_config', 'dss_config'] 9371 9372 fields: \n 9373 - [7:0] = gph__dss_config__max_spads_limit 9374 */ 9375 #define VL53L1_GPH__DSS_CONFIG__MIN_SPADS_LIMIT 0x0F34 9376 /*!< 9377 type: uint8_t \n 9378 default: 0x01 \n 9379 info: \n 9380 - msb = 7 9381 - lsb = 0 9382 - i2c_size = 1 9383 9384 groups: \n 9385 ['gph_static_config', 'dss_config'] 9386 9387 fields: \n 9388 - [7:0] = gph__dss_config__min_spads_limit 9389 */ 9390 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI 0x0F36 9391 /*!< 9392 type: uint8_t \n 9393 default: 0x00 \n 9394 info: \n 9395 - msb = 3 9396 - lsb = 0 9397 - i2c_size = 1 9398 9399 groups: \n 9400 ['gph_timing_config', 'mm_config'] 9401 9402 fields: \n 9403 - [3:0] = gph_mm_config__config_timeout_macrop_a_hi 9404 */ 9405 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO 0x0F37 9406 /*!< 9407 type: uint8_t \n 9408 default: 0x06 \n 9409 info: \n 9410 - msb = 7 9411 - lsb = 0 9412 - i2c_size = 1 9413 9414 groups: \n 9415 ['gph_timing_config', 'mm_config'] 9416 9417 fields: \n 9418 - [7:0] = gph_mm_config__config_timeout_macrop_a_lo 9419 */ 9420 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI 0x0F38 9421 /*!< 9422 type: uint8_t \n 9423 default: 0x00 \n 9424 info: \n 9425 - msb = 3 9426 - lsb = 0 9427 - i2c_size = 1 9428 9429 groups: \n 9430 ['gph_timing_config', 'mm_config'] 9431 9432 fields: \n 9433 - [3:0] = gph_mm_config__config_timeout_macrop_b_hi 9434 */ 9435 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO 0x0F39 9436 /*!< 9437 type: uint8_t \n 9438 default: 0x06 \n 9439 info: \n 9440 - msb = 7 9441 - lsb = 0 9442 - i2c_size = 1 9443 9444 groups: \n 9445 ['gph_timing_config', 'mm_config'] 9446 9447 fields: \n 9448 - [7:0] = gph_mm_config__config_timeout_macrop_b_lo 9449 */ 9450 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x0F3A 9451 /*!< 9452 type: uint8_t \n 9453 default: 0x01 \n 9454 info: \n 9455 - msb = 3 9456 - lsb = 0 9457 - i2c_size = 1 9458 9459 groups: \n 9460 ['gph_timing_config', 'range_config'] 9461 9462 fields: \n 9463 - [3:0] = gph_range_timeout_overall_periods_macrop_a_hi 9464 */ 9465 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x0F3B 9466 /*!< 9467 type: uint8_t \n 9468 default: 0x92 \n 9469 info: \n 9470 - msb = 7 9471 - lsb = 0 9472 - i2c_size = 1 9473 9474 groups: \n 9475 ['gph_timing_config', 'range_config'] 9476 9477 fields: \n 9478 - [7:0] = gph_range_timeout_overall_periods_macrop_a_lo 9479 */ 9480 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_A 0x0F3C 9481 /*!< 9482 type: uint8_t \n 9483 default: 0x0B \n 9484 info: \n 9485 - msb = 5 9486 - lsb = 0 9487 - i2c_size = 1 9488 9489 groups: \n 9490 ['gph_timing_config', 'range_config'] 9491 9492 fields: \n 9493 - [5:0] = gph_range_config__vcsel_period_a 9494 */ 9495 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_B 0x0F3D 9496 /*!< 9497 type: uint8_t \n 9498 default: 0x09 \n 9499 info: \n 9500 - msb = 5 9501 - lsb = 0 9502 - i2c_size = 1 9503 9504 groups: \n 9505 ['gph_timing_config', 'range_config'] 9506 9507 fields: \n 9508 - [5:0] = gph_range_config__vcsel_period_b 9509 */ 9510 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0F3E 9511 /*!< 9512 type: uint8_t \n 9513 default: 0x01 \n 9514 info: \n 9515 - msb = 3 9516 - lsb = 0 9517 - i2c_size = 1 9518 9519 groups: \n 9520 ['gph_timing_config', 'range_config'] 9521 9522 fields: \n 9523 - [3:0] = gph_range_timeout_overall_periods_macrop_b_hi 9524 */ 9525 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0F3F 9526 /*!< 9527 type: uint8_t \n 9528 default: 0x92 \n 9529 info: \n 9530 - msb = 7 9531 - lsb = 0 9532 - i2c_size = 1 9533 9534 groups: \n 9535 ['gph_timing_config', 'range_config'] 9536 9537 fields: \n 9538 - [7:0] = gph_range_timeout_overall_periods_macrop_b_lo 9539 */ 9540 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH 0x0F40 9541 /*!< 9542 type: uint16_t \n 9543 default: 0x0080 \n 9544 info: \n 9545 - msb = 15 9546 - lsb = 0 9547 - i2c_size = 2 9548 9549 groups: \n 9550 ['gph_timing_config', 'range_config'] 9551 9552 fields: \n 9553 - [15:0] = gph_range_config__sigma_thresh (fixed point 14.2) 9554 */ 9555 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_HI 0x0F40 9556 /*!< 9557 info: \n 9558 - msb = 0 9559 - lsb = 0 9560 - i2c_size = 1 9561 */ 9562 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_LO 0x0F41 9563 /*!< 9564 info: \n 9565 - msb = 0 9566 - lsb = 0 9567 - i2c_size = 1 9568 */ 9569 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0F42 9570 /*!< 9571 type: uint16_t \n 9572 default: 0x0000 \n 9573 info: \n 9574 - msb = 15 9575 - lsb = 0 9576 - i2c_size = 2 9577 9578 groups: \n 9579 ['gph_timing_config', 'range_config'] 9580 9581 fields: \n 9582 - [15:0] = gph_range_config__min_count_rate_rtn_limit_mcps (fixed point 9.7) 9583 */ 9584 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0F42 9585 /*!< 9586 info: \n 9587 - msb = 0 9588 - lsb = 0 9589 - i2c_size = 1 9590 */ 9591 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0F43 9592 /*!< 9593 info: \n 9594 - msb = 0 9595 - lsb = 0 9596 - i2c_size = 1 9597 */ 9598 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_LOW 0x0F44 9599 /*!< 9600 type: uint8_t \n 9601 default: 0x08 \n 9602 info: \n 9603 - msb = 7 9604 - lsb = 0 9605 - i2c_size = 1 9606 9607 groups: \n 9608 ['gph_timing_config', 'range_config'] 9609 9610 fields: \n 9611 - [7:0] = gph_range_config__valid_phase_low (fixed point 5.3) 9612 */ 9613 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_HIGH 0x0F45 9614 /*!< 9615 type: uint8_t \n 9616 default: 0x80 \n 9617 info: \n 9618 - msb = 7 9619 - lsb = 0 9620 - i2c_size = 1 9621 9622 groups: \n 9623 ['gph_timing_config', 'range_config'] 9624 9625 fields: \n 9626 - [7:0] = gph_range_config__valid_phase_high (fixed point 5.3) 9627 */ 9628 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV 0x0F46 9629 /*!< 9630 type: uint8_t \n 9631 default: 0x00 \n 9632 info: \n 9633 - msb = 7 9634 - lsb = 0 9635 - i2c_size = 1 9636 9637 groups: \n 9638 ['fw_internal'] 9639 9640 fields: \n 9641 - [7:0] = fw__internal_stream_count_div 9642 */ 9643 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNTER_VAL 0x0F47 9644 /*!< 9645 type: uint8_t \n 9646 default: 0x00 \n 9647 info: \n 9648 - msb = 7 9649 - lsb = 0 9650 - i2c_size = 1 9651 9652 groups: \n 9653 ['fw_internal'] 9654 9655 fields: \n 9656 - [7:0] = fw__internal_stream_counter_val 9657 */ 9658 #define VL53L1_DSS_CALC__ROI_CTRL 0x0F54 9659 /*!< 9660 type: uint8_t \n 9661 default: 0x00 \n 9662 info: \n 9663 - msb = 1 9664 - lsb = 0 9665 - i2c_size = 1 9666 9667 groups: \n 9668 ['patch_results', 'dss_calc'] 9669 9670 fields: \n 9671 - [0] = dss_calc__roi_intersect_enable 9672 - [1] = dss_calc__roi_subtract_enable 9673 */ 9674 #define VL53L1_DSS_CALC__SPARE_1 0x0F55 9675 /*!< 9676 type: uint8_t \n 9677 default: 0x00 \n 9678 info: \n 9679 - msb = 7 9680 - lsb = 0 9681 - i2c_size = 1 9682 9683 groups: \n 9684 ['patch_results', 'dss_calc'] 9685 9686 fields: \n 9687 - [7:0] = dss_calc__spare_1 9688 */ 9689 #define VL53L1_DSS_CALC__SPARE_2 0x0F56 9690 /*!< 9691 type: uint8_t \n 9692 default: 0x00 \n 9693 info: \n 9694 - msb = 7 9695 - lsb = 0 9696 - i2c_size = 1 9697 9698 groups: \n 9699 ['patch_results', 'dss_calc'] 9700 9701 fields: \n 9702 - [7:0] = dss_calc__spare_2 9703 */ 9704 #define VL53L1_DSS_CALC__SPARE_3 0x0F57 9705 /*!< 9706 type: uint8_t \n 9707 default: 0x00 \n 9708 info: \n 9709 - msb = 7 9710 - lsb = 0 9711 - i2c_size = 1 9712 9713 groups: \n 9714 ['patch_results', 'dss_calc'] 9715 9716 fields: \n 9717 - [7:0] = dss_calc__spare_3 9718 */ 9719 #define VL53L1_DSS_CALC__SPARE_4 0x0F58 9720 /*!< 9721 type: uint8_t \n 9722 default: 0x00 \n 9723 info: \n 9724 - msb = 7 9725 - lsb = 0 9726 - i2c_size = 1 9727 9728 groups: \n 9729 ['patch_results', 'dss_calc'] 9730 9731 fields: \n 9732 - [7:0] = dss_calc__spare_4 9733 */ 9734 #define VL53L1_DSS_CALC__SPARE_5 0x0F59 9735 /*!< 9736 type: uint8_t \n 9737 default: 0x00 \n 9738 info: \n 9739 - msb = 7 9740 - lsb = 0 9741 - i2c_size = 1 9742 9743 groups: \n 9744 ['patch_results', 'dss_calc'] 9745 9746 fields: \n 9747 - [7:0] = dss_calc__spare_5 9748 */ 9749 #define VL53L1_DSS_CALC__SPARE_6 0x0F5A 9750 /*!< 9751 type: uint8_t \n 9752 default: 0x00 \n 9753 info: \n 9754 - msb = 7 9755 - lsb = 0 9756 - i2c_size = 1 9757 9758 groups: \n 9759 ['patch_results', 'dss_calc'] 9760 9761 fields: \n 9762 - [7:0] = dss_calc__spare_6 9763 */ 9764 #define VL53L1_DSS_CALC__SPARE_7 0x0F5B 9765 /*!< 9766 type: uint8_t \n 9767 default: 0x00 \n 9768 info: \n 9769 - msb = 7 9770 - lsb = 0 9771 - i2c_size = 1 9772 9773 groups: \n 9774 ['patch_results', 'dss_calc'] 9775 9776 fields: \n 9777 - [7:0] = dss_calc__spare_7 9778 */ 9779 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_0 0x0F5C 9780 /*!< 9781 type: uint8_t \n 9782 default: 0x00 \n 9783 info: \n 9784 - msb = 7 9785 - lsb = 0 9786 - i2c_size = 1 9787 9788 groups: \n 9789 ['patch_results', 'dss_calc'] 9790 9791 fields: \n 9792 - [7:0] = dss_calc__user_roi_spad_en_0 9793 */ 9794 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_1 0x0F5D 9795 /*!< 9796 type: uint8_t \n 9797 default: 0x00 \n 9798 info: \n 9799 - msb = 7 9800 - lsb = 0 9801 - i2c_size = 1 9802 9803 groups: \n 9804 ['patch_results', 'dss_calc'] 9805 9806 fields: \n 9807 - [7:0] = dss_calc__user_roi_spad_en_1 9808 */ 9809 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_2 0x0F5E 9810 /*!< 9811 type: uint8_t \n 9812 default: 0x00 \n 9813 info: \n 9814 - msb = 7 9815 - lsb = 0 9816 - i2c_size = 1 9817 9818 groups: \n 9819 ['patch_results', 'dss_calc'] 9820 9821 fields: \n 9822 - [7:0] = dss_calc__user_roi_spad_en_2 9823 */ 9824 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_3 0x0F5F 9825 /*!< 9826 type: uint8_t \n 9827 default: 0x00 \n 9828 info: \n 9829 - msb = 7 9830 - lsb = 0 9831 - i2c_size = 1 9832 9833 groups: \n 9834 ['patch_results', 'dss_calc'] 9835 9836 fields: \n 9837 - [7:0] = dss_calc__user_roi_spad_en_3 9838 */ 9839 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_4 0x0F60 9840 /*!< 9841 type: uint8_t \n 9842 default: 0x00 \n 9843 info: \n 9844 - msb = 7 9845 - lsb = 0 9846 - i2c_size = 1 9847 9848 groups: \n 9849 ['patch_results', 'dss_calc'] 9850 9851 fields: \n 9852 - [7:0] = dss_calc__user_roi_spad_en_4 9853 */ 9854 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_5 0x0F61 9855 /*!< 9856 type: uint8_t \n 9857 default: 0x00 \n 9858 info: \n 9859 - msb = 7 9860 - lsb = 0 9861 - i2c_size = 1 9862 9863 groups: \n 9864 ['patch_results', 'dss_calc'] 9865 9866 fields: \n 9867 - [7:0] = dss_calc__user_roi_spad_en_5 9868 */ 9869 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_6 0x0F62 9870 /*!< 9871 type: uint8_t \n 9872 default: 0x00 \n 9873 info: \n 9874 - msb = 7 9875 - lsb = 0 9876 - i2c_size = 1 9877 9878 groups: \n 9879 ['patch_results', 'dss_calc'] 9880 9881 fields: \n 9882 - [7:0] = dss_calc__user_roi_spad_en_6 9883 */ 9884 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_7 0x0F63 9885 /*!< 9886 type: uint8_t \n 9887 default: 0x00 \n 9888 info: \n 9889 - msb = 7 9890 - lsb = 0 9891 - i2c_size = 1 9892 9893 groups: \n 9894 ['patch_results', 'dss_calc'] 9895 9896 fields: \n 9897 - [7:0] = dss_calc__user_roi_spad_en_7 9898 */ 9899 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_8 0x0F64 9900 /*!< 9901 type: uint8_t \n 9902 default: 0x00 \n 9903 info: \n 9904 - msb = 7 9905 - lsb = 0 9906 - i2c_size = 1 9907 9908 groups: \n 9909 ['patch_results', 'dss_calc'] 9910 9911 fields: \n 9912 - [7:0] = dss_calc__user_roi_spad_en_8 9913 */ 9914 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_9 0x0F65 9915 /*!< 9916 type: uint8_t \n 9917 default: 0x00 \n 9918 info: \n 9919 - msb = 7 9920 - lsb = 0 9921 - i2c_size = 1 9922 9923 groups: \n 9924 ['patch_results', 'dss_calc'] 9925 9926 fields: \n 9927 - [7:0] = dss_calc__user_roi_spad_en_9 9928 */ 9929 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_10 0x0F66 9930 /*!< 9931 type: uint8_t \n 9932 default: 0x00 \n 9933 info: \n 9934 - msb = 7 9935 - lsb = 0 9936 - i2c_size = 1 9937 9938 groups: \n 9939 ['patch_results', 'dss_calc'] 9940 9941 fields: \n 9942 - [7:0] = dss_calc__user_roi_spad_en_10 9943 */ 9944 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_11 0x0F67 9945 /*!< 9946 type: uint8_t \n 9947 default: 0x00 \n 9948 info: \n 9949 - msb = 7 9950 - lsb = 0 9951 - i2c_size = 1 9952 9953 groups: \n 9954 ['patch_results', 'dss_calc'] 9955 9956 fields: \n 9957 - [7:0] = dss_calc__user_roi_spad_en_11 9958 */ 9959 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_12 0x0F68 9960 /*!< 9961 type: uint8_t \n 9962 default: 0x00 \n 9963 info: \n 9964 - msb = 7 9965 - lsb = 0 9966 - i2c_size = 1 9967 9968 groups: \n 9969 ['patch_results', 'dss_calc'] 9970 9971 fields: \n 9972 - [7:0] = dss_calc__user_roi_spad_en_12 9973 */ 9974 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_13 0x0F69 9975 /*!< 9976 type: uint8_t \n 9977 default: 0x00 \n 9978 info: \n 9979 - msb = 7 9980 - lsb = 0 9981 - i2c_size = 1 9982 9983 groups: \n 9984 ['patch_results', 'dss_calc'] 9985 9986 fields: \n 9987 - [7:0] = dss_calc__user_roi_spad_en_13 9988 */ 9989 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_14 0x0F6A 9990 /*!< 9991 type: uint8_t \n 9992 default: 0x00 \n 9993 info: \n 9994 - msb = 7 9995 - lsb = 0 9996 - i2c_size = 1 9997 9998 groups: \n 9999 ['patch_results', 'dss_calc'] 10000 10001 fields: \n 10002 - [7:0] = dss_calc__user_roi_spad_en_14 10003 */ 10004 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_15 0x0F6B 10005 /*!< 10006 type: uint8_t \n 10007 default: 0x00 \n 10008 info: \n 10009 - msb = 7 10010 - lsb = 0 10011 - i2c_size = 1 10012 10013 groups: \n 10014 ['patch_results', 'dss_calc'] 10015 10016 fields: \n 10017 - [7:0] = dss_calc__user_roi_spad_en_15 10018 */ 10019 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_16 0x0F6C 10020 /*!< 10021 type: uint8_t \n 10022 default: 0x00 \n 10023 info: \n 10024 - msb = 7 10025 - lsb = 0 10026 - i2c_size = 1 10027 10028 groups: \n 10029 ['patch_results', 'dss_calc'] 10030 10031 fields: \n 10032 - [7:0] = dss_calc__user_roi_spad_en_16 10033 */ 10034 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_17 0x0F6D 10035 /*!< 10036 type: uint8_t \n 10037 default: 0x00 \n 10038 info: \n 10039 - msb = 7 10040 - lsb = 0 10041 - i2c_size = 1 10042 10043 groups: \n 10044 ['patch_results', 'dss_calc'] 10045 10046 fields: \n 10047 - [7:0] = dss_calc__user_roi_spad_en_17 10048 */ 10049 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_18 0x0F6E 10050 /*!< 10051 type: uint8_t \n 10052 default: 0x00 \n 10053 info: \n 10054 - msb = 7 10055 - lsb = 0 10056 - i2c_size = 1 10057 10058 groups: \n 10059 ['patch_results', 'dss_calc'] 10060 10061 fields: \n 10062 - [7:0] = dss_calc__user_roi_spad_en_18 10063 */ 10064 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_19 0x0F6F 10065 /*!< 10066 type: uint8_t \n 10067 default: 0x00 \n 10068 info: \n 10069 - msb = 7 10070 - lsb = 0 10071 - i2c_size = 1 10072 10073 groups: \n 10074 ['patch_results', 'dss_calc'] 10075 10076 fields: \n 10077 - [7:0] = dss_calc__user_roi_spad_en_19 10078 */ 10079 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_20 0x0F70 10080 /*!< 10081 type: uint8_t \n 10082 default: 0x00 \n 10083 info: \n 10084 - msb = 7 10085 - lsb = 0 10086 - i2c_size = 1 10087 10088 groups: \n 10089 ['patch_results', 'dss_calc'] 10090 10091 fields: \n 10092 - [7:0] = dss_calc__user_roi_spad_en_20 10093 */ 10094 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_21 0x0F71 10095 /*!< 10096 type: uint8_t \n 10097 default: 0x00 \n 10098 info: \n 10099 - msb = 7 10100 - lsb = 0 10101 - i2c_size = 1 10102 10103 groups: \n 10104 ['patch_results', 'dss_calc'] 10105 10106 fields: \n 10107 - [7:0] = dss_calc__user_roi_spad_en_21 10108 */ 10109 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_22 0x0F72 10110 /*!< 10111 type: uint8_t \n 10112 default: 0x00 \n 10113 info: \n 10114 - msb = 7 10115 - lsb = 0 10116 - i2c_size = 1 10117 10118 groups: \n 10119 ['patch_results', 'dss_calc'] 10120 10121 fields: \n 10122 - [7:0] = dss_calc__user_roi_spad_en_22 10123 */ 10124 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_23 0x0F73 10125 /*!< 10126 type: uint8_t \n 10127 default: 0x00 \n 10128 info: \n 10129 - msb = 7 10130 - lsb = 0 10131 - i2c_size = 1 10132 10133 groups: \n 10134 ['patch_results', 'dss_calc'] 10135 10136 fields: \n 10137 - [7:0] = dss_calc__user_roi_spad_en_23 10138 */ 10139 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_24 0x0F74 10140 /*!< 10141 type: uint8_t \n 10142 default: 0x00 \n 10143 info: \n 10144 - msb = 7 10145 - lsb = 0 10146 - i2c_size = 1 10147 10148 groups: \n 10149 ['patch_results', 'dss_calc'] 10150 10151 fields: \n 10152 - [7:0] = dss_calc__user_roi_spad_en_24 10153 */ 10154 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_25 0x0F75 10155 /*!< 10156 type: uint8_t \n 10157 default: 0x00 \n 10158 info: \n 10159 - msb = 7 10160 - lsb = 0 10161 - i2c_size = 1 10162 10163 groups: \n 10164 ['patch_results', 'dss_calc'] 10165 10166 fields: \n 10167 - [7:0] = dss_calc__user_roi_spad_en_25 10168 */ 10169 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_26 0x0F76 10170 /*!< 10171 type: uint8_t \n 10172 default: 0x00 \n 10173 info: \n 10174 - msb = 7 10175 - lsb = 0 10176 - i2c_size = 1 10177 10178 groups: \n 10179 ['patch_results', 'dss_calc'] 10180 10181 fields: \n 10182 - [7:0] = dss_calc__user_roi_spad_en_26 10183 */ 10184 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_27 0x0F77 10185 /*!< 10186 type: uint8_t \n 10187 default: 0x00 \n 10188 info: \n 10189 - msb = 7 10190 - lsb = 0 10191 - i2c_size = 1 10192 10193 groups: \n 10194 ['patch_results', 'dss_calc'] 10195 10196 fields: \n 10197 - [7:0] = dss_calc__user_roi_spad_en_27 10198 */ 10199 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_28 0x0F78 10200 /*!< 10201 type: uint8_t \n 10202 default: 0x00 \n 10203 info: \n 10204 - msb = 7 10205 - lsb = 0 10206 - i2c_size = 1 10207 10208 groups: \n 10209 ['patch_results', 'dss_calc'] 10210 10211 fields: \n 10212 - [7:0] = dss_calc__user_roi_spad_en_28 10213 */ 10214 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_29 0x0F79 10215 /*!< 10216 type: uint8_t \n 10217 default: 0x00 \n 10218 info: \n 10219 - msb = 7 10220 - lsb = 0 10221 - i2c_size = 1 10222 10223 groups: \n 10224 ['patch_results', 'dss_calc'] 10225 10226 fields: \n 10227 - [7:0] = dss_calc__user_roi_spad_en_29 10228 */ 10229 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_30 0x0F7A 10230 /*!< 10231 type: uint8_t \n 10232 default: 0x00 \n 10233 info: \n 10234 - msb = 7 10235 - lsb = 0 10236 - i2c_size = 1 10237 10238 groups: \n 10239 ['patch_results', 'dss_calc'] 10240 10241 fields: \n 10242 - [7:0] = dss_calc__user_roi_spad_en_30 10243 */ 10244 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_31 0x0F7B 10245 /*!< 10246 type: uint8_t \n 10247 default: 0x00 \n 10248 info: \n 10249 - msb = 7 10250 - lsb = 0 10251 - i2c_size = 1 10252 10253 groups: \n 10254 ['patch_results', 'dss_calc'] 10255 10256 fields: \n 10257 - [7:0] = dss_calc__user_roi_spad_en_31 10258 */ 10259 #define VL53L1_DSS_CALC__USER_ROI_0 0x0F7C 10260 /*!< 10261 type: uint8_t \n 10262 default: 0x00 \n 10263 info: \n 10264 - msb = 7 10265 - lsb = 0 10266 - i2c_size = 1 10267 10268 groups: \n 10269 ['patch_results', 'dss_calc'] 10270 10271 fields: \n 10272 - [7:0] = dss_calc__user_roi_0 10273 */ 10274 #define VL53L1_DSS_CALC__USER_ROI_1 0x0F7D 10275 /*!< 10276 type: uint8_t \n 10277 default: 0x00 \n 10278 info: \n 10279 - msb = 7 10280 - lsb = 0 10281 - i2c_size = 1 10282 10283 groups: \n 10284 ['patch_results', 'dss_calc'] 10285 10286 fields: \n 10287 - [7:0] = dss_calc__user_roi_1 10288 */ 10289 #define VL53L1_DSS_CALC__MODE_ROI_0 0x0F7E 10290 /*!< 10291 type: uint8_t \n 10292 default: 0x00 \n 10293 info: \n 10294 - msb = 7 10295 - lsb = 0 10296 - i2c_size = 1 10297 10298 groups: \n 10299 ['patch_results', 'dss_calc'] 10300 10301 fields: \n 10302 - [7:0] = dss_calc__mode_roi_0 10303 */ 10304 #define VL53L1_DSS_CALC__MODE_ROI_1 0x0F7F 10305 /*!< 10306 type: uint8_t \n 10307 default: 0x00 \n 10308 info: \n 10309 - msb = 7 10310 - lsb = 0 10311 - i2c_size = 1 10312 10313 groups: \n 10314 ['patch_results', 'dss_calc'] 10315 10316 fields: \n 10317 - [7:0] = dss_calc__mode_roi_1 10318 */ 10319 #define VL53L1_SIGMA_ESTIMATOR_CALC__SPARE_0 0x0F80 10320 /*!< 10321 type: uint8_t \n 10322 default: 0x00 \n 10323 info: \n 10324 - msb = 7 10325 - lsb = 0 10326 - i2c_size = 1 10327 10328 groups: \n 10329 ['patch_results', 'sigma_est_spare'] 10330 10331 fields: \n 10332 - [7:0] = sigma_estimator_calc__spare_0 10333 */ 10334 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS 0x0F82 10335 /*!< 10336 type: uint16_t \n 10337 default: 0x0000 \n 10338 info: \n 10339 - msb = 15 10340 - lsb = 0 10341 - i2c_size = 2 10342 10343 groups: \n 10344 ['patch_results', 'vhv_results'] 10345 10346 fields: \n 10347 - [15:0] = vhv_result__peak_signal_rate_mcps 10348 */ 10349 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI 0x0F82 10350 /*!< 10351 info: \n 10352 - msb = 0 10353 - lsb = 0 10354 - i2c_size = 1 10355 */ 10356 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO 0x0F83 10357 /*!< 10358 info: \n 10359 - msb = 0 10360 - lsb = 0 10361 - i2c_size = 1 10362 */ 10363 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF 0x0F84 10364 /*!< 10365 type: uint32_t \n 10366 default: 0x00000000 \n 10367 info: \n 10368 - msb = 31 10369 - lsb = 0 10370 - i2c_size = 4 10371 10372 groups: \n 10373 ['patch_results', 'vhv_results'] 10374 10375 fields: \n 10376 - [31:0] = vhv_result__signal_total_events_ref 10377 */ 10378 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 0x0F84 10379 /*!< 10380 info: \n 10381 - msb = 0 10382 - lsb = 0 10383 - i2c_size = 1 10384 */ 10385 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 0x0F85 10386 /*!< 10387 info: \n 10388 - msb = 0 10389 - lsb = 0 10390 - i2c_size = 1 10391 */ 10392 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 0x0F86 10393 /*!< 10394 info: \n 10395 - msb = 0 10396 - lsb = 0 10397 - i2c_size = 1 10398 */ 10399 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 0x0F87 10400 /*!< 10401 info: \n 10402 - msb = 0 10403 - lsb = 0 10404 - i2c_size = 1 10405 */ 10406 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF 0x0F88 10407 /*!< 10408 type: uint16_t \n 10409 default: 0x0000 \n 10410 info: \n 10411 - msb = 15 10412 - lsb = 0 10413 - i2c_size = 2 10414 10415 groups: \n 10416 ['patch_results', 'phasecal_results'] 10417 10418 fields: \n 10419 - [15:0] = phasecal_result__normalised_phase_ref 10420 */ 10421 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_HI 0x0F88 10422 /*!< 10423 info: \n 10424 - msb = 0 10425 - lsb = 0 10426 - i2c_size = 1 10427 */ 10428 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_LO 0x0F89 10429 /*!< 10430 info: \n 10431 - msb = 0 10432 - lsb = 0 10433 - i2c_size = 1 10434 */ 10435 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD 0x0F8A 10436 /*!< 10437 type: uint16_t \n 10438 default: 0x0000 \n 10439 info: \n 10440 - msb = 15 10441 - lsb = 0 10442 - i2c_size = 2 10443 10444 groups: \n 10445 ['patch_results', 'dss_results'] 10446 10447 fields: \n 10448 - [15:0] = dss_result__total_rate_per_spad 10449 */ 10450 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_HI 0x0F8A 10451 /*!< 10452 info: \n 10453 - msb = 0 10454 - lsb = 0 10455 - i2c_size = 1 10456 */ 10457 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_LO 0x0F8B 10458 /*!< 10459 info: \n 10460 - msb = 0 10461 - lsb = 0 10462 - i2c_size = 1 10463 */ 10464 #define VL53L1_DSS_RESULT__ENABLED_BLOCKS 0x0F8C 10465 /*!< 10466 type: uint8_t \n 10467 default: 0x00 \n 10468 info: \n 10469 - msb = 7 10470 - lsb = 0 10471 - i2c_size = 1 10472 10473 groups: \n 10474 ['patch_results', 'dss_results'] 10475 10476 fields: \n 10477 - [7:0] = dss_result__enabled_blocks 10478 */ 10479 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS 0x0F8E 10480 /*!< 10481 type: uint16_t \n 10482 default: 0x0000 \n 10483 info: \n 10484 - msb = 15 10485 - lsb = 0 10486 - i2c_size = 2 10487 10488 groups: \n 10489 ['patch_results', 'dss_results'] 10490 10491 fields: \n 10492 - [15:0] = dss_result__num_requested_spads (fixed point 8.8) 10493 */ 10494 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_HI 0x0F8E 10495 /*!< 10496 info: \n 10497 - msb = 0 10498 - lsb = 0 10499 - i2c_size = 1 10500 */ 10501 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_LO 0x0F8F 10502 /*!< 10503 info: \n 10504 - msb = 0 10505 - lsb = 0 10506 - i2c_size = 1 10507 */ 10508 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE 0x0F92 10509 /*!< 10510 type: uint16_t \n 10511 default: 0x0000 \n 10512 info: \n 10513 - msb = 15 10514 - lsb = 0 10515 - i2c_size = 2 10516 10517 groups: \n 10518 ['patch_results', 'mm_results'] 10519 10520 fields: \n 10521 - [15:0] = mm_result__inner_intersection_rate 10522 */ 10523 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_HI 0x0F92 10524 /*!< 10525 info: \n 10526 - msb = 0 10527 - lsb = 0 10528 - i2c_size = 1 10529 */ 10530 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_LO 0x0F93 10531 /*!< 10532 info: \n 10533 - msb = 0 10534 - lsb = 0 10535 - i2c_size = 1 10536 */ 10537 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE 0x0F94 10538 /*!< 10539 type: uint16_t \n 10540 default: 0x0000 \n 10541 info: \n 10542 - msb = 15 10543 - lsb = 0 10544 - i2c_size = 2 10545 10546 groups: \n 10547 ['patch_results', 'mm_results'] 10548 10549 fields: \n 10550 - [15:0] = mm_result__outer_complement_rate 10551 */ 10552 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_HI 0x0F94 10553 /*!< 10554 info: \n 10555 - msb = 0 10556 - lsb = 0 10557 - i2c_size = 1 10558 */ 10559 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_LO 0x0F95 10560 /*!< 10561 info: \n 10562 - msb = 0 10563 - lsb = 0 10564 - i2c_size = 1 10565 */ 10566 #define VL53L1_MM_RESULT__TOTAL_OFFSET 0x0F96 10567 /*!< 10568 type: uint16_t \n 10569 default: 0x0000 \n 10570 info: \n 10571 - msb = 15 10572 - lsb = 0 10573 - i2c_size = 2 10574 10575 groups: \n 10576 ['patch_results', 'mm_results'] 10577 10578 fields: \n 10579 - [15:0] = mm_result__total_offset 10580 */ 10581 #define VL53L1_MM_RESULT__TOTAL_OFFSET_HI 0x0F96 10582 /*!< 10583 info: \n 10584 - msb = 0 10585 - lsb = 0 10586 - i2c_size = 1 10587 */ 10588 #define VL53L1_MM_RESULT__TOTAL_OFFSET_LO 0x0F97 10589 /*!< 10590 info: \n 10591 - msb = 0 10592 - lsb = 0 10593 - i2c_size = 1 10594 */ 10595 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS 0x0F98 10596 /*!< 10597 type: uint32_t \n 10598 default: 0x00000000 \n 10599 info: \n 10600 - msb = 23 10601 - lsb = 0 10602 - i2c_size = 4 10603 10604 groups: \n 10605 ['patch_results', 'xtalk_calc'] 10606 10607 fields: \n 10608 - [23:0] = xtalk_calc__xtalk_for_enabled_spads (fixed point 11.13) 10609 */ 10610 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 0x0F98 10611 /*!< 10612 info: \n 10613 - msb = 0 10614 - lsb = 0 10615 - i2c_size = 1 10616 */ 10617 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 0x0F99 10618 /*!< 10619 info: \n 10620 - msb = 0 10621 - lsb = 0 10622 - i2c_size = 1 10623 */ 10624 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 0x0F9A 10625 /*!< 10626 info: \n 10627 - msb = 0 10628 - lsb = 0 10629 - i2c_size = 1 10630 */ 10631 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 0x0F9B 10632 /*!< 10633 info: \n 10634 - msb = 0 10635 - lsb = 0 10636 - i2c_size = 1 10637 */ 10638 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS 0x0F9C 10639 /*!< 10640 type: uint32_t \n 10641 default: 0x00000000 \n 10642 info: \n 10643 - msb = 23 10644 - lsb = 0 10645 - i2c_size = 4 10646 10647 groups: \n 10648 ['patch_results', 'xtalk_results'] 10649 10650 fields: \n 10651 - [23:0] = xtalk_result__avg_xtalk_user_roi_kcps (fixed point 11.13) 10652 */ 10653 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 0x0F9C 10654 /*!< 10655 info: \n 10656 - msb = 0 10657 - lsb = 0 10658 - i2c_size = 1 10659 */ 10660 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 0x0F9D 10661 /*!< 10662 info: \n 10663 - msb = 0 10664 - lsb = 0 10665 - i2c_size = 1 10666 */ 10667 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 0x0F9E 10668 /*!< 10669 info: \n 10670 - msb = 0 10671 - lsb = 0 10672 - i2c_size = 1 10673 */ 10674 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 0x0F9F 10675 /*!< 10676 info: \n 10677 - msb = 0 10678 - lsb = 0 10679 - i2c_size = 1 10680 */ 10681 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS 0x0FA0 10682 /*!< 10683 type: uint32_t \n 10684 default: 0x00000000 \n 10685 info: \n 10686 - msb = 23 10687 - lsb = 0 10688 - i2c_size = 4 10689 10690 groups: \n 10691 ['patch_results', 'xtalk_results'] 10692 10693 fields: \n 10694 - [23:0] = xtalk_result__avg_xtalk_mm_inner_roi_kcps (fixed point 11.13) 10695 */ 10696 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 0x0FA0 10697 /*!< 10698 info: \n 10699 - msb = 0 10700 - lsb = 0 10701 - i2c_size = 1 10702 */ 10703 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 0x0FA1 10704 /*!< 10705 info: \n 10706 - msb = 0 10707 - lsb = 0 10708 - i2c_size = 1 10709 */ 10710 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 0x0FA2 10711 /*!< 10712 info: \n 10713 - msb = 0 10714 - lsb = 0 10715 - i2c_size = 1 10716 */ 10717 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 0x0FA3 10718 /*!< 10719 info: \n 10720 - msb = 0 10721 - lsb = 0 10722 - i2c_size = 1 10723 */ 10724 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS 0x0FA4 10725 /*!< 10726 type: uint32_t \n 10727 default: 0x00000000 \n 10728 info: \n 10729 - msb = 23 10730 - lsb = 0 10731 - i2c_size = 4 10732 10733 groups: \n 10734 ['patch_results', 'xtalk_results'] 10735 10736 fields: \n 10737 - [23:0] = xtalk_result__avg_xtalk_mm_outer_roi_kcps (fixed point 11.13) 10738 */ 10739 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 0x0FA4 10740 /*!< 10741 info: \n 10742 - msb = 0 10743 - lsb = 0 10744 - i2c_size = 1 10745 */ 10746 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 0x0FA5 10747 /*!< 10748 info: \n 10749 - msb = 0 10750 - lsb = 0 10751 - i2c_size = 1 10752 */ 10753 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 0x0FA6 10754 /*!< 10755 info: \n 10756 - msb = 0 10757 - lsb = 0 10758 - i2c_size = 1 10759 */ 10760 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 0x0FA7 10761 /*!< 10762 info: \n 10763 - msb = 0 10764 - lsb = 0 10765 - i2c_size = 1 10766 */ 10767 #define VL53L1_RANGE_RESULT__ACCUM_PHASE 0x0FA8 10768 /*!< 10769 type: uint32_t \n 10770 default: 0x00000000 \n 10771 info: \n 10772 - msb = 31 10773 - lsb = 0 10774 - i2c_size = 4 10775 10776 groups: \n 10777 ['patch_results', 'range_results'] 10778 10779 fields: \n 10780 - [31:0] = range_result__accum_phase 10781 */ 10782 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_3 0x0FA8 10783 /*!< 10784 info: \n 10785 - msb = 0 10786 - lsb = 0 10787 - i2c_size = 1 10788 */ 10789 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_2 0x0FA9 10790 /*!< 10791 info: \n 10792 - msb = 0 10793 - lsb = 0 10794 - i2c_size = 1 10795 */ 10796 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_1 0x0FAA 10797 /*!< 10798 info: \n 10799 - msb = 0 10800 - lsb = 0 10801 - i2c_size = 1 10802 */ 10803 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_0 0x0FAB 10804 /*!< 10805 info: \n 10806 - msb = 0 10807 - lsb = 0 10808 - i2c_size = 1 10809 */ 10810 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE 0x0FAC 10811 /*!< 10812 type: uint16_t \n 10813 default: 0x0000 \n 10814 info: \n 10815 - msb = 15 10816 - lsb = 0 10817 - i2c_size = 2 10818 10819 groups: \n 10820 ['patch_results', 'range_results'] 10821 10822 fields: \n 10823 - [15:0] = range_result__offset_corrected_range 10824 */ 10825 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI 0x0FAC 10826 /*!< 10827 info: \n 10828 - msb = 0 10829 - lsb = 0 10830 - i2c_size = 1 10831 */ 10832 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO 0x0FAD 10833 /*!< 10834 info: \n 10835 - msb = 0 10836 - lsb = 0 10837 - i2c_size = 1 10838 */ 10839 #define VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START 0x0FAE 10840 /*!< 10841 type: uint8_t \n 10842 default: 0x00 \n 10843 info: \n 10844 - msb = 7 10845 - lsb = 0 10846 - i2c_size = 1 10847 10848 groups: \n 10849 ['shadow_system_results', 'histogram_results'] 10850 10851 fields: \n 10852 - [7:0] = shadow_phasecal_result__vcsel_start 10853 */ 10854 #define VL53L1_SHADOW_RESULT__INTERRUPT_STATUS 0x0FB0 10855 /*!< 10856 type: uint8_t \n 10857 default: 0x00 \n 10858 info: \n 10859 - msb = 5 10860 - lsb = 0 10861 - i2c_size = 1 10862 10863 groups: \n 10864 ['shadow_system_results', 'results'] 10865 10866 fields: \n 10867 - [2:0] = shadow_int_status 10868 - [4:3] = shadow_int_error_status 10869 - [5] = shadow_gph_id_gpio_status 10870 */ 10871 #define VL53L1_SHADOW_RESULT__RANGE_STATUS 0x0FB1 10872 /*!< 10873 type: uint8_t \n 10874 default: 0x00 \n 10875 info: \n 10876 - msb = 7 10877 - lsb = 0 10878 - i2c_size = 1 10879 10880 groups: \n 10881 ['shadow_system_results', 'results'] 10882 10883 fields: \n 10884 - [4:0] = shadow_range_status 10885 - [5] = shadow_max_threshold_hit 10886 - [6] = shadow_min_threshold_hit 10887 - [7] = shadow_gph_id_range_status 10888 */ 10889 #define VL53L1_SHADOW_RESULT__REPORT_STATUS 0x0FB2 10890 /*!< 10891 type: uint8_t \n 10892 default: 0x00 \n 10893 info: \n 10894 - msb = 3 10895 - lsb = 0 10896 - i2c_size = 1 10897 10898 groups: \n 10899 ['shadow_system_results', 'results'] 10900 10901 fields: \n 10902 - [3:0] = shadow_report_status 10903 */ 10904 #define VL53L1_SHADOW_RESULT__STREAM_COUNT 0x0FB3 10905 /*!< 10906 type: uint8_t \n 10907 default: 0x00 \n 10908 info: \n 10909 - msb = 7 10910 - lsb = 0 10911 - i2c_size = 1 10912 10913 groups: \n 10914 ['shadow_system_results', 'results'] 10915 10916 fields: \n 10917 - [7:0] = shadow_result__stream_count 10918 */ 10919 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FB4 10920 /*!< 10921 type: uint16_t \n 10922 default: 0x0000 \n 10923 info: \n 10924 - msb = 15 10925 - lsb = 0 10926 - i2c_size = 2 10927 10928 groups: \n 10929 ['shadow_system_results', 'results'] 10930 10931 fields: \n 10932 - [15:0] = shadow_result__dss_actual_effective_spads_sd0 (fixed point 8.8) 10933 */ 10934 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FB4 10935 /*!< 10936 info: \n 10937 - msb = 0 10938 - lsb = 0 10939 - i2c_size = 1 10940 */ 10941 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FB5 10942 /*!< 10943 info: \n 10944 - msb = 0 10945 - lsb = 0 10946 - i2c_size = 1 10947 */ 10948 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FB6 10949 /*!< 10950 type: uint16_t \n 10951 default: 0x0000 \n 10952 info: \n 10953 - msb = 15 10954 - lsb = 0 10955 - i2c_size = 2 10956 10957 groups: \n 10958 ['shadow_system_results', 'results'] 10959 10960 fields: \n 10961 - [15:0] = shadow_result__peak_signal_count_rate_mcps_sd0 (fixed point 9.7) 10962 */ 10963 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FB6 10964 /*!< 10965 info: \n 10966 - msb = 0 10967 - lsb = 0 10968 - i2c_size = 1 10969 */ 10970 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FB7 10971 /*!< 10972 info: \n 10973 - msb = 0 10974 - lsb = 0 10975 - i2c_size = 1 10976 */ 10977 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0FB8 10978 /*!< 10979 type: uint16_t \n 10980 default: 0x0000 \n 10981 info: \n 10982 - msb = 15 10983 - lsb = 0 10984 - i2c_size = 2 10985 10986 groups: \n 10987 ['shadow_system_results', 'results'] 10988 10989 fields: \n 10990 - [15:0] = shadow_result__ambient_count_rate_mcps_sd0 (fixed point 9.7) 10991 */ 10992 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0FB8 10993 /*!< 10994 info: \n 10995 - msb = 0 10996 - lsb = 0 10997 - i2c_size = 1 10998 */ 10999 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0FB9 11000 /*!< 11001 info: \n 11002 - msb = 0 11003 - lsb = 0 11004 - i2c_size = 1 11005 */ 11006 #define VL53L1_SHADOW_RESULT__SIGMA_SD0 0x0FBA 11007 /*!< 11008 type: uint16_t \n 11009 default: 0x0000 \n 11010 info: \n 11011 - msb = 15 11012 - lsb = 0 11013 - i2c_size = 2 11014 11015 groups: \n 11016 ['shadow_system_results', 'results'] 11017 11018 fields: \n 11019 - [15:0] = shadow_result__sigma_sd0 (fixed point 14.2) 11020 */ 11021 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_HI 0x0FBA 11022 /*!< 11023 info: \n 11024 - msb = 0 11025 - lsb = 0 11026 - i2c_size = 1 11027 */ 11028 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_LO 0x0FBB 11029 /*!< 11030 info: \n 11031 - msb = 0 11032 - lsb = 0 11033 - i2c_size = 1 11034 */ 11035 #define VL53L1_SHADOW_RESULT__PHASE_SD0 0x0FBC 11036 /*!< 11037 type: uint16_t \n 11038 default: 0x0000 \n 11039 info: \n 11040 - msb = 15 11041 - lsb = 0 11042 - i2c_size = 2 11043 11044 groups: \n 11045 ['shadow_system_results', 'results'] 11046 11047 fields: \n 11048 - [15:0] = shadow_result__phase_sd0 (fixed point 5.11) 11049 */ 11050 #define VL53L1_SHADOW_RESULT__PHASE_SD0_HI 0x0FBC 11051 /*!< 11052 info: \n 11053 - msb = 0 11054 - lsb = 0 11055 - i2c_size = 1 11056 */ 11057 #define VL53L1_SHADOW_RESULT__PHASE_SD0_LO 0x0FBD 11058 /*!< 11059 info: \n 11060 - msb = 0 11061 - lsb = 0 11062 - i2c_size = 1 11063 */ 11064 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0FBE 11065 /*!< 11066 type: uint16_t \n 11067 default: 0x0000 \n 11068 info: \n 11069 - msb = 15 11070 - lsb = 0 11071 - i2c_size = 2 11072 11073 groups: \n 11074 ['shadow_system_results', 'results'] 11075 11076 fields: \n 11077 - [15:0] = shadow_result__final_crosstalk_corrected_range_mm_sd0 11078 */ 11079 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0FBE 11080 /*!< 11081 info: \n 11082 - msb = 0 11083 - lsb = 0 11084 - i2c_size = 1 11085 */ 11086 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0FBF 11087 /*!< 11088 info: \n 11089 - msb = 0 11090 - lsb = 0 11091 - i2c_size = 1 11092 */ 11093 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0FC0 11094 /*!< 11095 type: uint16_t \n 11096 default: 0x0000 \n 11097 info: \n 11098 - msb = 15 11099 - lsb = 0 11100 - i2c_size = 2 11101 11102 groups: \n 11103 ['shadow_system_results', 'results'] 11104 11105 fields: \n 11106 - [15:0] = shadow_result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0 (fixed point 9.7) 11107 */ 11108 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0FC0 11109 /*!< 11110 info: \n 11111 - msb = 0 11112 - lsb = 0 11113 - i2c_size = 1 11114 */ 11115 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0FC1 11116 /*!< 11117 info: \n 11118 - msb = 0 11119 - lsb = 0 11120 - i2c_size = 1 11121 */ 11122 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC2 11123 /*!< 11124 type: uint16_t \n 11125 default: 0x0000 \n 11126 info: \n 11127 - msb = 15 11128 - lsb = 0 11129 - i2c_size = 2 11130 11131 groups: \n 11132 ['shadow_system_results', 'results'] 11133 11134 fields: \n 11135 - [15:0] = shadow_result__mm_inner_actual_effective_spads_sd0 (fixed point 8.8) 11136 */ 11137 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC2 11138 /*!< 11139 info: \n 11140 - msb = 0 11141 - lsb = 0 11142 - i2c_size = 1 11143 */ 11144 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC3 11145 /*!< 11146 info: \n 11147 - msb = 0 11148 - lsb = 0 11149 - i2c_size = 1 11150 */ 11151 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC4 11152 /*!< 11153 type: uint16_t \n 11154 default: 0x0000 \n 11155 info: \n 11156 - msb = 15 11157 - lsb = 0 11158 - i2c_size = 2 11159 11160 groups: \n 11161 ['shadow_system_results', 'results'] 11162 11163 fields: \n 11164 - [15:0] = shadow_result__mm_outer_actual_effective_spads_sd0 (fixed point 8.8) 11165 */ 11166 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC4 11167 /*!< 11168 info: \n 11169 - msb = 0 11170 - lsb = 0 11171 - i2c_size = 1 11172 */ 11173 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC5 11174 /*!< 11175 info: \n 11176 - msb = 0 11177 - lsb = 0 11178 - i2c_size = 1 11179 */ 11180 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FC6 11181 /*!< 11182 type: uint16_t \n 11183 default: 0x0000 \n 11184 info: \n 11185 - msb = 15 11186 - lsb = 0 11187 - i2c_size = 2 11188 11189 groups: \n 11190 ['shadow_system_results', 'results'] 11191 11192 fields: \n 11193 - [15:0] = shadow_result__avg_signal_count_rate_mcps_sd0 (fixed point 9.7) 11194 */ 11195 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FC6 11196 /*!< 11197 info: \n 11198 - msb = 0 11199 - lsb = 0 11200 - i2c_size = 1 11201 */ 11202 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FC7 11203 /*!< 11204 info: \n 11205 - msb = 0 11206 - lsb = 0 11207 - i2c_size = 1 11208 */ 11209 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0FC8 11210 /*!< 11211 type: uint16_t \n 11212 default: 0x0000 \n 11213 info: \n 11214 - msb = 15 11215 - lsb = 0 11216 - i2c_size = 2 11217 11218 groups: \n 11219 ['shadow_system_results', 'results'] 11220 11221 fields: \n 11222 - [15:0] = shadow_result__dss_actual_effective_spads_sd1 (fixed point 8.8) 11223 */ 11224 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0FC8 11225 /*!< 11226 info: \n 11227 - msb = 0 11228 - lsb = 0 11229 - i2c_size = 1 11230 */ 11231 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0FC9 11232 /*!< 11233 info: \n 11234 - msb = 0 11235 - lsb = 0 11236 - i2c_size = 1 11237 */ 11238 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0FCA 11239 /*!< 11240 type: uint16_t \n 11241 default: 0x0000 \n 11242 info: \n 11243 - msb = 15 11244 - lsb = 0 11245 - i2c_size = 2 11246 11247 groups: \n 11248 ['shadow_system_results', 'results'] 11249 11250 fields: \n 11251 - [15:0] = shadow_result__peak_signal_count_rate_mcps_sd1 (fixed point 9.7) 11252 */ 11253 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0FCA 11254 /*!< 11255 info: \n 11256 - msb = 0 11257 - lsb = 0 11258 - i2c_size = 1 11259 */ 11260 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0FCB 11261 /*!< 11262 info: \n 11263 - msb = 0 11264 - lsb = 0 11265 - i2c_size = 1 11266 */ 11267 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0FCC 11268 /*!< 11269 type: uint16_t \n 11270 default: 0x0000 \n 11271 info: \n 11272 - msb = 15 11273 - lsb = 0 11274 - i2c_size = 2 11275 11276 groups: \n 11277 ['shadow_system_results', 'results'] 11278 11279 fields: \n 11280 - [15:0] = shadow_result__ambient_count_rate_mcps_sd1 (fixed point 9.7) 11281 */ 11282 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0FCC 11283 /*!< 11284 info: \n 11285 - msb = 0 11286 - lsb = 0 11287 - i2c_size = 1 11288 */ 11289 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0FCD 11290 /*!< 11291 info: \n 11292 - msb = 0 11293 - lsb = 0 11294 - i2c_size = 1 11295 */ 11296 #define VL53L1_SHADOW_RESULT__SIGMA_SD1 0x0FCE 11297 /*!< 11298 type: uint16_t \n 11299 default: 0x0000 \n 11300 info: \n 11301 - msb = 15 11302 - lsb = 0 11303 - i2c_size = 2 11304 11305 groups: \n 11306 ['shadow_system_results', 'results'] 11307 11308 fields: \n 11309 - [15:0] = shadow_result__sigma_sd1 (fixed point 14.2) 11310 */ 11311 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_HI 0x0FCE 11312 /*!< 11313 info: \n 11314 - msb = 0 11315 - lsb = 0 11316 - i2c_size = 1 11317 */ 11318 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_LO 0x0FCF 11319 /*!< 11320 info: \n 11321 - msb = 0 11322 - lsb = 0 11323 - i2c_size = 1 11324 */ 11325 #define VL53L1_SHADOW_RESULT__PHASE_SD1 0x0FD0 11326 /*!< 11327 type: uint16_t \n 11328 default: 0x0000 \n 11329 info: \n 11330 - msb = 15 11331 - lsb = 0 11332 - i2c_size = 2 11333 11334 groups: \n 11335 ['shadow_system_results', 'results'] 11336 11337 fields: \n 11338 - [15:0] = shadow_result__phase_sd1 (fixed point 5.11) 11339 */ 11340 #define VL53L1_SHADOW_RESULT__PHASE_SD1_HI 0x0FD0 11341 /*!< 11342 info: \n 11343 - msb = 0 11344 - lsb = 0 11345 - i2c_size = 1 11346 */ 11347 #define VL53L1_SHADOW_RESULT__PHASE_SD1_LO 0x0FD1 11348 /*!< 11349 info: \n 11350 - msb = 0 11351 - lsb = 0 11352 - i2c_size = 1 11353 */ 11354 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0FD2 11355 /*!< 11356 type: uint16_t \n 11357 default: 0x0000 \n 11358 info: \n 11359 - msb = 15 11360 - lsb = 0 11361 - i2c_size = 2 11362 11363 groups: \n 11364 ['shadow_system_results', 'results'] 11365 11366 fields: \n 11367 - [15:0] = shadow_result__final_crosstalk_corrected_range_mm_sd1 11368 */ 11369 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0FD2 11370 /*!< 11371 info: \n 11372 - msb = 0 11373 - lsb = 0 11374 - i2c_size = 1 11375 */ 11376 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0FD3 11377 /*!< 11378 info: \n 11379 - msb = 0 11380 - lsb = 0 11381 - i2c_size = 1 11382 */ 11383 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1 0x0FD4 11384 /*!< 11385 type: uint16_t \n 11386 default: 0x0000 \n 11387 info: \n 11388 - msb = 15 11389 - lsb = 0 11390 - i2c_size = 2 11391 11392 groups: \n 11393 ['shadow_system_results', 'results'] 11394 11395 fields: \n 11396 - [15:0] = shadow_result__spare_0_sd1 11397 */ 11398 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_HI 0x0FD4 11399 /*!< 11400 info: \n 11401 - msb = 0 11402 - lsb = 0 11403 - i2c_size = 1 11404 */ 11405 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_LO 0x0FD5 11406 /*!< 11407 info: \n 11408 - msb = 0 11409 - lsb = 0 11410 - i2c_size = 1 11411 */ 11412 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1 0x0FD6 11413 /*!< 11414 type: uint16_t \n 11415 default: 0x0000 \n 11416 info: \n 11417 - msb = 15 11418 - lsb = 0 11419 - i2c_size = 2 11420 11421 groups: \n 11422 ['shadow_system_results', 'results'] 11423 11424 fields: \n 11425 - [15:0] = shadow_result__spare_1_sd1 11426 */ 11427 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_HI 0x0FD6 11428 /*!< 11429 info: \n 11430 - msb = 0 11431 - lsb = 0 11432 - i2c_size = 1 11433 */ 11434 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_LO 0x0FD7 11435 /*!< 11436 info: \n 11437 - msb = 0 11438 - lsb = 0 11439 - i2c_size = 1 11440 */ 11441 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1 0x0FD8 11442 /*!< 11443 type: uint16_t \n 11444 default: 0x0000 \n 11445 info: \n 11446 - msb = 15 11447 - lsb = 0 11448 - i2c_size = 2 11449 11450 groups: \n 11451 ['shadow_system_results', 'results'] 11452 11453 fields: \n 11454 - [15:0] = shadow_result__spare_2_sd1 11455 */ 11456 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_HI 0x0FD8 11457 /*!< 11458 info: \n 11459 - msb = 0 11460 - lsb = 0 11461 - i2c_size = 1 11462 */ 11463 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_LO 0x0FD9 11464 /*!< 11465 info: \n 11466 - msb = 0 11467 - lsb = 0 11468 - i2c_size = 1 11469 */ 11470 #define VL53L1_SHADOW_RESULT__SPARE_3_SD1 0x0FDA 11471 /*!< 11472 type: uint8_t \n 11473 default: 0x00 \n 11474 info: \n 11475 - msb = 7 11476 - lsb = 0 11477 - i2c_size = 1 11478 11479 groups: \n 11480 ['shadow_system_results', 'results'] 11481 11482 fields: \n 11483 - [7:0] = shadow_result__spare_3_sd1 11484 */ 11485 #define VL53L1_SHADOW_RESULT__THRESH_INFO 0x0FDB 11486 /*!< 11487 type: uint8_t \n 11488 default: 0x00 \n 11489 info: \n 11490 - msb = 7 11491 - lsb = 0 11492 - i2c_size = 1 11493 11494 groups: \n 11495 ['shadow_system_results', 'results'] 11496 11497 fields: \n 11498 - [3:0] = shadow_result__distance_int_info 11499 - [7:4] = shadow_result__rate_int_info 11500 */ 11501 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0FDC 11502 /*!< 11503 type: uint32_t \n 11504 default: 0x00000000 \n 11505 info: \n 11506 - msb = 31 11507 - lsb = 0 11508 - i2c_size = 4 11509 11510 groups: \n 11511 ['shadow_core_results', 'ranging_core_results'] 11512 11513 fields: \n 11514 - [31:0] = shadow_result_core__ambient_window_events_sd0 11515 */ 11516 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0FDC 11517 /*!< 11518 info: \n 11519 - msb = 0 11520 - lsb = 0 11521 - i2c_size = 1 11522 */ 11523 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0FDD 11524 /*!< 11525 info: \n 11526 - msb = 0 11527 - lsb = 0 11528 - i2c_size = 1 11529 */ 11530 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0FDE 11531 /*!< 11532 info: \n 11533 - msb = 0 11534 - lsb = 0 11535 - i2c_size = 1 11536 */ 11537 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0FDF 11538 /*!< 11539 info: \n 11540 - msb = 0 11541 - lsb = 0 11542 - i2c_size = 1 11543 */ 11544 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0FE0 11545 /*!< 11546 type: uint32_t \n 11547 default: 0x00000000 \n 11548 info: \n 11549 - msb = 31 11550 - lsb = 0 11551 - i2c_size = 4 11552 11553 groups: \n 11554 ['shadow_core_results', 'ranging_core_results'] 11555 11556 fields: \n 11557 - [31:0] = shadow_result_core__ranging_total_events_sd0 11558 */ 11559 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0FE0 11560 /*!< 11561 info: \n 11562 - msb = 0 11563 - lsb = 0 11564 - i2c_size = 1 11565 */ 11566 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0FE1 11567 /*!< 11568 info: \n 11569 - msb = 0 11570 - lsb = 0 11571 - i2c_size = 1 11572 */ 11573 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0FE2 11574 /*!< 11575 info: \n 11576 - msb = 0 11577 - lsb = 0 11578 - i2c_size = 1 11579 */ 11580 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0FE3 11581 /*!< 11582 info: \n 11583 - msb = 0 11584 - lsb = 0 11585 - i2c_size = 1 11586 */ 11587 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0FE4 11588 /*!< 11589 type: int32_t \n 11590 default: 0x00000000 \n 11591 info: \n 11592 - msb = 31 11593 - lsb = 0 11594 - i2c_size = 4 11595 11596 groups: \n 11597 ['shadow_core_results', 'ranging_core_results'] 11598 11599 fields: \n 11600 - [31:0] = shadow_result_core__signal_total_events_sd0 11601 */ 11602 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0FE4 11603 /*!< 11604 info: \n 11605 - msb = 0 11606 - lsb = 0 11607 - i2c_size = 1 11608 */ 11609 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0FE5 11610 /*!< 11611 info: \n 11612 - msb = 0 11613 - lsb = 0 11614 - i2c_size = 1 11615 */ 11616 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0FE6 11617 /*!< 11618 info: \n 11619 - msb = 0 11620 - lsb = 0 11621 - i2c_size = 1 11622 */ 11623 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0FE7 11624 /*!< 11625 info: \n 11626 - msb = 0 11627 - lsb = 0 11628 - i2c_size = 1 11629 */ 11630 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0FE8 11631 /*!< 11632 type: uint32_t \n 11633 default: 0x00000000 \n 11634 info: \n 11635 - msb = 31 11636 - lsb = 0 11637 - i2c_size = 4 11638 11639 groups: \n 11640 ['shadow_core_results', 'ranging_core_results'] 11641 11642 fields: \n 11643 - [31:0] = shadow_result_core__total_periods_elapsed_sd0 11644 */ 11645 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0FE8 11646 /*!< 11647 info: \n 11648 - msb = 0 11649 - lsb = 0 11650 - i2c_size = 1 11651 */ 11652 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0FE9 11653 /*!< 11654 info: \n 11655 - msb = 0 11656 - lsb = 0 11657 - i2c_size = 1 11658 */ 11659 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0FEA 11660 /*!< 11661 info: \n 11662 - msb = 0 11663 - lsb = 0 11664 - i2c_size = 1 11665 */ 11666 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0FEB 11667 /*!< 11668 info: \n 11669 - msb = 0 11670 - lsb = 0 11671 - i2c_size = 1 11672 */ 11673 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0FEC 11674 /*!< 11675 type: uint32_t \n 11676 default: 0x00000000 \n 11677 info: \n 11678 - msb = 31 11679 - lsb = 0 11680 - i2c_size = 4 11681 11682 groups: \n 11683 ['shadow_core_results', 'ranging_core_results'] 11684 11685 fields: \n 11686 - [31:0] = shadow_result_core__ambient_window_events_sd1 11687 */ 11688 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0FEC 11689 /*!< 11690 info: \n 11691 - msb = 0 11692 - lsb = 0 11693 - i2c_size = 1 11694 */ 11695 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0FED 11696 /*!< 11697 info: \n 11698 - msb = 0 11699 - lsb = 0 11700 - i2c_size = 1 11701 */ 11702 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0FEE 11703 /*!< 11704 info: \n 11705 - msb = 0 11706 - lsb = 0 11707 - i2c_size = 1 11708 */ 11709 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0FEF 11710 /*!< 11711 info: \n 11712 - msb = 0 11713 - lsb = 0 11714 - i2c_size = 1 11715 */ 11716 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0FF0 11717 /*!< 11718 type: uint32_t \n 11719 default: 0x00000000 \n 11720 info: \n 11721 - msb = 31 11722 - lsb = 0 11723 - i2c_size = 4 11724 11725 groups: \n 11726 ['shadow_core_results', 'ranging_core_results'] 11727 11728 fields: \n 11729 - [31:0] = shadow_result_core__ranging_total_events_sd1 11730 */ 11731 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0FF0 11732 /*!< 11733 info: \n 11734 - msb = 0 11735 - lsb = 0 11736 - i2c_size = 1 11737 */ 11738 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0FF1 11739 /*!< 11740 info: \n 11741 - msb = 0 11742 - lsb = 0 11743 - i2c_size = 1 11744 */ 11745 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0FF2 11746 /*!< 11747 info: \n 11748 - msb = 0 11749 - lsb = 0 11750 - i2c_size = 1 11751 */ 11752 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0FF3 11753 /*!< 11754 info: \n 11755 - msb = 0 11756 - lsb = 0 11757 - i2c_size = 1 11758 */ 11759 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0FF4 11760 /*!< 11761 type: int32_t \n 11762 default: 0x00000000 \n 11763 info: \n 11764 - msb = 31 11765 - lsb = 0 11766 - i2c_size = 4 11767 11768 groups: \n 11769 ['shadow_core_results', 'ranging_core_results'] 11770 11771 fields: \n 11772 - [31:0] = shadow_result_core__signal_total_events_sd1 11773 */ 11774 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0FF4 11775 /*!< 11776 info: \n 11777 - msb = 0 11778 - lsb = 0 11779 - i2c_size = 1 11780 */ 11781 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0FF5 11782 /*!< 11783 info: \n 11784 - msb = 0 11785 - lsb = 0 11786 - i2c_size = 1 11787 */ 11788 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0FF6 11789 /*!< 11790 info: \n 11791 - msb = 0 11792 - lsb = 0 11793 - i2c_size = 1 11794 */ 11795 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0FF7 11796 /*!< 11797 info: \n 11798 - msb = 0 11799 - lsb = 0 11800 - i2c_size = 1 11801 */ 11802 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0FF8 11803 /*!< 11804 type: uint32_t \n 11805 default: 0x00000000 \n 11806 info: \n 11807 - msb = 31 11808 - lsb = 0 11809 - i2c_size = 4 11810 11811 groups: \n 11812 ['shadow_core_results', 'ranging_core_results'] 11813 11814 fields: \n 11815 - [31:0] = shadow_result_core__total_periods_elapsed_sd1 11816 */ 11817 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0FF8 11818 /*!< 11819 info: \n 11820 - msb = 0 11821 - lsb = 0 11822 - i2c_size = 1 11823 */ 11824 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0FF9 11825 /*!< 11826 info: \n 11827 - msb = 0 11828 - lsb = 0 11829 - i2c_size = 1 11830 */ 11831 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0FFA 11832 /*!< 11833 info: \n 11834 - msb = 0 11835 - lsb = 0 11836 - i2c_size = 1 11837 */ 11838 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0FFB 11839 /*!< 11840 info: \n 11841 - msb = 0 11842 - lsb = 0 11843 - i2c_size = 1 11844 */ 11845 #define VL53L1_SHADOW_RESULT_CORE__SPARE_0 0x0FFC 11846 /*!< 11847 type: uint8_t \n 11848 default: 0x00 \n 11849 info: \n 11850 - msb = 7 11851 - lsb = 0 11852 - i2c_size = 1 11853 11854 groups: \n 11855 ['shadow_core_results', 'ranging_core_results'] 11856 11857 fields: \n 11858 - [7:0] = shadow_result_core__spare_0 11859 */ 11860 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x0FFE 11861 /*!< 11862 type: uint8_t \n 11863 default: 0x00 \n 11864 info: \n 11865 - msb = 7 11866 - lsb = 0 11867 - i2c_size = 1 11868 11869 groups: \n 11870 ['shadow_system_results', 'histogram_results'] 11871 11872 fields: \n 11873 - [7:0] = shadow_phasecal_result__reference_phase_hi 11874 */ 11875 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x0FFF 11876 /*!< 11877 type: uint8_t \n 11878 default: 0x00 \n 11879 info: \n 11880 - msb = 7 11881 - lsb = 0 11882 - i2c_size = 1 11883 11884 groups: \n 11885 ['shadow_system_results', 'histogram_results'] 11886 11887 fields: \n 11888 - [7:0] = shadow_phasecal_result__reference_phase_lo 11889 */ 11890 11891 /** @} VL53L1_register_DefineRegisters_group */ 11892 11893 11894 #endif 11895 11896
