1 /* vl53l1x_platform_user_config.h - Zephyr customization of ST vl53l1x library. */
2 
3 /*
4  * Copyright (c) 2017 STMicroelectronics
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 #ifndef _VL53L1_PLATFORM_USER_CONFIG_H_
10 #define _VL53L1_PLATFORM_USER_CONFIG_H_
11 
12 #define    VL53L1_BYTES_PER_WORD              2
13 #define    VL53L1_BYTES_PER_DWORD             4
14 
15 /* Define polling delays */
16 #define VL53L1_BOOT_COMPLETION_POLLING_TIMEOUT_MS     500
17 #define VL53L1_RANGE_COMPLETION_POLLING_TIMEOUT_MS   2000
18 #define VL53L1_TEST_COMPLETION_POLLING_TIMEOUT_MS   60000
19 
20 #define VL53L1_POLLING_DELAY_MS                         1
21 
22 /* Define LLD TuningParms Page Base Address
23  * - Part of Patch_AddedTuningParms_11761
24  */
25 #define VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS  0x8000
26 #define VL53L1_TUNINGPARM_PRIVATE_PAGE_BASE_ADDRESS 0xC000
27 
28 #define VL53L1_GAIN_FACTOR__STANDARD_DEFAULT       0x0800
29 	/*!<  Default standard ranging gain correction factor
30 	 *	  1.11 format. 1.0 = 0x0800, 0.980 = 0x07D7
31 	 */
32 
33 #define VL53L1_OFFSET_CAL_MIN_EFFECTIVE_SPADS  0x0500
34 	/*!< Lower Limit for the  MM1 effective SPAD count during offset
35 	 *	 calibration Format 8.8 0x0500 -> 5.0 effective SPADs
36 	 */
37 
38 #define VL53L1_OFFSET_CAL_MAX_PRE_PEAK_RATE_MCPS   0x1900
39 	/*!< Max Limit for the pre range peak rate during offset
40 	 * calibration Format 9.7 0x1900 -> 50.0 Mcps.
41 	 * If larger then in pile up
42 	 */
43 
44 #define VL53L1_OFFSET_CAL_MAX_SIGMA_MM             0x0040
45 	/*!< Max sigma estimate limit during offset calibration
46 	 *   Check applies to pre-range, mm1 and mm2 ranges
47 	 *	 Format 14.2 0x0040 -> 16.0mm.
48 	 */
49 
50 #define VL53L1_MAX_USER_ZONES                 1
51 	/*!< Max number of user Zones - maximal limitation from
52 	 * FW stream divide - value of 254
53 	 */
54 
55 #define VL53L1_MAX_RANGE_RESULTS              2
56 	/*!< Allocates storage for return and reference restults */
57 
58 
59 #define VL53L1_MAX_STRING_LENGTH 512
60 
61 #endif  /* _VL53L1_PLATFORM_USER_CONFIG_H_ */
62