1 /******************************************************************************* 2 Copyright � 2016, STMicroelectronics International N.V. 3 All rights reserved. 4 5 Redistribution and use in source and binary forms, with or without 6 modification, are permitted provided that the following conditions are met: 7 * Redistributions of source code must retain the above copyright 8 notice, this list of conditions and the following disclaimer. 9 * Redistributions in binary form must reproduce the above copyright 10 notice, this list of conditions and the following disclaimer in the 11 documentation and/or other materials provided with the distribution. 12 * Neither the name of STMicroelectronics nor the 13 names of its contributors may be used to endorse or promote products 14 derived from this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 17 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND 19 NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED. 20 IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY 21 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 26 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 *******************************************************************************/ 28 29 /** 30 * Device specific defines. To be adapted by implementer for the targeted 31 * device. 32 */ 33 34 #ifndef _VL53L0X_DEVICE_H_ 35 #define _VL53L0X_DEVICE_H_ 36 37 #include "vl53l0x_types.h" 38 39 40 /** @defgroup VL53L0X_DevSpecDefines_group VL53L0X cut1.1 Device Specific Defines 41 * @brief VL53L0X cut1.1 Device Specific Defines 42 * @{ 43 */ 44 45 46 /** @defgroup VL53L0X_DeviceError_group Device Error 47 * @brief Device Error code 48 * 49 * This enum is Device specific it should be updated in the implementation 50 * Use @a VL53L0X_GetStatusErrorString() to get the string. 51 * It is related to Status Register of the Device. 52 * @{ 53 */ 54 typedef uint8_t VL53L0X_DeviceError; 55 56 #define VL53L0X_DEVICEERROR_NONE ((VL53L0X_DeviceError) 0) 57 /*!< 0 NoError */ 58 #define VL53L0X_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L0X_DeviceError) 1) 59 #define VL53L0X_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L0X_DeviceError) 2) 60 #define VL53L0X_DEVICEERROR_NOVHVVALUEFOUND ((VL53L0X_DeviceError) 3) 61 #define VL53L0X_DEVICEERROR_MSRCNOTARGET ((VL53L0X_DeviceError) 4) 62 #define VL53L0X_DEVICEERROR_SNRCHECK ((VL53L0X_DeviceError) 5) 63 #define VL53L0X_DEVICEERROR_RANGEPHASECHECK ((VL53L0X_DeviceError) 6) 64 #define VL53L0X_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L0X_DeviceError) 7) 65 #define VL53L0X_DEVICEERROR_TCC ((VL53L0X_DeviceError) 8) 66 #define VL53L0X_DEVICEERROR_PHASECONSISTENCY ((VL53L0X_DeviceError) 9) 67 #define VL53L0X_DEVICEERROR_MINCLIP ((VL53L0X_DeviceError) 10) 68 #define VL53L0X_DEVICEERROR_RANGECOMPLETE ((VL53L0X_DeviceError) 11) 69 #define VL53L0X_DEVICEERROR_ALGOUNDERFLOW ((VL53L0X_DeviceError) 12) 70 #define VL53L0X_DEVICEERROR_ALGOOVERFLOW ((VL53L0X_DeviceError) 13) 71 #define VL53L0X_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L0X_DeviceError) 14) 72 73 /** @} end of VL53L0X_DeviceError_group */ 74 75 76 /** @defgroup VL53L0X_CheckEnable_group Check Enable list 77 * @brief Check Enable code 78 * 79 * Define used to specify the LimitCheckId. 80 * Use @a VL53L0X_GetLimitCheckInfo() to get the string. 81 * @{ 82 */ 83 84 #define VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE 0 85 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE 1 86 #define VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP 2 87 #define VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD 3 88 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC 4 89 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE 5 90 91 #define VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS 6 92 93 /** @} end of VL53L0X_CheckEnable_group */ 94 95 96 /** @defgroup VL53L0X_GpioFunctionality_group Gpio Functionality 97 * @brief Defines the different functionalities for the device GPIO(s) 98 * @{ 99 */ 100 typedef uint8_t VL53L0X_GpioFunctionality; 101 102 #define VL53L0X_GPIOFUNCTIONALITY_OFF \ 103 ((VL53L0X_GpioFunctionality) 0) /*!< NO Interrupt */ 104 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW \ 105 ((VL53L0X_GpioFunctionality) 1) /*!< Level Low (value < thresh_low) */ 106 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH \ 107 ((VL53L0X_GpioFunctionality) 2) /*!< Level High (value > thresh_high) */ 108 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT \ 109 ((VL53L0X_GpioFunctionality) 3) 110 /*!< Out Of Window (value < thresh_low OR value > thresh_high) */ 111 #define VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY \ 112 ((VL53L0X_GpioFunctionality) 4) /*!< New Sample Ready */ 113 114 /** @} end of VL53L0X_GpioFunctionality_group */ 115 116 117 /* Device register map */ 118 119 /** @defgroup VL53L0X_DefineRegisters_group Define Registers 120 * @brief List of all the defined registers 121 * @{ 122 */ 123 #define VL53L0X_REG_SYSRANGE_START 0x000 124 /** mask existing bit in #VL53L0X_REG_SYSRANGE_START*/ 125 #define VL53L0X_REG_SYSRANGE_MODE_MASK 0x0F 126 /** bit 0 in #VL53L0X_REG_SYSRANGE_START write 1 toggle state in 127 * continuous mode and arm next shot in single shot mode */ 128 #define VL53L0X_REG_SYSRANGE_MODE_START_STOP 0x01 129 /** bit 1 write 0 in #VL53L0X_REG_SYSRANGE_START set single shot mode */ 130 #define VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT 0x00 131 /** bit 1 write 1 in #VL53L0X_REG_SYSRANGE_START set back-to-back 132 * operation mode */ 133 #define VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK 0x02 134 /** bit 2 write 1 in #VL53L0X_REG_SYSRANGE_START set timed operation 135 * mode */ 136 #define VL53L0X_REG_SYSRANGE_MODE_TIMED 0x04 137 /** bit 3 write 1 in #VL53L0X_REG_SYSRANGE_START set histogram operation 138 * mode */ 139 #define VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM 0x08 140 141 142 #define VL53L0X_REG_SYSTEM_THRESH_HIGH 0x000C 143 #define VL53L0X_REG_SYSTEM_THRESH_LOW 0x000E 144 145 146 #define VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG 0x0001 147 #define VL53L0X_REG_SYSTEM_RANGE_CONFIG 0x0009 148 #define VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD 0x0004 149 150 151 #define VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x000A 152 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED 0x00 153 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW 0x01 154 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH 0x02 155 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW 0x03 156 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY 0x04 157 158 #define VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH 0x0084 159 160 161 #define VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR 0x000B 162 163 /* Result registers */ 164 #define VL53L0X_REG_RESULT_INTERRUPT_STATUS 0x0013 165 #define VL53L0X_REG_RESULT_RANGE_STATUS 0x0014 166 167 #define VL53L0X_REG_RESULT_CORE_PAGE 1 168 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN 0x00BC 169 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN 0x00C0 170 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF 0x00D0 171 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF 0x00D4 172 #define VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF 0x00B6 173 174 /* Algo register */ 175 176 #define VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM 0x0028 177 178 #define VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS 0x008a 179 180 /* Check Limit registers */ 181 #define VL53L0X_REG_MSRC_CONFIG_CONTROL 0x0060 182 183 #define VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR 0X0027 184 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW 0x0056 185 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH 0x0057 186 #define VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT 0x0064 187 188 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR 0X0067 189 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW 0x0047 190 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH 0x0048 191 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT 0x0044 192 193 194 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI 0X0061 195 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO 0X0062 196 197 /* PRE RANGE registers */ 198 #define VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD 0x0050 199 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0051 200 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0052 201 202 #define VL53L0X_REG_SYSTEM_HISTOGRAM_BIN 0x0081 203 #define VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT 0x0033 204 #define VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL 0x0055 205 206 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD 0x0070 207 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0071 208 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0072 209 #define VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS 0x0020 210 211 #define VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP 0x0046 212 213 214 #define VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N 0x00bf 215 #define VL53L0X_REG_IDENTIFICATION_MODEL_ID 0x00c0 216 #define VL53L0X_REG_IDENTIFICATION_REVISION_ID 0x00c2 217 218 #define VL53L0X_REG_OSC_CALIBRATE_VAL 0x00f8 219 220 221 #define VL53L0X_SIGMA_ESTIMATE_MAX_VALUE 65535 222 /* equivalent to a range sigma of 655.35mm */ 223 224 #define VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH 0x032 225 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 0x0B0 226 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 0x0B1 227 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 0x0B2 228 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 0x0B3 229 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 0x0B4 230 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 0x0B5 231 232 #define VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT 0xB6 233 #define VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD 0x4E /* 0x14E */ 234 #define VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET 0x4F /* 0x14F */ 235 #define VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE 0x80 236 237 /* 238 * Speed of light in um per 1E-10 Seconds 239 */ 240 241 #define VL53L0X_SPEED_OF_LIGHT_IN_AIR 2997 242 243 #define VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV 0x0089 244 245 #define VL53L0X_REG_ALGO_PHASECAL_LIM 0x0030 /* 0x130 */ 246 #define VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT 0x0030 247 248 /** @} VL53L0X_DefineRegisters_group */ 249 250 /** @} VL53L0X_DevSpecDefines_group */ 251 252 253 #endif 254 255 /* _VL53L0X_DEVICE_H_ */ 256 257 258
