1 /******************************************************************************
2 * Filename: sys_ctrl.h
3 * Revised: 2020-02-14 11:30:20 +0100 (Fri, 14 Feb 2020)
4 * Revision: 56760
5 *
6 * Description: Defines and prototypes for the System Controller.
7 *
8 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup system_control_group
42 //! @{
43 //! \addtogroup sysctrl_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 #ifndef __SYSCTRL_H__
49 #define __SYSCTRL_H__
50
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include "../inc/hw_types.h"
65 #include "../inc/hw_memmap.h"
66 #include "../inc/hw_ints.h"
67 #include "../inc/hw_sysctl.h"
68 #include "../inc/hw_prcm.h"
69 #include "../inc/hw_nvic.h"
70 #include "../inc/hw_aon_ioc.h"
71 #include "../inc/hw_ddi_0_osc.h"
72 #include "../inc/hw_rfc_pwr.h"
73 #include "../inc/hw_prcm.h"
74 #include "../inc/hw_adi_3_refsys.h"
75 #include "../inc/hw_aon_pmctl.h"
76 #include "../inc/hw_aon_rtc.h"
77 #include "../inc/hw_fcfg1.h"
78 #include "interrupt.h"
79 #include "debug.h"
80 #include "pwr_ctrl.h"
81 #include "osc.h"
82 #include "prcm.h"
83 #include "adi.h"
84 #include "ddi.h"
85 #include "cpu.h"
86 #include "vims.h"
87
88 //*****************************************************************************
89 //
90 // Support for DriverLib in ROM:
91 // This section renames all functions that are not "static inline", so that
92 // calling these functions will default to implementation in flash. At the end
93 // of this file a second renaming will change the defaults to implementation in
94 // ROM for available functions.
95 //
96 // To force use of the implementation in flash, e.g. for debugging:
97 // - Globally: Define DRIVERLIB_NOROM at project level
98 // - Per function: Use prefix "NOROM_" when calling the function
99 //
100 //*****************************************************************************
101 #if !defined(DOXYGEN)
102 #define SysCtrlIdle NOROM_SysCtrlIdle
103 #define SysCtrlShutdownWithAbort NOROM_SysCtrlShutdownWithAbort
104 #define SysCtrlShutdown NOROM_SysCtrlShutdown
105 #define SysCtrlStandby NOROM_SysCtrlStandby
106 #define SysCtrlSetRechargeBeforePowerDown NOROM_SysCtrlSetRechargeBeforePowerDown
107 #define SysCtrlAdjustRechargeAfterPowerDown NOROM_SysCtrlAdjustRechargeAfterPowerDown
108 #define SysCtrl_DCDC_VoltageConditionalControl NOROM_SysCtrl_DCDC_VoltageConditionalControl
109 #define SysCtrlResetSourceGet NOROM_SysCtrlResetSourceGet
110 #endif
111
112 //*****************************************************************************
113 //
114 // Defines for the settings of the main XOSC
115 //
116 //*****************************************************************************
117 #define SYSCTRL_SYSBUS_ON 0x00000001
118 #define SYSCTRL_SYSBUS_OFF 0x00000000
119
120 //*****************************************************************************
121 //
122 // Defines for the different power modes of the System CPU
123 //
124 //*****************************************************************************
125 #define CPU_RUN 0x00000000
126 #define CPU_SLEEP 0x00000001
127 #define CPU_DEEP_SLEEP 0x00000002
128
129 //*****************************************************************************
130 //
131 // Defines for SysCtrlSetRechargeBeforePowerDown
132 //
133 //*****************************************************************************
134 #define XOSC_IN_HIGH_POWER_MODE 0 // When xosc_hf is in HIGH_POWER_XOSC
135 #define XOSC_IN_LOW_POWER_MODE 1 // When xosc_hf is in LOW_POWER_XOSC
136
137 //*****************************************************************************
138 //
139 // Defines for the vimsPdMode parameter of SysCtrlIdle and SysCtrlStandby
140 //
141 //*****************************************************************************
142 #define VIMS_ON_CPU_ON_MODE 0 // VIMS power domain is only powered when CPU power domain is powered
143 #define VIMS_ON_BUS_ON_MODE 1 // VIMS power domain is powered whenever the BUS power domain is powered
144 #define VIMS_NO_PWR_UP_MODE 2 // VIMS power domain is not powered up at next wakeup.
145
146 //*****************************************************************************
147 //
148 // Defines for the rechargeMode parameter of SysCtrlStandby
149 //
150 //*****************************************************************************
151 #define SYSCTRL_PREFERRED_RECHARGE_MODE \
152 0xFFFFFFFF // Preferred recharge mode
153
154 //*****************************************************************************
155 //
156 // API Functions and prototypes
157 //
158 //*****************************************************************************
159
160 //*****************************************************************************
161 //
162 //! \brief Force the system into idle mode.
163 //!
164 //! This function forces the system into IDLE mode by configuring the requested
165 //! VIMS mode, enabling cache retention and powering off the CPU power domain.
166 //!
167 //! \param vimsPdMode selects the requested VIMS power domain mode
168 //! The parameter must be one of the following:
169 //! - \ref VIMS_ON_CPU_ON_MODE
170 //! - \ref VIMS_ON_BUS_ON_MODE
171 //! - \ref VIMS_NO_PWR_UP_MODE
172 //!
173 //! \return None
174 //
175 //*****************************************************************************
176 extern void SysCtrlIdle(uint32_t vimsPdMode);
177
178 //*****************************************************************************
179 //
180 //! \brief Try to enter shutdown but abort if wakeup event happened before shutdown.
181 //!
182 //! This function puts the device in shutdown state if no wakeup events are
183 //! detected before shutdown.
184 //!
185 //! Compared to the basic \ref SysCtrlShutdown() function this function makes sure
186 //! that wakeup events that happen before actual shutdown are also detected. This
187 //! function either enters shutdown with a guaranteed wakeup detection or returns
188 //! to the caller function due to a pre-shutdown wakeup event.
189 //!
190 //! See \ref SysCtrlShutdown() for basic information about how to configure the device before
191 //! shutdown and how to wakeup from shutdown.
192 //!
193 //! This function uses IO edge detection in addition to the mandatory wakeup configuration.
194 //! Additional requirements to the application for this function are:
195 //! - \b Before :
196 //! - When the application configures an IO for wakeup (see \ref IOCIOShutdownSet())
197 //! the application must also configure the same IO for edge detection
198 //! (see \ref IOCIOIntSet()).
199 //! - Edge detection must use the same polarity as the wakeup configuration.
200 //! - Application must enable peripheral power domain (see \ref PRCMPowerDomainOn())
201 //! and enable GPIO module in the peripheral power domain (see \ref PRCMPeripheralRunEnable()).
202 //! - \b After :
203 //! - An edge, with same polarity as a wakeup event, was detected on a wakeup
204 //! enabled IO before shutdown, and the shutdown was aborted. The application must
205 //! clear the event generated by the edge detect (see \ref GPIO_clearEventDio()) and
206 //! decide what happens next.
207 //!
208 //! Useful functions related to shutdown:
209 //! - \ref IOCIOShutdownSet() : Enables wakeup from shutdown.
210 //! - \ref IOCIOIntSet() : Enables IO edge detection.
211 //! - \ref PRCMPowerDomainOn() : Enables peripheral power domain.
212 //! - \ref PRCMPeripheralRunEnable() : Enables GPIO module.
213 //! - \ref SysCtrlResetSourceGet() : Detects wakeup from shutdown.
214 //! - \ref PowerCtrlPadSleepDisable() : Unlatches outputs (disables pad sleep) after
215 //! wakeup from shutdown.
216 //! - \ref GPIO_clearEventDio() : Clears edge detects.
217 //!
218 //! It is recommended to disable interrupts before calling this function because:
219 //! - Pads are in sleep mode while this function runs.
220 //! - An interrupt routine might be terminated if it is triggered after the decision
221 //! to enter shutdown.
222 //!
223 //! \return None
224 //
225 //*****************************************************************************
226 extern void SysCtrlShutdownWithAbort(void);
227
228 //*****************************************************************************
229 //
230 //! \brief Enable shutdown of the device.
231 //!
232 //! This function puts the device in shutdown state. The device automatically
233 //! latches all outputs (pads in sleep) before it turns off all internal power
234 //! supplies.
235 //!
236 //! JTAG must be disconnected and JTAG power domain must be off before device can
237 //! enter shutdown. This function waits until the device satisfies all shutdown
238 //! conditions before it enters shutdown.
239 //!
240 //! \note The application must unlatch the outputs when the device wakes up from shutdown.
241 //! It is recommended that any outputs that need to be restored after a wakeup from
242 //! shutdown are restored before outputs are unlatched in order to avoid glitches.
243 //!
244 //! See \ref PowerCtrlPadSleepDisable() for information about how to unlatch outputs
245 //! (disable pad sleep) after wakeup from shutdown.
246 //!
247 //! \note Wakeup events are only detected after the device enters shutdown.
248 //!
249 //! See \ref IOCIOShutdownSet() for information about how to enable wakeup from shutdown.
250 //!
251 //! See \ref SysCtrlResetSourceGet() for information about how to detect wakeup
252 //! from shutdown.
253 //!
254 //! It is recommended to disable interrupts before calling this function. Shutdown
255 //! happens immediately when the device satisfies all shutdown conditions thus
256 //! interrupt routines triggered after this function is called might be
257 //! aborted.
258 //!
259 //! \return This function does \b not return.
260 //
261 //*****************************************************************************
262 extern void SysCtrlShutdown(void);
263
264 //*****************************************************************************
265 //
266 //! \brief Force the system into standby mode.
267 //!
268 //! This function forces all power domains (RFCORE, SERIAL, PERIPHERAL) off.
269 //! The VIMS and CPU power domains are turned off by the HW when the
270 //! \ref PRCMDeepSleep() function is called.
271 //! The IOs are latched (frozen) before the power domains are turned off to
272 //! avoid glitches.
273 //! The VIMS retention (cache) and VIMS module are turned off if requested.
274 //! The deep-sleep clock for the crypto and DMA modules are turned off,
275 //! as they must be off in order to enter standby.
276 //! This function assumes that the LF clock has already been switched to
277 //! and that the LF clock qualifiers must have been disabled/bypassed.
278 //!
279 //! In internal regulator mode the adaptive recharge functionality is enabled
280 //! with fixed parameter values.
281 //! In external regulator mode the recharge functionality is disabled.
282 //!
283 //! \note This function is optimized to execute with TI-RTOS. There might be
284 //! application specific prerequisites you would want to do before entering
285 //! standby which deviate from this specific implementation.
286 //!
287 //! \param retainCache selects if VIMS cache shall be retained or not.
288 //! - false : VIMS cache is not retained
289 //! - true : VIMS cache is retained
290 //! \param vimsPdMode selects the VIMS power domain mode.
291 //! The parameter must be one of the following:
292 //! - \ref VIMS_ON_CPU_ON_MODE
293 //! - \ref VIMS_NO_PWR_UP_MODE
294 //! \param rechargeMode specifies the requested recharge mode.
295 //! The parameter must be one of the following:
296 //! - \ref SYSCTRL_PREFERRED_RECHARGE_MODE : Preferred recharge mode specified by TI
297 //!
298 //! \return None
299 //
300 //*****************************************************************************
301 extern void SysCtrlStandby(bool retainCache, uint32_t vimsPdMode, uint32_t rechargeMode);
302
303 //*****************************************************************************
304 //
305 //! \brief Get the CPU core clock frequency.
306 //!
307 //! Use this function to get the current clock frequency for the CPU.
308 //!
309 //! The CPU can run from 48 MHz and down to 750kHz. The frequency is defined
310 //! by the combined division factor of the SYSBUS and the CPU clock divider.
311 //!
312 //! \return Returns the current CPU core clock frequency.
313 //
314 //*****************************************************************************
315 __STATIC_INLINE uint32_t
SysCtrlClockGet(void)316 SysCtrlClockGet( void )
317 {
318 // Return fixed clock speed
319 return( GET_MCU_CLOCK );
320 }
321
322 //*****************************************************************************
323 //
324 //! \brief Sync all accesses to the AON register interface.
325 //!
326 //! When this function returns, all writes to the AON register interface are
327 //! guaranteed to have propagated to hardware. The function will return
328 //! immediately if no AON writes are pending; otherwise, it will wait for the next
329 //! AON clock before returning.
330 //!
331 //! \return None
332 //!
333 //! \sa \ref SysCtrlAonUpdate()
334 //
335 //*****************************************************************************
336 __STATIC_INLINE void
SysCtrlAonSync(void)337 SysCtrlAonSync(void)
338 {
339 // Sync the AON interface
340 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
341 }
342
343 //*****************************************************************************
344 //
345 //! \brief Update all interfaces to AON.
346 //!
347 //! When this function returns, at least 1 clock cycle has progressed on the
348 //! AON domain, so that any outstanding updates to and from the AON interface
349 //! is guaranteed to be in sync.
350 //!
351 //! \note This function should primarily be used after wakeup from sleep modes,
352 //! as it will guarantee that all shadow registers on the AON interface are updated
353 //! before reading any AON registers from the MCU domain. If a write has been
354 //! done to the AON interface it is sufficient to call the \ref SysCtrlAonSync().
355 //!
356 //! \return None
357 //!
358 //! \sa \ref SysCtrlAonSync()
359 //
360 //*****************************************************************************
361 __STATIC_INLINE void
SysCtrlAonUpdate(void)362 SysCtrlAonUpdate(void)
363 {
364 // Force a clock cycle on the AON interface to guarantee all registers are
365 // in sync.
366 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC) = 1;
367 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
368 }
369
370 //*****************************************************************************
371 //
372 //! \brief Set Recharge values before entering Power Down.
373 //!
374 //! This function shall be called just before entering Power Down.
375 //! This function typically does nothing (default setting), but
376 //! if temperature compensated recharge level are enabled (by setting
377 //! CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC = 0)
378 //! it adds temperature compensation to the recharge level.
379 //!
380 //! \param xoscPowerMode (typically running in XOSC_IN_HIGH_POWER_MODE all the time).
381 //! - \ref XOSC_IN_HIGH_POWER_MODE : When xosc_hf is in HIGH_POWER_XOSC.
382 //! - \ref XOSC_IN_LOW_POWER_MODE : When xosc_hf is in LOW_POWER_XOSC.
383 //!
384 //! \return None
385 //
386 //*****************************************************************************
387 extern void SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode );
388
389 //*****************************************************************************
390 //
391 //! \brief Adjust Recharge calculations to be used next.
392 //!
393 //! Nothing to be done but keeping this function for platform compatibility.
394 //!
395 //! \return None
396 //
397 //*****************************************************************************
398 extern void SysCtrlAdjustRechargeAfterPowerDown( uint32_t vddrRechargeMargin );
399
400 //*****************************************************************************
401 //
402 //! \brief Turns DCDC on or off depending of what is considered to be optimal usage.
403 //!
404 //! This function controls the DCDC only if both the following CCFG settings are \c true:
405 //! - DCDC is configured to be used.
406 //! - Alternative DCDC settings are defined and enabled.
407 //!
408 //! The DCDC is configured in accordance to the CCFG settings when turned on.
409 //!
410 //! This function should be called periodically.
411 //!
412 //! \return None
413 //
414 //*****************************************************************************
415 extern void SysCtrl_DCDC_VoltageConditionalControl( void );
416
417 //*****************************************************************************
418 // \name Return values from calling SysCtrlResetSourceGet()
419 //@{
420 //*****************************************************************************
421 #define RSTSRC_PWR_ON (( AON_PMCTL_RESETCTL_RESET_SRC_PWR_ON ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
422 #define RSTSRC_PIN_RESET (( AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
423 #define RSTSRC_VDDS_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
424 #define RSTSRC_VDDR_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
425 #define RSTSRC_CLK_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
426 #define RSTSRC_SYSRESET (( AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
427 #define RSTSRC_WARMRESET (( AON_PMCTL_RESETCTL_RESET_SRC_WARMRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
428 #define RSTSRC_WAKEUP_FROM_SHUTDOWN ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 1 )
429 #define RSTSRC_WAKEUP_FROM_TCK_NOISE ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 2 )
430 //@}
431
432 //*****************************************************************************
433 //
434 //! \brief Returns the reset source (including "wakeup from shutdown").
435 //!
436 //! In case of \ref RSTSRC_WAKEUP_FROM_SHUTDOWN the application is
437 //! responsible for unlatching the outputs (disable pad sleep).
438 //! See \ref PowerCtrlPadSleepDisable() for more information.
439 //!
440 //! \return Returns the reset source.
441 //! - \ref RSTSRC_PWR_ON
442 //! - \ref RSTSRC_PIN_RESET
443 //! - \ref RSTSRC_VDDS_LOSS
444 //! - \ref RSTSRC_VDDR_LOSS
445 //! - \ref RSTSRC_CLK_LOSS
446 //! - \ref RSTSRC_SYSRESET
447 //! - \ref RSTSRC_WARMRESET
448 //! - \ref RSTSRC_WAKEUP_FROM_SHUTDOWN
449 //! - \ref RSTSRC_WAKEUP_FROM_TCK_NOISE
450 //
451 //*****************************************************************************
452 extern uint32_t SysCtrlResetSourceGet( void );
453
454 //*****************************************************************************
455 //
456 //! \brief Perform a full system reset.
457 //!
458 //! \return The chip will reset and hence never return from this call.
459 //
460 //*****************************************************************************
461 __STATIC_INLINE void
SysCtrlSystemReset(void)462 SysCtrlSystemReset( void )
463 {
464 // Disable CPU interrupts
465 CPUcpsid();
466 // Write reset register
467 HWREGBITW( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL, AON_PMCTL_RESETCTL_SYSRESET_BITN ) = 1;
468 // Finally, wait until the above write propagates
469 while ( 1 ) {
470 // Do nothing, just wait for the reset (and never return from here)
471 }
472 }
473
474 //*****************************************************************************
475 //
476 //! \brief Enables reset if OSC clock loss event is asserted.
477 //!
478 //! Clock loss circuit in analog domain must be enabled as well in order to
479 //! actually enable for a clock loss reset to occur
480 //! \ref OSCClockLossEventEnable().
481 //!
482 //! \note This function shall typically not be called because the clock loss
483 //! reset functionality is controlled by the boot code (a factory configuration
484 //! defines whether it is set or not).
485 //!
486 //! \return None
487 //!
488 //! \sa \ref SysCtrlClockLossResetDisable(), \ref OSCClockLossEventEnable()
489 //
490 //*****************************************************************************
491 __STATIC_INLINE void
SysCtrlClockLossResetEnable(void)492 SysCtrlClockLossResetEnable(void)
493 {
494 // Set clock loss enable bit in AON_SYSCTRL using bit banding
495 HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL, AON_PMCTL_RESETCTL_CLK_LOSS_EN_BITN) = 1;
496 }
497
498 //*****************************************************************************
499 //
500 //! \brief Disables reset due to OSC clock loss event.
501 //!
502 //! \note This function shall typically not be called because the clock loss
503 //! reset functionality is controlled by the boot code (a factory configuration
504 //! defines whether it is set or not).
505 //!
506 //! \return None
507 //!
508 //! \sa \ref SysCtrlClockLossResetEnable()
509 //
510 //*****************************************************************************
511 __STATIC_INLINE void
SysCtrlClockLossResetDisable(void)512 SysCtrlClockLossResetDisable(void)
513 {
514 // Clear clock loss enable bit in AON_SYSCTRL using bit banding
515 HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL, AON_PMCTL_RESETCTL_CLK_LOSS_EN_BITN) = 0;
516 }
517
518 //*****************************************************************************
519 //
520 // Support for DriverLib in ROM:
521 // Redirect to implementation in ROM when available.
522 //
523 //*****************************************************************************
524 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
525 #include "../driverlib/rom.h"
526 #ifdef ROM_SysCtrlIdle
527 #undef SysCtrlIdle
528 #define SysCtrlIdle ROM_SysCtrlIdle
529 #endif
530 #ifdef ROM_SysCtrlShutdownWithAbort
531 #undef SysCtrlShutdownWithAbort
532 #define SysCtrlShutdownWithAbort ROM_SysCtrlShutdownWithAbort
533 #endif
534 #ifdef ROM_SysCtrlShutdown
535 #undef SysCtrlShutdown
536 #define SysCtrlShutdown ROM_SysCtrlShutdown
537 #endif
538 #ifdef ROM_SysCtrlStandby
539 #undef SysCtrlStandby
540 #define SysCtrlStandby ROM_SysCtrlStandby
541 #endif
542 #ifdef ROM_SysCtrlSetRechargeBeforePowerDown
543 #undef SysCtrlSetRechargeBeforePowerDown
544 #define SysCtrlSetRechargeBeforePowerDown ROM_SysCtrlSetRechargeBeforePowerDown
545 #endif
546 #ifdef ROM_SysCtrlAdjustRechargeAfterPowerDown
547 #undef SysCtrlAdjustRechargeAfterPowerDown
548 #define SysCtrlAdjustRechargeAfterPowerDown ROM_SysCtrlAdjustRechargeAfterPowerDown
549 #endif
550 #ifdef ROM_SysCtrl_DCDC_VoltageConditionalControl
551 #undef SysCtrl_DCDC_VoltageConditionalControl
552 #define SysCtrl_DCDC_VoltageConditionalControl ROM_SysCtrl_DCDC_VoltageConditionalControl
553 #endif
554 #ifdef ROM_SysCtrlResetSourceGet
555 #undef SysCtrlResetSourceGet
556 #define SysCtrlResetSourceGet ROM_SysCtrlResetSourceGet
557 #endif
558 #endif
559
560 //*****************************************************************************
561 //
562 // Mark the end of the C bindings section for C++ compilers.
563 //
564 //*****************************************************************************
565 #ifdef __cplusplus
566 }
567 #endif
568
569 #endif // __SYSCTRL_H__
570
571 //*****************************************************************************
572 //
573 //! Close the Doxygen group.
574 //! @}
575 //! @}
576 //
577 //*****************************************************************************
578