1 /******************************************************************************
2 *  Filename:       hw_vims_h
3 *  Revised:        2018-05-14 12:24:52 +0200 (Mon, 14 May 2018)
4 *  Revision:       51990
5 *
6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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35 ******************************************************************************/
36 
37 #ifndef __HW_VIMS_H__
38 #define __HW_VIMS_H__
39 
40 //*****************************************************************************
41 //
42 // This section defines the register offsets of
43 // VIMS component
44 //
45 //*****************************************************************************
46 // Status
47 #define VIMS_O_STAT                                                 0x00000000
48 
49 // Control
50 #define VIMS_O_CTL                                                  0x00000004
51 
52 //*****************************************************************************
53 //
54 // Register: VIMS_O_STAT
55 //
56 //*****************************************************************************
57 // Field:     [5] IDCODE_LB_DIS
58 //
59 // Icode/Dcode flash line buffer status
60 //
61 // 0: Enabled or in transition to disabled
62 // 1: Disabled and flushed
63 #define VIMS_STAT_IDCODE_LB_DIS                                     0x00000020
64 #define VIMS_STAT_IDCODE_LB_DIS_BITN                                         5
65 #define VIMS_STAT_IDCODE_LB_DIS_M                                   0x00000020
66 #define VIMS_STAT_IDCODE_LB_DIS_S                                            5
67 
68 // Field:     [4] SYSBUS_LB_DIS
69 //
70 // Sysbus flash line buffer control
71 //
72 // 0: Enabled or in transition to disabled
73 // 1: Disabled and flushed
74 #define VIMS_STAT_SYSBUS_LB_DIS                                     0x00000010
75 #define VIMS_STAT_SYSBUS_LB_DIS_BITN                                         4
76 #define VIMS_STAT_SYSBUS_LB_DIS_M                                   0x00000010
77 #define VIMS_STAT_SYSBUS_LB_DIS_S                                            4
78 
79 // Field:     [3] MODE_CHANGING
80 //
81 // VIMS mode change status
82 //
83 // 0: VIMS is in the mode defined by MODE
84 // 1: VIMS is in the process of changing to the mode given in CTL.MODE
85 #define VIMS_STAT_MODE_CHANGING                                     0x00000008
86 #define VIMS_STAT_MODE_CHANGING_BITN                                         3
87 #define VIMS_STAT_MODE_CHANGING_M                                   0x00000008
88 #define VIMS_STAT_MODE_CHANGING_S                                            3
89 
90 // Field:     [2] INV
91 //
92 // This bit is set when invalidation of the cache memory is active / ongoing
93 #define VIMS_STAT_INV                                               0x00000004
94 #define VIMS_STAT_INV_BITN                                                   2
95 #define VIMS_STAT_INV_M                                             0x00000004
96 #define VIMS_STAT_INV_S                                                      2
97 
98 // Field:   [1:0] MODE
99 //
100 // Current VIMS mode
101 // ENUMs:
102 // OFF                      VIMS Off mode
103 // CACHE                    VIMS Cache mode
104 // GPRAM                    VIMS GPRAM mode
105 #define VIMS_STAT_MODE_W                                                     2
106 #define VIMS_STAT_MODE_M                                            0x00000003
107 #define VIMS_STAT_MODE_S                                                     0
108 #define VIMS_STAT_MODE_OFF                                          0x00000003
109 #define VIMS_STAT_MODE_CACHE                                        0x00000001
110 #define VIMS_STAT_MODE_GPRAM                                        0x00000000
111 
112 //*****************************************************************************
113 //
114 // Register: VIMS_O_CTL
115 //
116 //*****************************************************************************
117 // Field:    [31] STATS_CLR
118 //
119 // Set this bit to clear statistic counters.
120 #define VIMS_CTL_STATS_CLR                                          0x80000000
121 #define VIMS_CTL_STATS_CLR_BITN                                             31
122 #define VIMS_CTL_STATS_CLR_M                                        0x80000000
123 #define VIMS_CTL_STATS_CLR_S                                                31
124 
125 // Field:    [30] STATS_EN
126 //
127 // Set this bit to enable statistic counters.
128 #define VIMS_CTL_STATS_EN                                           0x40000000
129 #define VIMS_CTL_STATS_EN_BITN                                              30
130 #define VIMS_CTL_STATS_EN_M                                         0x40000000
131 #define VIMS_CTL_STATS_EN_S                                                 30
132 
133 // Field:    [29] DYN_CG_EN
134 //
135 // 0: The in-built clock gate functionality is bypassed.
136 // 1: The in-built clock gate functionality is enabled, automatically gating
137 // the clock when not needed.
138 #define VIMS_CTL_DYN_CG_EN                                          0x20000000
139 #define VIMS_CTL_DYN_CG_EN_BITN                                             29
140 #define VIMS_CTL_DYN_CG_EN_M                                        0x20000000
141 #define VIMS_CTL_DYN_CG_EN_S                                                29
142 
143 // Field:     [5] IDCODE_LB_DIS
144 //
145 // Icode/Dcode flash line buffer control
146 //
147 // 0: Enable
148 // 1: Disable
149 #define VIMS_CTL_IDCODE_LB_DIS                                      0x00000020
150 #define VIMS_CTL_IDCODE_LB_DIS_BITN                                          5
151 #define VIMS_CTL_IDCODE_LB_DIS_M                                    0x00000020
152 #define VIMS_CTL_IDCODE_LB_DIS_S                                             5
153 
154 // Field:     [4] SYSBUS_LB_DIS
155 //
156 // Sysbus flash line buffer control
157 //
158 // 0: Enable
159 // 1: Disable
160 #define VIMS_CTL_SYSBUS_LB_DIS                                      0x00000010
161 #define VIMS_CTL_SYSBUS_LB_DIS_BITN                                          4
162 #define VIMS_CTL_SYSBUS_LB_DIS_M                                    0x00000010
163 #define VIMS_CTL_SYSBUS_LB_DIS_S                                             4
164 
165 // Field:     [3] ARB_CFG
166 //
167 // Icode/Dcode and sysbus arbitation scheme
168 //
169 // 0: Static arbitration  (icode/docde > sysbus)
170 // 1: Round-robin arbitration
171 #define VIMS_CTL_ARB_CFG                                            0x00000008
172 #define VIMS_CTL_ARB_CFG_BITN                                                3
173 #define VIMS_CTL_ARB_CFG_M                                          0x00000008
174 #define VIMS_CTL_ARB_CFG_S                                                   3
175 
176 // Field:     [2] PREF_EN
177 //
178 // Tag prefetch control
179 //
180 // 0: Disabled
181 // 1: Enabled
182 #define VIMS_CTL_PREF_EN                                            0x00000004
183 #define VIMS_CTL_PREF_EN_BITN                                                2
184 #define VIMS_CTL_PREF_EN_M                                          0x00000004
185 #define VIMS_CTL_PREF_EN_S                                                   2
186 
187 // Field:   [1:0] MODE
188 //
189 // VIMS mode request.
190 // Write accesses to this field will be blocked while STAT.MODE_CHANGING is set
191 // to 1.
192 // ENUMs:
193 // OFF                      VIMS Off mode
194 // CACHE                    VIMS Cache mode
195 // GPRAM                    VIMS GPRAM mode
196 #define VIMS_CTL_MODE_W                                                      2
197 #define VIMS_CTL_MODE_M                                             0x00000003
198 #define VIMS_CTL_MODE_S                                                      0
199 #define VIMS_CTL_MODE_OFF                                           0x00000003
200 #define VIMS_CTL_MODE_CACHE                                         0x00000001
201 #define VIMS_CTL_MODE_GPRAM                                         0x00000000
202 
203 
204 #endif // __VIMS__
205