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Searched defs:VCCR (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K118_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K142W_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K144W_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K146_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K144_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K148_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K142_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h9617 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h9619 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12134 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h10456 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h12032 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12137 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12140 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h12036 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h12034 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h12397 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h12400 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h15316 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h16322 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h16316 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h13913 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h13913 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h15132 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member

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