1 /****************************************************************************//**
2 * @file usci_spi.c
3 * @version V3.00
4 * @brief USCI_SPI driver source file
5 *
6 * @copyright SPDX-License-Identifier: Apache-2.0
7 * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #include "NuMicro.h"
10
11 /** @addtogroup Standard_Driver Standard Driver
12 @{
13 */
14
15 /** @addtogroup USCI_SPI_Driver USCI_SPI Driver
16 @{
17 */
18
19
20 /** @addtogroup USCI_SPI_EXPORTED_FUNCTIONS USCI_SPI Exported Functions
21 @{
22 */
23
24 /**
25 * @brief This function make USCI_SPI module be ready to transfer.
26 * By default, the USCI_SPI transfer sequence is MSB first, the slave selection
27 * signal is active low and the automatic slave select function is disabled. In
28 * Slave mode, the u32BusClock must be NULL and the USCI_SPI clock
29 * divider setting will be 0.
30 * @param[in] uspi The pointer of the specified USCI_SPI module.
31 * @param[in] u32MasterSlave Decide the USCI_SPI module is operating in master mode or in slave mode. Valid values are:
32 * - \ref USPI_SLAVE
33 * - \ref USPI_MASTER
34 * @param[in] u32SPIMode Decide the transfer timing. Valid values are:
35 * - \ref USPI_MODE_0
36 * - \ref USPI_MODE_1
37 * - \ref USPI_MODE_2
38 * - \ref USPI_MODE_3
39 * @param[in] u32DataWidth The data width of a USCI_SPI transaction.
40 * @param[in] u32BusClock The expected frequency of USCI_SPI bus clock in Hz.
41 * @return Actual frequency of USCI_SPI peripheral clock.
42 */
USPI_Open(USPI_T * uspi,uint32_t u32MasterSlave,uint32_t u32SPIMode,uint32_t u32DataWidth,uint32_t u32BusClock)43 uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
44 {
45 uint32_t u32ClkDiv = 0UL;
46 uint32_t u32Pclk;
47 uint32_t u32RetValue = 0UL;
48
49 if((uspi == USPI0) || (uspi == USPI0_NS))
50 {
51 u32Pclk = CLK_GetPCLK0Freq();
52 }
53 else
54 {
55 u32Pclk = CLK_GetPCLK1Freq();
56 }
57
58 if(u32BusClock != 0UL)
59 {
60 u32ClkDiv = (uint32_t)((((((u32Pclk / 2UL) * 10UL) / (u32BusClock)) + 5UL) / 10UL) - 1UL); /* Compute proper divider for USCI_SPI clock */
61 }
62
63 /* Enable USCI_SPI protocol */
64 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
65 uspi->CTL = 1UL << USPI_CTL_FUNMODE_Pos;
66
67 /* Data format configuration */
68 if(u32DataWidth == 16UL)
69 {
70 u32DataWidth = 0UL;
71 }
72 uspi->LINECTL &= ~USPI_LINECTL_DWIDTH_Msk;
73 uspi->LINECTL |= (u32DataWidth << USPI_LINECTL_DWIDTH_Pos);
74
75 /* MSB data format */
76 uspi->LINECTL &= ~USPI_LINECTL_LSB_Msk;
77
78 /* Set slave selection signal active low */
79 if(u32MasterSlave == USPI_MASTER)
80 {
81 uspi->LINECTL |= USPI_LINECTL_CTLOINV_Msk;
82 }
83 else
84 {
85 uspi->CTLIN0 |= USPI_CTLIN0_ININV_Msk;
86 }
87
88 /* Set operating mode and transfer timing */
89 uspi->PROTCTL &= ~(USPI_PROTCTL_SCLKMODE_Msk | USPI_PROTCTL_AUTOSS_Msk | USPI_PROTCTL_SLAVE_Msk);
90 uspi->PROTCTL |= (u32MasterSlave | u32SPIMode);
91
92 /* Set USCI_SPI bus clock */
93 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
94 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
95 uspi->PROTCTL |= USPI_PROTCTL_PROTEN_Msk;
96
97 if(u32BusClock != 0UL)
98 {
99 u32RetValue = (u32Pclk / ((u32ClkDiv + 1UL) << 1UL));
100 }
101 else
102 {
103 u32RetValue = 0UL;
104 }
105
106 return u32RetValue;
107 }
108
109 /**
110 * @brief Disable USCI_SPI function mode.
111 * @param[in] uspi The pointer of the specified USCI_SPI module.
112 * @return None
113 */
USPI_Close(USPI_T * uspi)114 void USPI_Close(USPI_T *uspi)
115 {
116 uspi->CTL &= ~USPI_CTL_FUNMODE_Msk;
117 }
118
119 /**
120 * @brief Clear Rx buffer.
121 * @param[in] uspi The pointer of the specified USCI_SPI module.
122 * @return None
123 */
USPI_ClearRxBuf(USPI_T * uspi)124 void USPI_ClearRxBuf(USPI_T *uspi)
125 {
126 uspi->BUFCTL |= USPI_BUFCTL_RXCLR_Msk;
127 }
128
129 /**
130 * @brief Clear Tx buffer.
131 * @param[in] uspi The pointer of the specified USCI_SPI module.
132 * @return None
133 */
USPI_ClearTxBuf(USPI_T * uspi)134 void USPI_ClearTxBuf(USPI_T *uspi)
135 {
136 uspi->BUFCTL |= USPI_BUFCTL_TXCLR_Msk;
137 }
138
139 /**
140 * @brief Disable the automatic slave select function.
141 * @param[in] uspi The pointer of the specified USCI_SPI module.
142 * @return None
143 */
USPI_DisableAutoSS(USPI_T * uspi)144 void USPI_DisableAutoSS(USPI_T *uspi)
145 {
146 uspi->PROTCTL &= ~(USPI_PROTCTL_AUTOSS_Msk | USPI_PROTCTL_SS_Msk);
147 }
148
149 /**
150 * @brief Enable the automatic slave select function. Only available in Master mode.
151 * @param[in] uspi The pointer of the specified USCI_SPI module.
152 * @param[in] u32SSPinMask This parameter is not used.
153 * @param[in] u32ActiveLevel The active level of slave select signal. Valid values are:
154 * - \ref USPI_SS_ACTIVE_HIGH
155 * - \ref USPI_SS_ACTIVE_LOW
156 * @return None
157 */
USPI_EnableAutoSS(USPI_T * uspi,uint32_t u32SSPinMask,uint32_t u32ActiveLevel)158 void USPI_EnableAutoSS(USPI_T *uspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
159 {
160 (void)u32SSPinMask;
161 uspi->LINECTL = (uspi->LINECTL & ~USPI_LINECTL_CTLOINV_Msk) | u32ActiveLevel;
162 uspi->PROTCTL |= USPI_PROTCTL_AUTOSS_Msk;
163 }
164
165 /**
166 * @brief Set the USCI_SPI bus clock. Only available in Master mode.
167 * @param[in] uspi The pointer of the specified USCI_SPI module.
168 * @param[in] u32BusClock The expected frequency of USCI_SPI bus clock.
169 * @return Actual frequency of USCI_SPI peripheral clock.
170 */
USPI_SetBusClock(USPI_T * uspi,uint32_t u32BusClock)171 uint32_t USPI_SetBusClock(USPI_T *uspi, uint32_t u32BusClock)
172 {
173 uint32_t u32ClkDiv;
174 uint32_t u32Pclk;
175
176 if((uspi == USPI0) || (uspi == USPI0_NS))
177 {
178 u32Pclk = CLK_GetPCLK0Freq();
179 }
180 else
181 {
182 u32Pclk = CLK_GetPCLK1Freq();
183 }
184
185 u32ClkDiv = (uint32_t)((((((u32Pclk / 2UL) * 10UL) / (u32BusClock)) + 5UL) / 10UL) - 1UL); /* Compute proper divider for USCI_SPI clock */
186
187 /* Set USCI_SPI bus clock */
188 uspi->BRGEN &= ~USPI_BRGEN_CLKDIV_Msk;
189 uspi->BRGEN |= (u32ClkDiv << USPI_BRGEN_CLKDIV_Pos);
190
191 return (u32Pclk / ((u32ClkDiv + 1UL) << 1UL));
192 }
193
194 /**
195 * @brief Get the actual frequency of USCI_SPI bus clock. Only available in Master mode.
196 * @param[in] uspi The pointer of the specified USCI_SPI module.
197 * @return Actual USCI_SPI bus clock frequency.
198 */
USPI_GetBusClock(USPI_T * uspi)199 uint32_t USPI_GetBusClock(USPI_T *uspi)
200 {
201 uint32_t u32ClkDiv, u32BusClk;
202
203 u32ClkDiv = (uspi->BRGEN & USPI_BRGEN_CLKDIV_Msk) >> USPI_BRGEN_CLKDIV_Pos;
204
205 if((uspi == USPI0) || (uspi == USPI0_NS))
206 {
207 u32BusClk = (CLK_GetPCLK0Freq() / ((u32ClkDiv + 1UL) << 1UL));
208 }
209 else
210 {
211 u32BusClk = (CLK_GetPCLK1Freq() / ((u32ClkDiv + 1UL) << 1UL));
212 }
213
214 return u32BusClk;
215 }
216
217 /**
218 * @brief Enable related interrupts specified by u32Mask parameter.
219 * @param[in] uspi The pointer of the specified USCI_SPI module.
220 * @param[in] u32Mask The combination of all related interrupt enable bits.
221 * Each bit corresponds to a interrupt bit.
222 * This parameter decides which interrupts will be enabled. Valid values are:
223 * - \ref USPI_SSINACT_INT_MASK
224 * - \ref USPI_SSACT_INT_MASK
225 * - \ref USPI_SLVTO_INT_MASK
226 * - \ref USPI_SLVBE_INT_MASK
227 * - \ref USPI_TXUDR_INT_MASK
228 * - \ref USPI_RXOV_INT_MASK
229 * - \ref USPI_TXST_INT_MASK
230 * - \ref USPI_TXEND_INT_MASK
231 * - \ref USPI_RXST_INT_MASK
232 * - \ref USPI_RXEND_INT_MASK
233 * @return None
234 */
USPI_EnableInt(USPI_T * uspi,uint32_t u32Mask)235 void USPI_EnableInt(USPI_T *uspi, uint32_t u32Mask)
236 {
237 /* Enable slave selection signal inactive interrupt flag */
238 if((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK)
239 {
240 uspi->PROTIEN |= USPI_PROTIEN_SSINAIEN_Msk;
241 }
242
243 /* Enable slave selection signal active interrupt flag */
244 if((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK)
245 {
246 uspi->PROTIEN |= USPI_PROTIEN_SSACTIEN_Msk;
247 }
248
249 /* Enable slave time-out interrupt flag */
250 if((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK)
251 {
252 uspi->PROTIEN |= USPI_PROTIEN_SLVTOIEN_Msk;
253 }
254
255 /* Enable slave bit count error interrupt flag */
256 if((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK)
257 {
258 uspi->PROTIEN |= USPI_PROTIEN_SLVBEIEN_Msk;
259 }
260
261 /* Enable TX under run interrupt flag */
262 if((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK)
263 {
264 uspi->BUFCTL |= USPI_BUFCTL_TXUDRIEN_Msk;
265 }
266
267 /* Enable RX overrun interrupt flag */
268 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
269 {
270 uspi->BUFCTL |= USPI_BUFCTL_RXOVIEN_Msk;
271 }
272
273 /* Enable TX start interrupt flag */
274 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
275 {
276 uspi->INTEN |= USPI_INTEN_TXSTIEN_Msk;
277 }
278
279 /* Enable TX end interrupt flag */
280 if((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK)
281 {
282 uspi->INTEN |= USPI_INTEN_TXENDIEN_Msk;
283 }
284
285 /* Enable RX start interrupt flag */
286 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
287 {
288 uspi->INTEN |= USPI_INTEN_RXSTIEN_Msk;
289 }
290
291 /* Enable RX end interrupt flag */
292 if((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK)
293 {
294 uspi->INTEN |= USPI_INTEN_RXENDIEN_Msk;
295 }
296 }
297
298 /**
299 * @brief Disable related interrupts specified by u32Mask parameter.
300 * @param[in] uspi The pointer of the specified USCI_SPI module.
301 * @param[in] u32Mask The combination of all related interrupt enable bits.
302 * Each bit corresponds to a interrupt bit.
303 * This parameter decides which interrupts will be disabled. Valid values are:
304 * - \ref USPI_SSINACT_INT_MASK
305 * - \ref USPI_SSACT_INT_MASK
306 * - \ref USPI_SLVTO_INT_MASK
307 * - \ref USPI_SLVBE_INT_MASK
308 * - \ref USPI_TXUDR_INT_MASK
309 * - \ref USPI_RXOV_INT_MASK
310 * - \ref USPI_TXST_INT_MASK
311 * - \ref USPI_TXEND_INT_MASK
312 * - \ref USPI_RXST_INT_MASK
313 * - \ref USPI_RXEND_INT_MASK
314 * @return None
315 */
USPI_DisableInt(USPI_T * uspi,uint32_t u32Mask)316 void USPI_DisableInt(USPI_T *uspi, uint32_t u32Mask)
317 {
318 /* Disable slave selection signal inactive interrupt flag */
319 if((u32Mask & USPI_SSINACT_INT_MASK) == USPI_SSINACT_INT_MASK)
320 {
321 uspi->PROTIEN &= ~USPI_PROTIEN_SSINAIEN_Msk;
322 }
323
324 /* Disable slave selection signal active interrupt flag */
325 if((u32Mask & USPI_SSACT_INT_MASK) == USPI_SSACT_INT_MASK)
326 {
327 uspi->PROTIEN &= ~USPI_PROTIEN_SSACTIEN_Msk;
328 }
329
330 /* Disable slave time-out interrupt flag */
331 if((u32Mask & USPI_SLVTO_INT_MASK) == USPI_SLVTO_INT_MASK)
332 {
333 uspi->PROTIEN &= ~USPI_PROTIEN_SLVTOIEN_Msk;
334 }
335
336 /* Disable slave bit count error interrupt flag */
337 if((u32Mask & USPI_SLVBE_INT_MASK) == USPI_SLVBE_INT_MASK)
338 {
339 uspi->PROTIEN &= ~USPI_PROTIEN_SLVBEIEN_Msk;
340 }
341
342 /* Disable TX under run interrupt flag */
343 if((u32Mask & USPI_TXUDR_INT_MASK) == USPI_TXUDR_INT_MASK)
344 {
345 uspi->BUFCTL &= ~USPI_BUFCTL_TXUDRIEN_Msk;
346 }
347
348 /* Disable RX overrun interrupt flag */
349 if((u32Mask & USPI_RXOV_INT_MASK) == USPI_RXOV_INT_MASK)
350 {
351 uspi->BUFCTL &= ~USPI_BUFCTL_RXOVIEN_Msk;
352 }
353
354 /* Disable TX start interrupt flag */
355 if((u32Mask & USPI_TXST_INT_MASK) == USPI_TXST_INT_MASK)
356 {
357 uspi->INTEN &= ~USPI_INTEN_TXSTIEN_Msk;
358 }
359
360 /* Disable TX end interrupt flag */
361 if((u32Mask & USPI_TXEND_INT_MASK) == USPI_TXEND_INT_MASK)
362 {
363 uspi->INTEN &= ~USPI_INTEN_TXENDIEN_Msk;
364 }
365
366 /* Disable RX start interrupt flag */
367 if((u32Mask & USPI_RXST_INT_MASK) == USPI_RXST_INT_MASK)
368 {
369 uspi->INTEN &= ~USPI_INTEN_RXSTIEN_Msk;
370 }
371
372 /* Disable RX end interrupt flag */
373 if((u32Mask & USPI_RXEND_INT_MASK) == USPI_RXEND_INT_MASK)
374 {
375 uspi->INTEN &= ~USPI_INTEN_RXENDIEN_Msk;
376 }
377 }
378
379 /**
380 * @brief Get interrupt flag.
381 * @param[in] uspi The pointer of the specified USCI_SPI module.
382 * @param[in] u32Mask The combination of all related interrupt sources.
383 * Each bit corresponds to a interrupt source.
384 * This parameter decides which interrupt flags will be read. It is combination of:
385 * - \ref USPI_SSINACT_INT_MASK
386 * - \ref USPI_SSACT_INT_MASK
387 * - \ref USPI_SLVTO_INT_MASK
388 * - \ref USPI_SLVBE_INT_MASK
389 * - \ref USPI_TXUDR_INT_MASK
390 * - \ref USPI_RXOV_INT_MASK
391 * - \ref USPI_TXST_INT_MASK
392 * - \ref USPI_TXEND_INT_MASK
393 * - \ref USPI_RXST_INT_MASK
394 * - \ref USPI_RXEND_INT_MASK
395 * @return Interrupt flags of selected sources.
396 */
USPI_GetIntFlag(USPI_T * uspi,uint32_t u32Mask)397 uint32_t USPI_GetIntFlag(USPI_T *uspi, uint32_t u32Mask)
398 {
399 uint32_t u32ProtStatus, u32BufStatus;
400 uint32_t u32IntFlag = 0UL;
401
402 u32ProtStatus = uspi->PROTSTS;
403 u32BufStatus = uspi->BUFSTS;
404
405 /* Check slave selection signal inactive interrupt flag */
406 if((u32Mask & USPI_SSINACT_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_SSINAIF_Msk))
407 {
408 u32IntFlag |= USPI_SSINACT_INT_MASK;
409 }
410
411 /* Check slave selection signal active interrupt flag */
412 if((u32Mask & USPI_SSACT_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_SSACTIF_Msk))
413 {
414 u32IntFlag |= USPI_SSACT_INT_MASK;
415 }
416
417 /* Check slave time-out interrupt flag */
418 if((u32Mask & USPI_SLVTO_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_SLVTOIF_Msk))
419 {
420 u32IntFlag |= USPI_SLVTO_INT_MASK;
421 }
422
423 /* Check slave bit count error interrupt flag */
424 if((u32Mask & USPI_SLVBE_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_SLVBEIF_Msk))
425 {
426 u32IntFlag |= USPI_SLVBE_INT_MASK;
427 }
428
429 /* Check TX under run interrupt flag */
430 if((u32Mask & USPI_TXUDR_INT_MASK) && (u32BufStatus & USPI_BUFSTS_TXUDRIF_Msk))
431 {
432 u32IntFlag |= USPI_TXUDR_INT_MASK;
433 }
434
435 /* Check RX overrun interrupt flag */
436 if((u32Mask & USPI_RXOV_INT_MASK) && (u32BufStatus & USPI_BUFSTS_RXOVIF_Msk))
437 {
438 u32IntFlag |= USPI_RXOV_INT_MASK;
439 }
440
441 /* Check TX start interrupt flag */
442 if((u32Mask & USPI_TXST_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_TXSTIF_Msk))
443 {
444 u32IntFlag |= USPI_TXST_INT_MASK;
445 }
446
447 /* Check TX end interrupt flag */
448 if((u32Mask & USPI_TXEND_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_TXENDIF_Msk))
449 {
450 u32IntFlag |= USPI_TXEND_INT_MASK;
451 }
452
453 /* Check RX start interrupt flag */
454 if((u32Mask & USPI_RXST_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_RXSTIF_Msk))
455 {
456 u32IntFlag |= USPI_RXST_INT_MASK;
457 }
458
459 /* Check RX end interrupt flag */
460 if((u32Mask & USPI_RXEND_INT_MASK) && (u32ProtStatus & USPI_PROTSTS_RXENDIF_Msk))
461 {
462 u32IntFlag |= USPI_RXEND_INT_MASK;
463 }
464
465 return u32IntFlag;
466 }
467
468 /**
469 * @brief Clear interrupt flag.
470 * @param[in] uspi The pointer of the specified USCI_SPI module.
471 * @param[in] u32Mask The combination of all related interrupt sources.
472 * Each bit corresponds to a interrupt source.
473 * This parameter decides which interrupt flags will be cleared. It could be the combination of:
474 * - \ref USPI_SSINACT_INT_MASK
475 * - \ref USPI_SSACT_INT_MASK
476 * - \ref USPI_SLVTO_INT_MASK
477 * - \ref USPI_SLVBE_INT_MASK
478 * - \ref USPI_TXUDR_INT_MASK
479 * - \ref USPI_RXOV_INT_MASK
480 * - \ref USPI_TXST_INT_MASK
481 * - \ref USPI_TXEND_INT_MASK
482 * - \ref USPI_RXST_INT_MASK
483 * - \ref USPI_RXEND_INT_MASK
484 * @return None
485 */
USPI_ClearIntFlag(USPI_T * uspi,uint32_t u32Mask)486 void USPI_ClearIntFlag(USPI_T *uspi, uint32_t u32Mask)
487 {
488 /* Clear slave selection signal inactive interrupt flag */
489 if(u32Mask & USPI_SSINACT_INT_MASK)
490 {
491 uspi->PROTSTS = USPI_PROTSTS_SSINAIF_Msk;
492 }
493
494 /* Clear slave selection signal active interrupt flag */
495 if(u32Mask & USPI_SSACT_INT_MASK)
496 {
497 uspi->PROTSTS = USPI_PROTSTS_SSACTIF_Msk;
498 }
499
500 /* Clear slave time-out interrupt flag */
501 if(u32Mask & USPI_SLVTO_INT_MASK)
502 {
503 uspi->PROTSTS = USPI_PROTSTS_SLVTOIF_Msk;
504 }
505
506 /* Clear slave bit count error interrupt flag */
507 if(u32Mask & USPI_SLVBE_INT_MASK)
508 {
509 uspi->PROTSTS = USPI_PROTSTS_SLVBEIF_Msk;
510 }
511
512 /* Clear TX under run interrupt flag */
513 if(u32Mask & USPI_TXUDR_INT_MASK)
514 {
515 uspi->BUFSTS = USPI_BUFSTS_TXUDRIF_Msk;
516 }
517
518 /* Clear RX overrun interrupt flag */
519 if(u32Mask & USPI_RXOV_INT_MASK)
520 {
521 uspi->BUFSTS = USPI_BUFSTS_RXOVIF_Msk;
522 }
523
524 /* Clear TX start interrupt flag */
525 if(u32Mask & USPI_TXST_INT_MASK)
526 {
527 uspi->PROTSTS = USPI_PROTSTS_TXSTIF_Msk;
528 }
529
530 /* Clear TX end interrupt flag */
531 if(u32Mask & USPI_TXEND_INT_MASK)
532 {
533 uspi->PROTSTS = USPI_PROTSTS_TXENDIF_Msk;
534 }
535
536 /* Clear RX start interrupt flag */
537 if(u32Mask & USPI_RXST_INT_MASK)
538 {
539 uspi->PROTSTS = USPI_PROTSTS_RXSTIF_Msk;
540 }
541
542 /* Clear RX end interrupt flag */
543 if(u32Mask & USPI_RXEND_INT_MASK)
544 {
545 uspi->PROTSTS = USPI_PROTSTS_RXENDIF_Msk;
546 }
547 }
548
549 /**
550 * @brief Get USCI_SPI status.
551 * @param[in] uspi The pointer of the specified USCI_SPI module.
552 * @param[in] u32Mask The combination of all related sources.
553 * Each bit corresponds to a source.
554 * This parameter decides which flags will be read. It is combination of:
555 * - \ref USPI_BUSY_MASK
556 * - \ref USPI_RX_EMPTY_MASK
557 * - \ref USPI_RX_FULL_MASK
558 * - \ref USPI_TX_EMPTY_MASK
559 * - \ref USPI_TX_FULL_MASK
560 * - \ref USPI_SSLINE_STS_MASK
561 * @return Flags of selected sources.
562 */
USPI_GetStatus(USPI_T * uspi,uint32_t u32Mask)563 uint32_t USPI_GetStatus(USPI_T *uspi, uint32_t u32Mask)
564 {
565 uint32_t u32ProtStatus, u32BufStatus;
566 uint32_t u32Flag = 0UL;
567
568 u32ProtStatus = uspi->PROTSTS;
569 u32BufStatus = uspi->BUFSTS;
570
571 /* Check busy status */
572 if((u32Mask & USPI_BUSY_MASK) && (u32ProtStatus & USPI_PROTSTS_BUSY_Msk))
573 {
574 u32Flag |= USPI_BUSY_MASK;
575 }
576
577 /* Check RX empty flag */
578 if((u32Mask & USPI_RX_EMPTY_MASK) && (u32BufStatus & USPI_BUFSTS_RXEMPTY_Msk))
579 {
580 u32Flag |= USPI_RX_EMPTY_MASK;
581 }
582
583 /* Check RX full flag */
584 if((u32Mask & USPI_RX_FULL_MASK) && (u32BufStatus & USPI_BUFSTS_RXFULL_Msk))
585 {
586 u32Flag |= USPI_RX_FULL_MASK;
587 }
588
589 /* Check TX empty flag */
590 if((u32Mask & USPI_TX_EMPTY_MASK) && (u32BufStatus & USPI_BUFSTS_TXEMPTY_Msk))
591 {
592 u32Flag |= USPI_TX_EMPTY_MASK;
593 }
594
595 /* Check TX full flag */
596 if((u32Mask & USPI_TX_FULL_MASK) && (u32BufStatus & USPI_BUFSTS_TXFULL_Msk))
597 {
598 u32Flag |= USPI_TX_FULL_MASK;
599 }
600
601 /* Check USCI_SPI_SS line status */
602 if((u32Mask & USPI_SSLINE_STS_MASK) && (u32ProtStatus & USPI_PROTSTS_SSLINE_Msk))
603 {
604 u32Flag |= USPI_SSLINE_STS_MASK;
605 }
606
607 return u32Flag;
608 }
609
610 /**
611 * @brief Enable USCI_SPI Wake-up Function.
612 * @param[in] uspi The pointer of the specified USCI_SPI module.
613 * @return None
614 */
USPI_EnableWakeup(USPI_T * uspi)615 void USPI_EnableWakeup(USPI_T *uspi)
616 {
617 uspi->WKCTL |= USPI_WKCTL_WKEN_Msk;
618 }
619
620 /**
621 * @brief Disable USCI_SPI Wake-up Function.
622 * @param[in] uspi The pointer of the specified USCI_SPI module.
623 * @return None
624 */
USPI_DisableWakeup(USPI_T * uspi)625 void USPI_DisableWakeup(USPI_T *uspi)
626 {
627 uspi->WKCTL &= ~USPI_WKCTL_WKEN_Msk;
628 }
629
630 /**@}*/ /* end of group USCI_SPI_EXPORTED_FUNCTIONS */
631
632 /**@}*/ /* end of group USCI_SPI_Driver */
633
634 /**@}*/ /* end of group Standard_Driver */
635
