1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_flash.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_FLASH_H 21 #define STM32H7RSxx_HAL_FLASH_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup FLASH 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup FLASH_Exported_Types FLASH Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief FLASH Erase structure definition 45 */ 46 typedef struct 47 { 48 uint32_t TypeErase; /*!< Mass erase or page erase. 49 This parameter can be a value of @ref FLASH_Type_Erase */ 50 uint32_t Sector; /*!< Initial Flash sector to erase when sector erase is enabled 51 This parameter must be a value between 0 and (max number of sector - 1) 52 (eg : 15 for 128KB single bank) */ 53 uint32_t NbSectors; /*!< Number of sectors to be erased. 54 This parameter must be a value between 1 and 55 (max number of sectors - value of initial page)*/ 56 } FLASH_EraseInitTypeDef; 57 58 /** 59 * @brief FLASH Option Bytes Program structure definition 60 */ 61 #define FLASH_KEY_DATA_NB_REG (8U) /*!< 8 Key data registers */ 62 63 typedef struct 64 { 65 uint32_t OptionType; /*!< Option byte to be configured. 66 This parameter can be a combination of the values of @ref FLASH_OB_TYPE */ 67 uint32_t WRPState; /*!< Write protection activation or deactivation (used for OPTIONBYTE_WRP). 68 This parameter can be value of @ref FLASH_OB_WRP_STATE */ 69 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected (used for OPTIONBYTE_WRP). 70 The value of this parameter depend on device used within the same series */ 71 uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). 72 This parameter can be a combination of @ref FLASH_OB_USER_TYPE */ 73 uint32_t USERConfig1; /*!< Value of the user option byte (used for OPTIONBYTE_USER). 74 This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEV, 75 @ref FLASH_OB_USER_IWDG_SW, @ref FLASH_OB_USER_nRST_STOP, 76 @ref FLASH_OB_USER_nRST_STDBY, @ref FLASH_OB_USER_XSPI1_HSLV, 77 @ref FLASH_OB_USER_XSPI2_HSLV, @ref FLASH_OB_USER_IWDG_STOP, 78 @ref FLASH_OB_USER_IWDG_STANDBY, @ref FLASH_OB_USER_VDDIO_HSLV */ 79 uint32_t USERConfig2; /*!< Value of the user option byte (used for OPTIONBYTE_USER). 80 This parameter can be a combination of @ref FLASH_OB_USER_ITCM_AXI_SHARE, 81 @ref FLASH_OB_USER_DTCM_AXI_SHARE, @ref FLASH_OB_USER_ECC_ON_SRAM, 82 @ref FLASH_OB_USER_I2C_NI3C */ 83 uint32_t HDPStartPage; /*!< Start address that contains the first 256-byte block of HDP area (used for OPTIONBYTE_HDP). 84 This parameter must be a value between 0 or 0xFFF */ 85 uint32_t HDPEndPage; /*!< End address that contains the last 256-byte block of HDP area (used for OPTIONBYTE_HDP). 86 This parameter must be a value between 0 or 0xFFF */ 87 uint32_t NVState; /*!< Value of the non-volatile state (used for OPTIONBYTE_NV). 88 This parameter must be a value of @ref FLASH_OB_NVSTATE */ 89 uint32_t ROTConfig; /*!< Value of the RoT status (only used for read configuration). 90 This parameter can be a combination of @ref FLASH_OB_ROT_OEM_PROVD, 91 @ref FLASH_OB_ROT_DBG_AUTH, @ref FLASH_OB_ROT_IROT_SELECT */ 92 uint32_t EPOCH; /*!< Value of the epoch (only used for read configuration). 93 This parameter must be a value between 0x0 and 0xFFFFFF */ 94 } FLASH_OBProgramInitTypeDef; 95 96 /** 97 * @brief FLASH handle Structure definition 98 */ 99 typedef struct 100 { 101 HAL_LockTypeDef Lock; /* FLASH locking object */ 102 uint32_t ErrorCode; /* FLASH error code */ 103 uint32_t ProcedureOnGoing; /* Internal variable to indicate which procedure is ongoing or not in IT 104 context */ 105 uint32_t Address; /* Internal variable to save address selected for program in IT context */ 106 uint32_t Sector; /* Internal variable to define the current sector which is being erased in 107 IT context */ 108 uint32_t NbSectorsToErase; /* Internal variable to save the remaining sectors to erase in IT context */ 109 } FLASH_ProcessTypeDef; 110 111 /** 112 * @} 113 */ 114 115 /* Exported constants --------------------------------------------------------*/ 116 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 117 * @{ 118 */ 119 120 /** @defgroup FLASH_Flags FLASH Flags Definition 121 * @{ 122 */ 123 #define FLASH_FLAG_EOP FLASH_ISR_EOPF /*!< FLASH End of program flag */ 124 #define FLASH_FLAG_WRPERR FLASH_ISR_WRPERRF /*!< FLASH Write protection error flag */ 125 #define FLASH_FLAG_PGSERR FLASH_ISR_PGSERRF /*!< FLASH Programming sequence error flag */ 126 #define FLASH_FLAG_STRBERR FLASH_ISR_STRBERRF /*!< FLASH Strobe error flag */ 127 #define FLASH_FLAG_OBLERR FLASH_ISR_OBLERRF /*!< FLASH Option byte loading error flag */ 128 #define FLASH_FLAG_INCERR FLASH_ISR_INCERRF /*!< FLASH Inconsistency error flag */ 129 #define FLASH_FLAG_RDSERR FLASH_ISR_RDSERRF /*!< FLASH Read security error flag */ 130 #define FLASH_FLAG_SNECCERR FLASH_ISR_SNECCERRF /*!< FLASH ECC single error flag */ 131 #define FLASH_FLAG_DBECCERR FLASH_ISR_DBECCERRF /*!< FLASH ECC double error flag */ 132 #define FLASH_FLAG_CRCEND FLASH_ISR_CRCENDF /*!< FLASH CRC end of calculation flag */ 133 #define FLASH_FLAG_CRCERR FLASH_ISR_CRCRDERRF /*!< FLASH CRC error flag */ 134 #define FLASH_FLAG_KVERR FLASH_OPTISR_KVEF /*!< FLASH Key valid error flag */ 135 #define FLASH_FLAG_KTERR FLASH_OPTISR_KTEF /*!< FLASH Key transfer error flag */ 136 #define FLASH_FLAG_OPTERR FLASH_OPTISR_OPTERRF /*!< FLASH Options byte change error flag */ 137 138 #define FLASH_FLAG_ISR_ERRORS (FLASH_FLAG_WRPERR | FLASH_FLAG_PGSERR | FLASH_FLAG_STRBERR | \ 139 FLASH_FLAG_OBLERR | FLASH_FLAG_INCERR | FLASH_FLAG_RDSERR | \ 140 FLASH_FLAG_CRCERR) 141 #define FLASH_FLAG_ECC_ERRORS (FLASH_FLAG_SNECCERR | FLASH_FLAG_DBECCERR) 142 #define FLASH_FLAG_OPTISR_ERRORS (FLASH_FLAG_KVERR | FLASH_FLAG_KTERR | FLASH_FLAG_OPTERR) 143 #define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_ISR_ERRORS | FLASH_FLAG_ECC_ERRORS | FLASH_FLAG_OPTISR_ERRORS) 144 145 #define FLASH_FLAG_ISR_FLAGS (FLASH_FLAG_ISR_ERRORS | FLASH_FLAG_ECC_ERRORS | FLASH_FLAG_EOP) 146 /** 147 * @} 148 */ 149 150 /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition 151 * @brief FLASH Interrupt definition 152 * @{ 153 */ 154 #define FLASH_IT_EOP FLASH_IER_EOPIE /*!< End of program interrupt source */ 155 #define FLASH_IT_WRPERR FLASH_IER_WRPERRIE /*!< FLASH Write protection error interrupt source */ 156 #define FLASH_IT_PGSERR FLASH_IER_PGSERRIE /*!< FLASH Programming sequence error interrupt source */ 157 #define FLASH_IT_STRBERR FLASH_IER_STRBERRIE /*!< FLASH Strobe error interrupt source */ 158 #define FLASH_IT_OBLERR FLASH_IER_OBLERRIE /*!< FLASH Option byte loading error interrupt source */ 159 #define FLASH_IT_INCERR FLASH_IER_INCERRIE /*!< FLASH Inconsistency error interrupt source */ 160 #define FLASH_IT_RDSERR FLASH_IER_RDSERRIE /*!< FLASH Read security error interrupt source */ 161 #define FLASH_IT_SNECCERR FLASH_IER_SNECCERRIE /*!< FLASH ECC single error interrupt source */ 162 #define FLASH_IT_DBECCERR FLASH_IER_DBECCERRIE /*!< FLASH ECC double error interrupt source */ 163 #define FLASH_IT_CRCEND FLASH_IER_CRCENDIE /*!< FLASH CRC end of calculation interrupt source */ 164 #define FLASH_IT_CRCERR FLASH_IER_CRCRDERRIE /*!< FLASH CRC error interrupt source */ 165 #define FLASH_IT_KVERR FLASH_OPTCR_KVEIE /*!< FLASH Key valid error interrupt source */ 166 #define FLASH_IT_KTERR FLASH_OPTCR_KTEIE /*!< FLASH Key transfer error interrupt source */ 167 #define FLASH_IT_OPTERR FLASH_OPTCR_OPTERRIE /*!< FLASH Options byte change error interrupt source */ 168 169 #define FLASH_IT_IER (FLASH_IT_EOP | FLASH_IT_WRPERR | FLASH_IT_PGSERR | FLASH_IT_STRBERR | \ 170 FLASH_IT_OBLERR | FLASH_IT_INCERR | FLASH_IT_RDSERR | FLASH_IT_SNECCERR | \ 171 FLASH_IT_DBECCERR | FLASH_IT_CRCEND | FLASH_IT_CRCERR) 172 #define FLASH_IT_OPTCR (FLASH_IT_KVERR | FLASH_IT_KTERR | FLASH_IT_OPTERR) 173 /** 174 * @} 175 */ 176 177 /** @defgroup FLASH_Error FLASH Error 178 * @{ 179 */ 180 #define HAL_FLASH_ERROR_NONE 0x00000000U 181 #define HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR 182 #define HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR 183 #define HAL_FLASH_ERROR_STRB FLASH_FLAG_STRBERR 184 #define HAL_FLASH_ERROR_OBL FLASH_FLAG_OBLERR 185 #define HAL_FLASH_ERROR_INC FLASH_FLAG_INCERR 186 #define HAL_FLASH_ERROR_RDS FLASH_FLAG_RDSERR 187 #define HAL_FLASH_ERROR_SNECC FLASH_FLAG_SNECCERR 188 #define HAL_FLASH_ERROR_DBECC FLASH_FLAG_DBECCERR 189 #define HAL_FLASH_ERROR_CRC FLASH_FLAG_CRCERR 190 #define HAL_FLASH_ERROR_KV FLASH_FLAG_KVERR 191 #define HAL_FLASH_ERROR_KT FLASH_FLAG_KTERR 192 #define HAL_FLASH_ERROR_OPT FLASH_FLAG_OPTERR 193 /** 194 * @} 195 */ 196 197 /** @defgroup FLASH_Type_Erase FLASH Erase Type 198 * @{ 199 */ 200 #define FLASH_TYPEERASE_SECTORS FLASH_CR_SER /*!< Sectors erase activation */ 201 #define FLASH_TYPEERASE_MASSERASE FLASH_CR_BER /*!< Flash mass erase activation */ 202 /** 203 * @} 204 */ 205 206 /** @defgroup FLASH_Type_Program FLASH Program Type 207 * @{ 208 */ 209 #define FLASH_TYPEPROGRAM_BYTE (FLASH_CR_PG | FLASH_CR_FW) /*!< Program a byte (8-bit) at a specified address */ 210 #define FLASH_TYPEPROGRAM_HALFWORD (FLASH_HALFWORD_MASK | FLASH_CR_PG | FLASH_CR_FW) /*!< Program a half-word (16-bit) at a specified address */ 211 #define FLASH_TYPEPROGRAM_WORD (FLASH_WORD_MASK | FLASH_CR_PG | FLASH_CR_FW) /*!< Program a word (32-bit) at a specified address */ 212 #define FLASH_TYPEPROGRAM_DOUBLEWORD (FLASH_DOUBLEWORD_MASK | FLASH_CR_PG | FLASH_CR_FW) /*!< Program a double-word (64-bit) at a specified address */ 213 #define FLASH_TYPEPROGRAM_QUADWORD (FLASH_CR_PG) /*!< Program a quad-word (128-bit) at a specified address */ 214 #define FLASH_TYPEPROGRAM_OTP_HALFWORD (FLASH_HALFWORD_MASK | FLASH_CR_PG_OTP | FLASH_CR_FW) /*!< Program a half-word (16-bit) at a OTP address */ 215 #define FLASH_TYPEPROGRAM_OTP_WORD (FLASH_WORD_MASK | FLASH_CR_PG_OTP | FLASH_CR_FW) /*!< Program a word (32-bit) at a OTP address */ 216 /** 217 * @} 218 */ 219 220 /** @defgroup FLASH_OB_TYPE FLASH Option Bytes Type 221 * @{ 222 */ 223 #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */ 224 #define OPTIONBYTE_USER 0x00000002U /*!< User option byte configuration */ 225 #define OPTIONBYTE_HDP 0x00000004U /*!< HDP option byte configuration */ 226 #define OPTIONBYTE_NV 0x00000008U /*!< Non-Volatile State option byte configuration */ 227 /** 228 * @} 229 */ 230 231 /** @defgroup FLASH_OB_WRP_STATE FLASH Option Bytes WRP State 232 * @{ 233 */ 234 #define OB_WRPSTATE_DISABLE 0x00000000U /*!< Disable the write protection of the desired sectors */ 235 #define OB_WRPSTATE_ENABLE 0x00000001U /*!< Enable the write protection of the desired sectors */ 236 /** 237 * @} 238 */ 239 240 /** @defgroup FLASH_OB_USER_TYPE FLASH Option Bytes User Type 241 * @{ 242 */ 243 #define OB_USER_BOR_LEV 0x00000001U /*!< Brownout level */ 244 #define OB_USER_IWDG_SW 0x00000002U /*!< IWDG control mode */ 245 #define OB_USER_NRST_STOP 0x00000004U /*!< Stop entry reset */ 246 #define OB_USER_NRST_STDBY 0x00000008U /*!< Standby entry reset */ 247 #define OB_USER_XSPI1_HSLV 0x00000010U /*!< XSPI1 High-speed at low voltage */ 248 #define OB_USER_XSPI2_HSLV 0x00000020U /*!< XSPI2 High-speed at low voltage */ 249 #define OB_USER_IWDG_STOP 0x00000040U /*!< IWDG Stop mode freeze */ 250 #define OB_USER_IWDG_STDBY 0x00000080U /*!< IWDG Standby mode freeze */ 251 #define OB_USER_VDDIO_HSLV 0x00000100U /*!< I/O High-speed at low voltage */ 252 #define OB_USER_ITCM_AXI_SHARE 0x00000200U /*!< ITCM AXI share */ 253 #define OB_USER_DTCM_AXI_SHARE 0x00000400U /*!< DTCM AXI share */ 254 #define OB_USER_SRAM_ECC 0x00000800U /*!< ECC on SRAM */ 255 #define OB_USER_I2C_NI3C 0x00001000U /*!< I2C Not I3C */ 256 /** 257 * @} 258 */ 259 260 /** @defgroup FLASH_OB_USER_BOR_LEV FLASH Option Bytes User BOR Level 261 * @{ 262 */ 263 #define OB_BOR_LEVEL_0 0x00000000U /*!< BOR OFF, POR/PDR reset threshold level is applied */ 264 #define OB_BOR_LEVEL_1 FLASH_OBW1SRP_BOR_LEVEL_0 /*!< BOR Level 1, the threshold level is low (around 2.1 V) */ 265 #define OB_BOR_LEVEL_2 FLASH_OBW1SRP_BOR_LEVEL_1 /*!< BOR Level 2, the threshold level is medium (around 2.4 V) */ 266 #define OB_BOR_LEVEL_3 FLASH_OBW1SRP_BOR_LEVEL /*!< BOR Level 3, the threshold level is high (around 2.7 V) */ 267 /** 268 * @} 269 */ 270 271 /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG control mode 272 * @{ 273 */ 274 #define OB_IWDG_HW 0x00000000U /*!< IWDG watchdog is controlled by hardware */ 275 #define OB_IWDG_SW FLASH_OBW1SRP_IWDG_HW /*!< IWDG watchdog is controlled by software */ 276 /** 277 * @} 278 */ 279 280 /** @defgroup FLASH_OB_USER_nRST_STOP FLASH Option Bytes User stop entry reset 281 * @{ 282 */ 283 #define OB_STOP_RST 0x00000000U /*!< Reset generated when entering stop mode */ 284 #define OB_STOP_NORST FLASH_OBW1SRP_NRST_STOP /*!< No reset generated when entering stop mode */ 285 /** 286 * @} 287 */ 288 289 /** @defgroup FLASH_OB_USER_nRST_STDBY FLASH Option Bytes User standby entry reset 290 * @{ 291 */ 292 #define OB_STANDBY_RST 0x00000000U /*!< Reset generated when entering standby mode */ 293 #define OB_STANDBY_NORST FLASH_OBW1SRP_NRST_STBY /*!< No reset generated when entering standby mode */ 294 /** 295 * @} 296 */ 297 298 /** @defgroup FLASH_OB_USER_XSPI1_HSLV FLASH Option Bytes User XSPI 1 High-Speed at Low-Voltage 299 * @{ 300 */ 301 #define OB_XSPI1_HSLV_DISABLE 0x00000000U /*!< I/O speed optimization at low-voltage disabled */ 302 #define OB_XSPI1_HSLV_ENABLE FLASH_OBW1SRP_XSPI1_HSLV /*!< I/O speed optimization at low-voltage feature allowed */ 303 /** 304 * @} 305 */ 306 307 /** @defgroup FLASH_OB_USER_XSPI2_HSLV FLASH Option Bytes User XSPI 2 High-Speed at Low-Voltage 308 * @{ 309 */ 310 #define OB_XSPI2_HSLV_DISABLE 0x00000000U /*!< I/O speed optimization at low-voltage disabled */ 311 #define OB_XSPI2_HSLV_ENABLE FLASH_OBW1SRP_XSPI2_HSLV /*!< I/O speed optimization at low-voltage feature allowed */ 312 /** 313 * @} 314 */ 315 316 /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Stop Mode Freeze 317 * @{ 318 */ 319 #define OB_IWDG_STOP_FREEZE 0x00000000U /*!< Independent watchdog frozen in Stop mode */ 320 #define OB_IWDG_STOP_RUN FLASH_OBW1SRP_IWDG_FZ_STOP /*!< Independent watchdog running in Stop mode */ 321 /** 322 * @} 323 */ 324 325 /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Standby Mode Freeze 326 * @{ 327 */ 328 #define OB_IWDG_STDBY_FREEZE 0x00000000U /*!< Independent watchdog frozen in Standby mode */ 329 #define OB_IWDG_STDBY_RUN FLASH_OBW1SRP_IWDG_FZ_STBY /*!< Independent watchdog running in Standby mode */ 330 /** 331 * @} 332 */ 333 334 /** @defgroup FLASH_OB_USER_VDDIO_HSLV FLASH Option Bytes User I/O High-Speed at Low-Voltage 335 * @{ 336 */ 337 #define OB_VDDIO_HSLV_DISABLE 0x00000000U /*!< I/O speed optimization at low-voltage disabled */ 338 #define OB_VDDIO_HSLV_ENABLE FLASH_OBW1SRP_VDDIO_HSLV /*!< I/O speed optimization at low-voltage feature allowed */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup FLASH_OB_USER_ITCM_AXI_SHARE FLASH Option Bytes User ITCM AXI share 344 * @{ 345 */ 346 #define OB_ITCM_AXI_SHARE_0 0x00000000U 347 #define OB_ITCM_AXI_SHARE_1 FLASH_OBW2SRP_ITCM_AXI_SHARE_0 348 #define OB_ITCM_AXI_SHARE_2 FLASH_OBW2SRP_ITCM_AXI_SHARE_1 349 #define OB_ITCM_AXI_SHARE_3 (FLASH_OBW2SRP_ITCM_AXI_SHARE_0 | FLASH_OBW2SRP_ITCM_AXI_SHARE_1) 350 #define OB_ITCM_AXI_SHARE_4 FLASH_OBW2SRP_ITCM_AXI_SHARE_2 351 #define OB_ITCM_AXI_SHARE_5 (FLASH_OBW2SRP_ITCM_AXI_SHARE_2 | FLASH_OBW2SRP_ITCM_AXI_SHARE_0) 352 #define OB_ITCM_AXI_SHARE_6 (FLASH_OBW2SRP_ITCM_AXI_SHARE_2 | FLASH_OBW2SRP_ITCM_AXI_SHARE_1) 353 #define OB_ITCM_AXI_SHARE_7 FLASH_OBW2SRP_ITCM_AXI_SHARE 354 /** 355 * @} 356 */ 357 358 /** @defgroup FLASH_OB_USER_DTCM_AXI_SHARE FLASH Option Bytes User DTCM AXI share 359 * @{ 360 */ 361 #define OB_DTCM_AXI_SHARE_0 0x00000000U 362 #define OB_DTCM_AXI_SHARE_1 FLASH_OBW2SRP_DTCM_AXI_SHARE_0 363 #define OB_DTCM_AXI_SHARE_2 FLASH_OBW2SRP_DTCM_AXI_SHARE_1 364 #define OB_DTCM_AXI_SHARE_3 (FLASH_OBW2SRP_DTCM_AXI_SHARE_0 | FLASH_OBW2SRP_DTCM_AXI_SHARE_1) 365 #define OB_DTCM_AXI_SHARE_4 FLASH_OBW2SRP_DTCM_AXI_SHARE_2 366 #define OB_DTCM_AXI_SHARE_5 (FLASH_OBW2SRP_DTCM_AXI_SHARE_2 | FLASH_OBW2SRP_DTCM_AXI_SHARE_0) 367 #define OB_DTCM_AXI_SHARE_6 (FLASH_OBW2SRP_DTCM_AXI_SHARE_2 | FLASH_OBW2SRP_DTCM_AXI_SHARE_1) 368 #define OB_DTCM_AXI_SHARE_7 FLASH_OBW2SRP_DTCM_AXI_SHARE 369 /** 370 * @} 371 */ 372 373 /** @defgroup FLASH_OB_USER_ECC_ON_SRAM FLASH Option Bytes User ECC on sRAM 374 * @{ 375 */ 376 #define OB_AXISRAM_ECC_DISABLE 0x00000000U /*!< AXISRAM ECC check disable */ 377 #define OB_AXISRAM_ECC_ENABLE FLASH_OBW2SRP_ECC_ON_SRAM /*!< AXISRAM ECC check enable */ 378 /** 379 * @} 380 */ 381 382 /** @defgroup FLASH_OB_USER_I2C_NI3C FLASH Option Bytes User I2C Not I3C 383 * @{ 384 */ 385 #define OB_I2C_NI3C_I2C FLASH_OBW2SRP_I2C_NI3C 386 #define OB_I2C_NI3C_I3C 0x00000000U 387 /** 388 * @} 389 */ 390 391 /** @defgroup FLASH_OB_NVSTATE FLASH Option Bytes Non-volatile state 392 * @{ 393 */ 394 #define OB_NVSTATE_OPEN (uint8_t)0xB4 395 #define OB_NVSTATE_CLOSE (uint8_t)0x51 396 /** 397 * @} 398 */ 399 400 /** @defgroup FLASH_OB_ROT_OEM_PROVD FLASH Option Bytes Root-Of-Trust OEM Provisioned state 401 * @{ 402 */ 403 #define OB_OEM_PROVD_ENABLE (0xB4UL << FLASH_ROTSR_OEM_PROVD_Pos) /*!< Device is in OEM provisioned state */ 404 #define OB_OEM_PROVD_DEFAULT (0x6AUL << FLASH_ROTSR_OEM_PROVD_Pos) /*!< Device is not in OEM provisioned state (default value)*/ 405 /** 406 * @} 407 */ 408 409 /** @defgroup FLASH_OB_ROT_DBG_AUTH FLASH Option Bytes Root-Of-Trust Debug authentication method 410 * @{ 411 */ 412 #define OB_DBG_AUTH_LOCKED (0xB4UL << FLASH_ROTSR_DBG_AUTH_Pos) /*!< Locked device (no debug allowed) */ 413 #define OB_DBG_AUTH_ECDSA_SIGN (0x51UL << FLASH_ROTSR_DBG_AUTH_Pos) /*!< Authentication method using ECDSA signature (NISTP256) */ 414 #define OB_DBG_AUTH_PASSWORD (0x8AUL << FLASH_ROTSR_DBG_AUTH_Pos) /*!< Authentication method using password */ 415 #define OB_DBG_AUTH_DEFAULT (0xFFUL << FLASH_ROTSR_DBG_AUTH_Pos) /*!< No authentication method selected (default value) */ 416 /** 417 * @} 418 */ 419 420 /** @defgroup FLASH_OB_ROT_IROT_SELECT FLASH Option Bytes iRoT selection 421 * @{ 422 */ 423 #define OB_IROT_SELECTION_ST (0xB4UL << FLASH_ROTSR_IROT_SELECT_Pos) /*!< ST iRoT is selected at boot */ 424 #define OB_IROT_SELECTION_OEM (0x6AUL << FLASH_ROTSR_IROT_SELECT_Pos) /*!< OEM iRoT is selected at boot */ 425 /** 426 * @} 427 */ 428 429 /** @defgroup FLASH_Latency FLASH Latency 430 * @{ 431 */ 432 #define FLASH_LATENCY_0 0U /*!< FLASH Zero wait state */ 433 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One wait state */ 434 #define FLASH_LATENCY_2 (FLASH_ACR_LATENCY_1 | FLASH_ACR_WRHIGHFREQ_0) /*!< FLASH Two wait states */ 435 #define FLASH_LATENCY_3 (FLASH_ACR_LATENCY_1 | FLASH_ACR_LATENCY_0 | FLASH_ACR_WRHIGHFREQ_0) /*!< FLASH Three wait states */ 436 #define FLASH_LATENCY_4 (FLASH_ACR_LATENCY_2 | FLASH_ACR_WRHIGHFREQ_1) /*!< FLASH Four wait states */ 437 #define FLASH_LATENCY_5 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_0 | FLASH_ACR_WRHIGHFREQ_1) /*!< FLASH Five wait states */ 438 #define FLASH_LATENCY_6 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_1 | FLASH_ACR_WRHIGHFREQ) /*!< FLASH Six wait state */ 439 #define FLASH_LATENCY_7 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_1 | FLASH_ACR_LATENCY_0 | FLASH_ACR_WRHIGHFREQ) /*!< FLASH Seven wait states */ 440 /** 441 * @} 442 */ 443 444 /** @defgroup FLASH_Keys FLASH Keys 445 * @{ 446 */ 447 #define FLASH_KEY1 0x45670123U /*!< Flash key1 */ 448 #define FLASH_KEY2 0xCDEF89ABU /*!< Flash key2: used with FLASH_KEY1 449 to unlock the FLASH registers access */ 450 451 #define FLASH_OPTKEY1 0x08192A3BU /*!< Flash option byte key1 */ 452 #define FLASH_OPTKEY2 0x4C5D6E7FU /*!< Flash option byte key2: used with FLASH_OPTKEY1 453 to allow option bytes operations */ 454 /** 455 * @} 456 */ 457 458 /** 459 * @} 460 */ 461 462 /* Exported macros -----------------------------------------------------------*/ 463 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 464 * @brief macros to control FLASH features 465 * @{ 466 */ 467 468 /** 469 * @brief Set the FLASH Latency. 470 * @param __LATENCY__ FLASH Latency 471 * This parameter can be one of the following values : 472 * @arg FLASH_LATENCY_0: FLASH Zero wait state 473 * @arg FLASH_LATENCY_1: FLASH One wait state 474 * @arg FLASH_LATENCY_2: FLASH Two wait states 475 * @arg FLASH_LATENCY_3: FLASH Three wait states 476 * @arg FLASH_LATENCY_4: FLASH Four wait states 477 * @arg FLASH_LATENCY_5: FLASH Five wait states 478 * @arg FLASH_LATENCY_6: FLASH Six wait states 479 * @arg FLASH_LATENCY_7: FLASH Seven wait states 480 * @retval None 481 */ 482 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) MODIFY_REG(FLASH->ACR, (FLASH_ACR_LATENCY |\ 483 FLASH_ACR_WRHIGHFREQ), (__LATENCY__)) 484 485 /** 486 * @brief Get the FLASH Latency. 487 * @retval FLASH Latency 488 * This return value can be one of the following values : 489 * @arg FLASH_LATENCY_0: FLASH Zero wait state 490 * @arg FLASH_LATENCY_1: FLASH One wait state 491 * @arg FLASH_LATENCY_2: FLASH Two wait states 492 * @arg FLASH_LATENCY_3: FLASH Three wait states 493 * @arg FLASH_LATENCY_4: FLASH Four wait states 494 * @arg FLASH_LATENCY_5: FLASH Five wait states 495 * @arg FLASH_LATENCY_6: FLASH Six wait states 496 * @arg FLASH_LATENCY_7: FLASH Seven wait states 497 */ 498 #define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, (FLASH_ACR_LATENCY | FLASH_ACR_WRHIGHFREQ)) 499 500 /** 501 * @} 502 */ 503 504 /** @defgroup FLASH_Interrupt FLASH Interrupts Macros 505 * @brief macros to handle FLASH interrupts 506 * @{ 507 */ 508 509 /** 510 * @brief Enable the specified FLASH interrupt. 511 * @param __INTERRUPT__ FLASH interrupt 512 * This parameter can be any combination of the following values: 513 * @arg FLASH_IT_EOP: End of program interrupt 514 * @arg FLASH_IT_WRPERR: Write protection error interrupt 515 * @arg FLASH_IT_PGSERR: Programming sequence error interrupt 516 * @arg FLASH_IT_STRBERR: Strobe error interrupt 517 * @arg FLASH_IT_OBLERR: Option byte loading error interrupt 518 * @arg FLASH_IT_INCERR: Inconsistency error interrupt 519 * @arg FLASH_IT_RDSERR: Read security error interrupt 520 * @arg FLASH_IT_SNECCERR: ECC single error interrupt 521 * @arg FLASH_IT_DBECCERR: ECC double error interrupt 522 * @arg FLASH_IT_CRCEND: CRC end of calculation interrupt 523 * @arg FLASH_IT_CRCERR: CRC error interrupt 524 * @arg FLASH_IT_KVERR: Key valid error interrupt 525 * @arg FLASH_IT_KTERR: Key transfer error interrupt 526 * @arg FLASH_IT_OPTERR: Options byte change error interrupt 527 * @retval none 528 */ 529 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_IER) != 0U)\ 530 { SET_BIT(FLASH->IER, ((__INTERRUPT__) & FLASH_IT_IER)); }\ 531 if(((__INTERRUPT__) & FLASH_IT_OPTCR) != 0U)\ 532 { SET_BIT(FLASH->OPTCR, ((__INTERRUPT__) & FLASH_IT_OPTCR)); }\ 533 } while(0) 534 535 /** 536 * @brief Disable the specified FLASH interrupt. 537 * @param __INTERRUPT__ FLASH interrupt 538 * This parameter can be any combination of the following values: 539 * @arg FLASH_IT_EOP: End of program interrupt 540 * @arg FLASH_IT_WRPERR: Write protection error interrupt 541 * @arg FLASH_IT_PGSERR: Programming sequence error interrupt 542 * @arg FLASH_IT_STRBERR: Strobe error interrupt 543 * @arg FLASH_IT_OBLERR: Option byte loading error interrupt 544 * @arg FLASH_IT_INCERR: Inconsistency error interrupt 545 * @arg FLASH_IT_RDSERR: Read security error interrupt 546 * @arg FLASH_IT_SNECCERR: ECC single error interrupt 547 * @arg FLASH_IT_DBECCERR: ECC double error interrupt 548 * @arg FLASH_IT_CRCEND: CRC end of calculation interrupt 549 * @arg FLASH_IT_CRCERR: CRC error interrupt 550 * @arg FLASH_IT_KVERR: Key valid error interrupt 551 * @arg FLASH_IT_KTERR: Key transfer error interrupt 552 * @arg FLASH_IT_OPTERR: Options byte change error interrupt 553 * @retval none 554 */ 555 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_IER) != 0U)\ 556 { CLEAR_BIT(FLASH->IER, ((__INTERRUPT__) & FLASH_IT_IER)); }\ 557 if(((__INTERRUPT__) & FLASH_IT_OPTCR) != 0U)\ 558 { CLEAR_BIT(FLASH->OPTCR, ((__INTERRUPT__) & FLASH_IT_OPTCR)); }\ 559 } while(0) 560 561 /** 562 * @brief Check whether the specified FLASH flag is set or not. 563 * @param __FLAG__ specifies the FLASH flag to check. 564 * This parameter can be one of the following values: 565 * @arg FLASH_FLAG_EOP: FLASH End of program flag 566 * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag 567 * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag 568 * @arg FLASH_FLAG_STRBERR: FLASH Strobe error flag 569 * @arg FLASH_FLAG_OBLERR: FLASH Option byte loading error flag 570 * @arg FLASH_FLAG_INCERR: FLASH Inconsistency error flag 571 * @arg FLASH_FLAG_RDSERR: FLASH Read security error flag 572 * @arg FLASH_FLAG_SNECCERR: FLASH ECC single error flag 573 * @arg FLASH_FLAG_DBECCERR: FLASH ECC double error flag 574 * @arg FLASH_FLAG_CRCEND: FLASH CRC end of calculation flag 575 * @arg FLASH_FLAG_CRCERR: FLASH CRC error flag 576 * @arg FLASH_FLAG_KVERR: FLASH Key valid error flag 577 * @arg FLASH_FLAG_KTERR: FLASH Key transfer error flag 578 * @arg FLASH_FLAG_OPTERR: FLASH Options byte change error flag 579 * @retval The new state of FLASH_FLAG (SET or RESET). 580 */ 581 #define __HAL_FLASH_GET_FLAG(__FLAG__) ((((__FLAG__) & FLASH_FLAG_OPTISR_ERRORS) != 0U) ? \ 582 (READ_BIT(FLASH->OPTISR, (__FLAG__)) == (__FLAG__)) : \ 583 (READ_BIT(FLASH->ISR, (__FLAG__)) == (__FLAG__))) 584 585 /** 586 * @brief Clear the FLASH's pending flags. 587 * @param __FLAG__ specifies the FLASH flags to clear. 588 * This parameter can be any combination of the following values: 589 * @arg FLASH_FLAG_EOP: FLASH End of program flag 590 * @arg FLASH_FLAG_WRPERR: FLASH Write protection error flag 591 * @arg FLASH_FLAG_PGSERR: FLASH Programming sequence error flag 592 * @arg FLASH_FLAG_STRBERR: FLASH Strobe error flag 593 * @arg FLASH_FLAG_OBLERR: FLASH Option byte loading error flag 594 * @arg FLASH_FLAG_INCERR: FLASH Inconsistency error flag 595 * @arg FLASH_FLAG_RDSERR: FLASH Read security error flag 596 * @arg FLASH_FLAG_SNECCERR: FLASH ECC single error flag 597 * @arg FLASH_FLAG_DBECCERR: FLASH ECC double error flag 598 * @arg FLASH_FLAG_CRCEND: FLASH CRC end of calculation flag 599 * @arg FLASH_FLAG_CRCERR: FLASH CRC error flag 600 * @arg FLASH_FLAG_KVERR: FLASH Key valid error flag 601 * @arg FLASH_FLAG_KTERR: FLASH Key transfer error flag 602 * @arg FLASH_FLAG_OPTERR: FLASH Options byte change error flag 603 * @retval None 604 */ 605 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if(((__FLAG__) & FLASH_FLAG_OPTISR_ERRORS) != 0U)\ 606 { WRITE_REG(FLASH->OPTICR, ((__FLAG__) & FLASH_FLAG_OPTISR_ERRORS)); }\ 607 if(((__FLAG__) & FLASH_FLAG_ISR_FLAGS) != 0U)\ 608 { WRITE_REG(FLASH->ICR, ((__FLAG__) & FLASH_FLAG_ISR_FLAGS)); }\ 609 } while(0) 610 /** 611 * @} 612 */ 613 614 /* Include FLASH HAL Extended module */ 615 #include "stm32h7rsxx_hal_flash_ex.h" 616 617 618 /* Exported functions --------------------------------------------------------*/ 619 /** @addtogroup FLASH_Exported_Functions 620 * @{ 621 */ 622 623 /* Program operation functions ***********************************************/ 624 /** @addtogroup FLASH_Exported_Functions_Group1 625 * @{ 626 */ 627 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t DataAddress); 628 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t DataAddress); 629 /* FLASH IRQ handler method */ 630 void HAL_FLASH_IRQHandler(void); 631 /* Callbacks in non blocking modes */ 632 void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 633 void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 634 /** 635 * @} 636 */ 637 638 /* Peripheral Control functions **********************************************/ 639 /** @addtogroup FLASH_Exported_Functions_Group2 640 * @{ 641 */ 642 HAL_StatusTypeDef HAL_FLASH_Unlock(void); 643 HAL_StatusTypeDef HAL_FLASH_Lock(void); 644 /* Option bytes control */ 645 HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 646 HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 647 /** 648 * @} 649 */ 650 651 /* Peripheral State functions ************************************************/ 652 /** @addtogroup FLASH_Exported_Functions_Group3 653 * @{ 654 */ 655 uint32_t HAL_FLASH_GetError(void); 656 /** 657 * @} 658 */ 659 660 /** 661 * @} 662 */ 663 664 /* Private variables ---------------------------------------------------------*/ 665 /** @addtogroup FLASH_Private_Variables FLASH Private Variables 666 * @{ 667 */ 668 extern FLASH_ProcessTypeDef pFlash; 669 /** 670 * @} 671 */ 672 673 /* Private constants --------------------------------------------------------*/ 674 /** @defgroup FLASH_Private_Constants FLASH Private Constants 675 * @{ 676 */ 677 #define FLASH_BANK_SIZE FLASH_SIZE 678 679 #define FLASH_SECTOR_NB 8U 680 681 #define FLASH_SECTOR_SIZE 0x2000UL /* 8 KB */ 682 683 #define FLASH_HDP_BLOCK_NB 0x100U 684 685 #define FLASH_TIMEOUT_VALUE 1000U /* 1 s */ 686 687 #define FLASH_BYTE_MASK 0x00000000U 688 #define FLASH_HALFWORD_MASK 0x40000000U 689 #define FLASH_WORD_MASK 0x80000000U 690 #define FLASH_DOUBLEWORD_MASK 0xC0000000U 691 #define FLASH_WORD_SIZE_MASK FLASH_DOUBLEWORD_MASK 692 /** 693 * @} 694 */ 695 696 /* Private macros ------------------------------------------------------------*/ 697 /** @defgroup FLASH_Private_Macros FLASH Private Macros 698 * @{ 699 */ 700 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_SECTORS) ||\ 701 ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 702 703 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_BYTE) ||\ 704 ((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) ||\ 705 ((VALUE) == FLASH_TYPEPROGRAM_WORD) ||\ 706 ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD) ||\ 707 ((VALUE) == FLASH_TYPEPROGRAM_QUADWORD) ||\ 708 ((VALUE) == FLASH_TYPEPROGRAM_OTP_HALFWORD) ||\ 709 ((VALUE) == FLASH_TYPEPROGRAM_OTP_WORD)) 710 711 #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE+FLASH_SIZE))) 712 713 #define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= OTP_AREA_BASE) && ((ADDRESS) < (OTP_AREA_BASE + OTP_SIZE))) 714 715 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) ((IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS)) || (IS_FLASH_OTP_ADDRESS(ADDRESS))) 716 717 #define IS_FLASH_SECTOR(SECTOR) ((SECTOR) < FLASH_SECTOR_NB) 718 719 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP |\ 720 OPTIONBYTE_USER | OPTIONBYTE_HDP | OPTIONBYTE_NV))) 721 722 #define IS_OB_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) 723 724 #define IS_OB_USER_TYPE(TYPE) (((TYPE) <= 0x1FFFU) && ((TYPE) != 0U)) 725 726 #define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \ 727 ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3)) 728 729 #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) 730 731 #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) 732 733 #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) 734 735 #define IS_OB_USER_XSPI1_HSLV(VALUE) (((VALUE) == OB_XSPI1_HSLV_DISABLE) || ((VALUE) == OB_XSPI1_HSLV_ENABLE)) 736 737 #define IS_OB_USER_XSPI2_HSLV(VALUE) (((VALUE) == OB_XSPI2_HSLV_DISABLE) || ((VALUE) == OB_XSPI2_HSLV_ENABLE)) 738 739 #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) 740 741 #define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) 742 743 #define IS_OB_USER_VDDIO_HSLV(VALUE) (((VALUE) == OB_VDDIO_HSLV_DISABLE) || ((VALUE) == OB_VDDIO_HSLV_ENABLE)) 744 745 #define IS_OB_USER_ITCM_AXI_SHARE(VALUE) (((VALUE) == OB_ITCM_AXI_SHARE_0) || ((VALUE) == OB_ITCM_AXI_SHARE_1) || \ 746 ((VALUE) == OB_ITCM_AXI_SHARE_2) || ((VALUE) == OB_ITCM_AXI_SHARE_3) || \ 747 ((VALUE) == OB_ITCM_AXI_SHARE_4) || ((VALUE) == OB_ITCM_AXI_SHARE_5) || \ 748 ((VALUE) == OB_ITCM_AXI_SHARE_6) || ((VALUE) == OB_ITCM_AXI_SHARE_7)) 749 750 #define IS_OB_USER_DTCM_AXI_SHARE(VALUE) (((VALUE) == OB_DTCM_AXI_SHARE_0) || ((VALUE) == OB_DTCM_AXI_SHARE_1) || \ 751 ((VALUE) == OB_DTCM_AXI_SHARE_2) || ((VALUE) == OB_DTCM_AXI_SHARE_3) || \ 752 ((VALUE) == OB_DTCM_AXI_SHARE_4) || ((VALUE) == OB_DTCM_AXI_SHARE_5) || \ 753 ((VALUE) == OB_DTCM_AXI_SHARE_6) || ((VALUE) == OB_DTCM_AXI_SHARE_7)) 754 755 #define IS_OB_USER_AXISRAM_ECC(VALUE) (((VALUE) == OB_AXISRAM_ECC_ENABLE) || ((VALUE) == OB_AXISRAM_ECC_DISABLE)) 756 757 #define IS_OB_USER_I2C_NI3C(VALUE) (((VALUE) == OB_I2C_NI3C_I2C) || ((VALUE) == OB_I2C_NI3C_I3C)) 758 759 #define IS_OB_HDP_PAGE(PAGE) ((PAGE) < FLASH_HDP_BLOCK_NB) 760 761 #define IS_OB_NVSTATE(VALUE) (((VALUE) == OB_NVSTATE_OPEN) || ((VALUE) ==OB_NVSTATE_CLOSE)) 762 763 #define IS_OB_ROT_TYPE(VALUE) ((VALUE) <= 0x7U) 764 765 #define IS_OB_OEM_PROVD(VALUE) ((VALUE) <= 0x000000FFU) 766 767 #define IS_OB_DBG_AUTH(VALUE) ((VALUE) <= 0x0000FF00U) 768 769 #define IS_OB_IROT_SELECT(VALUE) ((VALUE) <= 0xFF000000U) 770 771 #define IS_OB_EPOCH(VALUE) ((VALUE) <= 0xFFFFFFU) 772 773 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || ((LATENCY) == FLASH_LATENCY_1) || \ 774 ((LATENCY) == FLASH_LATENCY_2) || ((LATENCY) == FLASH_LATENCY_3) || \ 775 ((LATENCY) == FLASH_LATENCY_4) || ((LATENCY) == FLASH_LATENCY_5) || \ 776 ((LATENCY) == FLASH_LATENCY_6) || ((LATENCY) == FLASH_LATENCY_7)) 777 778 /** 779 * @} 780 */ 781 782 /* Private functions ---------------------------------------------------------*/ 783 /** @addtogroup FLASH_Private_Functions 784 * @{ 785 */ 786 HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 787 /** 788 * @} 789 */ 790 791 /** 792 * @} 793 */ 794 795 /** 796 * @} 797 */ 798 799 #ifdef __cplusplus 800 } 801 #endif 802 803 #endif /* STM32H7RSxx_HAL_FLASH_H */ 804
