/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_USDHC.h | 1431 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 34469 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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D | MIMXRT685S_cm33.h | 45763 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 37529 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 37528 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 45763 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 49206 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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D | MIMXRT595S_cm33.h | 60243 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 44499 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 44482 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 47828 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 46602 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 58616 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
D | MIMXRT555S.h | 60242 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 50868 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 49230 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 51238 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 53424 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 53280 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 55121 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 55119 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 55121 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 55132 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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D | MIMX8MN6_cm7.h | 55119 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 55121 #define USDHC_VEND_SPEC2_TUNING_1bit_EN_MASK (0x20U) macro
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