Home
last modified time | relevance | path

Searched defs:USDHC_MIX_CTRL_DTDSEL_MASK (Results 1 – 25 of 77) sorted by relevance

1234

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_USDHC.h987 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h21462 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
DK32L3A60_cm4.h21412 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h33899 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
DMIMXRT685S_cm33.h45193 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h37032 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h37031 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h45193 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h48689 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
DMIMXRT595S_cm33.h59726 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h44019 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h44002 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h47348 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h46122 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h58099 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h59725 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h50388 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h48750 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h50758 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h52944 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h52800 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h54577 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h54575 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h54577 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h54588 #define USDHC_MIX_CTRL_DTDSEL_MASK (0x10U) macro

1234