1 /*
2  * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
3  * Copyright 2019-2023 NXP. All rights reserved.
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  *     http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  */
17 
18 /**
19  * \file platform_base_address.h
20  * \brief This file defines all the peripheral base addresses for platform.
21  */
22 
23 #ifndef __PLATFORM_BASE_ADDRESS_H__
24 #define __PLATFORM_BASE_ADDRESS_H__
25 
26 #include "platform_regs.h"           /* Platform registers */
27 #include "LPC55S69_cm33_core0.h"
28 
29 /* Internal Flash memory */
30 #define FLASH0_BASE_S                 (0x10000000)
31 #define FLASH0_BASE_NS                (0x00000000)
32 #define FLASH0_SIZE                   (FLASH_TOTAL_SIZE)  /* 608 kB */
33 #define FLASH0_PAGE_SIZE              (0x00000200)  /* 512 B */
34 
35 #define USART_BASE                    USART0
36 
37 #endif  /* __PLATFORM_BASE_ADDRESS_H__ */
38