/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 50352 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 50350 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 50352 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 50364 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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D | MIMX8MN6_cm7.h | 50350 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 50352 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
D | MIMX8MN4_cm7.h | 50350 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
D | MIMX8MQ7_cm4.h | 55672 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
D | MIMX8MQ5_cm4.h | 53499 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
D | MIMX8MQ6_cm4.h | 55672 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
D | MIMX8MD6_cm4.h | 55672 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
D | MIMX8MD7_cm4.h | 55672 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/imx/devices/MCIMX6X/ |
D | MCIMX6X_M4.h | 35080 …__IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 … member
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/hal_nxp-3.5.0/imx/devices/MCIMX7D/ |
D | MCIMX7D_M4.h | 41328 …__IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 … member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/ |
D | MIMX8MM2_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/ |
D | MIMX8MM1_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/ |
D | MIMX8MM3_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/ |
D | MIMX8MM4_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/ |
D | MIMX8MM5_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/ |
D | MIMX8MM6_cm4.h | 69160 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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D | MIMX8MM6_ca53.h | 68625 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/ |
D | MIMX8ML8_ca53.h | 96386 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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D | MIMX8ML8_dsp.h | 92337 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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D | MIMX8ML8_cm7.h | 96353 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/ |
D | MIMX8ML6_cm7.h | 96353 __IO uint32_t UCR2; /**< UART Control Register 2, offset: 0x84 */ member
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