1 /** 2 ****************************************************************************** 3 * @file stm32h7rsxx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7RSxx_HAL_UART_H 21 #define STM32H7RSxx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7rsxx_hal_def.h" 29 30 /** @addtogroup STM32H7RSxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 #if defined(HAL_DMA_MODULE_ENABLED) 126 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 127 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 128 129 #endif /* HAL_DMA_MODULE_ENABLED */ 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 /** 142 * @brief HAL UART State definition 143 * @note HAL UART State value is a combination of 2 different substates: 144 * gState and RxState (see @ref UART_State_Definition). 145 * - gState contains UART state information related to global Handle management 146 * and also information related to Tx operations. 147 * gState value coding follow below described bitmap : 148 * b7-b6 Error information 149 * 00 : No Error 150 * 01 : (Not Used) 151 * 10 : Timeout 152 * 11 : Error 153 * b5 Peripheral initialization status 154 * 0 : Reset (Peripheral not initialized) 155 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 156 * b4-b3 (not used) 157 * xx : Should be set to 00 158 * b2 Intrinsic process state 159 * 0 : Ready 160 * 1 : Busy (Peripheral busy with some configuration or internal operations) 161 * b1 (not used) 162 * x : Should be set to 0 163 * b0 Tx state 164 * 0 : Ready (no Tx operation ongoing) 165 * 1 : Busy (Tx operation ongoing) 166 * - RxState contains information related to Rx operations. 167 * RxState value coding follow below described bitmap : 168 * b7-b6 (not used) 169 * xx : Should be set to 00 170 * b5 Peripheral initialization status 171 * 0 : Reset (Peripheral not initialized) 172 * 1 : Init done (Peripheral initialized) 173 * b4-b2 (not used) 174 * xxx : Should be set to 000 175 * b1 Rx state 176 * 0 : Ready (no Rx operation ongoing) 177 * 1 : Busy (Rx operation ongoing) 178 * b0 (not used) 179 * x : Should be set to 0. 180 */ 181 typedef uint32_t HAL_UART_StateTypeDef; 182 183 /** 184 * @brief UART clock sources definition 185 */ 186 typedef enum 187 { 188 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 189 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 190 UART_CLOCKSOURCE_PCLK4 = 0x02U, /*!< PCLK4 clock source (only used by LPUART1) */ 191 UART_CLOCKSOURCE_PLL2Q = 0x04U, /*!< PLL2Q clock source */ 192 UART_CLOCKSOURCE_PLL3Q = 0x08U, /*!< PLL3Q clock source */ 193 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */ 194 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */ 195 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */ 196 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */ 197 } UART_ClockSourceTypeDef; 198 199 /** 200 * @brief HAL UART Reception type definition 201 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 202 * This parameter can be a value of @ref UART_Reception_Type_Values : 203 * HAL_UART_RECEPTION_STANDARD = 0x00U, 204 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 205 * HAL_UART_RECEPTION_TORTO = 0x02U, 206 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 207 */ 208 typedef uint32_t HAL_UART_RxTypeTypeDef; 209 210 /** 211 * @brief HAL UART Rx Event type definition 212 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 213 * leading to call of the RxEvent callback. 214 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 215 * HAL_UART_RXEVENT_TC = 0x00U, 216 * HAL_UART_RXEVENT_HT = 0x01U, 217 * HAL_UART_RXEVENT_IDLE = 0x02U, 218 */ 219 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 220 221 /** 222 * @brief UART handle Structure definition 223 */ 224 typedef struct __UART_HandleTypeDef 225 { 226 USART_TypeDef *Instance; /*!< UART registers base address */ 227 228 UART_InitTypeDef Init; /*!< UART communication parameters */ 229 230 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 231 232 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 233 234 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 235 236 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 237 238 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 239 240 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 241 242 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 243 244 uint16_t Mask; /*!< UART Rx RDR register mask */ 245 246 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 247 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 248 249 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 250 251 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 252 253 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 254 255 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 256 257 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 258 259 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 260 261 #if defined(HAL_DMA_MODULE_ENABLED) 262 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 263 264 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 265 266 #endif /* HAL_DMA_MODULE_ENABLED */ 267 HAL_LockTypeDef Lock; /*!< Locking object */ 268 269 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 270 and also related to Tx operations. This parameter 271 can be a value of @ref HAL_UART_StateTypeDef */ 272 273 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 274 parameter can be a value of @ref HAL_UART_StateTypeDef */ 275 276 __IO uint32_t ErrorCode; /*!< UART Error code */ 277 278 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 279 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 280 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 281 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 282 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 283 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 284 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 285 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 286 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 287 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 288 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 289 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 290 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 291 292 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 293 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 294 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 295 296 } UART_HandleTypeDef; 297 298 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 299 /** 300 * @brief HAL UART Callback ID enumeration definition 301 */ 302 typedef enum 303 { 304 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 305 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 306 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 307 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 308 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 309 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 310 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 311 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 312 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 313 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 314 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 315 316 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 317 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 318 319 } HAL_UART_CallbackIDTypeDef; 320 321 /** 322 * @brief HAL UART Callback pointer definition 323 */ 324 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 325 typedef void (*pUART_RxEventCallbackTypeDef) 326 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 327 328 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 329 330 /** 331 * @} 332 */ 333 334 /* Exported constants --------------------------------------------------------*/ 335 /** @defgroup UART_Exported_Constants UART Exported Constants 336 * @{ 337 */ 338 339 /** @defgroup UART_State_Definition UART State Code Definition 340 * @{ 341 */ 342 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 343 Value is allowed for gState and RxState */ 344 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 345 Value is allowed for gState and RxState */ 346 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 347 Value is allowed for gState only */ 348 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 349 Value is allowed for gState only */ 350 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 351 Value is allowed for RxState only */ 352 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 353 Not to be used for neither gState nor RxState.Value is result 354 of combination (Or) between gState and RxState values */ 355 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 356 Value is allowed for gState only */ 357 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 358 Value is allowed for gState only */ 359 /** 360 * @} 361 */ 362 363 /** @defgroup UART_Error_Definition UART Error Definition 364 * @{ 365 */ 366 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 367 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 368 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 369 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 370 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 371 #if defined(HAL_DMA_MODULE_ENABLED) 372 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 373 #endif /* HAL_DMA_MODULE_ENABLED */ 374 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 375 376 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 377 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 378 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 379 /** 380 * @} 381 */ 382 383 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 384 * @{ 385 */ 386 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 387 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 388 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 389 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 390 /** 391 * @} 392 */ 393 394 /** @defgroup UART_Parity UART Parity 395 * @{ 396 */ 397 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 398 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 399 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 400 /** 401 * @} 402 */ 403 404 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 405 * @{ 406 */ 407 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 408 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 409 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 410 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 411 /** 412 * @} 413 */ 414 415 /** @defgroup UART_Mode UART Transfer Mode 416 * @{ 417 */ 418 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 419 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 420 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 421 /** 422 * @} 423 */ 424 425 /** @defgroup UART_State UART State 426 * @{ 427 */ 428 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 429 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 430 /** 431 * @} 432 */ 433 434 /** @defgroup UART_Over_Sampling UART Over Sampling 435 * @{ 436 */ 437 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 438 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 439 /** 440 * @} 441 */ 442 443 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 444 * @{ 445 */ 446 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 447 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 448 /** 449 * @} 450 */ 451 452 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 453 * @{ 454 */ 455 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 456 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 457 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 458 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 459 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 460 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 461 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 462 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 463 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 464 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 465 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 466 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 467 /** 468 * @} 469 */ 470 471 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 472 * @{ 473 */ 474 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 475 on start bit */ 476 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 477 on falling edge */ 478 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 479 on 0x7F frame detection */ 480 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 481 on 0x55 frame detection */ 482 /** 483 * @} 484 */ 485 486 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 487 * @{ 488 */ 489 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 490 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 491 /** 492 * @} 493 */ 494 495 /** @defgroup UART_LIN UART Local Interconnection Network mode 496 * @{ 497 */ 498 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 499 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 500 /** 501 * @} 502 */ 503 504 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 505 * @{ 506 */ 507 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 508 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 509 /** 510 * @} 511 */ 512 513 #if defined(HAL_DMA_MODULE_ENABLED) 514 /** @defgroup UART_DMA_Tx UART DMA Tx 515 * @{ 516 */ 517 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 518 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 519 /** 520 * @} 521 */ 522 523 /** @defgroup UART_DMA_Rx UART DMA Rx 524 * @{ 525 */ 526 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 527 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 528 /** 529 * @} 530 */ 531 #endif /* HAL_DMA_MODULE_ENABLED */ 532 533 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 534 * @{ 535 */ 536 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 537 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 538 /** 539 * @} 540 */ 541 542 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 543 * @{ 544 */ 545 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 546 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Request_Parameters UART Request Parameters 552 * @{ 553 */ 554 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 555 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 556 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 557 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 558 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 559 /** 560 * @} 561 */ 562 563 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 564 * @{ 565 */ 566 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 567 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 568 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 569 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 570 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 571 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 572 #if defined(HAL_DMA_MODULE_ENABLED) 573 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 574 #endif /* HAL_DMA_MODULE_ENABLED */ 575 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 576 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 577 /** 578 * @} 579 */ 580 581 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 582 * @{ 583 */ 584 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 585 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 586 /** 587 * @} 588 */ 589 590 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 591 * @{ 592 */ 593 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 594 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 595 /** 596 * @} 597 */ 598 599 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 600 * @{ 601 */ 602 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 603 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 604 /** 605 * @} 606 */ 607 608 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 609 * @{ 610 */ 611 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 612 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 613 /** 614 * @} 615 */ 616 617 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 618 * @{ 619 */ 620 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 621 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 622 /** 623 * @} 624 */ 625 626 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 627 * @{ 628 */ 629 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 630 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 631 /** 632 * @} 633 */ 634 635 #if defined(HAL_DMA_MODULE_ENABLED) 636 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 637 * @{ 638 */ 639 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 640 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 641 /** 642 * @} 643 */ 644 #endif /* HAL_DMA_MODULE_ENABLED */ 645 646 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 647 * @{ 648 */ 649 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 650 first disable */ 651 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 652 first enable */ 653 /** 654 * @} 655 */ 656 657 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 658 * @{ 659 */ 660 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 661 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 662 /** 663 * @} 664 */ 665 666 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 667 * @{ 668 */ 669 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 670 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 671 /** 672 * @} 673 */ 674 675 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 676 * @{ 677 */ 678 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 679 /** 680 * @} 681 */ 682 683 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 684 * @{ 685 */ 686 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 687 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 688 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 689 not empty or RXFIFO is not empty */ 690 /** 691 * @} 692 */ 693 694 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 695 * @{ 696 */ 697 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 698 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 699 /** 700 * @} 701 */ 702 703 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 704 * @{ 705 */ 706 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 707 position in CR1 register */ 708 /** 709 * @} 710 */ 711 712 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 713 * @{ 714 */ 715 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 716 position in CR1 register */ 717 /** 718 * @} 719 */ 720 721 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 722 * @{ 723 */ 724 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 725 /** 726 * @} 727 */ 728 729 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 730 * @{ 731 */ 732 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 733 /** 734 * @} 735 */ 736 737 /** @defgroup UART_Flags UART Status Flags 738 * Elements values convention: 0xXXXX 739 * - 0xXXXX : Flag mask in the ISR register 740 * @{ 741 */ 742 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 743 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 744 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 745 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 746 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 747 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 748 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 749 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 750 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 751 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 752 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 753 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 754 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 755 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 756 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 757 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 758 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 759 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 760 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 761 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 762 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 763 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 764 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 765 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 766 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 767 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 768 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 769 /** 770 * @} 771 */ 772 773 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 774 * Elements values convention: 000ZZZZZ0XXYYYYYb 775 * - YYYYY : Interrupt source position in the XX register (5bits) 776 * - XX : Interrupt source register (2bits) 777 * - 01: CR1 register 778 * - 10: CR2 register 779 * - 11: CR3 register 780 * - ZZZZZ : Flag position in the ISR register(5bits) 781 * Elements values convention: 000000000XXYYYYYb 782 * - YYYYY : Interrupt source position in the XX register (5bits) 783 * - XX : Interrupt source register (2bits) 784 * - 01: CR1 register 785 * - 10: CR2 register 786 * - 11: CR3 register 787 * Elements values convention: 0000ZZZZ00000000b 788 * - ZZZZ : Flag position in the ISR register(4bits) 789 * @{ 790 */ 791 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 792 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 793 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 794 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 795 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 796 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 797 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 798 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 799 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 800 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 801 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 802 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 803 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 804 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 805 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 806 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 807 808 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 809 810 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 811 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 812 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 813 /** 814 * @} 815 */ 816 817 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 818 * @{ 819 */ 820 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 821 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 822 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 823 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 824 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 825 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 826 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 827 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 828 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 829 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 830 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 831 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 832 /** 833 * @} 834 */ 835 836 /** @defgroup UART_Reception_Type_Values UART Reception type values 837 * @{ 838 */ 839 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 840 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 841 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 842 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 843 /** 844 * @} 845 */ 846 847 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 848 * @{ 849 */ 850 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 851 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 852 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 853 /** 854 * @} 855 */ 856 857 /** 858 * @} 859 */ 860 861 /* Exported macros -----------------------------------------------------------*/ 862 /** @defgroup UART_Exported_Macros UART Exported Macros 863 * @{ 864 */ 865 866 /** @brief Reset UART handle states. 867 * @param __HANDLE__ UART handle. 868 * @retval None 869 */ 870 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 871 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 872 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 873 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 874 (__HANDLE__)->MspInitCallback = NULL; \ 875 (__HANDLE__)->MspDeInitCallback = NULL; \ 876 } while(0U) 877 #else 878 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 879 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 880 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 881 } while(0U) 882 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 883 884 /** @brief Flush the UART Data registers. 885 * @param __HANDLE__ specifies the UART Handle. 886 * @retval None 887 */ 888 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 889 do{ \ 890 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 891 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 892 } while(0U) 893 894 /** @brief Clear the specified UART pending flag. 895 * @param __HANDLE__ specifies the UART Handle. 896 * @param __FLAG__ specifies the flag to check. 897 * This parameter can be any combination of the following values: 898 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 899 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 900 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 901 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 902 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 903 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 904 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 905 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 906 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 907 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 908 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 909 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 910 * @retval None 911 */ 912 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 913 914 /** @brief Clear the UART PE pending flag. 915 * @param __HANDLE__ specifies the UART Handle. 916 * @retval None 917 */ 918 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 919 920 /** @brief Clear the UART FE pending flag. 921 * @param __HANDLE__ specifies the UART Handle. 922 * @retval None 923 */ 924 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 925 926 /** @brief Clear the UART NE pending flag. 927 * @param __HANDLE__ specifies the UART Handle. 928 * @retval None 929 */ 930 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 931 932 /** @brief Clear the UART ORE pending flag. 933 * @param __HANDLE__ specifies the UART Handle. 934 * @retval None 935 */ 936 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 937 938 /** @brief Clear the UART IDLE pending flag. 939 * @param __HANDLE__ specifies the UART Handle. 940 * @retval None 941 */ 942 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 943 944 /** @brief Clear the UART TX FIFO empty clear flag. 945 * @param __HANDLE__ specifies the UART Handle. 946 * @retval None 947 */ 948 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 949 950 /** @brief Check whether the specified UART flag is set or not. 951 * @param __HANDLE__ specifies the UART Handle. 952 * @param __FLAG__ specifies the flag to check. 953 * This parameter can be one of the following values: 954 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 955 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 956 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 957 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 958 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 959 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 960 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 961 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 962 * @arg @ref UART_FLAG_SBKF Send Break flag 963 * @arg @ref UART_FLAG_CMF Character match flag 964 * @arg @ref UART_FLAG_BUSY Busy flag 965 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 966 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 967 * @arg @ref UART_FLAG_CTS CTS Change flag 968 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 969 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 970 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 971 * @arg @ref UART_FLAG_TC Transmission Complete flag 972 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 973 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 974 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 975 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 976 * @arg @ref UART_FLAG_ORE Overrun Error flag 977 * @arg @ref UART_FLAG_NE Noise Error flag 978 * @arg @ref UART_FLAG_FE Framing Error flag 979 * @arg @ref UART_FLAG_PE Parity Error flag 980 * @retval The new state of __FLAG__ (TRUE or FALSE). 981 */ 982 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 983 984 /** @brief Enable the specified UART interrupt. 985 * @param __HANDLE__ specifies the UART Handle. 986 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 987 * This parameter can be one of the following values: 988 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 989 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 990 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 991 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 992 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 993 * @arg @ref UART_IT_CM Character match interrupt 994 * @arg @ref UART_IT_CTS CTS change interrupt 995 * @arg @ref UART_IT_LBD LIN Break detection interrupt 996 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 997 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 998 * @arg @ref UART_IT_TC Transmission complete interrupt 999 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1000 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1001 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1002 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1003 * @arg @ref UART_IT_PE Parity Error interrupt 1004 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1005 * @retval None 1006 */ 1007 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1008 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1009 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1010 ((__INTERRUPT__) & UART_IT_MASK))): \ 1011 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1012 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1013 ((__INTERRUPT__) & UART_IT_MASK))): \ 1014 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1015 ((__INTERRUPT__) & UART_IT_MASK)))) 1016 1017 /** @brief Disable the specified UART interrupt. 1018 * @param __HANDLE__ specifies the UART Handle. 1019 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1020 * This parameter can be one of the following values: 1021 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1022 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1023 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1024 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1025 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1026 * @arg @ref UART_IT_CM Character match interrupt 1027 * @arg @ref UART_IT_CTS CTS change interrupt 1028 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1029 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1030 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1031 * @arg @ref UART_IT_TC Transmission complete interrupt 1032 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1033 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1034 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1035 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1036 * @arg @ref UART_IT_PE Parity Error interrupt 1037 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1038 * @retval None 1039 */ 1040 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1041 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1042 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1043 ((__INTERRUPT__) & UART_IT_MASK))): \ 1044 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1045 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1046 ((__INTERRUPT__) & UART_IT_MASK))): \ 1047 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1048 ((__INTERRUPT__) & UART_IT_MASK)))) 1049 1050 /** @brief Check whether the specified UART interrupt has occurred or not. 1051 * @param __HANDLE__ specifies the UART Handle. 1052 * @param __INTERRUPT__ specifies the UART interrupt to check. 1053 * This parameter can be one of the following values: 1054 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1055 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1056 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1057 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1058 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1059 * @arg @ref UART_IT_CM Character match interrupt 1060 * @arg @ref UART_IT_CTS CTS change interrupt 1061 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1062 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1063 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1064 * @arg @ref UART_IT_TC Transmission complete interrupt 1065 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1066 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1067 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1068 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1069 * @arg @ref UART_IT_PE Parity Error interrupt 1070 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1071 * @retval The new state of __INTERRUPT__ (SET or RESET). 1072 */ 1073 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1074 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1075 1076 /** @brief Check whether the specified UART interrupt source is enabled or not. 1077 * @param __HANDLE__ specifies the UART Handle. 1078 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1079 * This parameter can be one of the following values: 1080 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1081 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1082 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1083 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1084 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1085 * @arg @ref UART_IT_CM Character match interrupt 1086 * @arg @ref UART_IT_CTS CTS change interrupt 1087 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1088 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1089 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1090 * @arg @ref UART_IT_TC Transmission complete interrupt 1091 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1092 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1093 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1094 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1095 * @arg @ref UART_IT_PE Parity Error interrupt 1096 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1097 * @retval The new state of __INTERRUPT__ (SET or RESET). 1098 */ 1099 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1100 (__HANDLE__)->Instance->CR1 : \ 1101 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1102 (__HANDLE__)->Instance->CR2 : \ 1103 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1104 (((uint16_t)(__INTERRUPT__)) &\ 1105 UART_IT_MASK))) != RESET) ? SET : RESET) 1106 1107 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1108 * @param __HANDLE__ specifies the UART Handle. 1109 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1110 * to clear the corresponding interrupt 1111 * This parameter can be one of the following values: 1112 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1113 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1114 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1115 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1116 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1117 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1118 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1119 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1120 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1121 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1122 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1123 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1124 * @retval None 1125 */ 1126 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1127 1128 /** @brief Set a specific UART request flag. 1129 * @param __HANDLE__ specifies the UART Handle. 1130 * @param __REQ__ specifies the request flag to set 1131 * This parameter can be one of the following values: 1132 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1133 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1134 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1135 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1136 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1137 * @retval None 1138 */ 1139 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1140 1141 /** @brief Enable the UART one bit sample method. 1142 * @param __HANDLE__ specifies the UART Handle. 1143 * @retval None 1144 */ 1145 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1146 1147 /** @brief Disable the UART one bit sample method. 1148 * @param __HANDLE__ specifies the UART Handle. 1149 * @retval None 1150 */ 1151 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1152 1153 /** @brief Enable UART. 1154 * @param __HANDLE__ specifies the UART Handle. 1155 * @retval None 1156 */ 1157 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1158 1159 /** @brief Disable UART. 1160 * @param __HANDLE__ specifies the UART Handle. 1161 * @retval None 1162 */ 1163 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1164 1165 /** @brief Enable CTS flow control. 1166 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1167 * without need to call HAL_UART_Init() function. 1168 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1169 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1170 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1171 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1172 * - macro could only be called when corresponding UART instance is disabled 1173 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1174 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1175 * @param __HANDLE__ specifies the UART Handle. 1176 * @retval None 1177 */ 1178 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1179 do{ \ 1180 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1181 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1182 } while(0U) 1183 1184 /** @brief Disable CTS flow control. 1185 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1186 * without need to call HAL_UART_Init() function. 1187 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1188 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1189 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1190 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1191 * - macro could only be called when corresponding UART instance is disabled 1192 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1193 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1194 * @param __HANDLE__ specifies the UART Handle. 1195 * @retval None 1196 */ 1197 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1198 do{ \ 1199 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1200 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1201 } while(0U) 1202 1203 /** @brief Enable RTS flow control. 1204 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1205 * without need to call HAL_UART_Init() function. 1206 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1207 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1208 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1209 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1210 * - macro could only be called when corresponding UART instance is disabled 1211 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1212 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1213 * @param __HANDLE__ specifies the UART Handle. 1214 * @retval None 1215 */ 1216 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1217 do{ \ 1218 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1219 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1220 } while(0U) 1221 1222 /** @brief Disable RTS flow control. 1223 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1224 * without need to call HAL_UART_Init() function. 1225 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1226 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1227 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1228 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1229 * - macro could only be called when corresponding UART instance is disabled 1230 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1231 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1232 * @param __HANDLE__ specifies the UART Handle. 1233 * @retval None 1234 */ 1235 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1236 do{ \ 1237 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1238 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1239 } while(0U) 1240 /** 1241 * @} 1242 */ 1243 1244 /* Private macros --------------------------------------------------------*/ 1245 /** @defgroup UART_Private_Macros UART Private Macros 1246 * @{ 1247 */ 1248 /** @brief Get UART clock division factor from clock prescaler value. 1249 * @param __CLOCKPRESCALER__ UART prescaler value. 1250 * @retval UART clock division factor 1251 */ 1252 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1253 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1254 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1255 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1256 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1257 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1258 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1259 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1260 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1261 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1262 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1263 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U) 1264 1265 /** @brief BRR division operation to set BRR register with LPUART. 1266 * @param __PCLK__ LPUART clock. 1267 * @param __BAUD__ Baud rate set by the user. 1268 * @param __CLOCKPRESCALER__ UART prescaler value. 1269 * @retval Division result 1270 */ 1271 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1272 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1273 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1274 ) 1275 1276 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1277 * @param __PCLK__ UART clock. 1278 * @param __BAUD__ Baud rate set by the user. 1279 * @param __CLOCKPRESCALER__ UART prescaler value. 1280 * @retval Division result 1281 */ 1282 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1283 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1284 1285 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1286 * @param __PCLK__ UART clock. 1287 * @param __BAUD__ Baud rate set by the user. 1288 * @param __CLOCKPRESCALER__ UART prescaler value. 1289 * @retval Division result 1290 */ 1291 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1292 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1293 1294 /** @brief Check whether or not UART instance is Low Power UART. 1295 * @param __HANDLE__ specifies the UART Handle. 1296 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1297 */ 1298 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1299 1300 /** @brief Check UART Baud rate. 1301 * @param __BAUDRATE__ Baudrate specified by the user. 1302 * The maximum Baud Rate is derived from the maximum clock on H7RS (i.e. 125 MHz) 1303 * divided by the smallest oversampling used on the USART (i.e. 8) 1304 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1305 */ 1306 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15625001U) 1307 1308 /** @brief Check UART assertion time. 1309 * @param __TIME__ 5-bit value assertion time. 1310 * @retval Test result (TRUE or FALSE). 1311 */ 1312 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1313 1314 /** @brief Check UART deassertion time. 1315 * @param __TIME__ 5-bit value deassertion time. 1316 * @retval Test result (TRUE or FALSE). 1317 */ 1318 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1319 1320 /** 1321 * @brief Ensure that UART frame number of stop bits is valid. 1322 * @param __STOPBITS__ UART frame number of stop bits. 1323 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1324 */ 1325 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1326 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1327 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1328 ((__STOPBITS__) == UART_STOPBITS_2)) 1329 1330 /** 1331 * @brief Ensure that LPUART frame number of stop bits is valid. 1332 * @param __STOPBITS__ LPUART frame number of stop bits. 1333 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1334 */ 1335 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1336 ((__STOPBITS__) == UART_STOPBITS_2)) 1337 1338 /** 1339 * @brief Ensure that UART frame parity is valid. 1340 * @param __PARITY__ UART frame parity. 1341 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1342 */ 1343 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1344 ((__PARITY__) == UART_PARITY_EVEN) || \ 1345 ((__PARITY__) == UART_PARITY_ODD)) 1346 1347 /** 1348 * @brief Ensure that UART hardware flow control is valid. 1349 * @param __CONTROL__ UART hardware flow control. 1350 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1351 */ 1352 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1353 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1354 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1355 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1356 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1357 1358 /** 1359 * @brief Ensure that UART communication mode is valid. 1360 * @param __MODE__ UART communication mode. 1361 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1362 */ 1363 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1364 1365 /** 1366 * @brief Ensure that UART state is valid. 1367 * @param __STATE__ UART state. 1368 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1369 */ 1370 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1371 ((__STATE__) == UART_STATE_ENABLE)) 1372 1373 /** 1374 * @brief Ensure that UART oversampling is valid. 1375 * @param __SAMPLING__ UART oversampling. 1376 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1377 */ 1378 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1379 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1380 1381 /** 1382 * @brief Ensure that UART frame sampling is valid. 1383 * @param __ONEBIT__ UART frame sampling. 1384 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1385 */ 1386 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1387 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1388 1389 /** 1390 * @brief Ensure that UART auto Baud rate detection mode is valid. 1391 * @param __MODE__ UART auto Baud rate detection mode. 1392 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1393 */ 1394 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1395 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1396 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1397 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1398 1399 /** 1400 * @brief Ensure that UART receiver timeout setting is valid. 1401 * @param __TIMEOUT__ UART receiver timeout setting. 1402 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1403 */ 1404 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1405 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1406 1407 /** @brief Check the receiver timeout value. 1408 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1409 * @param __TIMEOUTVALUE__ receiver timeout value. 1410 * @retval Test result (TRUE or FALSE) 1411 */ 1412 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1413 1414 /** 1415 * @brief Ensure that UART LIN state is valid. 1416 * @param __LIN__ UART LIN state. 1417 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1418 */ 1419 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1420 ((__LIN__) == UART_LIN_ENABLE)) 1421 1422 /** 1423 * @brief Ensure that UART LIN break detection length is valid. 1424 * @param __LENGTH__ UART LIN break detection length. 1425 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1426 */ 1427 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1428 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1429 1430 #if defined(HAL_DMA_MODULE_ENABLED) 1431 /** 1432 * @brief Ensure that UART DMA TX state is valid. 1433 * @param __DMATX__ UART DMA TX state. 1434 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1435 */ 1436 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1437 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1438 1439 /** 1440 * @brief Ensure that UART DMA RX state is valid. 1441 * @param __DMARX__ UART DMA RX state. 1442 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1443 */ 1444 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1445 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1446 1447 #endif /* HAL_DMA_MODULE_ENABLED */ 1448 /** 1449 * @brief Ensure that UART half-duplex state is valid. 1450 * @param __HDSEL__ UART half-duplex state. 1451 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1452 */ 1453 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1454 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1455 1456 /** 1457 * @brief Ensure that UART wake-up method is valid. 1458 * @param __WAKEUP__ UART wake-up method . 1459 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1460 */ 1461 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1462 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1463 1464 /** 1465 * @brief Ensure that UART request parameter is valid. 1466 * @param __PARAM__ UART request parameter. 1467 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1468 */ 1469 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1470 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1471 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1472 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1473 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1474 1475 /** 1476 * @brief Ensure that UART advanced features initialization is valid. 1477 * @param __INIT__ UART advanced features initialization. 1478 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1479 */ 1480 #if defined(HAL_DMA_MODULE_ENABLED) 1481 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1482 UART_ADVFEATURE_TXINVERT_INIT | \ 1483 UART_ADVFEATURE_RXINVERT_INIT | \ 1484 UART_ADVFEATURE_DATAINVERT_INIT | \ 1485 UART_ADVFEATURE_SWAP_INIT | \ 1486 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1487 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1488 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1489 UART_ADVFEATURE_MSBFIRST_INIT)) 1490 #else 1491 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1492 UART_ADVFEATURE_TXINVERT_INIT | \ 1493 UART_ADVFEATURE_RXINVERT_INIT | \ 1494 UART_ADVFEATURE_DATAINVERT_INIT | \ 1495 UART_ADVFEATURE_SWAP_INIT | \ 1496 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1497 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1498 UART_ADVFEATURE_MSBFIRST_INIT)) 1499 #endif /* HAL_DMA_MODULE_ENABLED */ 1500 1501 /** 1502 * @brief Ensure that UART frame TX inversion setting is valid. 1503 * @param __TXINV__ UART frame TX inversion setting. 1504 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1505 */ 1506 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1507 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1508 1509 /** 1510 * @brief Ensure that UART frame RX inversion setting is valid. 1511 * @param __RXINV__ UART frame RX inversion setting. 1512 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1513 */ 1514 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1515 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1516 1517 /** 1518 * @brief Ensure that UART frame data inversion setting is valid. 1519 * @param __DATAINV__ UART frame data inversion setting. 1520 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1521 */ 1522 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1523 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1524 1525 /** 1526 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1527 * @param __SWAP__ UART frame RX/TX pins swap setting. 1528 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1529 */ 1530 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1531 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1532 1533 /** 1534 * @brief Ensure that UART frame overrun setting is valid. 1535 * @param __OVERRUN__ UART frame overrun setting. 1536 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1537 */ 1538 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1539 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1540 1541 /** 1542 * @brief Ensure that UART auto Baud rate state is valid. 1543 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1544 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1545 */ 1546 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1547 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1548 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1549 1550 #if defined(HAL_DMA_MODULE_ENABLED) 1551 /** 1552 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1553 * @param __DMA__ UART DMA enabling or disabling on error setting. 1554 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1555 */ 1556 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1557 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1558 #endif /* HAL_DMA_MODULE_ENABLED */ 1559 1560 /** 1561 * @brief Ensure that UART frame MSB first setting is valid. 1562 * @param __MSBFIRST__ UART frame MSB first setting. 1563 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1564 */ 1565 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1566 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1567 1568 /** 1569 * @brief Ensure that UART stop mode state is valid. 1570 * @param __STOPMODE__ UART stop mode state. 1571 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1572 */ 1573 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1574 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1575 1576 /** 1577 * @brief Ensure that UART mute mode state is valid. 1578 * @param __MUTE__ UART mute mode state. 1579 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1580 */ 1581 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1582 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1583 1584 /** 1585 * @brief Ensure that UART wake-up selection is valid. 1586 * @param __WAKE__ UART wake-up selection. 1587 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1588 */ 1589 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1590 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1591 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1592 1593 /** 1594 * @brief Ensure that UART driver enable polarity is valid. 1595 * @param __POLARITY__ UART driver enable polarity. 1596 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1597 */ 1598 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1599 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1600 1601 /** 1602 * @brief Ensure that UART Prescaler is valid. 1603 * @param __CLOCKPRESCALER__ UART Prescaler value. 1604 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1605 */ 1606 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1607 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1608 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1609 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1610 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1611 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1612 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1613 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1614 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1615 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1616 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1617 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1618 1619 /** 1620 * @} 1621 */ 1622 1623 /* Include UART HAL Extended module */ 1624 #include "stm32h7rsxx_hal_uart_ex.h" 1625 1626 /* Exported functions --------------------------------------------------------*/ 1627 /** @addtogroup UART_Exported_Functions UART Exported Functions 1628 * @{ 1629 */ 1630 1631 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1632 * @{ 1633 */ 1634 1635 /* Initialization and de-initialization functions ****************************/ 1636 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1637 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1638 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1639 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1640 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1641 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1642 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1643 1644 /* Callbacks Register/UnRegister functions ***********************************/ 1645 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1646 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1647 pUART_CallbackTypeDef pCallback); 1648 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1649 1650 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1651 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1652 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1653 1654 /** 1655 * @} 1656 */ 1657 1658 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1659 * @{ 1660 */ 1661 1662 /* IO operation functions *****************************************************/ 1663 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1664 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1665 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1666 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1667 #if defined(HAL_DMA_MODULE_ENABLED) 1668 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1669 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1670 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1671 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1672 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1673 #endif /* HAL_DMA_MODULE_ENABLED */ 1674 /* Transfer Abort functions */ 1675 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1676 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1677 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1678 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1679 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1680 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1681 1682 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1683 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1684 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1685 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1686 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1687 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1688 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1689 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1690 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1691 1692 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1693 1694 /** 1695 * @} 1696 */ 1697 1698 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1699 * @{ 1700 */ 1701 1702 /* Peripheral Control functions ************************************************/ 1703 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1704 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1705 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1706 1707 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1708 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1709 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1710 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1711 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1712 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1713 1714 /** 1715 * @} 1716 */ 1717 1718 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1719 * @{ 1720 */ 1721 1722 /* Peripheral State and Errors functions **************************************************/ 1723 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1724 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1725 1726 /** 1727 * @} 1728 */ 1729 1730 /** 1731 * @} 1732 */ 1733 1734 /* Private functions -----------------------------------------------------------*/ 1735 /** @addtogroup UART_Private_Functions UART Private Functions 1736 * @{ 1737 */ 1738 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1739 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1740 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1741 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1742 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1743 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1744 uint32_t Tickstart, uint32_t Timeout); 1745 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1746 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1747 #if defined(HAL_DMA_MODULE_ENABLED) 1748 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1749 #endif /* HAL_DMA_MODULE_ENABLED */ 1750 1751 /** 1752 * @} 1753 */ 1754 1755 /* Private variables -----------------------------------------------------------*/ 1756 /** @defgroup UART_Private_variables UART Private variables 1757 * @{ 1758 */ 1759 /* Prescaler Table used in BRR computation macros. 1760 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1761 extern const uint16_t UARTPrescTable[12]; 1762 /** 1763 * @} 1764 */ 1765 1766 /** 1767 * @} 1768 */ 1769 1770 /** 1771 * @} 1772 */ 1773 1774 #ifdef __cplusplus 1775 } 1776 #endif 1777 1778 #endif /* STM32H7RSxx_HAL_UART_H */ 1779
