1 /* 2 * Copyright (c) 2014-2019, Texas Instruments Incorporated 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * * Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /** ============================================================================ 33 * @file UARTCC32XXDMA.h 34 * 35 * @brief UART driver implementation for a CC32XX UART controller, using 36 * the micro DMA controller. 37 * 38 * The UART header file should be included in an application as follows: 39 * @code 40 * #include <ti/drivers/UART.h> 41 * #include <ti/drivers/uart/UARTCC32XXDMA.h> 42 * @endcode 43 * 44 * Refer to @ref UART.h for a complete description of APIs & example of use. 45 * 46 * 47 * # Device Specific Pin Mode Macros # 48 * This header file contains pin mode definitions used to specify the 49 * UART TX and RX pin assignment in the UARTCC32XXDMA_HWAttrsV1 structure. 50 * Please refer to the CC32XX Techincal Reference Manual for details on pin 51 * multiplexing. 52 * 53 * # Flow Control # 54 * To enable Flow Control, the RTS and CTS pins must be assigned in the 55 * ::UARTCC32XX_HWAttrsV1. 56 * 57 * ============================================================================ 58 */ 59 60 #ifndef ti_drivers_uart_UARTCC32XXDMA__include 61 #define ti_drivers_uart_UARTCC32XXDMA__include 62 63 #include <stdint.h> 64 #include <stdbool.h> 65 66 #include <ti/drivers/dpl/ClockP.h> 67 #include <ti/drivers/dpl/HwiP.h> 68 69 #include <ti/drivers/dpl/SemaphoreP.h> 70 #include <ti/drivers/Power.h> 71 #include <ti/drivers/power/PowerCC32XX.h> 72 #include <ti/drivers/UART.h> 73 #include <ti/drivers/dma/UDMACC32XX.h> 74 75 #ifdef __cplusplus 76 extern "C" { 77 #endif 78 79 /*! 80 * @brief Indicates a pin is not being used 81 * 82 * If hardware flow control is not being used, the UART CTS and RTS 83 * pins should be set to UARTCC32XX_PIN_UNASSIGNED. 84 */ 85 #define UARTCC32XXDMA_PIN_UNASSIGNED 0xFFF 86 /* 87 * The bits in the pin mode macros are as follows: 88 * The lower 8 bits of the macro refer to the pin, offset by 1, to match 89 * driverlib pin defines. For example, UARTCC32XXDMA_PIN_01_UART1_TX & 0xff = 0, 90 * which equals PIN_01 in driverlib pin.h. By matching the PIN_xx defines in 91 * driverlib pin.h, we can pass the pin directly to the driverlib functions. 92 * The upper 8 bits of the macro correspond to the pin mux confg mode 93 * value for the pin to operate in the UART mode. For example, pin 1 is 94 * configured with mode 7 to operate as UART1 TX. 95 */ 96 #define UARTCC32XXDMA_PIN_01_UART1_TX 0x700 /*!< PIN 1 is used for UART1 TX */ 97 #define UARTCC32XXDMA_PIN_02_UART1_RX 0x701 /*!< PIN 2 is used for UART1 RX */ 98 #define UARTCC32XXDMA_PIN_03_UART0_TX 0x702 /*!< PIN 3 is used for UART0 TX */ 99 #define UARTCC32XXDMA_PIN_04_UART0_RX 0x703 /*!< PIN 4 is used for UART0 RX */ 100 #define UARTCC32XXDMA_PIN_07_UART1_TX 0x506 /*!< PIN 7 is used for UART1 TX */ 101 #define UARTCC32XXDMA_PIN_08_UART1_RX 0x507 /*!< PIN 8 is used for UART1 RX */ 102 #define UARTCC32XXDMA_PIN_16_UART1_TX 0x20F /*!< PIN 16 is used for UART1 TX */ 103 #define UARTCC32XXDMA_PIN_17_UART1_RX 0x210 /*!< PIN 17 is used for UART1 RX */ 104 #define UARTCC32XXDMA_PIN_45_UART0_RX 0x92C /*!< PIN 45 is used for UART0 RX */ 105 #define UARTCC32XXDMA_PIN_45_UART1_RX 0x22C /*!< PIN 45 is used for UART1 RX */ 106 #define UARTCC32XXDMA_PIN_53_UART0_TX 0x934 /*!< PIN 53 is used for UART0 TX */ 107 #define UARTCC32XXDMA_PIN_55_UART0_TX 0x336 /*!< PIN 55 is used for UART0 TX */ 108 #define UARTCC32XXDMA_PIN_55_UART1_TX 0x636 /*!< PIN 55 is used for UART1 TX */ 109 #define UARTCC32XXDMA_PIN_57_UART0_RX 0x338 /*!< PIN 57 is used for UART0 RX */ 110 #define UARTCC32XXDMA_PIN_57_UART1_RX 0x638 /*!< PIN 57 is used for UART1 RX */ 111 #define UARTCC32XXDMA_PIN_58_UART1_TX 0x639 /*!< PIN 58 is used for UART1 TX */ 112 #define UARTCC32XXDMA_PIN_59_UART1_RX 0x63A /*!< PIN 59 is used for UART1 RX */ 113 #define UARTCC32XXDMA_PIN_62_UART0_TX 0xB3D /*!< PIN 62 is used for UART0 TX */ 114 115 /* 116 * Flow control pins. 117 */ 118 #define UARTCC32XXDMA_PIN_50_UART0_CTS 0xC31 /*!< PIN 50 is used for UART0 CTS */ 119 #define UARTCC32XXDMA_PIN_50_UART0_RTS 0x331 /*!< PIN 50 is used for UART0 RTS */ 120 #define UARTCC32XXDMA_PIN_50_UART1_RTS 0xA31 /*!< PIN 50 is used for UART1 RTS */ 121 #define UARTCC32XXDMA_PIN_52_UART0_RTS 0x633 /*!< PIN 52 is used for UART0 RTS */ 122 #define UARTCC32XXDMA_PIN_61_UART0_RTS 0x53C /*!< PIN 61 is used for UART0 RTS */ 123 #define UARTCC32XXDMA_PIN_61_UART0_CTS 0x63C /*!< PIN 61 is used for UART0 CTS */ 124 #define UARTCC32XXDMA_PIN_61_UART1_CTS 0x33C /*!< PIN 61 is used for UART1 CTS */ 125 #define UARTCC32XXDMA_PIN_62_UART0_RTS 0xA3D /*!< PIN 62 is used for UART0 RTS */ 126 #define UARTCC32XXDMA_PIN_62_UART1_RTS 0x33D /*!< PIN 62 is used for UART1 RTS */ 127 128 /*! 129 * @brief No hardware flow control 130 */ 131 #define UARTCC32XXDMA_FLOWCTRL_NONE 0 132 133 /*! 134 * @brief Hardware flow control 135 */ 136 #define UARTCC32XXDMA_FLOWCTRL_HARDWARE 1 137 138 /** 139 * @addtogroup UART_STATUS 140 * UARTCC32XXDMA_STATUS_* macros are command codes only defined in the 141 * UARTCC32XXDMA.h driver implementation and need to: 142 * @code 143 * #include <ti/drivers/uart/UARTCC32XXDMA.h> 144 * @endcode 145 * @{ 146 */ 147 148 /* Add UARTCC32XXDMA_STATUS_* macros here */ 149 150 /** @}*/ 151 152 /** 153 * @addtogroup UART_CMD 154 * UARTCC32XXDMA_CMD_* macros are command codes only defined in the 155 * UARTCC32XXDMA.h driver implementation and need to: 156 * @code 157 * #include <ti/drivers/uart/UARTCC32XXDMA.h> 158 * @endcode 159 * @{ 160 */ 161 162 /*! 163 * @brief Command used by UART_control to determines 164 * whether the UART transmitter is busy or not 165 * 166 * With this command code, @b arg is a pointer to a @c bool. 167 * @b *arg contains @c true if the UART is transmitting, 168 * else @c false if all transmissions are complete. 169 */ 170 #define UARTCC32XXDMA_CMD_IS_BUSY (UART_CMD_RESERVED + 0) 171 172 173 /*! 174 * @brief Command used by UART_control to determines 175 * if there are any characters in the receive FIFO 176 * 177 * With this command code, @b arg is a pointer to a @c bool. 178 * @b *arg contains @c true if there is data in the receive FIFO, 179 * or @c false if there is no data in the receive FIFO. 180 */ 181 #define UARTCC32XXDMA_CMD_IS_RX_DATA_AVAILABLE (UART_CMD_RESERVED + 1) 182 183 184 /*! 185 * @brief Command used by UART_control to determines 186 * if there is any space in the transmit FIFO 187 * 188 * With this command code, @b arg is a pointer to a @c bool. 189 * @b *arg contains @c true if there is space available in the transmit FIFO, 190 * or @c false if there is no space available in the transmit FIFO. 191 */ 192 #define UARTCC32XXDMA_CMD_IS_TX_SPACE_AVAILABLE (UART_CMD_RESERVED + 2) 193 194 195 /** @}*/ 196 197 /* UART function table pointer */ 198 extern const UART_FxnTable UARTCC32XXDMA_fxnTable; 199 200 /*! 201 * @brief The definition of an optional callback function used by the UART 202 * driver to notify the application when a receive error (FIFO overrun, 203 * parity error, etc) occurs. 204 * 205 * @param UART_Handle UART_Handle 206 * 207 * @param error The current value of the receive 208 * status register. Please refer to the 209 * device data sheet to interpret this 210 * value. 211 */ 212 typedef void (*UARTCC32XXDMA_ErrorCallback) (UART_Handle handle, uint32_t error); 213 214 /*! 215 * @brief UARTCC32XXDMA Hardware attributes 216 * 217 * These fields, with the exception of intPriority, 218 * are used by driverlib APIs and therefore must be populated by 219 * driverlib macro definitions. For CC32XXWare these definitions are found in: 220 * - inc/hw_memmap.h 221 * - inc/hw_ints.h 222 * 223 * intPriority is the UART peripheral's interrupt priority, as defined by the 224 * underlying OS. It is passed unmodified to the underlying OS's interrupt 225 * handler creation code, so you need to refer to the OS documentation 226 * for usage. For example, for SYS/BIOS applications, refer to the 227 * ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of 228 * interrupt priorities. If the driver uses the ti.dpl interface 229 * instead of making OS calls directly, then the HwiP port handles the 230 * interrupt priority in an OS specific way. In the case of the SYS/BIOS 231 * port, intPriority is passed unmodified to Hwi_create(). 232 * 233 * A sample structure is shown below: 234 * @code 235 * const UARTCC32XXDMA_HWAttrsV1 uartCC32XXHWAttrs[] = { 236 * { 237 * .baseAddr = UARTA0_BASE, 238 * .intNum = INT_UARTA0, 239 * .intPriority = (~0), 240 * .flowControl = UARTCC32XXDMA_FLOWCTRL_NONE, 241 * .rxChannelIndex = DMA_CH8_UARTA0_RX, 242 * .txChannelIndex = UDMA_CH9_UARTA0_TX, 243 * .rxPin = UARTCC32XXDMA_PIN_57_UART0_RX, 244 * .txPin = UARTCC32XXDMA_PIN_55_UART0_TX, 245 * .rtsPin = UARTCC32XXDMA_PIN_UNASSIGNED, 246 * .ctsPin = UARTCC32XX_DMA_PIN_UNASSIGNED, 247 * .errorFxn = NULL 248 * }, 249 * { 250 * .baseAddr = UARTA1_BASE, 251 * .intNum = INT_UARTA1, 252 * .intPriority = (~0), 253 * .flowControl = UARTCC32XXDMA_FLOWCTRL_HARDWARE, 254 * .rxChannelIndex = UDMA_CH10_UARTA1_RX, 255 * .txChannelIndex = UDMA_CH11_UARTA1_TX, 256 * .rxPin = UARTCC32XXDMA_PIN_08_UART1_RX, 257 * .txPin = UARTCC32XXDMA_PIN_07_UART1_TX, 258 * .rtsPin = UARTCC32XXDMA_PIN_50_UART1_RTS, 259 * .ctsPin = UARTCC32XXDMA_PIN_61_UART1_CTS, 260 * .errorFxn = NULL 261 * }, 262 * }; 263 * @endcode 264 */ 265 typedef struct { 266 /*! UART Peripheral's base address */ 267 unsigned int baseAddr; 268 /*! UART Peripheral's interrupt vector */ 269 unsigned int intNum; 270 /*! UART Peripheral's interrupt priority */ 271 unsigned int intPriority; 272 /*! Hardware flow control setting defined by driverlib */ 273 uint32_t flowControl; 274 /*! uDMA controlTable receive channel index */ 275 unsigned long rxChannelIndex; 276 /*! uDMA controlTable transmit channel index */ 277 unsigned long txChannelIndex; 278 /*! UART RX pin assignment */ 279 uint16_t rxPin; 280 /*! UART TX pin assignment */ 281 uint16_t txPin; 282 /*! UART clear to send (CTS) pin assignment */ 283 uint16_t ctsPin; 284 /*! UART request to send (RTS) pin assignment */ 285 uint16_t rtsPin; 286 /*! 287 * Application error function to be called on receive errors. 288 * Note: The UARTCC32XXDMA driver currently does not use this function. 289 */ 290 UARTCC32XXDMA_ErrorCallback errorFxn; 291 } UARTCC32XXDMA_HWAttrsV1; 292 293 /*! 294 * @brief UARTCC32XXDMA Object 295 * 296 * The application must not access any member variables of this structure! 297 */ 298 typedef struct { 299 /* UART control variables */ 300 bool opened; /* Has the obj been opened */ 301 UART_Mode readMode; /* Mode for all read calls */ 302 UART_Mode writeMode; /* Mode for all write calls */ 303 unsigned int readTimeout; /* Timeout for read semaphore */ 304 unsigned int writeTimeout; /* Timeout for write semaphore */ 305 UART_Callback readCallback; /* Pointer to read callback */ 306 UART_Callback writeCallback; /* Pointer to write callback */ 307 UART_ReturnMode readReturnMode; /* Receive return mode */ 308 UART_DataMode readDataMode; /* Type of data being read */ 309 UART_DataMode writeDataMode; /* Type of data being written */ 310 uint32_t baudRate; /* Baud rate for UART */ 311 UART_LEN dataLength; /* Data length for UART */ 312 UART_STOP stopBits; /* Stop bits for UART */ 313 UART_PAR parityType; /* Parity bit type for UART */ 314 UART_Echo readEcho; /* Echo received data back */ 315 316 /* UART write variables */ 317 const void *writeBuf; /* Buffer data pointer */ 318 size_t writeCount; /* Number of Chars sent */ 319 size_t writeSize; /* Chars remaining in buffer */ 320 321 /* UART receive variables */ 322 void *readBuf; /* Buffer data pointer */ 323 size_t readCount; /* Number of Chars read */ 324 size_t readSize; /* Chars remaining in buffer */ 325 326 /* Semaphores for blocking mode */ 327 SemaphoreP_Handle writeSem; /* UART write semaphore */ 328 SemaphoreP_Handle readSem; /* UART read semaphore */ 329 330 HwiP_Handle hwiHandle; 331 332 /* For Power management */ 333 ClockP_Handle txFifoEmptyClk; /* UART TX FIFO empty clock */ 334 Power_NotifyObj postNotify; /* LPDS wake-up notify object */ 335 unsigned int powerMgrId; /* Determined from base address */ 336 PowerCC32XX_ParkState prevParkTX; /* Previous park state TX pin */ 337 uint16_t txPin; /* TX pin ID */ 338 PowerCC32XX_ParkState prevParkRTS; /* Previous park state of RTS pin */ 339 uint16_t rtsPin; /* RTS pin ID */ 340 341 /* UDMA */ 342 UDMACC32XX_Handle dmaHandle; 343 } UARTCC32XXDMA_Object, *UARTCC32XXDMA_Handle; 344 345 #ifdef __cplusplus 346 } 347 #endif 348 349 #endif /* ti_drivers_uart_UARTCC32XXDMA__include */ 350
