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32 #include <ti/devices/msp432p4xx/driverlib/timer_a.h>
33 #include <ti/devices/msp432p4xx/driverlib/interrupt.h>
34 #include <ti/devices/msp432p4xx/driverlib/debug.h>
35 
privateTimer_AProcessClockSourceDivider(uint32_t timer,uint16_t clockSourceDivider)36 static void privateTimer_AProcessClockSourceDivider(uint32_t timer,
37         uint16_t clockSourceDivider)
38 {
39     TIMER_A_CMSIS(timer)->CTL &= ~TIMER_A_CTL_ID__8;
40     TIMER_A_CMSIS(timer)->EX0 &= ~TIMER_A_EX0_IDEX_MASK;
41 
42     switch (clockSourceDivider)
43     {
44     case TIMER_A_CLOCKSOURCE_DIVIDER_1:
45     case TIMER_A_CLOCKSOURCE_DIVIDER_2:
46         TIMER_A_CMSIS(timer)->CTL |= ((clockSourceDivider - 1) << 6);
47         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
48         break;
49     case TIMER_A_CLOCKSOURCE_DIVIDER_4:
50         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__4;
51         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
52         break;
53     case TIMER_A_CLOCKSOURCE_DIVIDER_8:
54         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__8;
55         TIMER_A_CMSIS(timer)->EX0 = TIMER_A_EX0_TAIDEX_0;
56         break;
57     case TIMER_A_CLOCKSOURCE_DIVIDER_3:
58     case TIMER_A_CLOCKSOURCE_DIVIDER_5:
59     case TIMER_A_CLOCKSOURCE_DIVIDER_6:
60     case TIMER_A_CLOCKSOURCE_DIVIDER_7:
61         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__1;
62         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider - 1);
63         break;
64 
65     case TIMER_A_CLOCKSOURCE_DIVIDER_10:
66     case TIMER_A_CLOCKSOURCE_DIVIDER_12:
67     case TIMER_A_CLOCKSOURCE_DIVIDER_14:
68     case TIMER_A_CLOCKSOURCE_DIVIDER_16:
69         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__2;
70         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 2 - 1);
71         break;
72 
73     case TIMER_A_CLOCKSOURCE_DIVIDER_20:
74     case TIMER_A_CLOCKSOURCE_DIVIDER_24:
75     case TIMER_A_CLOCKSOURCE_DIVIDER_28:
76     case TIMER_A_CLOCKSOURCE_DIVIDER_32:
77         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__4;
78         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 4 - 1);
79         break;
80     case TIMER_A_CLOCKSOURCE_DIVIDER_40:
81     case TIMER_A_CLOCKSOURCE_DIVIDER_48:
82     case TIMER_A_CLOCKSOURCE_DIVIDER_56:
83     case TIMER_A_CLOCKSOURCE_DIVIDER_64:
84         TIMER_A_CMSIS(timer)->CTL |= TIMER_A_CTL_ID__8;
85         TIMER_A_CMSIS(timer)->EX0 = (clockSourceDivider / 8 - 1);
86         break;
87     }
88 }
89 
Timer_A_startCounter(uint32_t timer,uint_fast16_t timerMode)90 void Timer_A_startCounter(uint32_t timer, uint_fast16_t timerMode)
91 {
92     ASSERT(
93             (TIMER_A_UPDOWN_MODE == timerMode)
94             || (TIMER_A_CONTINUOUS_MODE == timerMode)
95             || (TIMER_A_UP_MODE == timerMode));
96 
97     TIMER_A_CMSIS(timer)->CTL |= timerMode;
98 }
99 
Timer_A_configureContinuousMode(uint32_t timer,const Timer_A_ContinuousModeConfig * config)100 void Timer_A_configureContinuousMode(uint32_t timer,
101         const Timer_A_ContinuousModeConfig *config)
102 {
103     ASSERT(
104             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
105             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
106             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
107             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
108                     == config->clockSource));
109 
110     ASSERT(
111             (TIMER_A_DO_CLEAR == config->timerClear)
112             || (TIMER_A_SKIP_CLEAR == config->timerClear));
113 
114     ASSERT(
115             (TIMER_A_TAIE_INTERRUPT_ENABLE == config->timerInterruptEnable_TAIE)
116             || (TIMER_A_TAIE_INTERRUPT_DISABLE
117                     == config->timerInterruptEnable_TAIE));
118 
119     ASSERT(
120             (TIMER_A_CLOCKSOURCE_DIVIDER_1 == config->clockSourceDivider)
121             || (TIMER_A_CLOCKSOURCE_DIVIDER_2
122                     == config->clockSourceDivider)
123             || (TIMER_A_CLOCKSOURCE_DIVIDER_4
124                     == config->clockSourceDivider)
125             || (TIMER_A_CLOCKSOURCE_DIVIDER_8
126                     == config->clockSourceDivider)
127             || (TIMER_A_CLOCKSOURCE_DIVIDER_3
128                     == config->clockSourceDivider)
129             || (TIMER_A_CLOCKSOURCE_DIVIDER_5
130                     == config->clockSourceDivider)
131             || (TIMER_A_CLOCKSOURCE_DIVIDER_6
132                     == config->clockSourceDivider)
133             || (TIMER_A_CLOCKSOURCE_DIVIDER_7
134                     == config->clockSourceDivider)
135             || (TIMER_A_CLOCKSOURCE_DIVIDER_10
136                     == config->clockSourceDivider)
137             || (TIMER_A_CLOCKSOURCE_DIVIDER_12
138                     == config->clockSourceDivider)
139             || (TIMER_A_CLOCKSOURCE_DIVIDER_14
140                     == config->clockSourceDivider)
141             || (TIMER_A_CLOCKSOURCE_DIVIDER_16
142                     == config->clockSourceDivider)
143             || (TIMER_A_CLOCKSOURCE_DIVIDER_20
144                     == config->clockSourceDivider)
145             || (TIMER_A_CLOCKSOURCE_DIVIDER_24
146                     == config->clockSourceDivider)
147             || (TIMER_A_CLOCKSOURCE_DIVIDER_28
148                     == config->clockSourceDivider)
149             || (TIMER_A_CLOCKSOURCE_DIVIDER_32
150                     == config->clockSourceDivider)
151             || (TIMER_A_CLOCKSOURCE_DIVIDER_40
152                     == config->clockSourceDivider)
153             || (TIMER_A_CLOCKSOURCE_DIVIDER_48
154                     == config->clockSourceDivider)
155             || (TIMER_A_CLOCKSOURCE_DIVIDER_56
156                     == config->clockSourceDivider)
157             || (TIMER_A_CLOCKSOURCE_DIVIDER_64
158                     == config->clockSourceDivider));
159 
160     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
161 
162     TIMER_A_CMSIS(timer)->CTL = (TIMER_A_CMSIS(timer)->CTL
163             & ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
164                     + TIMER_A_UPDOWN_MODE + TIMER_A_DO_CLEAR
165                     + TIMER_A_TAIE_INTERRUPT_ENABLE))
166             | (config->clockSource + config->timerClear
167                     + config->timerInterruptEnable_TAIE);
168 }
169 
Timer_A_configureUpMode(uint32_t timer,const Timer_A_UpModeConfig * config)170 void Timer_A_configureUpMode(uint32_t timer, const Timer_A_UpModeConfig *config)
171 {
172     ASSERT(
173             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
174             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
175             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
176             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
177                     == config->clockSource));
178 
179     ASSERT(
180             (TIMER_A_DO_CLEAR == config->timerClear)
181             || (TIMER_A_SKIP_CLEAR == config->timerClear));
182 
183     ASSERT(
184             (TIMER_A_DO_CLEAR == config->timerClear)
185             || (TIMER_A_SKIP_CLEAR == config->timerClear));
186 
187     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
188 
189     TIMER_A_CMSIS(timer)->CTL &=
190             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
191                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
192 
193     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + config->timerClear
194             + config->timerInterruptEnable_TAIE);
195 
196     if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
197             == config->captureCompareInterruptEnable_CCR0_CCIE)
198         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 1;
199     else
200         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 0;
201 
202     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
203 }
204 
Timer_A_configureUpDownMode(uint32_t timer,const Timer_A_UpDownModeConfig * config)205 void Timer_A_configureUpDownMode(uint32_t timer,
206         const Timer_A_UpDownModeConfig *config)
207 {
208     ASSERT(
209             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
210             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
211             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
212             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
213                     == config->clockSource));
214 
215     ASSERT(
216             (TIMER_A_DO_CLEAR == config->timerClear)
217             || (TIMER_A_SKIP_CLEAR == config->timerClear));
218 
219     ASSERT(
220             (TIMER_A_DO_CLEAR == config->timerClear)
221             || (TIMER_A_SKIP_CLEAR == config->timerClear));
222 
223     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
224 
225     TIMER_A_CMSIS(timer)->CTL &=
226             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
227                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
228 
229     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + TIMER_A_STOP_MODE
230             + config->timerClear + config->timerInterruptEnable_TAIE);
231     if (TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE
232             == config->captureCompareInterruptEnable_CCR0_CCIE)
233         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 1;
234     else
235         BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[0],TIMER_A_CCTLN_CCIE_OFS) = 0;
236 
237     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
238 }
239 
Timer_A_initCapture(uint32_t timer,const Timer_A_CaptureModeConfig * config)240 void Timer_A_initCapture(uint32_t timer,
241         const Timer_A_CaptureModeConfig *config)
242 {
243     ASSERT(
244             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->captureRegister)
245             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
246                     == config->captureRegister)
247             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
248                     == config->captureRegister)
249             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
250                     == config->captureRegister)
251             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
252                     == config->captureRegister)
253             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
254                     == config->captureRegister)
255             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
256                     == config->captureRegister));
257 
258     ASSERT(
259             (TIMER_A_CAPTUREMODE_NO_CAPTURE == config->captureMode)
260             || (TIMER_A_CAPTUREMODE_RISING_EDGE == config->captureMode)
261             || (TIMER_A_CAPTUREMODE_FALLING_EDGE == config->captureMode)
262             || (TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE
263                     == config->captureMode));
264 
265     ASSERT(
266             (TIMER_A_CAPTURE_INPUTSELECT_CCIxA == config->captureInputSelect)
267             || (TIMER_A_CAPTURE_INPUTSELECT_CCIxB
268                     == config->captureInputSelect)
269             || (TIMER_A_CAPTURE_INPUTSELECT_GND
270                     == config->captureInputSelect)
271             || (TIMER_A_CAPTURE_INPUTSELECT_Vcc
272                     == config->captureInputSelect));
273 
274     ASSERT(
275             (TIMER_A_CAPTURE_ASYNCHRONOUS == config->synchronizeCaptureSource)
276             || (TIMER_A_CAPTURE_SYNCHRONOUS
277                     == config->synchronizeCaptureSource));
278 
279     ASSERT(
280             (TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE
281                     == config->captureInterruptEnable)
282             || (TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
283                     == config->captureInterruptEnable));
284 
285     ASSERT(
286             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->captureOutputMode)
287             || (TIMER_A_OUTPUTMODE_SET == config->captureOutputMode)
288             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
289                     == config->captureOutputMode)
290             || (TIMER_A_OUTPUTMODE_SET_RESET
291                     == config->captureOutputMode)
292             || (TIMER_A_OUTPUTMODE_TOGGLE == config->captureOutputMode)
293             || (TIMER_A_OUTPUTMODE_RESET == config->captureOutputMode)
294             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
295                     == config->captureOutputMode)
296             || (TIMER_A_OUTPUTMODE_RESET_SET
297                     == config->captureOutputMode));
298 
299     if (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->captureRegister)
300     {
301         //CaptureCompare register 0 only supports certain modes
302         ASSERT(
303                 (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->captureOutputMode)
304                 || (TIMER_A_OUTPUTMODE_SET == config->captureOutputMode)
305                 || (TIMER_A_OUTPUTMODE_TOGGLE
306                         == config->captureOutputMode)
307                 || (TIMER_A_OUTPUTMODE_RESET
308                         == config->captureOutputMode));
309     }
310     uint8_t idx = (config->captureRegister>>1)-1;
311     TIMER_A_CMSIS(timer)->CCTL[idx] =
312             (TIMER_A_CMSIS(timer)->CCTL[idx]
313                     & ~(TIMER_A_CAPTUREMODE_RISING_AND_FALLING_EDGE
314                             | TIMER_A_CAPTURE_INPUTSELECT_Vcc
315                             | TIMER_A_CAPTURE_SYNCHRONOUS | TIMER_A_DO_CLEAR
316                             | TIMER_A_TAIE_INTERRUPT_ENABLE | TIMER_A_CCTLN_CM_3))
317                     | (config->captureMode | config->captureInputSelect
318                             | config->synchronizeCaptureSource
319                             | config->captureInterruptEnable
320                             | config->captureOutputMode | TIMER_A_CCTLN_CAP);
321 
322 }
323 
Timer_A_initCompare(uint32_t timer,const Timer_A_CompareModeConfig * config)324 void Timer_A_initCompare(uint32_t timer,
325         const Timer_A_CompareModeConfig *config)
326 {
327     ASSERT(
328             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
329             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
330                     == config->compareRegister)
331             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
332                     == config->compareRegister)
333             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
334                     == config->compareRegister)
335             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
336                     == config->compareRegister)
337             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
338                     == config->compareRegister)
339             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
340                     == config->compareRegister));
341 
342     ASSERT(
343             (TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
344                     == config->compareInterruptEnable)
345             || (TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE
346                     == config->compareInterruptEnable));
347 
348     ASSERT(
349             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
350             || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
351             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
352                     == config->compareOutputMode)
353             || (TIMER_A_OUTPUTMODE_SET_RESET
354                     == config->compareOutputMode)
355             || (TIMER_A_OUTPUTMODE_TOGGLE == config->compareOutputMode)
356             || (TIMER_A_OUTPUTMODE_RESET == config->compareOutputMode)
357             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
358                     == config->compareOutputMode)
359             || (TIMER_A_OUTPUTMODE_RESET_SET
360                     == config->compareOutputMode));
361 
362     if (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
363     {
364         //CaptureCompare register 0 only supports certain modes
365         ASSERT(
366                 (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
367                 || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
368                 || (TIMER_A_OUTPUTMODE_TOGGLE
369                         == config->compareOutputMode)
370                 || (TIMER_A_OUTPUTMODE_RESET
371                         == config->compareOutputMode));
372     }
373 
374     uint8_t idx = (config->compareRegister>>1)-1;
375     TIMER_A_CMSIS(timer)->CCTL[idx] =
376             (TIMER_A_CMSIS(timer)->CCTL[idx]
377              & ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
378              | TIMER_A_OUTPUTMODE_RESET_SET | TIMER_A_CCTLN_CAP))
379              | (config->compareInterruptEnable + config->compareOutputMode);
380 
381    TIMER_A_CMSIS(timer)->CCR[idx] = config->compareValue;
382 
383 }
384 
Timer_A_getCounterValue(uint32_t timer)385 uint16_t Timer_A_getCounterValue(uint32_t timer)
386 {
387     uint_fast16_t voteOne, voteTwo, res;
388 
389     voteTwo = TIMER_A_CMSIS(timer)->R;
390 
391     do
392     {
393         voteOne = voteTwo;
394         voteTwo = TIMER_A_CMSIS(timer)->R;
395 
396         if (voteTwo > voteOne)
397             res = voteTwo - voteOne;
398         else if (voteOne > voteTwo)
399             res = voteOne - voteTwo;
400         else
401             res = 0;
402 
403     } while (res > TIMER_A_THRESHOLD);
404 
405     return voteTwo;
406 
407 }
408 
Timer_A_clearTimer(uint32_t timer)409 void Timer_A_clearTimer(uint32_t timer)
410 {
411     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL , TIMER_A_CTL_CLR_OFS) = 1;
412 }
413 
Timer_A_getSynchronizedCaptureCompareInput(uint32_t timer,uint_fast16_t captureCompareRegister,uint_fast16_t synchronizedSetting)414 uint_fast8_t Timer_A_getSynchronizedCaptureCompareInput(uint32_t timer,
415         uint_fast16_t captureCompareRegister, uint_fast16_t synchronizedSetting)
416 {
417     ASSERT(
418             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
419             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
420                     == captureCompareRegister)
421             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
422                     == captureCompareRegister)
423             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
424                     == captureCompareRegister)
425             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
426                     == captureCompareRegister)
427             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
428                     == captureCompareRegister)
429             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
430                     == captureCompareRegister));
431 
432     ASSERT(
433             (TIMER_A_READ_CAPTURE_COMPARE_INPUT == synchronizedSetting)
434             || (TIMER_A_READ_SYNCHRONIZED_CAPTURECOMPAREINPUT
435                     == synchronizedSetting));
436 
437     uint8_t idx = (captureCompareRegister>>1) - 1;
438     if (TIMER_A_CMSIS(timer)->CCTL[idx] & synchronizedSetting)
439         return TIMER_A_CAPTURECOMPARE_INPUT_HIGH;
440     else
441         return TIMER_A_CAPTURECOMPARE_INPUT_LOW;
442 }
443 
Timer_A_getOutputForOutputModeOutBitValue(uint32_t timer,uint_fast16_t captureCompareRegister)444 uint_fast8_t Timer_A_getOutputForOutputModeOutBitValue(uint32_t timer,
445         uint_fast16_t captureCompareRegister)
446 {
447     ASSERT(
448             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
449             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
450                     == captureCompareRegister)
451             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
452                     == captureCompareRegister)
453             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
454                     == captureCompareRegister)
455             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
456                     == captureCompareRegister)
457             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
458                     == captureCompareRegister)
459             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
460                     == captureCompareRegister));
461 
462     uint8_t idx = (captureCompareRegister>>1) - 1;
463     if (BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_OUT_OFS))
464         return TIMER_A_OUTPUTMODE_OUTBITVALUE_HIGH;
465     else
466         return TIMER_A_OUTPUTMODE_OUTBITVALUE_LOW;
467 }
468 
Timer_A_getCaptureCompareCount(uint32_t timer,uint_fast16_t captureCompareRegister)469 uint_fast16_t Timer_A_getCaptureCompareCount(uint32_t timer,
470         uint_fast16_t captureCompareRegister)
471 {
472     ASSERT(
473             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
474             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
475                     == captureCompareRegister)
476             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
477                     == captureCompareRegister)
478             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
479                     == captureCompareRegister)
480             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
481                     == captureCompareRegister)
482             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
483                     == captureCompareRegister)
484             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
485                     == captureCompareRegister));
486 
487     uint8_t idx = (captureCompareRegister>>1) - 1;
488     return (TIMER_A_CMSIS(timer)->CCR[idx]);
489 }
490 
Timer_A_setOutputForOutputModeOutBitValue(uint32_t timer,uint_fast16_t captureCompareRegister,uint_fast8_t outputModeOutBitValue)491 void Timer_A_setOutputForOutputModeOutBitValue(uint32_t timer,
492         uint_fast16_t captureCompareRegister,
493         uint_fast8_t outputModeOutBitValue)
494 {
495     uint8_t idx = (captureCompareRegister>>1) - 1;
496     TIMER_A_CMSIS(timer)->CCTL[idx] =
497             ((TIMER_A_CMSIS(timer)->CCTL[idx])
498                     & ~(TIMER_A_OUTPUTMODE_RESET_SET))
499                     | (outputModeOutBitValue);
500 }
501 
Timer_A_generatePWM(uint32_t timer,const Timer_A_PWMConfig * config)502 void Timer_A_generatePWM(uint32_t timer, const Timer_A_PWMConfig *config)
503 {
504     ASSERT(
505             (TIMER_A_CLOCKSOURCE_EXTERNAL_TXCLK == config->clockSource)
506             || (TIMER_A_CLOCKSOURCE_ACLK == config->clockSource)
507             || (TIMER_A_CLOCKSOURCE_SMCLK == config->clockSource)
508             || (TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK
509                     == config->clockSource));
510 
511     ASSERT(
512             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == config->compareRegister)
513             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
514                     == config->compareRegister)
515             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
516                     == config->compareRegister)
517             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
518                     == config->compareRegister)
519             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
520                     == config->compareRegister)
521             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
522                     == config->compareRegister)
523             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
524                     == config->compareRegister));
525 
526     ASSERT(
527             (TIMER_A_OUTPUTMODE_OUTBITVALUE == config->compareOutputMode)
528             || (TIMER_A_OUTPUTMODE_SET == config->compareOutputMode)
529             || (TIMER_A_OUTPUTMODE_TOGGLE_RESET
530                     == config->compareOutputMode)
531             || (TIMER_A_OUTPUTMODE_SET_RESET
532                     == config->compareOutputMode)
533             || (TIMER_A_OUTPUTMODE_TOGGLE == config->compareOutputMode)
534             || (TIMER_A_OUTPUTMODE_RESET == config->compareOutputMode)
535             || (TIMER_A_OUTPUTMODE_TOGGLE_SET
536                     == config->compareOutputMode)
537             || (TIMER_A_OUTPUTMODE_RESET_SET
538                     == config->compareOutputMode));
539 
540     privateTimer_AProcessClockSourceDivider(timer, config->clockSourceDivider);
541 
542     TIMER_A_CMSIS(timer)->CTL &=
543             ~(TIMER_A_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK + TIMER_A_UPDOWN_MODE
544                     + TIMER_A_DO_CLEAR + TIMER_A_TAIE_INTERRUPT_ENABLE);
545 
546     TIMER_A_CMSIS(timer)->CTL |= (config->clockSource + TIMER_A_UP_MODE
547             + TIMER_A_DO_CLEAR);
548 
549     TIMER_A_CMSIS(timer)->CCR[0] = config->timerPeriod;
550 
551     TIMER_A_CMSIS(timer)->CCTL[0] &= ~(TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE
552             + TIMER_A_OUTPUTMODE_RESET_SET);
553 
554     uint8_t idx = (config->compareRegister>>1) - 1;
555     TIMER_A_CMSIS(timer)->CCTL[idx] |= config->compareOutputMode;
556     TIMER_A_CMSIS(timer)->CCR[idx] = config->dutyCycle;
557 }
558 
Timer_A_stopTimer(uint32_t timer)559 void Timer_A_stopTimer(uint32_t timer)
560 {
561     TIMER_A_CMSIS(timer)->CTL &= ~TIMER_A_CTL_MC_3;
562 }
563 
Timer_A_setCompareValue(uint32_t timer,uint_fast16_t compareRegister,uint_fast16_t compareValue)564 void Timer_A_setCompareValue(uint32_t timer, uint_fast16_t compareRegister,
565         uint_fast16_t compareValue)
566 {
567     ASSERT(
568             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == compareRegister)
569             || (TIMER_A_CAPTURECOMPARE_REGISTER_1 == compareRegister)
570             || (TIMER_A_CAPTURECOMPARE_REGISTER_2 == compareRegister)
571             || (TIMER_A_CAPTURECOMPARE_REGISTER_3 == compareRegister)
572             || (TIMER_A_CAPTURECOMPARE_REGISTER_4 == compareRegister)
573             || (TIMER_A_CAPTURECOMPARE_REGISTER_5 == compareRegister)
574             || (TIMER_A_CAPTURECOMPARE_REGISTER_6 == compareRegister));
575 
576     uint8_t idx = (compareRegister>>1) - 1;
577     TIMER_A_CMSIS(timer)->CCR[idx] = compareValue;
578 }
579 
Timer_A_clearInterruptFlag(uint32_t timer)580 void Timer_A_clearInterruptFlag(uint32_t timer)
581 {
582     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IFG_OFS) = 0;
583 }
584 
Timer_A_clearCaptureCompareInterrupt(uint32_t timer,uint_fast16_t captureCompareRegister)585 void Timer_A_clearCaptureCompareInterrupt(uint32_t timer,
586         uint_fast16_t captureCompareRegister)
587 {
588     ASSERT(
589             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
590             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
591                     == captureCompareRegister)
592             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
593                     == captureCompareRegister)
594             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
595                     == captureCompareRegister)
596             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
597                     == captureCompareRegister)
598             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
599                     == captureCompareRegister)
600             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
601                     == captureCompareRegister));
602 
603     uint8_t idx = (captureCompareRegister>>1) - 1;
604     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIFG_OFS) = 0;
605 }
606 
Timer_A_enableInterrupt(uint32_t timer)607 void Timer_A_enableInterrupt(uint32_t timer)
608 {
609     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IE_OFS) = 1;
610 }
611 
Timer_A_disableInterrupt(uint32_t timer)612 void Timer_A_disableInterrupt(uint32_t timer)
613 {
614     BITBAND_PERI(TIMER_A_CMSIS(timer)->CTL,TIMER_A_CTL_IE_OFS) = 0;
615 }
616 
Timer_A_getInterruptStatus(uint32_t timer)617 uint32_t Timer_A_getInterruptStatus(uint32_t timer)
618 {
619     return (TIMER_A_CMSIS(timer)->CTL) & TIMER_A_CTL_IFG;
620 }
621 
Timer_A_enableCaptureCompareInterrupt(uint32_t timer,uint_fast16_t captureCompareRegister)622 void Timer_A_enableCaptureCompareInterrupt(uint32_t timer,
623         uint_fast16_t captureCompareRegister)
624 {
625     ASSERT(
626             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
627             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
628                     == captureCompareRegister)
629             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
630                     == captureCompareRegister)
631             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
632                     == captureCompareRegister)
633             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
634                     == captureCompareRegister)
635             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
636                     == captureCompareRegister)
637             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
638                     == captureCompareRegister));
639 
640     uint8_t idx = (captureCompareRegister>>1) - 1;
641     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS) = 1;
642 }
643 
Timer_A_disableCaptureCompareInterrupt(uint32_t timer,uint_fast16_t captureCompareRegister)644 void Timer_A_disableCaptureCompareInterrupt(uint32_t timer,
645         uint_fast16_t captureCompareRegister)
646 {
647     ASSERT(
648             (TIMER_A_CAPTURECOMPARE_REGISTER_0 == captureCompareRegister)
649             || (TIMER_A_CAPTURECOMPARE_REGISTER_1
650                     == captureCompareRegister)
651             || (TIMER_A_CAPTURECOMPARE_REGISTER_2
652                     == captureCompareRegister)
653             || (TIMER_A_CAPTURECOMPARE_REGISTER_3
654                     == captureCompareRegister)
655             || (TIMER_A_CAPTURECOMPARE_REGISTER_4
656                     == captureCompareRegister)
657             || (TIMER_A_CAPTURECOMPARE_REGISTER_5
658                     == captureCompareRegister)
659             || (TIMER_A_CAPTURECOMPARE_REGISTER_6
660                     == captureCompareRegister));
661 
662     uint8_t idx = (captureCompareRegister>>1) - 1;
663     BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS) = 0;
664 
665 }
666 
Timer_A_getCaptureCompareInterruptStatus(uint32_t timer,uint_fast16_t captureCompareRegister,uint_fast16_t mask)667 uint32_t Timer_A_getCaptureCompareInterruptStatus(uint32_t timer,
668         uint_fast16_t captureCompareRegister, uint_fast16_t mask)
669 {
670     uint8_t idx = (captureCompareRegister>>1) - 1;
671     return (TIMER_A_CMSIS(timer)->CCTL[idx]) & mask;
672 }
673 
Timer_A_getEnabledInterruptStatus(uint32_t timer)674 uint32_t Timer_A_getEnabledInterruptStatus(uint32_t timer)
675 {
676     if (TIMER_A_CMSIS(timer)->CTL & TIMER_A_CTL_IE)
677     {
678         return Timer_A_getInterruptStatus(timer);
679     } else
680     {
681         return 0;
682     }
683 
684 }
685 
Timer_A_getCaptureCompareEnabledInterruptStatus(uint32_t timer,uint_fast16_t captureCompareRegister)686 uint32_t Timer_A_getCaptureCompareEnabledInterruptStatus(uint32_t timer,
687         uint_fast16_t captureCompareRegister)
688 {
689     uint8_t idx = (captureCompareRegister>>1) - 1;
690     if (BITBAND_PERI(TIMER_A_CMSIS(timer)->CCTL[idx],TIMER_A_CCTLN_CCIE_OFS))
691         return Timer_A_getCaptureCompareInterruptStatus(timer,
692                 captureCompareRegister,
693                 TIMER_A_CAPTURE_OVERFLOW |
694                 TIMER_A_CAPTURECOMPARE_INTERRUPT_FLAG);
695     else
696         return 0;
697 }
698 
Timer_A_registerInterrupt(uint32_t timer,uint_fast8_t interruptSelect,void (* intHandler)(void))699 void Timer_A_registerInterrupt(uint32_t timer, uint_fast8_t interruptSelect,
700         void (*intHandler)(void))
701 {
702     if (interruptSelect == TIMER_A_CCR0_INTERRUPT)
703     {
704         switch (timer)
705         {
706         case TIMER_A0_BASE:
707             Interrupt_registerInterrupt(INT_TA0_0, intHandler);
708             Interrupt_enableInterrupt(INT_TA0_0);
709             break;
710         case TIMER_A1_BASE:
711             Interrupt_registerInterrupt(INT_TA1_0, intHandler);
712             Interrupt_enableInterrupt(INT_TA1_0);
713             break;
714         case TIMER_A2_BASE:
715             Interrupt_registerInterrupt(INT_TA2_0, intHandler);
716             Interrupt_enableInterrupt(INT_TA2_0);
717             break;
718         case TIMER_A3_BASE:
719             Interrupt_registerInterrupt(INT_TA3_0, intHandler);
720             Interrupt_enableInterrupt(INT_TA3_0);
721             break;
722         default:
723             ASSERT(false);
724         }
725     } else if (interruptSelect == TIMER_A_CCRX_AND_OVERFLOW_INTERRUPT)
726     {
727         switch (timer)
728         {
729         case TIMER_A0_BASE:
730             Interrupt_registerInterrupt(INT_TA0_N, intHandler);
731             Interrupt_enableInterrupt(INT_TA0_N);
732             break;
733         case TIMER_A1_BASE:
734             Interrupt_registerInterrupt(INT_TA1_N, intHandler);
735             Interrupt_enableInterrupt(INT_TA1_N);
736             break;
737         case TIMER_A2_BASE:
738             Interrupt_registerInterrupt(INT_TA2_N, intHandler);
739             Interrupt_enableInterrupt(INT_TA2_N);
740             break;
741         case TIMER_A3_BASE:
742             Interrupt_registerInterrupt(INT_TA3_N, intHandler);
743             Interrupt_enableInterrupt(INT_TA3_N);
744             break;
745         default:
746             ASSERT(false);
747         }
748     } else
749     {
750         ASSERT(false);
751     }
752 }
753 
Timer_A_unregisterInterrupt(uint32_t timer,uint_fast8_t interruptSelect)754 void Timer_A_unregisterInterrupt(uint32_t timer, uint_fast8_t interruptSelect)
755 {
756     if (interruptSelect == TIMER_A_CCR0_INTERRUPT)
757     {
758         switch (timer)
759         {
760         case TIMER_A0_BASE:
761             Interrupt_disableInterrupt(INT_TA0_0);
762             Interrupt_unregisterInterrupt(INT_TA0_0);
763             break;
764         case TIMER_A1_BASE:
765             Interrupt_disableInterrupt(INT_TA1_0);
766             Interrupt_unregisterInterrupt(INT_TA1_0);
767             break;
768         case TIMER_A2_BASE:
769             Interrupt_disableInterrupt(INT_TA2_0);
770             Interrupt_unregisterInterrupt(INT_TA2_0);
771             break;
772         case TIMER_A3_BASE:
773             Interrupt_disableInterrupt(INT_TA3_0);
774             Interrupt_unregisterInterrupt(INT_TA3_0);
775             break;
776         default:
777             ASSERT(false);
778         }
779     } else if (interruptSelect == TIMER_A_CCRX_AND_OVERFLOW_INTERRUPT)
780     {
781         switch (timer)
782         {
783         case TIMER_A0_BASE:
784             Interrupt_disableInterrupt(INT_TA0_N);
785             Interrupt_unregisterInterrupt(INT_TA0_N);
786             break;
787         case TIMER_A1_BASE:
788             Interrupt_disableInterrupt(INT_TA1_N);
789             Interrupt_unregisterInterrupt(INT_TA1_N);
790             break;
791         case TIMER_A2_BASE:
792             Interrupt_disableInterrupt(INT_TA2_N);
793             Interrupt_unregisterInterrupt(INT_TA2_N);
794             break;
795         case TIMER_A3_BASE:
796             Interrupt_disableInterrupt(INT_TA3_N);
797             Interrupt_unregisterInterrupt(INT_TA3_N);
798             break;
799         default:
800             ASSERT(false);
801         }
802     } else
803     {
804         ASSERT(false);
805     }
806 }
807 
808