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Searched defs:TR_CTL0 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_crypto.h65 __IOM uint32_t TR_CTL0; /*!< 0x00000280 True random control 0 */ member
Dcyip_crypto_v2.h64 __IOM uint32_t TR_CTL0; /*!< 0x00000280 True random control 0 */ member
/hal_infineon-3.7.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_crypto_v2.h64 __IOM uint32_t TR_CTL0; /*!< 0x00000280 True random control 0 */ member