1 /* 2 * Trace Recorder for Tracealyzer v4.5.1 3 * Copyright 2021 Percepio AB 4 * www.percepio.com 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * 8 * Some common defines for the trace recorder. 9 */ 10 11 #ifndef TRC_PORTDEFINES_H 12 #define TRC_PORTDEFINES_H 13 14 #define TRACE_SUCCESS (0) 15 #define TRACE_FAIL (1) 16 17 #define TRC_FREE_RUNNING_32BIT_INCR 1 18 #define TRC_FREE_RUNNING_32BIT_DECR 2 19 #define TRC_OS_TIMER_INCR 3 20 #define TRC_OS_TIMER_DECR 4 21 #define TRC_CUSTOM_TIMER_INCR 5 22 #define TRC_CUSTOM_TIMER_DECR 6 23 24 /* Start options for vTraceEnable. */ 25 #define TRC_INIT 0 26 #define TRC_START 1 27 #define TRC_START_AWAIT_HOST 2 28 29 /* Command codes for TzCtrl task */ 30 #define CMD_SET_ACTIVE 1 /* Start (param1 = 1) or Stop (param1 = 0) */ 31 32 /* The final command code, used to validate commands. */ 33 #define CMD_LAST_COMMAND 1 34 35 #define TRC_RECORDER_MODE_SNAPSHOT 0 36 #define TRC_RECORDER_MODE_STREAMING 1 37 38 #define TRC_RECORDER_BUFFER_ALLOCATION_STATIC (0x00) 39 #define TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC (0x01) 40 #define TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM (0x02) 41 42 /* Filter Groups */ 43 #define FilterGroup0 (uint16_t)0x0001 44 #define FilterGroup1 (uint16_t)0x0002 45 #define FilterGroup2 (uint16_t)0x0004 46 #define FilterGroup3 (uint16_t)0x0008 47 #define FilterGroup4 (uint16_t)0x0010 48 #define FilterGroup5 (uint16_t)0x0020 49 #define FilterGroup6 (uint16_t)0x0040 50 #define FilterGroup7 (uint16_t)0x0080 51 #define FilterGroup8 (uint16_t)0x0100 52 #define FilterGroup9 (uint16_t)0x0200 53 #define FilterGroup10 (uint16_t)0x0400 54 #define FilterGroup11 (uint16_t)0x0800 55 #define FilterGroup12 (uint16_t)0x1000 56 #define FilterGroup13 (uint16_t)0x2000 57 #define FilterGroup14 (uint16_t)0x4000 58 #define FilterGroup15 (uint16_t)0x8000 59 60 /****************************************************************************** 61 * Supported ports 62 * 63 * TRC_HARDWARE_PORT_HWIndependent 64 * A hardware independent fallback option for event timestamping. Provides low 65 * resolution timestamps based on the OS tick. 66 * This may be used on the Win32 port, but may also be used on embedded hardware 67 * platforms. All time durations will be truncated to the OS tick frequency, 68 * typically 1 KHz. This means that a task or ISR that executes in less than 69 * 1 ms get an execution time of zero. 70 * 71 * TRC_HARDWARE_PORT_APPLICATION_DEFINED 72 * Allows for defining the port macros in other source code files. 73 * 74 * TRC_HARDWARE_PORT_Win32 75 * "Accurate" timestamping based on the Windows performance counter for Win32 76 * builds. Note that this gives the host machine time, not the kernel time. 77 * 78 * Hardware specific ports 79 * To get accurate timestamping, a hardware timer is necessary. Below are the 80 * available ports. Some of these are "unofficial", meaning that 81 * they have not yet been verified by Percepio but have been contributed by 82 * external developers. They should work, otherwise let us know by emailing 83 * support@percepio.com. Some work on any OS platform, while other are specific 84 * to a certain operating system. 85 *****************************************************************************/ 86 87 /****** Port Name ************************************* Code ** Official ** OS Platform *********/ 88 #define TRC_HARDWARE_PORT_APPLICATION_DEFINED 98 /* - - */ 89 #define TRC_HARDWARE_PORT_NOT_SET 99 /* - - */ 90 #define TRC_HARDWARE_PORT_HWIndependent 0 /* Yes Any */ 91 #define TRC_HARDWARE_PORT_Win32 1 /* Yes FreeRTOS on Win32 */ 92 #define TRC_HARDWARE_PORT_Atmel_AT91SAM7 2 /* No Any */ 93 #define TRC_HARDWARE_PORT_Atmel_UC3A0 3 /* No Any */ 94 #define TRC_HARDWARE_PORT_ARM_Cortex_M 4 /* Yes Any */ 95 #define TRC_HARDWARE_PORT_Renesas_RX600 6 /* Yes Any */ 96 #define TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32 7 /* Yes Any */ 97 #define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48 8 /* Yes Any */ 98 #define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430 9 /* No Any */ 99 #define TRC_HARDWARE_PORT_XILINX_PPC405 11 /* No FreeRTOS */ 100 #define TRC_HARDWARE_PORT_XILINX_PPC440 12 /* No FreeRTOS */ 101 #define TRC_HARDWARE_PORT_XILINX_MICROBLAZE 13 /* No Any */ 102 #define TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5 14 /* No FreeRTOS */ 103 #define TRC_HARDWARE_PORT_NXP_LPC210X 15 /* No Any */ 104 #define TRC_HARDWARE_PORT_ARM_CORTEX_A9 16 /* Yes Any */ 105 #define TRC_HARDWARE_PORT_POWERPC_Z4 17 /* No FreeRTOS */ 106 #define TRC_HARDWARE_PORT_Altera_NiosII 18 /* Yes Any (Tested with FreeRTOS) */ 107 #define TRC_HARDWARE_PORT_ZEPHYR 19 /* Yes Zephyr */ 108 #define TRC_HARDWARE_PORT_XTensa_LX6 20 /* Yes ESP-IDF FreeRTOS */ 109 #define TRC_HARDWARE_PORT_XTensa_LX7 21 /* Yes ESP-IDF FreeRTOS */ 110 #endif /*TRC_PORTDEFINES_H*/ 111
