1 /**
2  * @file drivers/stepper/adi/tmc_reg.h
3  *
4  * @brief TMC Registers
5  *
6  */
7 
8 /*
9  * SPDX-FileCopyrightText: Copyright (c) 2024 Carl Zeiss Meditec AG
10  * SPDX-License-Identifier: Apache-2.0
11  */
12 
13 #ifndef ZEPHYR_DRIVERS_STEPPER_ADI_TMC_REG_H_
14 #define ZEPHYR_DRIVERS_STEPPER_ADI_TMC_REG_H_
15 
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
19 
20 /** Common Registers for TMC5041 and TMC51XX */
21 #if defined(CONFIG_STEPPER_ADI_TMC5041)
22 
23 #define TMC5XXX_WRITE_BIT        0x80U
24 #define TMC5XXX_ADDRESS_MASK     0x7FU
25 
26  #define TMC5XXX_CLOCK_FREQ_SHIFT 24
27 
28 #define TMC5XXX_GCONF 0x00
29 #define TMC5XXX_GSTAT 0x01
30 
31 #define TMC5XXX_RAMPMODE_POSITIONING_MODE       0
32 #define TMC5XXX_RAMPMODE_POSITIVE_VELOCITY_MODE 1
33 #define TMC5XXX_RAMPMODE_NEGATIVE_VELOCITY_MODE 2
34 #define TMC5XXX_RAMPMODE_HOLD_MODE              3
35 
36 #define TMC5XXX_SG_MIN_VALUE -64
37 #define TMC5XXX_SG_MAX_VALUE 63
38 #define TMC5XXX_SW_MODE_SG_STOP_ENABLE BIT(10)
39 
40 #define TMC5XXX_COOLCONF_SG2_THRESHOLD_VALUE_SHIFT 16
41 
42 #define TMC5XXX_IHOLD_MASK  GENMASK(4, 0)
43 #define TMC5XXX_IHOLD_SHIFT 0
44 #define TMC5XXX_IHOLD(n)    (((n) << TMC5XXX_IHOLD_SHIFT) & TMC5XXX_IHOLD_MASK)
45 
46 #define TMC5XXX_IRUN_MASK  GENMASK(12, 8)
47 #define TMC5XXX_IRUN_SHIFT 8
48 #define TMC5XXX_IRUN(n)    (((n) << TMC5XXX_IRUN_SHIFT) & TMC5XXX_IRUN_MASK)
49 
50 #define TMC5XXX_IHOLDDELAY_MASK  GENMASK(19, 16)
51 #define TMC5XXX_IHOLDDELAY_SHIFT 16
52 #define TMC5XXX_IHOLDDELAY(n)    (((n) << TMC5XXX_IHOLDDELAY_SHIFT) & TMC5XXX_IHOLDDELAY_MASK)
53 
54 #define TMC5XXX_CHOPCONF_DRV_ENABLE_MASK GENMASK(3, 0)
55 #define TMC5XXX_CHOPCONF_MRES_MASK       GENMASK(27, 24)
56 #define TMC5XXX_CHOPCONF_MRES_SHIFT      24
57 
58 #define TMC5XXX_RAMPSTAT_INT_MASK  GENMASK(7, 4)
59 #define TMC5XXX_RAMPSTAT_INT_SHIFT 4
60 
61 #define TMC5XXX_RAMPSTAT_POS_REACHED_EVENT_MASK BIT(7)
62 #define TMC5XXX_POS_REACHED_EVENT                                                                  \
63 	(TMC5XXX_RAMPSTAT_POS_REACHED_EVENT_MASK >> TMC5XXX_RAMPSTAT_INT_SHIFT)
64 
65 #define TMC5XXX_RAMPSTAT_STOP_SG_EVENT_MASK BIT(6)
66 #define TMC5XXX_STOP_SG_EVENT                                                                      \
67 	(TMC5XXX_RAMPSTAT_STOP_SG_EVENT_MASK >> TMC5XXX_RAMPSTAT_INT_SHIFT)
68 
69 #define TMC5XXX_RAMPSTAT_STOP_RIGHT_EVENT_MASK BIT(5)
70 #define TMC5XXX_STOP_RIGHT_EVENT                                                                   \
71 	(TMC5XXX_RAMPSTAT_STOP_RIGHT_EVENT_MASK >> TMC5XXX_RAMPSTAT_INT_SHIFT)
72 
73 #define TMC5XXX_RAMPSTAT_STOP_LEFT_EVENT_MASK BIT(4)
74 #define TMC5XXX_STOP_LEFT_EVENT                                                                    \
75 	(TMC5XXX_RAMPSTAT_STOP_LEFT_EVENT_MASK >> TMC5XXX_RAMPSTAT_INT_SHIFT)
76 
77 #define TMC5XXX_DRV_STATUS_STST_BIT        BIT(31)
78 #define TMC5XXX_DRV_STATUS_SG_RESULT_MASK  GENMASK(9, 0)
79 #define TMC5XXX_DRV_STATUS_SG_STATUS_MASK  BIT(24)
80 #define TMC5XXX_DRV_STATUS_SG_STATUS_SHIFT 24
81 
82 #endif
83 
84 #ifdef CONFIG_STEPPER_ADI_TMC5041
85 
86 #define TMC5041_MOTOR_ADDR(m)     (0x20 << (m))
87 #define TMC5041_MOTOR_ADDR_DRV(m) ((m) << 4)
88 #define TMC5041_MOTOR_ADDR_PWM(m) ((m) << 3)
89 
90 /**
91  * @name TMC5041 module registers
92  * @anchor TMC5041_REGISTERS
93  *
94  * @{
95  */
96 
97 #define TMC5041_GCONF_POSCMP_ENABLE_SHIFT 3
98 #define TMC5041_GCONF_TEST_MODE_SHIFT     7
99 #define TMC5041_GCONF_SHAFT_SHIFT(n)      ((n) ? 8 : 9)
100 #define TMC5041_LOCK_GCONF_SHIFT          10
101 
102 #define TMC5041_PWMCONF(motor)    (0x10 | TMC5041_MOTOR_ADDR_PWM(motor))
103 #define TMC5041_PWM_STATUS(motor) (0x11 | TMC5041_MOTOR_ADDR_PWM(motor))
104 
105 #define TMC5041_RAMPMODE(motor)   (0x00 | TMC5041_MOTOR_ADDR(motor))
106 #define TMC5041_XACTUAL(motor)    (0x01 | TMC5041_MOTOR_ADDR(motor))
107 #define TMC5041_VACTUAL(motor)    (0x02 | TMC5041_MOTOR_ADDR(motor))
108 #define TMC5041_VSTART(motor)     (0x03 | TMC5041_MOTOR_ADDR(motor))
109 #define TMC5041_A1(motor)         (0x04 | TMC5041_MOTOR_ADDR(motor))
110 #define TMC5041_V1(motor)         (0x05 | TMC5041_MOTOR_ADDR(motor))
111 #define TMC5041_AMAX(motor)       (0x06 | TMC5041_MOTOR_ADDR(motor))
112 #define TMC5041_VMAX(motor)       (0x07 | TMC5041_MOTOR_ADDR(motor))
113 #define TMC5041_DMAX(motor)       (0x08 | TMC5041_MOTOR_ADDR(motor))
114 #define TMC5041_D1(motor)         (0x0A | TMC5041_MOTOR_ADDR(motor))
115 #define TMC5041_VSTOP(motor)      (0x0B | TMC5041_MOTOR_ADDR(motor))
116 #define TMC5041_TZEROWAIT(motor)  (0x0C | TMC5041_MOTOR_ADDR(motor))
117 #define TMC5041_XTARGET(motor)    (0x0D | TMC5041_MOTOR_ADDR(motor))
118 #define TMC5041_IHOLD_IRUN(motor) (0x10 | TMC5041_MOTOR_ADDR(motor))
119 #define TMC5041_VCOOLTHRS(motor)  (0x11 | TMC5041_MOTOR_ADDR(motor))
120 #define TMC5041_VHIGH(motor)      (0x12 | TMC5041_MOTOR_ADDR(motor))
121 #define TMC5041_SWMODE(motor)     (0x14 | TMC5041_MOTOR_ADDR(motor))
122 #define TMC5041_RAMPSTAT(motor)   (0x15 | TMC5041_MOTOR_ADDR(motor))
123 #define TMC5041_XLATCH(motor)     (0x16 | TMC5041_MOTOR_ADDR(motor))
124 
125 #define TMC5041_MSLUT0(motor)     (0x60 | TMC5041_MOTOR_ADDR_DRV(motor))
126 #define TMC5041_MSLUT1(motor)     (0x61 | TMC5041_MOTOR_ADDR_DRV(motor))
127 #define TMC5041_MSLUT2(motor)     (0x62 | TMC5041_MOTOR_ADDR_DRV(motor))
128 #define TMC5041_MSLUT3(motor)     (0x63 | TMC5041_MOTOR_ADDR_DRV(motor))
129 #define TMC5041_MSLUT4(motor)     (0x64 | TMC5041_MOTOR_ADDR_DRV(motor))
130 #define TMC5041_MSLUT5(motor)     (0x65 | TMC5041_MOTOR_ADDR_DRV(motor))
131 #define TMC5041_MSLUT6(motor)     (0x66 | TMC5041_MOTOR_ADDR_DRV(motor))
132 #define TMC5041_MSLUT7(motor)     (0x67 | TMC5041_MOTOR_ADDR_DRV(motor))
133 #define TMC5041_MSLUTSEL(motor)   (0x68 | TMC5041_MOTOR_ADDR_DRV(motor))
134 #define TMC5041_MSLUTSTART(motor) (0x69 | TMC5041_MOTOR_ADDR_DRV(motor))
135 #define TMC5041_MSCNT(motor)      (0x6A | TMC5041_MOTOR_ADDR_DRV(motor))
136 #define TMC5041_MSCURACT(motor)   (0x6B | TMC5041_MOTOR_ADDR_DRV(motor))
137 #define TMC5041_CHOPCONF(motor)   (0x6C | TMC5041_MOTOR_ADDR_DRV(motor))
138 #define TMC5041_COOLCONF(motor)   (0x6D | TMC5041_MOTOR_ADDR_DRV(motor))
139 #define TMC5041_DRVSTATUS(motor)  (0x6F | TMC5041_MOTOR_ADDR_DRV(motor))
140 
141 #endif
142 
143 /**
144  * @}
145  */
146 
147 #ifdef __cplusplus
148 }
149 #endif
150 
151 #endif /* ZEPHYR_DRIVERS_STEPPER_ADI_TMC_REG_H_ */
152