1 2 /**************************************************************************//** 3 * @file tk_reg.h 4 * @version V1.00 5 * @brief TK register definition header file 6 * 7 * SPDX-License-Identifier: Apache-2.0 8 * @copyright (C) 2023 Nuvoton Technology Corp. All rights reserved. 9 *****************************************************************************/ 10 11 /** @addtogroup REGISTER Control Register 12 13 @{ 14 15 */ 16 17 18 /*---------------------- Touch Key Controller -------------------------*/ 19 /** 20 @addtogroup TK Touch Key Controller(TK) 21 Memory Mapped Structure for TK Controller 22 @{ */ 23 24 typedef struct 25 { 26 27 28 /** 29 * @var TK_T::SCANC 30 * Offset: 0x00 Touch Key Scan Control Register 31 * --------------------------------------------------------------------------------------------------- 32 * |Bits |Field |Descriptions 33 * | :----: | :----: | :---- | 34 * |[0] |TK0SEN |TK0 Scan Enable Bit 35 * | | |This bit is ignored if TK0REN (TK_REFC[0]) is "1" except SCAN_ALL (TK_REFC[23]) is "1". 36 * | | |0 = TKDAT0 (TK_DAT0[7:0]) is invalid. 37 * | | |1 = TK0 is always enabled for Touch Key scan. TKDAT0 (TK_DAT0[7:0]) is valid. 38 * |[1] |TK1SEN |TK1 Scan Enable Bit 39 * | | |This bit is ignored if TK1REN (TK_REFC[1]) is "1". 40 * | | |0 = TKDAT1 (TK_DAT0[15:8]) is invalid. 41 * | | |1 = TK1 is always enabled for Touch Key scan. TKDAT1 (TK_DAT0[15:8]) is valid. 42 * |[2] |TK2SEN |TK2 Scan Enable Bit 43 * | | |This bit is ignored if TK2REN (TK_REFC[2]) is "1". 44 * | | |0 = TKDAT2 (TK_DAT0[23:16]) is invalid. 45 * | | |1 = TK2 is always enabled for Touch Key scan. TKDAT2 (TK_DAT0[23:16]) is valid. 46 * |[3] |TK3SEN |TK3 Scan Enable Bit 47 * | | |0 = TKDAT3 (TK_DAT0[31:24]) is invalid. 48 * | | |1 = TK3 is always enabled for Touch Key scan. TKDAT3 (TK_DAT0[31:24]) is valid. 49 * | | |This bit is ignored if TK3REN (TK_REFC[3]) is "1". 50 * |[4] |TK4SEN |TK4 Scan Enable Bit 51 * | | |This bit is ignored if TK4REN (TK_REFC[4]) is "1". 52 * | | |0 = TKDAT4 (TK_DAT1[7:0]) is invalid. 53 * | | |1 = TK4 is always enabled for Touch Key scan. TKDAT4 (TK_DAT1[7:0]) is valid. 54 * |[5] |TK5SEN |TK5 Scan Enable Bit 55 * | | |This bit is ignored if TK5REN (TK_REFC[5]) is "1". 56 * | | |0 = TKDAT5 (TK_DAT1[15:8]) is invalid. 57 * | | |1 = TK5 is always enabled for Touch Key scan. TKDAT5 (TK_DAT1[15:8]) is valid. 58 * |[6] |TK6SEN |TK6 Scan Enable Bit 59 * | | |This bit is ignored if TK6REN (TK_REFC[6]) is "1". 60 * | | |0 = TKDAT6 (TK_DAT1[23:16]) is invalid. 61 * | | |1 = TK6 is always enabled for Touch Key scan. TKDAT6 (TK_DAT1[23:16]) is valid. 62 * |[7] |TK7SEN |TK7 Scan Enable Bit 63 * | | |This bit is ignored if TK7REN (TK_REFC[7]) is "1". 64 * | | |0 = TKDAT7 (TK_DAT1[31:24]) is invalid. 65 * | | |1 = TK7 is always enabled for Touch Key scan. TKDAT7 (TK_DAT1[31:24]) is valid. 66 * |[8] |TK8SEN |TK8 Scan Enable Bit 67 * | | |This bit is ignored if TK8REN (TK_REFC[8]) is "1". 68 * | | |0 = TKDAT8 (TK_DAT2[7:0]) is invalid. 69 * | | |1 = TK8 is always enabled for Touch Key scan. TKDAT8 (TK_DAT2[7:0]) is valid. 70 * |[9] |TK9SEN |TK9 Scan Enable Bit 71 * | | |This bit is ignored if TK9REN (TK_REFC[9]) is "1". 72 * | | |0 = TKDAT9 (TK_DAT2[15:8]) is invalid. 73 * | | |1 = TK9 is always enabled for Touch Key scan. TKDAT9 (TK_DAT2[15:8]) is valid. 74 * |[10] |TK10SEN |TK10 Scan Enable Bit 75 * | | |This bit is ignored if TK10REN (TK_REFC[10]) is "1". 76 * | | |0 = TKDAT10 (TK_DAT2[23:16]) is invalid. 77 * | | |1 = TK10 is always enabled for Touch Key scan. TKDAT10 (TK_DAT2[23:16]) is valid. 78 * |[11] |TK11SEN |TK11 Scan Enable Bit 79 * | | |This bit is ignored if TK11REN (TK_REFC[11]) is "1". 80 * | | |0 = TKDAT11 (TK_DAT2[31:24]) is invalid. 81 * | | |1 = TK11 is always enabled for Touch Key scan. TKDAT11 (TK_DAT2[31:24]) is valid. 82 * |[12] |TK12SEN |TK12 Scan Enable Bit 83 * | | |This bit is ignored if TK12REN (TK_REFC[12]) is "1". 84 * | | |0 = TKDAT12 (TK_DAT3[7:0]) is invalid. 85 * | | |1 = TK12 is always enabled for Touch Key scan. TKDAT12 (TK_DAT3[7:0]) is valid. 86 * |[13] |TK13SEN |TK13 Scan Enable Bit 87 * | | |This bit is ignored if TK13REN (TK_REFC[13]) is "1". 88 * | | |0 = TKDAT13 (TK_DAT3[15:8]) is invalid. 89 * | | |1 = TK13 is always enabled for Touch Key scan. TKDAT13 (TK_DAT3[15:8]) is valid. 90 * |[14] |TK14SEN |TK14 Scan Enable Bit 91 * | | |This bit is ignored if TK14REN (TK_REFC[14]) is "1". 92 * | | |0 = TKDAT14 (TK_DAT3[23:16]) is invalid. 93 * | | |1 = TK14 is always enabled for Touch Key scan. TKDAT14 (TK_DAT3[23:16]) is valid. 94 * |[15] |TK15SEN |TK15 Scan Enable Bit 95 * | | |This bit is ignored if TK15REN (TK_REFC[15]) is "1". 96 * | | |0 = TKDAT15 (TK_DAT3[31:24]) is invalid. 97 * | | |1 = TK15 is always enabled for Touch Key scan. TKDAT15 (TK_DAT3[31:24]) is valid. 98 * |[16] |TK16SEN |TK16 Scan Enable Bit 99 * | | |This bit is ignored if TK16REN (TK_REFC[16]) is "1". 100 * | | |0 = TKDAT16 (TK_DAT4[7:0]) is invalid. 101 * | | |1 = TK16 is always enabled for Touch Key scan. TKDAT16 (TK_DAT4[7:0]) is valid. 102 * |[23:20] |AVDDH_S |AVDDH Voltage Select 103 * | | |0000 = 1/16 VDD. 104 * | | |0001 = 1/8 VDD. 105 * | | |0010 = 3/16 VDD. 106 * | | |0011 = 1/4 VDD. 107 * | | |0100 = 5/16 VDD. 108 * | | |0101 = 3/8 VDD. 109 * | | |0110 = 7/16 VDD. 110 * | | |0111 = 1/2 VDD. 111 * | | |1000 = 1/32 VDD. 112 * | | |1001 = 1/16 VDD. 113 * | | |1010 = 3/32 VDD. 114 * | | |1011 = 1/8 VDD. 115 * | | |1100 = 5/32 VDD. 116 * | | |1101 = 3/16 VDD. 117 * | | |1110 = 7/32 VDD. 118 * | | |1111 = 1/4 VDD. 119 * |[24] |SCAN |Scan 120 * | | |Writing "1" to this bit will immediately initiate key scan on all channels which are enabled 121 * | | |This bit will be self-cleared after key scan is started. 122 * |[28:25] |TRG_EN |Trigger Enable Bit 123 * | | |Timer0~3 and RTC tick trigger key scan periodically Enabled 124 * | | |Key scan will be initiated by timer or RTC periodically. 125 * | | |0000 = Trigger Disabled. 126 * | | |0001 = Timer 0 trigger Enabled. 127 * | | |0010 = Timer 1 trigger Enabled. 128 * | | |0011 = Timer 2 trigger Enabled. 129 * | | |0100 = Timer 3 trigger Enabled. 130 * | | |0101 = RTC tick event trigger Enabled. 131 * | | |0110 = Reserved. 132 * | | |0111 = Reserved. 133 * | | |1000 = Reserved. 134 * | | |1001 = Reserved. 135 * | | |1010 = Reserved. 136 * | | |1011 = Reserved. 137 * | | |1100 = Reserved. 138 * | | |1101 = Reserved. 139 * | | |1110 = Reserved. 140 * | | |1111 = Reserved. 141 * |[31] |TK_EN |Touch Key Scan Enable Bit 142 * | | |0 = Touch Key function Disabled. 143 * | | |1 = Touch Key function Enabled. 144 * @var TK_T::REFC 145 * Offset: 0x04 Touch Key Reference Control Register 146 * --------------------------------------------------------------------------------------------------- 147 * |Bits |Field |Descriptions 148 * | :----: | :----: | :---- | 149 * |[0] |TK0REN |TK0 Reference Enable Bit 150 * | | |0 = TK0 is not reference. 151 * | | |1 = TK0 is set as reference, and TKDAT0 (TK_DAT0[7:0]) is invalid. 152 * |[1] |TK1REN |TK1 Reference Enable Bit 153 * | | |0 = TK1 is not reference. 154 * | | |1 = TK1 is set as reference, and TKDAT1 (TK_DAT0[15:8]) is invalid. 155 * |[2] |TK2REN |TK2 Reference Enable Bit 156 * | | |0 = TK2 is not reference. 157 * | | |1 = TK2 is set as reference, and TKDAT2 (TK_DAT0[23:16]) is invalid. 158 * |[3] |TK3REN |TK3 Reference Enable Bit 159 * | | |0 = TK3 is not reference. 160 * | | |1 = TK3 is set as reference, and TKDAT3 (TK_DAT0[31:24]) is invalid. 161 * |[4] |TK4REN |TK4 Reference Enable Bit 162 * | | |0 = TK4 is not reference. 163 * | | |1 = TK4 is set as reference, and TKDAT4 (TK_DAT1[7:0]) is invalid. 164 * |[5] |TK5REN |TK5 Reference Enable Bit 165 * | | |0 = TK5 is not reference. 166 * | | |1 = TK5 is set as reference, and TKDAT5 (TK_DAT1[15:8]) is invalid. 167 * |[6] |TK6REN |TK6 Reference Enable Bit 168 * | | |0 = TK6 is not reference. 169 * | | |1 = TK6 is set as reference, and TKDAT6 (TK_DAT1[23:16]) is invalid. 170 * |[7] |TK7REN |TK7 Reference Enable Bit 171 * | | |0 = TK7 is not reference. 172 * | | |1 = TK7 is set as reference, and TKDAT7 (TK_DAT1[31:24]) is invalid. 173 * |[8] |TK8REN |TK8 Reference Enable Bit 174 * | | |0 = TK8 is not reference. 175 * | | |1 = TK8 is set as reference, and TKDAT8 (TK_DAT2[7:0]) is invalid. 176 * |[9] |TK9REN |TK9 Reference Enable Bit 177 * | | |0 = TK9 is not reference. 178 * | | |1 = TK9 is set as reference, and TKDAT9 (TK_DAT2[15:8]) is invalid. 179 * |[10] |TK10REN |TK10 Reference Enable Bit 180 * | | |0 = TK10 is not reference. 181 * | | |1 = TK10 is set as reference, and TKDAT10 (TK_DAT2[23:16]) is invalid. 182 * |[11] |TK11REN |TK11 Reference Enable Bit 183 * | | |0 = TK11 is not reference. 184 * | | |1 = TK11 is set as reference, and TKDAT11 (TK_DAT2[31:24]) is invalid. 185 * |[12] |TK12REN |TK12 Reference Enable Bit 186 * | | |0 = TK12 is not reference. 187 * | | |1 = TK12 is set as reference, and TKDAT12 (TK_DAT3[7:0]) is invalid. 188 * |[13] |TK13REN |TK13 Reference Enable Bit 189 * | | |0 = TK13 is not reference. 190 * | | |1 = TK13 is set as reference, and TKDAT13 (TK_DAT3[15:8]) is invalid. 191 * |[14] |TK14REN |TK14 Reference Enable Bit 192 * | | |0 = TK14 is not reference. 193 * | | |1 = TK14 is set as reference, and TKDAT14 (TK_DAT3[23:16]) is invalid. 194 * |[15] |TK15REN |TK15 Reference Enable Bit 195 * | | |0 = TK15 is not reference. 196 * | | |1 = TK15 is set as reference, and TKDAT15 (TK_DAT3[31:24]) is invalid. 197 * |[16] |TK16REN |TK16 Reference Enable Bit 198 * | | |0 = TK16 is not reference. 199 * | | |1 = TK16 is set as reference, and TKDAT16 (TK_DAT4[7:0]) is invalid. 200 * | | |Note: This bit is forced to "1" automatically if none is set as reference. 201 * |[23] |SCAN_ALL |All Keys Scan Enable Bit 202 * | | |This function is used for low power key scanning operation 203 * | | |TKDAT_ALL (TK_DAT4[15:8]) is the only one valid data when key scan is complete. 204 * | | |0 = All Keys Scan function Disabled. 205 * | | |1 = All Keys Scan function Enabled. 206 * |[26:24] |SENSET |Touch Key Sensing Time Control 207 * | | |000 = 128 x PULSET. 208 * | | |001 = 255 x PULSET. 209 * | | |010 = 511 x PULSET. 210 * | | |011 = 1023 x PULSET. 211 * | | |100 = 8 x PULSET. 212 * | | |101 = 16 x PULSET. 213 * | | |110 = 32 x PULSET. 214 * | | |111 = 64 x PULSET. 215 * |[30:28] |PULSET |Touch Key Sensing Pulse Width Time Control 216 * | | |000 = 1us. 217 * | | |001 = 2us. 218 * | | |010 = 4us. 219 * | | |011 = 8us. 220 * | | |100 = Reserved. 221 * | | |101 = Reserved. 222 * | | |110 = Reserved. 223 * | | |111 = 500ns. 224 * @var TK_T::CCBD0 225 * Offset: 0x08 Touch Key Complement Capacitor Bank Data Register 0 226 * --------------------------------------------------------------------------------------------------- 227 * |Bits |Field |Descriptions 228 * | :----: | :----: | :---- | 229 * |[7:0] |CCBD0 |TK0 Complement CB Data 230 * | | |These bits are used for TK0 sensitivity adjustment. 231 * |[15:8] |CCBD1 |TK1 Complement CB Data 232 * | | |These bits are used for TK1 sensitivity adjustment. 233 * |[23:16] |CCBD2 |TK2 Complement CB Data 234 * | | |These bits are used for TK2 sensitivity adjustment. 235 * |[31:24] |CCBD3 |TK3 Complement CB Data 236 * | | |These bits are used for TK3 sensitivity adjustment. 237 * @var TK_T::CCBD1 238 * Offset: 0x0C Touch Key Complement Capacitor Bank Data Register 1 239 * --------------------------------------------------------------------------------------------------- 240 * |Bits |Field |Descriptions 241 * | :----: | :----: | :---- | 242 * |[7:0] |CCBD4 |TK4 Complement CB Data 243 * | | |These bits are used for TK4 sensitivity adjustment. 244 * |[15:8] |CCBD5 |TK5 Complement CB Data 245 * | | |These bits are used for TK5 sensitivity adjustment. 246 * |[23:16] |CCBD6 |TK6 Complement CB Data 247 * | | |These bits are used for TK6 sensitivity adjustment. 248 * |[31:24] |CCBD7 |TK7 Complement CB Data 249 * | | |These bits are used for TK7 sensitivity adjustment. 250 * @var TK_T::CCBD2 251 * Offset: 0x10 Touch Key Complement Capacitor Bank Data Register 2 252 * --------------------------------------------------------------------------------------------------- 253 * |Bits |Field |Descriptions 254 * | :----: | :----: | :---- | 255 * |[7:0] |CCBD8 |TK8 Complement CB Data 256 * | | |These bits are used for TK8 sensitivity adjustment. 257 * |[15:8] |CCBD9 |TK9 Complement CB Data 258 * | | |These bits are used for TK9 sensitivity adjustment. 259 * |[23:16] |CCBD10 |TK10 Complement CB Data 260 * | | |These bits are used for TK10 sensitivity adjustment. 261 * |[31:24] |CCBD11 |TK11 Complement CB Data 262 * | | |These bits are used for TK11 sensitivity adjustment. 263 * @var TK_T::CCBD3 264 * Offset: 0x14 Touch Key Complement Capacitor Bank Data Register 3 265 * --------------------------------------------------------------------------------------------------- 266 * |Bits |Field |Descriptions 267 * | :----: | :----: | :---- | 268 * |[7:0] |CCBD12 |TK12 Complement CB Data 269 * | | |These bits are used for TK12 sensitivity adjustment. 270 * |[15:8] |CCBD13 |TK13 Complement CB Data 271 * | | |These bits are used for TK13 sensitivity adjustment. 272 * |[23:16] |CCBD14 |TK14 Complement CB Data 273 * | | |These bits are used for TK14 sensitivity adjustment. 274 * |[31:24] |CCBD15 |TK15 Complement CB Data 275 * | | |These bits are used for TK15 sensitivity adjustment. 276 * @var TK_T::CCBD4 277 * Offset: 0x18 Touch Key Complement Capacitor Bank Data Register 4 278 * --------------------------------------------------------------------------------------------------- 279 * |Bits |Field |Descriptions 280 * | :----: | :----: | :---- | 281 * |[7:0] |CCBD16 |TK16 Complement CB Data 282 * | | |These bits are used for TK16 sensitivity adjustment. 283 * |[15:8] |CCBD_ALL |All Keys Scan Complement CB Data 284 * | | |These bits are used for All Key Scan sensitivity adjustment. 285 * @var TK_T::IDLSC 286 * Offset: 0x1C Touch Key Idle State Control Register 287 * --------------------------------------------------------------------------------------------------- 288 * |Bits |Field |Descriptions 289 * | :----: | :----: | :---- | 290 * |[1:0] |IDLS0 |TK0 Idle State Control 291 * | | |These bits are ignored if both TK0SEN (TK_SCANC[0]) and POLEN0 (TK_POLC[8]) are "0" or TK0REN (TK_REFC[0]) is "1". 292 * | | |00 = TK0 connected to Gnd. 293 * | | |01 = TK0 connected to AVDDH. 294 * | | |10 = TK0 connected to VDD. 295 * | | |11 = TK0 connected to VDD. 296 * |[3:2] |IDLS1 |TK1 Idle State Control 297 * | | |These bits are ignored if both TK1SEN (TK_SCANC[1]) and POLEN1 (TK_POLC[9]) are "0" or TK1REN (TK_REFC[1]) is "1". 298 * | | |00 = TK1 connected to Gnd. 299 * | | |01 = TK1 connected to AVDDH. 300 * | | |10 = TK1 connected to VDD. 301 * | | |11 = TK1 connected to VDD. 302 * |[5:4] |IDLS2 |TK2 Idle State Control 303 * | | |These bits are ignored if both TK2SEN (TK_SCANC[2]) and POLEN2 (TK_POLC[10]) are "0" or TK2REN (TK_REFC[2]) is "1". 304 * | | |00 = TK2 connected to Gnd. 305 * | | |01 = TK2 connected to AVDDH. 306 * | | |10 = TK2 connected to VDD. 307 * | | |11 = TK2 connected to VDD. 308 * |[7:6] |IDLS3 |TK3 Idle State Control 309 * | | |These bits are ignored if both TK3SEN (TK_SCANC[3]) and POLEN3 (TK_POLC[11]) are "0" or TK3REN (TK_REFC[3]) is "1". 310 * | | |00 = TK3 connected to Gnd. 311 * | | |01 = TK3 connected to AVDDH. 312 * | | |10 = TK3 connected to VDD. 313 * | | |11 = TK3 connected to VDD. 314 * |[9:8] |IDLS4 |TK4 Idle State Control 315 * | | |These bits are ignored if both TK4SEN (TK_SCANC[4]) and POLEN4 (TK_POLC[12]) are "0" or TK4REN (TK_REFC[4]) is "1". 316 * | | |00 = TK4 connected to Gnd. 317 * | | |01 = TK4 connected to AVDDH. 318 * | | |10 = TK4 connected to VDD. 319 * | | |11 = TK4 connected to VDD. 320 * |[11:10] |IDLS5 |TK5 Idle State Control 321 * | | |These bits are ignored if both TK5SEN (TK_SCANC[5]) and POLEN5 (TK_POLC[13]) are "0" or TK5REN (TK_REFC[5]) is "1". 322 * | | |00 = TK5 connected to Gnd. 323 * | | |01 = TK5 connected to AVDDH. 324 * | | |10 = TK5 connected to VDD. 325 * | | |11 = TK5 connected to VDD. 326 * |[13:12] |IDLS6 |TK6 Idle State Control 327 * | | |These bits are ignored if both TK6SEN (TK_SCANC[6]) and POLEN6 (TK_POLC[14]) are "0" or TK6REN (TK_REFC[6]) is "1". 328 * | | |00 = TK6 connected to Gnd. 329 * | | |01 = TK6 connected to AVDDH. 330 * | | |10 = TK6 connected to VDD. 331 * | | |11 = TK6 connected to VDD. 332 * |[15:14] |IDLS7 |TK7 Idle State Control 333 * | | |These bits are ignored if both TK7SEN (TK_SCANC[7]) and POLEN7 (TK_POLC[15]) are "0" or TK7REN (TK_REFC[7]) is "1". 334 * | | |00 = TK7 connected to Gnd. 335 * | | |01 = TK7 connected to AVDDH. 336 * | | |10 = TK7 connected to VDD. 337 * | | |11 = TK7 connected to VDD. 338 * |[17:16] |IDLS8 |TK8 Idle State Control 339 * | | |These bits are ignored if both TK8SEN (TK_SCANC[8]) and POLEN8 (TK_POLC[16]) are "0" or TK8REN (TK_REFC[8]) is "1". 340 * | | |00 = TK8 connected to Gnd. 341 * | | |01 = TK8 connected to AVDDH. 342 * | | |10 = TK8 connected to VDD. 343 * | | |11 = TK8 connected to VDD. 344 * |[19:18] |IDLS9 |TK9 Idle State Control 345 * | | |These bits are ignored if both TK9SEN (TK_SCANC[9]) and POLEN9 (TK_POLC[17]) are "0" or TK9REN (TK_REFC[9]) is "1". 346 * | | |00 = TK9 connected to Gnd. 347 * | | |01 = TK9 connected to AVDDH. 348 * | | |10 = TK9 connected to VDD. 349 * | | |11 = TK9 connected to VDD. 350 * |[21:20] |IDLS10 |TK10 Idle State Control 351 * | | |These bits are ignored if both TK10SEN (TK_SCANC[10]) and POLEN10 (TK_POLC[18]) are "0" or TK10REN (TK_REFC[10]) is "1". 352 * | | |00 = TK10 connected to Gnd. 353 * | | |01 = TK10 connected to AVDDH. 354 * | | |10 = TK10 connected to VDD. 355 * | | |11 = TK10 connected to VDD. 356 * |[23:22] |IDLS11 |TK11 Idle State Control 357 * | | |These bits are ignored if both TK11SEN (TK_SCANC[11]) and POLEN11 (TK_POLC[19]) are "0" or TK11REN (TK_REFC[11]) is "1". 358 * | | |00 = TK11 connected to Gnd. 359 * | | |01 = TK11 connected to AVDDH. 360 * | | |10 = TK11 connected to VDD. 361 * | | |11 = TK11 connected to VDD. 362 * |[25:24] |IDLS12 |TK12 Idle State Control 363 * | | |These bits are ignored if both TK12SEN (TK_SCANC[12]) and POLEN12 (TK_POLC[20]) are "0" or TK12REN (TK_REFC[12]) is "1". 364 * | | |00 = TK12 connected to Gnd. 365 * | | |01 = TK12 connected to AVDDH. 366 * | | |10 = TK12 connected to VDD. 367 * | | |11 = TK12 connected to VDD. 368 * |[27:26] |IDLS13 |TK13 Idle State Control 369 * | | |These bits are ignored if both TK13SEN (TK_SCANC[13]) and POLEN13 (TK_POLC[21]) are "0" or TK13REN (TK_REFC[13]) is "1". 370 * | | |00 = TK13 connected to Gnd. 371 * | | |01 = TK13 connected to AVDDH. 372 * | | |10 = TK13 connected to VDD. 373 * | | |11 = TK13 connected to VDD. 374 * |[29:28] |IDLS14 |TK14 Idle State Control 375 * | | |These bits are ignored if both TK14SEN (TK_SCANC[14]) and POLEN14 (TK_POLC[22]) are "0" or TK14REN (TK_REFC[14]) is "1". 376 * | | |00 = TK14 connected to Gnd. 377 * | | |01 = TK14 connected to AVDDH. 378 * | | |10 = TK14 connected to VDD. 379 * | | |11 = TK14 connected to VDD. 380 * |[31:30] |IDLS15 |TK15 Idle State Control 381 * | | |These bits are ignored if both TK15SEN (TK_SCANC[15]) and POLEN15 (TK_POLC[23]) are "0" or TK15REN (TK_REFC[15]) is "1". 382 * | | |00 = TK15 connected to Gnd. 383 * | | |01 = TK15 connected to AVDDH. 384 * | | |10 = TK15 connected to VDD. 385 * | | |11 = TK15 connected to VDD. 386 * @var TK_T::POLSEL 387 * Offset: 0x20 Touch Key Polarity Select Register 388 * --------------------------------------------------------------------------------------------------- 389 * |Bits |Field |Descriptions 390 * | :----: | :----: | :---- | 391 * |[1:0] |POL0 |TK0 Polarity Select 392 * | | |These bits are ignored if POLEN0 (TK_POLC[8]) is "0" or TK0REN (TK_REFC[0]) is "1". 393 * | | |00 = TK0 connected to Gnd. 394 * | | |01 = TK0 connected to AVDDH. 395 * | | |10 = TK0 connected to VDD. 396 * | | |11 = TK0 connected to VDD. 397 * |[3:2] |POL1 |TK1 Polarity Select 398 * | | |These bits are ignored if POLEN1 (TK_POLC[9]) is "0" or TK1REN (TK_REFC[1]) is "1". 399 * | | |00 = TK1 connected to Gnd. 400 * | | |01 = TK1 connected to AVDDH. 401 * | | |10 = TK1 connected to VDD. 402 * | | |11 = TK1 connected to VDD. 403 * |[5:4] |POL2 |TK2 Polarity Select 404 * | | |These bits are ignored if POLEN2 (TK_POLC[10]) is "0" or TK2REN (TK_REFC[2]) is "1". 405 * | | |00 = TK2 connected to Gnd. 406 * | | |01 = TK2 connected to AVDDH. 407 * | | |10 = TK2 connected to VDD. 408 * | | |11 = TK2 connected to VDD. 409 * |[7:6] |POL3 |TK3 Polarity Select 410 * | | |These bits are ignored if POLEN3 (TK_POLC[11]) is "0" or TK3REN (TK_REFC[3]) is "1". 411 * | | |00 = TK3 connected to Gnd. 412 * | | |01 = TK3 connected to AVDDH. 413 * | | |10 = TK3 connected to VDD. 414 * | | |11 = TK3 connected to VDD. 415 * |[9:8] |POL4 |TK4 Polarity Select 416 * | | |These bits are ignored if POLEN4 (TK_POLC[12]) is "0" or TK4REN (TK_REFC[4]) is "1". 417 * | | |00 = TK4 connected to Gnd. 418 * | | |01 = TK4 connected to AVDDH. 419 * | | |10 = TK4 connected to VDD. 420 * | | |11 = TK4 connected to VDD. 421 * |[11:10] |POL5 |TK5 Polarity Select 422 * | | |These bits are ignored if POLEN5 (TK_POLC[13]) is "0" or TK5REN (TK_REFC[5]) is "1". 423 * | | |00 = TK5 connected to Gnd. 424 * | | |01 = TK5 connected to AVDDH. 425 * | | |10 = TK5 connected to VDD. 426 * | | |11 = TK5 connected to VDD. 427 * |[13:12] |POL6 |TK6 Polarity Select 428 * | | |These bits are ignored if POLEN6 (TK_POLC[14]) is "0" or TK6REN (TK_REFC[6]) is "1". 429 * | | |00 = TK6 connected to Gnd. 430 * | | |01 = TK6 connected to AVDDH. 431 * | | |10 = TK6 connected to VDD. 432 * | | |11 = TK6 connected to VDD. 433 * |[15:14] |POL7 |TK7 Polarity Select 434 * | | |These bits are ignored if POLEN7 (TK_POLC[15]) is "0" or TK7REN (TK_REFC[7]) is "1". 435 * | | |00 = TK7 connected to Gnd. 436 * | | |01 = TK7 connected to AVDDH. 437 * | | |10 = TK7 connected to VDD. 438 * | | |11 = TK7 connected to VDD. 439 * |[17:16] |POL8 |TK8 Polarity Select 440 * | | |These bits are ignored if POLEN8 (TK_POLC[16]) is "0" or TK8REN (TK_REFC[8]) is "1". 441 * | | |00 = TK8 connected to Gnd. 442 * | | |01 = TK8 connected to AVDDH. 443 * | | |10 = TK8 connected to VDD. 444 * | | |11 = TK8 connected to VDD. 445 * |[19:18] |POL9 |TK9 Polarity Select 446 * | | |These bits are ignored if POLEN9 (TK_POLC[17]) is "0" or TK9REN (TK_REFC[9]) is "1". 447 * | | |00 = TK9 connected to Gnd. 448 * | | |01 = TK9 connected to AVDDH. 449 * | | |10 = TK9 connected to VDD. 450 * | | |11 = TK9 connected to VDD. 451 * |[21:20] |POL10 |TK10 Polarity Select 452 * | | |These bits are ignored if POLEN10 (TK_POLC[18]) is "0" or TK10REN (TK_REFC[10]) is "1". 453 * | | |00 = TK10 connected to Gnd. 454 * | | |01 = TK10 connected to AVDDH. 455 * | | |10 = TK10 connected to VDD. 456 * | | |11 = TK10 connected to VDD. 457 * |[23:22] |POL11 |TK11 Polarity Select 458 * | | |These bits are ignored if POLEN11 (TK_POLC[19]) is "0" or TK11REN (TK_REFC[11]) is "1". 459 * | | |00 = TK11 connected to Gnd. 460 * | | |01 = TK11 connected to AVDDH. 461 * | | |10 = TK11 connected to VDD. 462 * | | |11 = TK11 connected to VDD. 463 * |[25:24] |POL12 |TK12 Polarity Select 464 * | | |These bits are ignored if POLEN12 (TK_POLC[20]) is "0" or TK12REN (TK_REFC[12]) is "1". 465 * | | |00 = TK12 connected to Gnd. 466 * | | |01 = TK12 connected to AVDDH. 467 * | | |10 = TK12 connected to VDD. 468 * | | |11 = TK12 connected to VDD. 469 * |[27:26] |POL13 |TK13 Polarity Select 470 * | | |These bits are ignored if POLEN13 (TK_POLC[21]) is "0" or TK13REN (TK_REFC[13]) is "1". 471 * | | |00 = TK13 connected to Gnd. 472 * | | |01 = TK13 connected to AVDDH. 473 * | | |10 = TK13 connected to VDD. 474 * | | |11 = TK13 connected to VDD. 475 * |[29:28] |POL14 |TK14 Polarity Select 476 * | | |These bits are ignored if POLEN14 (TK_POLC[22]) is "0" or TK14REN (TK_REFC[14]) is "1". 477 * | | |00 = TK14 connected to Gnd. 478 * | | |01 = TK14 connected to AVDDH. 479 * | | |10 = TK14 connected to VDD. 480 * | | |11 = TK14 connected to VDD. 481 * |[31:30] |POL15 |TK15 Polarity Select 482 * | | |These bits are ignored if POLEN15 (TK_POLC[23]) is "0" or TK15REN (TK_REFC[15]) is "1". 483 * | | |00 = TK15 connected to Gnd. 484 * | | |01 = TK15 connected to AVDDH. 485 * | | |10 = TK15 connected to VDD. 486 * | | |11 = TK15 connected to VDD. 487 * @var TK_T::POLC 488 * Offset: 0x24 Touch Key Polarity Control Register 489 * --------------------------------------------------------------------------------------------------- 490 * |Bits |Field |Descriptions 491 * | :----: | :----: | :---- | 492 * |[1:0] |IDLS16 |TK16 Idle State Control 493 * | | |These bits are ignored if both TK16SEN (TK_SCANC[16]) and POLEN16 (TK_POLC[24]) are "0" or TK16REN (TK_REFC[16]) is "1". 494 * | | |00 = TK16 connected to Gnd. 495 * | | |01 = TK16 connected to AVDDH. 496 * | | |10 = TK16 connected to VDD. 497 * | | |11 = TK16 connected to VDD. 498 * |[3:2] |POL16 |TK16 Polarity Control 499 * | | |These bits are ignored if POLEN16 (TK_POLC[24]) is "0" or TK16REN (TK_REFC[16]) is "1". 500 * | | |00 = TK16 connected to Gnd. 501 * | | |01 = TK16 connected to AVDDH. 502 * | | |10 = TK16 connected to VDD. 503 * | | |11 = TK16 connected to VDD. 504 * |[5:4] |POL_CAP |Capacitor Bank Polarity Select 505 * | | |00 = Gnd. 506 * | | |01 = AVDDH. 507 * | | |10 = VDD. 508 * | | |11 = VDD. 509 * |[8] |POLEN0 |TK0 Polarity Function Enable Bit 510 * | | |0 = TK0 polarity function Disabled. 511 * | | |1 = TK0 polarity function Enabled. 512 * |[9] |POLEN1 |TK1 Polarity Function Enable Bit 513 * | | |0 = TK1 polarity function Disabled. 514 * | | |1 = TK1 polarity function Enabled. 515 * |[10] |POLEN2 |TK2 Polarity Function Enable Bit 516 * | | |0 = TK2 polarity function Disabled. 517 * | | |1 = TK2 polarity function Enabled. 518 * |[11] |POLEN3 |TK3 Polarity Function Enable Bit 519 * | | |0 = TK3 polarity function Disabled. 520 * | | |1 = TK3 polarity function Enabled. 521 * |[12] |POLEN4 |TK4 Polarity Function Enable Bit 522 * | | |0 = TK4 polarity function Disabled. 523 * | | |1 = TK4 polarity function Enabled. 524 * |[13] |POLEN5 |TK5 Polarity Function Enable Bit 525 * | | |0 = TK5 polarity function Disabled. 526 * | | |1 = TK5 polarity function Enabled. 527 * |[14] |POLEN6 |TK6 Polarity Function Enable Bit 528 * | | |0 = TK6 polarity function Disabled. 529 * | | |1 = TK6 polarity function Enabled. 530 * |[15] |POLEN7 |TK7 Polarity Function Enable Bit 531 * | | |0 = TK7 polarity function Disabled. 532 * | | |1 = TK7 polarity function Enabled. 533 * |[16] |POLEN8 |TK8 Polarity Function Enable Bit 534 * | | |0 = TK8 polarity function Disabled. 535 * | | |1 = TK8 polarity function Enabled. 536 * |[17] |POLEN9 |TK9 Polarity Function Enable Bit 537 * | | |0 = TK9 polarity function Disabled. 538 * | | |1 = TK9 polarity function Enabled. 539 * |[18] |POLEN10 |TK10 Polarity Function Enable Bit 540 * | | |0 = TK10 polarity function Disabled. 541 * | | |1 = TK10 polarity function Enabled. 542 * |[19] |POLEN11 |TK11 Polarity Function Enable Bit 543 * | | |0 = TK11 polarity function Disabled. 544 * | | |1 = TK11 polarity function Enabled. 545 * |[20] |POLEN12 |TK12 Polarity Function Enable Bit 546 * | | |0 = TK12 polarity function Disabled. 547 * | | |1 = TK12 polarity function Enabled. 548 * |[21] |POLEN13 |TK13 Polarity Function Enable Bit 549 * | | |0 = TK13 polarity function Disabled. 550 * | | |1 = TK13 polarity function Enabled. 551 * |[22] |POLEN14 |TK14 Polarity Function Enable Bit 552 * | | |0 = TK14 polarity function Disabled. 553 * | | |1 = TK14 polarity function Enabled. 554 * |[23] |POLEN15 |TK15 Polarity Function Enable Bit 555 * | | |0 = TK15 polarity function Disabled. 556 * | | |1 = TK15 polarity function Enabled. 557 * |[24] |POLEN16 |TK16 Polarity Function Enable Bit 558 * | | |0 = TK16 polarity function Disabled. 559 * | | |1 = TK16 polarity function Enabled. 560 * |[31] |POL_INIT |Touch Key Sensing Initial Potential Control 561 * | | |0 = Key pad is connected to Gnd before sensing. 562 * | | |1 = Key pad is connected to AVDDH before sensing. 563 * @var TK_T::STA 564 * Offset: 0x28 Touch Key Status Register 565 * --------------------------------------------------------------------------------------------------- 566 * |Bits |Field |Descriptions 567 * | :----: | :----: | :---- | 568 * |[0] |BUSY |Touch Key Busy (Read Only) 569 * | | |0 = Key scan is complete or stopped. 570 * | | |1 = Key scan is proceeding. 571 * |[1] |SCIF |Touch Key Scan Complete Interrupt Flag (Read Only) 572 * | | |This bit will be cleared by writing a "1" to this bit. 573 * | | |0 = Key scan is proceeding and data is not ready for read. 574 * | | |1 = Key scan is complete and data is ready for read in TKDATx registers. 575 * | | |Note 1: The Touch Key interrupt asserts if SCIE bit of TK_INTEN register is set. 576 * | | |Note 2: The Touch Key interrupt also asserts if STHIE bit of TK_INTEN register is set and any channel data value is greater/less than its threshold setting. 577 * | | |Note 3: This bit will be cleared by writing a "1" to this bit. 578 * |[6] |TKIF |Key Scan Interrupt Flag (Read Only) 579 * | | |0 = No threshold control event with each Keys Scan. 580 * | | |1 = Threshold control event occurs with each Keys Scan. 581 * | | |Note: This bit is 1 while any one of TKIF0~TKIF17 is 1. 582 * |[7] |TKIF_ALL |All Keys Scan Interrupt Flag 583 * | | |0 = No threshold control event with All Keys Scan. 584 * | | |1 = Threshold control event occurs with All Keys Scan. 585 * | | |Note: This bit will be cleared by writing a "1" to this bit. 586 * |[8] |TKIF0 |TK0 Interrupt Flag (Read Only) 587 * | | |0 = No threshold control event with TK0. 588 * | | |1 = Threshold control event occurs with TK0. 589 * | | |Note: This bit will be cleared by writing a "1" to this bit. 590 * |[9] |TKIF1 |TK1 Interrupt Flag (Read Only) 591 * | | |0 = No threshold control event with TK1. 592 * | | |1 = Threshold control event occurs with TK1. 593 * | | |Note: This bit will be cleared by writing a "1" to this bit. 594 * |[10] |TKIF2 |TK2 Interrupt Flag (Read Only) 595 * | | |This bit will be cleared by writing a "1" to this bit. 596 * | | |0 = No threshold control event with TK2. 597 * | | |1 = Threshold control event occurs with TK2. 598 * |[11] |TKIF3 |TK3 Interrupt Flag (Read Only) 599 * | | |This bit will be cleared by writing a "1" to this bit. 600 * | | |0 = No threshold control event with TK3. 601 * | | |1 = Threshold control event occurs with TK3. 602 * |[12] |TKIF4 |TK4 Interrupt Flag (Read Only) 603 * | | |This bit will be cleared by writing a "1" to this bit. 604 * | | |0 = No threshold control event with TK4. 605 * | | |1 = Threshold control event occurs with TK4. 606 * |[13] |TKIF5 |TK5 Interrupt Flag (Read Only) 607 * | | |This bit will be cleared by writing a "1" to this bit. 608 * | | |0 = No threshold control event with TK5. 609 * | | |1 = Threshold control event occurs with TK5. 610 * |[14] |TKIF6 |TK6 Interrupt Flag (Read Only) 611 * | | |This bit will be cleared by writing a "1" to this bit. 612 * | | |0 = No threshold control event with TK6. 613 * | | |1 = Threshold control event occurs with TK6. 614 * |[15] |TKIF7 |TK7 Interrupt Flag (Read Only) 615 * | | |This bit will be cleared by writing a "1" to this bit. 616 * | | |0 = No threshold control event with TK7. 617 * | | |1 = Threshold control event occurs with TK7. 618 * | | |Note: This bit will be cleared by writing a "1" to this bit. 619 * |[16] |TKIF8 |TK8 Interrupt Flag (Read Only) 620 * | | |0 = No threshold control event with TK8. 621 * | | |1 = Threshold control event occurs with TK8. 622 * | | |Note: This bit will be cleared by writing a "1" to this bit. 623 * |[17] |TKIF9 |TK9 Interrupt Flag (Read Only) 624 * | | |0 = No threshold control event with TK9. 625 * | | |1 = Threshold control event occurs with TK9. 626 * | | |Note: This bit will be cleared by writing a "1" to this bit. 627 * |[18] |TKIF10 |TK10 Interrupt Flag (Read Only) 628 * | | |0 = No threshold control event with TK10. 629 * | | |1 = Threshold control event occurs with TK10. 630 * | | |Note: This bit will be cleared by writing a "1" to this bit. 631 * |[19] |TKIF11 |TK11 Interrupt Flag (Read Only) 632 * | | |0 = No threshold control event with TK11. 633 * | | |1 = Threshold control event occurs with TK11. 634 * | | |Note: This bit will be cleared by writing a "1" to this bit. 635 * |[20] |TKIF12 |TK12 Interrupt Flag (Read Only) 636 * | | |0 = No threshold control event with TK12. 637 * | | |1 = Threshold control event occurs with TK12. 638 * | | |Note: This bit will be cleared by writing a "1" to this bit. 639 * |[21] |TKIF13 |TK13 Interrupt Flag (Read Only) 640 * | | |0 = No threshold control event with TK13. 641 * | | |1 = Threshold control event occurs with TK13. 642 * | | |Note: This bit will be cleared by writing a "1" to this bit. 643 * |[22] |TKIF14 |TK14 Interrupt Flag (Read Only) 644 * | | |0 = No threshold control event with TK14. 645 * | | |1 = Threshold control event occurs with TK14. 646 * | | |Note: This bit will be cleared by writing a "1" to this bit. 647 * |[23] |TKIF15 |TK15 Interrupt Flag (Read Only) 648 * | | |0 = No threshold control event with TK15. 649 * | | |1 = Threshold control event occurs with TK15. 650 * | | |Note: This bit will be cleared by writing a "1" to this bit. 651 * |[24] |TKIF16 |TK16 Interrupt Flag (Read Only) 652 * | | |0 = No threshold control event with TK16. 653 * | | |1 = Threshold control event occurs with TK16. 654 * | | |Note: This bit will be cleared by writing a "1" to this bit. 655 * @var TK_T::DAT0 656 * Offset: 0x2C Touch Key Data Register 0 657 * --------------------------------------------------------------------------------------------------- 658 * |Bits |Field |Descriptions 659 * | :----: | :----: | :---- | 660 * |[7:0] |TKDAT0 |TK0 Sensing Result Data (Read Only) 661 * | | |This data is invalid if TK0SEN (TK_SCANC[0]) is "0" or TK0REN (TK_REFC[0]) is "1" except SCAN_ALL (TK_REFC[23]) is "1". 662 * |[15:8] |TKDAT1 |TK1 Sensing Result Data (Read Only) 663 * | | |This data is invalid if TK1SEN (TK_SCANC[1]) is "0" or TK1REN (TK_REFC[1]) is "1". 664 * |[23:16] |TKDAT2 |TK2 Sensing Result Data (Read Only) 665 * | | |This data is invalid if TK2SEN (TK_SCANC[2]) is "0" or TK2REN (TK_REFC[2]) is "1". 666 * |[31:24] |TKDAT3 |TK3 Sensing Result Data (Read Only) 667 * | | |This data is invalid if TK3SEN (TK_SCANC[3]) is "0" or TK3REN (TK_REFC[3]) is "1". 668 * @var TK_T::DAT1 669 * Offset: 0x30 Touch Key Data Register 1 670 * --------------------------------------------------------------------------------------------------- 671 * |Bits |Field |Descriptions 672 * | :----: | :----: | :---- | 673 * |[7:0] |TKDAT4 |TK0 Sensing Result Data (Read Only) 674 * | | |This data is invalid if TK4SEN (TK_SCANC[4]) is "0" or TK4REN (TK_REFC[4]) is "1". 675 * |[15:8] |TKDAT5 |TK5 Sensing Result Data (Read Only) 676 * | | |This data is invalid if TK5SEN (TK_SCANC[5]) is "0" or TK5REN (TK_REFC[5]) is "1". 677 * |[23:16] |TKDAT6 |TK6 Sensing Result Data (Read Only) 678 * | | |This data is invalid if TK6SEN (TK_SCANC[6]) is "0" or TK6REN (TK_REFC[6]) is "1". 679 * |[31:24] |TKDAT7 |TK7 Sensing Result Data (Read Only) 680 * | | |This data is invalid if TK7SEN (TK_SCANC[7]) is "0" or TK7REN (TK_REFC[7]) is "1". 681 * @var TK_T::DAT2 682 * Offset: 0x34 Touch Key Data Register 2 683 * --------------------------------------------------------------------------------------------------- 684 * |Bits |Field |Descriptions 685 * | :----: | :----: | :---- | 686 * |[7:0] |TKDAT8 |TK8 Sensing Result Data (Read Only) 687 * | | |This data is invalid if TK8SEN (TK_SCANC[8]) is "0" or TK8REN (TK_REFC[8]) is "1". 688 * |[15:8] |TKDAT9 |TK9 Sensing Result Data (Read Only) 689 * | | |This data is invalid if TK9SEN (TK_SCANC[9]) is "0" or TK9REN (TK_REFC[9]) is "1". 690 * |[23:16] |TKDAT10 |TK10 Sensing Result Data (Read Only) 691 * | | |This data is invalid if TK10SEN (TK_SCANC[10]) is "0" or TK10REN (TK_REFC[10]) is "1". 692 * |[31:24] |TKDAT11 |TK11 Sensing Result Data (Read Only) 693 * | | |This data is invalid if TK11SEN (TK_SCANC[11]) is "0" or TK11REN (TK_REFC[11]) is "1". 694 * @var TK_T::DAT3 695 * Offset: 0x38 Touch Key Data Register 3 696 * --------------------------------------------------------------------------------------------------- 697 * |Bits |Field |Descriptions 698 * | :----: | :----: | :---- | 699 * |[7:0] |TKDAT12 |TK12 Sensing Result Data (Read Only) 700 * | | |This data is invalid if TK12SEN (TK_SCANC[12]) is "0" or TK12REN (TK_REFC[12]) is "1". 701 * |[15:8] |TKDAT13 |TK13 Sensing Result Data (Read Only) 702 * | | |This data is invalid if TK13SEN (TK_SCANC[13]) is "0" or TK13REN (TK_REFC[13]) is "1". 703 * |[23:16] |TKDAT14 |TK14 Sensing Result Data (Read Only) 704 * | | |This data is invalid if TK14SEN (TK_SCANC[14]) is "0" or TK14REN (TK_REFC[14]) is "1". 705 * |[31:24] |TKDAT15 |TK15 Sensing Result Data (Read Only) 706 * | | |This data is invalid if TK15SEN (TK_SCANC[15]) is "0" or TK15REN (TK_REFC[15]) is "1". 707 * @var TK_T::DAT4 708 * Offset: 0x3C Touch Key Data Register 4 709 * --------------------------------------------------------------------------------------------------- 710 * |Bits |Field |Descriptions 711 * | :----: | :----: | :---- | 712 * |[7:0] |TKDAT16 |TK16 Sensing Result Data (Read Only) 713 * | | |This data is invalid if TK16SEN (TK_SCANC[16]) is "0" or TK16REN (TK_REFC[16]) is "1". 714 * |[15:8] |TKDAT_ALL |All Keys Scan Sensing Result Data (Read Only) 715 * | | |This data is invalid if SCAN_ALL (TK_REFC[23]) is "0". 716 * @var TK_T::INTEN 717 * Offset: 0x40 Touch Key Interrupt Enable Register 718 * --------------------------------------------------------------------------------------------------- 719 * |Bits |Field |Descriptions 720 * | :----: | :----: | :---- | 721 * |[0] |SCTHIE |Touch Key Scan Complete with High Threshold Control Interrupt Enable Bit 722 * | | |0 = Key scan complete with threshold control interrupt Disabled. 723 * | | |1 = Key scan complete with threshold control interrupt Enabled. 724 * |[1] |SCIE |Touch Key Scan Complete Interrupt Enable Bit 725 * | | |0 = Key scan complete without threshold control interrupt Disabled. 726 * | | |1 = Key scan complete without threshold control interrupt Enabled. 727 * @var TK_T::THC01 728 * Offset: 0x44 Touch Key TK0/TK1 Threshold Control Register 729 * --------------------------------------------------------------------------------------------------- 730 * |Bits |Field |Descriptions 731 * | :----: | :----: | :---- | 732 * |[15:8] |HTH0 |High Threshold of TK0 733 * | | |High level for TK0 threshold control. 734 * |[31:24] |HTH1 |High Threshold of TK1 735 * | | |High level for TK1 threshold control. 736 * @var TK_T::THC23 737 * Offset: 0x48 Touch Key TK2/TK3 Threshold Control Register 738 * --------------------------------------------------------------------------------------------------- 739 * |Bits |Field |Descriptions 740 * | :----: | :----: | :---- | 741 * |[15:8] |HTH2 |High Threshold of TK2 742 * | | |High level for TK2 threshold control. 743 * |[31:24] |HTH3 |High Threshold of TK3 744 * | | |High level for TK3 threshold control. 745 * @var TK_T::THC45 746 * Offset: 0x4C Touch Key TK4/TK5 Threshold Control Register 747 * --------------------------------------------------------------------------------------------------- 748 * |Bits |Field |Descriptions 749 * | :----: | :----: | :---- | 750 * |[15:8] |HTH4 |High Threshold of TK4 751 * | | |High level for TK4 threshold control. 752 * |[31:24] |HTH5 |High Threshold of TK5 753 * | | |High level for TK5 threshold control. 754 * @var TK_T::THC67 755 * Offset: 0x50 Touch Key TK6/TK7 Threshold Control Register 756 * --------------------------------------------------------------------------------------------------- 757 * |Bits |Field |Descriptions 758 * | :----: | :----: | :---- | 759 * |[15:8] |HTH6 |High Threshold of TK6 760 * | | |High level for TK6 threshold control. 761 * |[31:24] |HTH7 |High Threshold of TK7 762 * | | |High level for TK7 threshold control. 763 * @var TK_T::THC89 764 * Offset: 0x54 Touch Key TK8/TK9 Threshold Control Register 765 * --------------------------------------------------------------------------------------------------- 766 * |Bits |Field |Descriptions 767 * | :----: | :----: | :---- | 768 * |[15:8] |HTH8 |High Threshold of TK8 769 * | | |High level for TK8 threshold control. 770 * |[31:24] |HTH9 |High Threshold of TK9 771 * | | |High level for TK9 threshold control. 772 * @var TK_T::THC1011 773 * Offset: 0x58 Touch Key TK10/TK11 Threshold Control Register 774 * --------------------------------------------------------------------------------------------------- 775 * |Bits |Field |Descriptions 776 * | :----: | :----: | :---- | 777 * |[15:8] |HTH10 |High Threshold of TK10 778 * | | |High level for TK10 threshold control. 779 * |[31:24] |HTH11 |High Threshold of TK11 780 * | | |High level for TK11 threshold control. 781 * @var TK_T::THC1213 782 * Offset: 0x5C Touch Key TK12/TK13 Threshold Control Register 783 * --------------------------------------------------------------------------------------------------- 784 * |Bits |Field |Descriptions 785 * | :----: | :----: | :---- | 786 * |[15:8] |HTH12 |High Threshold of TK12 787 * | | |High level for TK12 threshold control. 788 * |[31:24] |HTH13 |High Threshold of TK13 789 * | | |High level for TK13 threshold control. 790 * @var TK_T::THC1415 791 * Offset: 0x60 Touch Key TK14/TK15 Threshold Control Register 792 * --------------------------------------------------------------------------------------------------- 793 * |Bits |Field |Descriptions 794 * | :----: | :----: | :---- | 795 * |[15:8] |HTH14 |High Threshold of TK14 796 * | | |High level for TK14 threshold control. 797 * |[31:24] |HTH15 |High Threshold of TK15 798 * | | |High level for TK15 threshold control. 799 * @var TK_T::THC16 800 * Offset: 0x64 Touch Key TK16 Threshold Control Register 801 * --------------------------------------------------------------------------------------------------- 802 * |Bits |Field |Descriptions 803 * | :----: | :----: | :---- | 804 * |[15:8] |HTH16 |High Threshold of TK16 805 * | | |High level for TK16 threshold control. 806 * |[31:24] |HTH_ALL |High Threshold of ALL Keys Scan 807 * | | |High level for All Keys Scan threshold control. 808 * @var TK_T::REFCBD0 809 * Offset: 0x68 Touch Key Reference Capacitor Bank Data Register 0 810 * --------------------------------------------------------------------------------------------------- 811 * |Bits |Field |Descriptions 812 * | :----: | :----: | :---- | 813 * |[7:0] |CBD0 |TK0 Capacitor Bank Data 814 * | | |These bits are used for TK0 sensitivity adjustment. 815 * |[15:8] |CBD1 |TK1 Capacitor Bank Data 816 * | | |These bits are used for TK1 sensitivity adjustment. 817 * |[23:16] |CBD2 |TK2 Capacitor Bank Data 818 * | | |These bits are used for TK2 sensitivity adjustment. 819 * |[31:24] |CBD3 |TK3 Capacitor Bank Data 820 * | | |These bits are used for TK3 sensitivity adjustment. 821 * @var TK_T::REFCBD1 822 * Offset: 0x6C Touch Key Reference Capacitor Bank Data Register 1 823 * --------------------------------------------------------------------------------------------------- 824 * |Bits |Field |Descriptions 825 * | :----: | :----: | :---- | 826 * |[7:0] |CBD4 |TK4 Capacitor Bank Data 827 * | | |These bits are used for TK4 sensitivity adjustment. 828 * |[15:8] |CBD5 |TK5 Capacitor Bank Data 829 * | | |These bits are used for TK5 sensitivity adjustment. 830 * |[23:16] |CBD6 |TK6 Capacitor Bank Data 831 * | | |These bits are used for TK6 sensitivity adjustment. 832 * |[31:24] |CBD7 |TK7 Capacitor Bank Data 833 * | | |These bits are used for TK7 sensitivity adjustment. 834 * @var TK_T::REFCBD2 835 * Offset: 0x70 Touch Key Reference Capacitor Bank Data Register 2 836 * --------------------------------------------------------------------------------------------------- 837 * |Bits |Field |Descriptions 838 * | :----: | :----: | :---- | 839 * |[7:0] |CBD8 |TK8 Capacitor Bank Data 840 * | | |These bits are used for TK8 sensitivity adjustment. 841 * |[15:8] |CBD9 |TK9 Capacitor Bank Data 842 * | | |These bits are used for TK9 sensitivity adjustment. 843 * |[23:16] |CBD10 |TK10 Capacitor Bank Data 844 * | | |These bits are used for TK10 sensitivity adjustment. 845 * |[31:24] |CBD11 |TK11 Capacitor Bank Data 846 * | | |These bits are used for TK11 sensitivity adjustment. 847 * @var TK_T::REFCBD3 848 * Offset: 0x74 Touch Key Reference Capacitor Bank Data Register 3 849 * --------------------------------------------------------------------------------------------------- 850 * |Bits |Field |Descriptions 851 * | :----: | :----: | :---- | 852 * |[7:0] |CBD12 |TK12 Capacitor Bank Data 853 * | | |These bits are used for TK12 sensitivity adjustment. 854 * |[15:8] |CBD13 |TK13 Capacitor Bank Data 855 * | | |These bits are used for TK13 sensitivity adjustment. 856 * |[23:16] |CBD14 |TK14 Capacitor Bank Data 857 * | | |These bits are used for TK14 sensitivity adjustment. 858 * |[31:24] |CBD15 |TK15 Capacitor Bank Data 859 * | | |These bits are used for TK15 sensitivity adjustment. 860 * @var TK_T::REFCBD4 861 * Offset: 0x78 Touch Key Reference Capacitor Bank Data Register 4 862 * --------------------------------------------------------------------------------------------------- 863 * |Bits |Field |Descriptions 864 * | :----: | :----: | :---- | 865 * |[7:0] |CBD16 |TK16 Capacitor Bank Data 866 * | | |These bits are used for TK16 sensitivity adjustment. 867 * |[15:8] |CBD_ALL |All Keys Scan Capacitor Bank Data 868 * | | |These bits are used for All Keys Scan sensitivity adjustment. 869 * @var TK_T::SCANC1 870 * Offset: 0x80 Touch Key Scan Control Register 1 871 * --------------------------------------------------------------------------------------------------- 872 * |Bits |Field |Descriptions 873 * | :----: | :----: | :---- | 874 * |[0] |TK17SEN |TK17 Scan Enable Bit 875 * | | |This bit is ignored if TK17REN (TK_REFC[17]) is "1". 876 * | | |0 = TKDAT17 (TK_DAT5[7:0]) is invalid. 877 * | | |1 = TK17 is always enabled for key scan. TKDAT17 (TK_DAT5[7:0]) is valid. 878 * @var TK_T::REFC1 879 * Offset: 0x84 Touch Key Reference Control Register 1 880 * --------------------------------------------------------------------------------------------------- 881 * |Bits |Field |Descriptions 882 * | :----: | :----: | :---- | 883 * |[0] |TK17REN |TK17 Reference Enable Bit 884 * | | |0 = TK17 is not reference. 885 * | | |1 = TK17 is set as reference, and TKDAT17 (TK_DAT5[7:0]) is invalid. 886 * @var TK_T::CCBD5 887 * Offset: 0x88 Touch Key Complement Capacitor Bank Data Register 5 888 * --------------------------------------------------------------------------------------------------- 889 * |Bits |Field |Descriptions 890 * | :----: | :----: | :---- | 891 * |[7:0] |CCBD17 |TK17 Complement CB Data 892 * | | |These bits are used for TK17 sensitivity adjustment. 893 * @var TK_T::IDLSC1 894 * Offset: 0x9C Touch Key Idle State Control Register 1 895 * --------------------------------------------------------------------------------------------------- 896 * |Bits |Field |Descriptions 897 * | :----: | :----: | :---- | 898 * |[1:0] |IDLS17 |TK17 Idle State Control 899 * | | |These bits are ignored if both TK17SEN (TK_SCANC1[0]) and POLEN17 (TK_POLC1[0]) are "0" or TK17REN (TK_REFC1[0]) is "1". 900 * | | |00 = TK17 connected to Gnd. 901 * | | |01 = TK17 connected to AVDDH. 902 * | | |10 = TK17 connected to VDD. 903 * | | |11 = TK17 connected to VDD. 904 * @var TK_T::POLSEL1 905 * Offset: 0xA0 Touch Key Polarity Select Register 1 906 * --------------------------------------------------------------------------------------------------- 907 * |Bits |Field |Descriptions 908 * | :----: | :----: | :---- | 909 * |[1:0] |POL17 |TK17 Polarity Select 910 * | | |These bits are ignored if POLEN17 (TK_POLC1[0]) is "0" or TK17REN (TK_REFC1[0]) is "1". 911 * | | |00 = TK17 connected to Gnd. 912 * | | |01 = TK17 connected to AVDDH. 913 * | | |10 = TK17 connected to VDD. 914 * | | |11 = TK17 connected to VDD. 915 * @var TK_T::POLC1 916 * Offset: 0xA4 Touch Key Polarity Control Register 1 917 * --------------------------------------------------------------------------------------------------- 918 * |Bits |Field |Descriptions 919 * | :----: | :----: | :---- | 920 * |[0] |POLEN17 |TK17 Polarity Function Enable Bit 921 * | | |0 = TK17 polarity function Disabled. 922 * | | |1 = TK17 polarity function Enabled. 923 * @var TK_T::STA1 924 * Offset: 0xA8 Touch Key Status Register 1 925 * --------------------------------------------------------------------------------------------------- 926 * |Bits |Field |Descriptions 927 * | :----: | :----: | :---- | 928 * |[0] |TKIF17 |TK17 Interrupt Flag (Read Only) 929 * | | |This bit will be cleared by writing a "1" to this bit. 930 * | | |0 = No threshold control event with TK17. 931 * | | |1 = Threshold control event occurs with TK17. 932 * @var TK_T::DAT5 933 * Offset: 0xAC Touch Key Data Register 5 934 * --------------------------------------------------------------------------------------------------- 935 * |Bits |Field |Descriptions 936 * | :----: | :----: | :---- | 937 * |[7:0] |TKDAT17 |TK17 Sensing Result Data (Read Only) 938 * | | |This data is invalid if TK17SEN (TK_SCANC1[0]) is "0" or TK17REN (TK_REFC1[0]) is "1". 939 * @var TK_T::THC17 940 * Offset: 0xC4 Touch Key TK17 Threshold Control Register 941 * --------------------------------------------------------------------------------------------------- 942 * |Bits |Field |Descriptions 943 * | :----: | :----: | :---- | 944 * |[15:8] |HTH17 |High Threshold of TK17 945 * | | |High level for TK17 threshold control. 946 * @var TK_T::REFCBD5 947 * Offset: 0xE8 Touch Key Reference Capacitor Bank Data Register 5 948 * --------------------------------------------------------------------------------------------------- 949 * |Bits |Field |Descriptions 950 * | :----: | :----: | :---- | 951 * |[7:0] |CBD17 |TK17 Capacitor Bank Data 952 * | | |These bits are used for TK17 sensitivity adjustment. 953 * @var TK_T::EXTCBC 954 * Offset: 0x100 Touch Key Extend Capacitor Bank Control Register 955 * --------------------------------------------------------------------------------------------------- 956 * |Bits |Field |Descriptions 957 * | :----: | :----: | :---- | 958 * |[1:0] |EXT_CBSEL |TK Extend Capacitor Bank Select 959 * | | |TK capacitor bank data and reference capacitor bank data are 9 bits 960 * | | |These bits are used to select how the 9 bits are generated. 961 * | | |00 = CCBDx (TK_CCBDx[8n+7:8n]) and CBDx (TK_REFCBDx[8n+7:8n]) are valid, but EXT_CCBDx (TK_EXTCCBDx[0]) and EXT_CBDx (TK_REFCBDx[0]) are invalid 962 * | | |The capacitor touch key sensing controller adds 1'b0 to the MSB of capacitor bank data and reference capacitor bank data, and the controller finally outputs 9 bits such as {1'b0, CCBDx} or {1'b0, CBDx} 963 * | | |01 = CCBDx (TK_CCBDx[8n+7:8n]) and CBDx (TK_REFCBDx[8n+7:8n]) are valid, but EXT_CCBDx (TK_EXTCCBDx[0]) and EXT_CBDx (TK_REFCBDx[0]) are invalid 964 * | | |The capacitor touch key sensing controller shifts the capacitor bank data and reference capacitor bank data one bit to the left, and the controller finally outputs 9 bits such as {CCBDx, 1'b0} or {CBDx, 1'b0}. 965 * | | |10 = CCBDx (TK_CCBDx[8n+7:8n]), CBDx (TK_REFCBDx[8n+7:8n]), EXT_CCBDx (TK_EXTCCBDx[0]) and EXT_CBDx (TK_REFCBDx[0]) are valid 966 * | | |The capacitor touch key sensing controller outputs 9 bits such as {EXT_CCBDx, CCBDx} or {EXT_CBDx, CBDx}. 967 * | | |11 = Reserved. 968 * | | |Note: The above parameter x is 0 to 17. 969 * | | |Note: The above parameter n is 0 to 3. 970 * @var TK_T::EXTCCBD0 971 * Offset: 0x104 Touch Key Extend Complement Capacitor Bank Data Register 0 972 * --------------------------------------------------------------------------------------------------- 973 * |Bits |Field |Descriptions 974 * | :----: | :----: | :---- | 975 * |[0] |CCBD0 |TK0 Extend Complement CB Data 976 * | | |These bits are used for TK0 sensitivity adjustment. 977 * |[8] |CCBD1 |TK1 Extend Complement CB Data 978 * | | |These bits are used for TK1 sensitivity adjustment. 979 * |[16] |CCBD2 |TK2 Extend Complement CB Data 980 * | | |These bits are used for TK2 sensitivity adjustment. 981 * |[24] |CCBD3 |TK3 Extend Complement CB Data 982 * | | |These bits are used for TK3 sensitivity adjustment. 983 * @var TK_T::EXTCCBD1 984 * Offset: 0x108 Touch Key Extend Complement Capacitor Bank Data Register 1 985 * --------------------------------------------------------------------------------------------------- 986 * |Bits |Field |Descriptions 987 * | :----: | :----: | :---- | 988 * |[0] |CCBD4 |TK4 Extend Complement CB Data 989 * | | |These bits are used for TK4 sensitivity adjustment. 990 * |[8] |CCBD5 |TK5 Extend Complement CB Data 991 * | | |These bits are used for TK5 sensitivity adjustment. 992 * |[16] |CCBD6 |TK6 Extend Complement CB Data 993 * | | |These bits are used for TK6 sensitivity adjustment. 994 * |[24] |CCBD7 |TK7 Extend Complement CB Data 995 * | | |These bits are used for TK7 sensitivity adjustment. 996 * @var TK_T::EXTCCBD2 997 * Offset: 0x10C Touch Key Extend Complement Capacitor Bank Data Register 2 998 * --------------------------------------------------------------------------------------------------- 999 * |Bits |Field |Descriptions 1000 * | :----: | :----: | :---- | 1001 * |[0] |CCBD8 |TK8 Extend Complement CB Data 1002 * | | |These bits are used for TK8 sensitivity adjustment. 1003 * |[8] |CCBD9 |TK9 Extend Complement CB Data 1004 * | | |These bits are used for TK9 sensitivity adjustment. 1005 * |[16] |CCBD10 |TK10 Extend Complement CB Data 1006 * | | |These bits are used for TK10 sensitivity adjustment. 1007 * |[24] |CCBD11 |TK11 Extend Complement CB Data 1008 * | | |These bits are used for TK11 sensitivity adjustment. 1009 * @var TK_T::EXTCCBD3 1010 * Offset: 0x110 Touch Key Extend Complement Capacitor Bank Data Register 3 1011 * --------------------------------------------------------------------------------------------------- 1012 * |Bits |Field |Descriptions 1013 * | :----: | :----: | :---- | 1014 * |[0] |CCBD12 |TK12 Extend Complement CB Data 1015 * | | |These bits are used for TK12 sensitivity adjustment. 1016 * |[8] |CCBD13 |TK13 Extend Complement CB Data 1017 * | | |These bits are used for TK13 sensitivity adjustment. 1018 * |[16] |CCBD14 |TK14 Extend Complement CB Data 1019 * | | |These bits are used for TK14 sensitivity adjustment. 1020 * |[24] |CCBD15 |TK15 Extend Complement CB Data 1021 * | | |These bits are used for TK15 sensitivity adjustment. 1022 * @var TK_T::EXTCCBD4 1023 * Offset: 0x114 Touch Key Extend Complement Capacitor Bank Data Register 4 1024 * --------------------------------------------------------------------------------------------------- 1025 * |Bits |Field |Descriptions 1026 * | :----: | :----: | :---- | 1027 * |[0] |CCBD16 |TK16 Extend Complement CB Data 1028 * | | |These bits are used for TK16 sensitivity adjustment. 1029 * |[8] |CCBDALL |All Keys Extend Complement CB Data 1030 * | | |These bits are used for All Key Scan sensitivity adjustment. 1031 * @var TK_T::EXTCCBD5 1032 * Offset: 0x118 Touch Key Extend Complement Capacitor Bank Data Register 5 1033 * --------------------------------------------------------------------------------------------------- 1034 * |Bits |Field |Descriptions 1035 * | :----: | :----: | :---- | 1036 * |[0] |CCBD17 |TK17 Extend Complement CB Data 1037 * | | |These bits are used for TK17 sensitivity adjustment. 1038 * @var TK_T::EXTREFCBD0 1039 * Offset: 0x130 Touch Key Extend Reference Capacitor Bank Data Register 0 1040 * --------------------------------------------------------------------------------------------------- 1041 * |Bits |Field |Descriptions 1042 * | :----: | :----: | :---- | 1043 * |[0] |EXT_CBD0 |TK0 Extend Capacitor Bank Data 1044 * | | |These bits are used for TK0 sensitivity adjustment. 1045 * |[8] |EXT_CBD1 |TK1 Extend Capacitor Bank Data 1046 * | | |These bits are used for TK1 sensitivity adjustment. 1047 * |[16] |EXT_CBD2 |TK2 Extend Capacitor Bank Data 1048 * | | |These bits are used for TK2 sensitivity adjustment. 1049 * |[24] |EXT_CBD3 |TK3 Extend Capacitor Bank Data 1050 * | | |These bits are used for TK3 sensitivity adjustment. 1051 * @var TK_T::EXTREFCBD1 1052 * Offset: 0x134 Touch Key Extend Reference Capacitor Bank Data Register 1 1053 * --------------------------------------------------------------------------------------------------- 1054 * |Bits |Field |Descriptions 1055 * | :----: | :----: | :---- | 1056 * |[0] |EXT_CBD4 |TK4 Extend Capacitor Bank Data 1057 * | | |These bits are used for TK4 sensitivity adjustment. 1058 * |[8] |EXT_CBD5 |TK5 Extend Capacitor Bank Data 1059 * | | |These bits are used for TK5 sensitivity adjustment. 1060 * |[16] |EXT_CBD6 |TK6 Extend Capacitor Bank Data 1061 * | | |These bits are used for TK6 sensitivity adjustment. 1062 * |[24] |EXT_CBD7 |TK7 Extend Capacitor Bank Data 1063 * | | |These bits are used for TK7 sensitivity adjustment. 1064 * @var TK_T::EXTREFCBD2 1065 * Offset: 0x138 Touch Key Extend Reference Capacitor Bank Data Register 2 1066 * --------------------------------------------------------------------------------------------------- 1067 * |Bits |Field |Descriptions 1068 * | :----: | :----: | :---- | 1069 * |[0] |EXT_CBD8 |TK8 Extend Capacitor Bank Data 1070 * | | |These bits are used for TK8 sensitivity adjustment. 1071 * |[8] |EXT_CBD9 |TK9 Extend Capacitor Bank Data 1072 * | | |These bits are used for TK9 sensitivity adjustment. 1073 * |[16] |EXT_CBD10 |TK10 Extend Capacitor Bank Data 1074 * | | |These bits are used for TK10 sensitivity adjustment. 1075 * |[24] |EXT_CBD11 |TK11 Extend Capacitor Bank Data 1076 * | | |These bits are used for TK11 sensitivity adjustment. 1077 * @var TK_T::EXTREFCBD3 1078 * Offset: 0x13C Touch Key Extend Reference Capacitor Bank Data Register 3 1079 * --------------------------------------------------------------------------------------------------- 1080 * |Bits |Field |Descriptions 1081 * | :----: | :----: | :---- | 1082 * |[0] |EXT_CBD12 |TK12 Extend Capacitor Bank Data 1083 * | | |These bits are used for TK12 sensitivity adjustment. 1084 * |[8] |EXT_CBD13 |TK13 Extend Capacitor Bank Data 1085 * | | |These bits are used for TK13 sensitivity adjustment. 1086 * |[16] |EXT_CBD14 |TK14 Extend Capacitor Bank Data 1087 * | | |These bits are used for TK14 sensitivity adjustment. 1088 * |[24] |EXT_CBD15 |TK15 Extend Capacitor Bank Data 1089 * | | |These bits are used for TK15 sensitivity adjustment. 1090 * @var TK_T::EXTREFCBD4 1091 * Offset: 0x140 Touch Key Extend Reference Capacitor Bank Data Register 4 1092 * --------------------------------------------------------------------------------------------------- 1093 * |Bits |Field |Descriptions 1094 * | :----: | :----: | :---- | 1095 * |[0] |EXT_CBD16 |TK16 Extend Capacitor Bank Data 1096 * | | |These bits are used for TK16 sensitivity adjustment. 1097 * |[8] |EXT_CBDALL|All Keys Extend Capacitor Bank Data 1098 * | | |These bits are used for All Keys Scan sensitivity adjustment. 1099 * @var TK_T::EXTREFCBD5 1100 * Offset: 0x144 Touch Key Extend Reference Capacitor Bank Data Register 5 1101 * --------------------------------------------------------------------------------------------------- 1102 * |Bits |Field |Descriptions 1103 * | :----: | :----: | :---- | 1104 * |[0] |EXT_CBD17 |TK17 Extend Capacitor Bank Data 1105 * | | |These bits are used for TK17 sensitivity adjustment. 1106 */ 1107 __IO uint32_t SCANC; /*!< [0x0000] Touch Key Scan Control Register */ 1108 __IO uint32_t REFC; /*!< [0x0004] Touch Key Reference Control Register */ 1109 __IO uint32_t CCBD0; /*!< [0x0008] Touch Key Complement Capacitor Bank Data Register 0 */ 1110 __IO uint32_t CCBD1; /*!< [0x000c] Touch Key Complement Capacitor Bank Data Register 1 */ 1111 __IO uint32_t CCBD2; /*!< [0x0010] Touch Key Complement Capacitor Bank Data Register 2 */ 1112 __IO uint32_t CCBD3; /*!< [0x0014] Touch Key Complement Capacitor Bank Data Register 3 */ 1113 __IO uint32_t CCBD4; /*!< [0x0018] Touch Key Complement Capacitor Bank Data Register 4 */ 1114 __IO uint32_t IDLSC; /*!< [0x001c] Touch Key Idle State Control Register */ 1115 __IO uint32_t POLSEL; /*!< [0x0020] Touch Key Polarity Select Register */ 1116 __IO uint32_t POLC; /*!< [0x0024] Touch Key Polarity Control Register */ 1117 __IO uint32_t STA; /*!< [0x0028] Touch Key Status Register */ 1118 __I uint32_t DAT0; /*!< [0x002c] Touch Key Data Register 0 */ 1119 __I uint32_t DAT1; /*!< [0x0030] Touch Key Data Register 1 */ 1120 __I uint32_t DAT2; /*!< [0x0034] Touch Key Data Register 2 */ 1121 __I uint32_t DAT3; /*!< [0x0038] Touch Key Data Register 3 */ 1122 __I uint32_t DAT4; /*!< [0x003c] Touch Key Data Register 4 */ 1123 __IO uint32_t INTEN; /*!< [0x0040] Touch Key Interrupt Enable Register */ 1124 __IO uint32_t THC01; /*!< [0x0044] Touch Key TK0/TK1 Threshold Control Register */ 1125 __IO uint32_t THC23; /*!< [0x0048] Touch Key TK2/TK3 Threshold Control Register */ 1126 __IO uint32_t THC45; /*!< [0x004c] Touch Key TK4/TK5 Threshold Control Register */ 1127 __IO uint32_t THC67; /*!< [0x0050] Touch Key TK6/TK7 Threshold Control Register */ 1128 __IO uint32_t THC89; /*!< [0x0054] Touch Key TK8/TK9 Threshold Control Register */ 1129 __IO uint32_t THC1011; /*!< [0x0058] Touch Key TK10/TK11 Threshold Control Register */ 1130 __IO uint32_t THC1213; /*!< [0x005c] Touch Key TK12/TK13 Threshold Control Register */ 1131 __IO uint32_t THC1415; /*!< [0x0060] Touch Key TK14/TK15 Threshold Control Register */ 1132 __IO uint32_t THC16; /*!< [0x0064] Touch Key TK16 Threshold Control Register */ 1133 __IO uint32_t REFCBD0; /*!< [0x0068] Touch Key Reference Capacitor Bank Data Register 0 */ 1134 __IO uint32_t REFCBD1; /*!< [0x006c] Touch Key Reference Capacitor Bank Data Register 1 */ 1135 __IO uint32_t REFCBD2; /*!< [0x0070] Touch Key Reference Capacitor Bank Data Register 2 */ 1136 __IO uint32_t REFCBD3; /*!< [0x0074] Touch Key Reference Capacitor Bank Data Register 3 */ 1137 __IO uint32_t REFCBD4; /*!< [0x0078] Touch Key Reference Capacitor Bank Data Register 4 */ 1138 __I uint32_t RESERVE0[1]; 1139 __IO uint32_t SCANC1; /*!< [0x0080] Touch Key Scan Control Register 1 */ 1140 __IO uint32_t REFC1; /*!< [0x0084] Touch Key Reference Control Register 1 */ 1141 __IO uint32_t CCBD5; /*!< [0x0088] Touch Key Complement Capacitor Bank Data Register 5 */ 1142 __I uint32_t RESERVE1[4]; 1143 __IO uint32_t IDLSC1; /*!< [0x009c] Touch Key Idle State Control Register 1 */ 1144 __IO uint32_t POLSEL1; /*!< [0x00a0] Touch Key Polarity Select Register 1 */ 1145 __IO uint32_t POLC1; /*!< [0x00a4] Touch Key Polarity Control Register 1 */ 1146 __IO uint32_t STA1; /*!< [0x00a8] Touch Key Status Register 1 */ 1147 __I uint32_t DAT5; /*!< [0x00ac] Touch Key Data Register 5 */ 1148 __I uint32_t RESERVE2[5]; 1149 __IO uint32_t THC17; /*!< [0x00c4] Touch Key TK17 Threshold Control Register */ 1150 __I uint32_t RESERVE3[8]; 1151 __IO uint32_t REFCBD5; /*!< [0x00e8] Touch Key Reference Capacitor Bank Data Register 5 */ 1152 __I uint32_t RESERVE4[5]; 1153 __IO uint32_t EXTCBC; /*!< [0x0100] Touch Key Extend Capacitor Bank Control Register */ 1154 __IO uint32_t EXTCCBD0; /*!< [0x0104] Touch Key Extend Complement Capacitor Bank Data Register 0 */ 1155 __IO uint32_t EXTCCBD1; /*!< [0x0108] Touch Key Extend Complement Capacitor Bank Data Register 1 */ 1156 __IO uint32_t EXTCCBD2; /*!< [0x010c] Touch Key Extend Complement Capacitor Bank Data Register 2 */ 1157 __IO uint32_t EXTCCBD3; /*!< [0x0110] Touch Key Extend Complement Capacitor Bank Data Register 3 */ 1158 __IO uint32_t EXTCCBD4; /*!< [0x0114] Touch Key Extend Complement Capacitor Bank Data Register 4 */ 1159 __IO uint32_t EXTCCBD5; /*!< [0x0118] Touch Key Extend Complement Capacitor Bank Data Register 5 */ 1160 __I uint32_t RESERVE5[5]; 1161 __IO uint32_t EXTREFCBD0; /*!< [0x0130] Touch Key Extend Reference Capacitor Bank Data Register 0 */ 1162 __IO uint32_t EXTREFCBD1; /*!< [0x0134] Touch Key Extend Reference Capacitor Bank Data Register 1 */ 1163 __IO uint32_t EXTREFCBD2; /*!< [0x0138] Touch Key Extend Reference Capacitor Bank Data Register 2 */ 1164 __IO uint32_t EXTREFCBD3; /*!< [0x013c] Touch Key Extend Reference Capacitor Bank Data Register 3 */ 1165 __IO uint32_t EXTREFCBD4; /*!< [0x0140] Touch Key Extend Reference Capacitor Bank Data Register 4 */ 1166 __IO uint32_t EXTREFCBD5; /*!< [0x0144] Touch Key Extend Reference Capacitor Bank Data Register 5 */ 1167 1168 } TK_T; 1169 1170 /** 1171 @addtogroup TK_CONST TK Bit Field Definition 1172 Constant Definitions for TK Controller 1173 @{ */ 1174 1175 #define TK_SCANC_TK0SEN_Pos (0) /*!< TK_T::SCANC: TK0SEN Position */ 1176 #define TK_SCANC_TK0SEN_Msk (0x1ul << TK_SCANC_TK0SEN_Pos) /*!< TK_T::SCANC: TK0SEN Mask */ 1177 1178 #define TK_SCANC_TK1SEN_Pos (1) /*!< TK_T::SCANC: TK1SEN Position */ 1179 #define TK_SCANC_TK1SEN_Msk (0x1ul << TK_SCANC_TK1SEN_Pos) /*!< TK_T::SCANC: TK1SEN Mask */ 1180 1181 #define TK_SCANC_TK2SEN_Pos (2) /*!< TK_T::SCANC: TK2SEN Position */ 1182 #define TK_SCANC_TK2SEN_Msk (0x1ul << TK_SCANC_TK2SEN_Pos) /*!< TK_T::SCANC: TK2SEN Mask */ 1183 1184 #define TK_SCANC_TK3SEN_Pos (3) /*!< TK_T::SCANC: TK3SEN Position */ 1185 #define TK_SCANC_TK3SEN_Msk (0x1ul << TK_SCANC_TK3SEN_Pos) /*!< TK_T::SCANC: TK3SEN Mask */ 1186 1187 #define TK_SCANC_TK4SEN_Pos (4) /*!< TK_T::SCANC: TK4SEN Position */ 1188 #define TK_SCANC_TK4SEN_Msk (0x1ul << TK_SCANC_TK4SEN_Pos) /*!< TK_T::SCANC: TK4SEN Mask */ 1189 1190 #define TK_SCANC_TK5SEN_Pos (5) /*!< TK_T::SCANC: TK5SEN Position */ 1191 #define TK_SCANC_TK5SEN_Msk (0x1ul << TK_SCANC_TK5SEN_Pos) /*!< TK_T::SCANC: TK5SEN Mask */ 1192 1193 #define TK_SCANC_TK6SEN_Pos (6) /*!< TK_T::SCANC: TK6SEN Position */ 1194 #define TK_SCANC_TK6SEN_Msk (0x1ul << TK_SCANC_TK6SEN_Pos) /*!< TK_T::SCANC: TK6SEN Mask */ 1195 1196 #define TK_SCANC_TK7SEN_Pos (7) /*!< TK_T::SCANC: TK7SEN Position */ 1197 #define TK_SCANC_TK7SEN_Msk (0x1ul << TK_SCANC_TK7SEN_Pos) /*!< TK_T::SCANC: TK7SEN Mask */ 1198 1199 #define TK_SCANC_TK8SEN_Pos (8) /*!< TK_T::SCANC: TK8SEN Position */ 1200 #define TK_SCANC_TK8SEN_Msk (0x1ul << TK_SCANC_TK8SEN_Pos) /*!< TK_T::SCANC: TK8SEN Mask */ 1201 1202 #define TK_SCANC_TK9SEN_Pos (9) /*!< TK_T::SCANC: TK9SEN Position */ 1203 #define TK_SCANC_TK9SEN_Msk (0x1ul << TK_SCANC_TK9SEN_Pos) /*!< TK_T::SCANC: TK9SEN Mask */ 1204 1205 #define TK_SCANC_TK10SEN_Pos (10) /*!< TK_T::SCANC: TK10SEN Position */ 1206 #define TK_SCANC_TK10SEN_Msk (0x1ul << TK_SCANC_TK10SEN_Pos) /*!< TK_T::SCANC: TK10SEN Mask */ 1207 1208 #define TK_SCANC_TK11SEN_Pos (11) /*!< TK_T::SCANC: TK11SEN Position */ 1209 #define TK_SCANC_TK11SEN_Msk (0x1ul << TK_SCANC_TK11SEN_Pos) /*!< TK_T::SCANC: TK11SEN Mask */ 1210 1211 #define TK_SCANC_TK12SEN_Pos (12) /*!< TK_T::SCANC: TK12SEN Position */ 1212 #define TK_SCANC_TK12SEN_Msk (0x1ul << TK_SCANC_TK12SEN_Pos) /*!< TK_T::SCANC: TK12SEN Mask */ 1213 1214 #define TK_SCANC_TK13SEN_Pos (13) /*!< TK_T::SCANC: TK13SEN Position */ 1215 #define TK_SCANC_TK13SEN_Msk (0x1ul << TK_SCANC_TK13SEN_Pos) /*!< TK_T::SCANC: TK13SEN Mask */ 1216 1217 #define TK_SCANC_TK14SEN_Pos (14) /*!< TK_T::SCANC: TK14SEN Position */ 1218 #define TK_SCANC_TK14SEN_Msk (0x1ul << TK_SCANC_TK14SEN_Pos) /*!< TK_T::SCANC: TK14SEN Mask */ 1219 1220 #define TK_SCANC_TK15SEN_Pos (15) /*!< TK_T::SCANC: TK15SEN Position */ 1221 #define TK_SCANC_TK15SEN_Msk (0x1ul << TK_SCANC_TK15SEN_Pos) /*!< TK_T::SCANC: TK15SEN Mask */ 1222 1223 #define TK_SCANC_TK16SEN_Pos (16) /*!< TK_T::SCANC: TK16SEN Position */ 1224 #define TK_SCANC_TK16SEN_Msk (0x1ul << TK_SCANC_TK16SEN_Pos) /*!< TK_T::SCANC: TK16SEN Mask */ 1225 1226 #define TK_SCANC_AVDDH_S_Pos (20) /*!< TK_T::SCANC: AVDDH_S Position */ 1227 #define TK_SCANC_AVDDH_S_Msk (0xful << TK_SCANC_AVDDH_S_Pos) /*!< TK_T::SCANC: AVDDH_S Mask */ 1228 1229 #define TK_SCANC_SCAN_Pos (24) /*!< TK_T::SCANC: SCAN Position */ 1230 #define TK_SCANC_SCAN_Msk (0x1ul << TK_SCANC_SCAN_Pos) /*!< TK_T::SCANC: SCAN Mask */ 1231 1232 #define TK_SCANC_TRG_EN_Pos (25) /*!< TK_T::SCANC: TRG_EN Position */ 1233 #define TK_SCANC_TRG_EN_Msk (0xful << TK_SCANC_TRG_EN_Pos) /*!< TK_T::SCANC: TRG_EN Mask */ 1234 1235 #define TK_SCANC_TK_EN_Pos (31) /*!< TK_T::SCANC: TK_EN Position */ 1236 #define TK_SCANC_TK_EN_Msk (0x1ul << TK_SCANC_TK_EN_Pos) /*!< TK_T::SCANC: TK_EN Mask */ 1237 1238 #define TK_REFC_TK0REN_Pos (0) /*!< TK_T::REFC: TK0REN Position */ 1239 #define TK_REFC_TK0REN_Msk (0x1ul << TK_REFC_TK0REN_Pos) /*!< TK_T::REFC: TK0REN Mask */ 1240 1241 #define TK_REFC_TK1REN_Pos (1) /*!< TK_T::REFC: TK1REN Position */ 1242 #define TK_REFC_TK1REN_Msk (0x1ul << TK_REFC_TK1REN_Pos) /*!< TK_T::REFC: TK1REN Mask */ 1243 1244 #define TK_REFC_TK2REN_Pos (2) /*!< TK_T::REFC: TK2REN Position */ 1245 #define TK_REFC_TK2REN_Msk (0x1ul << TK_REFC_TK2REN_Pos) /*!< TK_T::REFC: TK2REN Mask */ 1246 1247 #define TK_REFC_TK3REN_Pos (3) /*!< TK_T::REFC: TK3REN Position */ 1248 #define TK_REFC_TK3REN_Msk (0x1ul << TK_REFC_TK3REN_Pos) /*!< TK_T::REFC: TK3REN Mask */ 1249 1250 #define TK_REFC_TK4REN_Pos (4) /*!< TK_T::REFC: TK4REN Position */ 1251 #define TK_REFC_TK4REN_Msk (0x1ul << TK_REFC_TK4REN_Pos) /*!< TK_T::REFC: TK4REN Mask */ 1252 1253 #define TK_REFC_TK5REN_Pos (5) /*!< TK_T::REFC: TK5REN Position */ 1254 #define TK_REFC_TK5REN_Msk (0x1ul << TK_REFC_TK5REN_Pos) /*!< TK_T::REFC: TK5REN Mask */ 1255 1256 #define TK_REFC_TK6REN_Pos (6) /*!< TK_T::REFC: TK6REN Position */ 1257 #define TK_REFC_TK6REN_Msk (0x1ul << TK_REFC_TK6REN_Pos) /*!< TK_T::REFC: TK6REN Mask */ 1258 1259 #define TK_REFC_TK7REN_Pos (7) /*!< TK_T::REFC: TK7REN Position */ 1260 #define TK_REFC_TK7REN_Msk (0x1ul << TK_REFC_TK7REN_Pos) /*!< TK_T::REFC: TK7REN Mask */ 1261 1262 #define TK_REFC_TK8REN_Pos (8) /*!< TK_T::REFC: TK8REN Position */ 1263 #define TK_REFC_TK8REN_Msk (0x1ul << TK_REFC_TK8REN_Pos) /*!< TK_T::REFC: TK8REN Mask */ 1264 1265 #define TK_REFC_TK9REN_Pos (9) /*!< TK_T::REFC: TK9REN Position */ 1266 #define TK_REFC_TK9REN_Msk (0x1ul << TK_REFC_TK9REN_Pos) /*!< TK_T::REFC: TK9REN Mask */ 1267 1268 #define TK_REFC_TK10REN_Pos (10) /*!< TK_T::REFC: TK10REN Position */ 1269 #define TK_REFC_TK10REN_Msk (0x1ul << TK_REFC_TK10REN_Pos) /*!< TK_T::REFC: TK10REN Mask */ 1270 1271 #define TK_REFC_TK11REN_Pos (11) /*!< TK_T::REFC: TK11REN Position */ 1272 #define TK_REFC_TK11REN_Msk (0x1ul << TK_REFC_TK11REN_Pos) /*!< TK_T::REFC: TK11REN Mask */ 1273 1274 #define TK_REFC_TK12REN_Pos (12) /*!< TK_T::REFC: TK12REN Position */ 1275 #define TK_REFC_TK12REN_Msk (0x1ul << TK_REFC_TK12REN_Pos) /*!< TK_T::REFC: TK12REN Mask */ 1276 1277 #define TK_REFC_TK13REN_Pos (13) /*!< TK_T::REFC: TK13REN Position */ 1278 #define TK_REFC_TK13REN_Msk (0x1ul << TK_REFC_TK13REN_Pos) /*!< TK_T::REFC: TK13REN Mask */ 1279 1280 #define TK_REFC_TK14REN_Pos (14) /*!< TK_T::REFC: TK14REN Position */ 1281 #define TK_REFC_TK14REN_Msk (0x1ul << TK_REFC_TK14REN_Pos) /*!< TK_T::REFC: TK14REN Mask */ 1282 1283 #define TK_REFC_TK15REN_Pos (15) /*!< TK_T::REFC: TK15REN Position */ 1284 #define TK_REFC_TK15REN_Msk (0x1ul << TK_REFC_TK15REN_Pos) /*!< TK_T::REFC: TK15REN Mask */ 1285 1286 #define TK_REFC_TK16REN_Pos (16) /*!< TK_T::REFC: TK16REN Position */ 1287 #define TK_REFC_TK16REN_Msk (0x1ul << TK_REFC_TK16REN_Pos) /*!< TK_T::REFC: TK16REN Mask */ 1288 1289 #define TK_REFC_SCAN_ALL_Pos (23) /*!< TK_T::REFC: SCAN_ALL Position */ 1290 #define TK_REFC_SCAN_ALL_Msk (0x1ul << TK_REFC_SCAN_ALL_Pos) /*!< TK_T::REFC: SCAN_ALL Mask */ 1291 1292 #define TK_REFC_SENSET_Pos (24) /*!< TK_T::REFC: SENSET Position */ 1293 #define TK_REFC_SENSET_Msk (0x7ul << TK_REFC_SENSET_Pos) /*!< TK_T::REFC: SENSET Mask */ 1294 1295 #define TK_REFC_PULSET_Pos (28) /*!< TK_T::REFC: PULSET Position */ 1296 #define TK_REFC_PULSET_Msk (0x7ul << TK_REFC_PULSET_Pos) /*!< TK_T::REFC: PULSET Mask */ 1297 1298 #define TK_CCBD0_CCBD0_Pos (0) /*!< TK_T::CCBD0: CCBD0 Position */ 1299 #define TK_CCBD0_CCBD0_Msk (0xfful << TK_CCBD0_CCBD0_Pos) /*!< TK_T::CCBD0: CCBD0 Mask */ 1300 1301 #define TK_CCBD0_CCBD1_Pos (8) /*!< TK_T::CCBD0: CCBD1 Position */ 1302 #define TK_CCBD0_CCBD1_Msk (0xfful << TK_CCBD0_CCBD1_Pos) /*!< TK_T::CCBD0: CCBD1 Mask */ 1303 1304 #define TK_CCBD0_CCBD2_Pos (16) /*!< TK_T::CCBD0: CCBD2 Position */ 1305 #define TK_CCBD0_CCBD2_Msk (0xfful << TK_CCBD0_CCBD2_Pos) /*!< TK_T::CCBD0: CCBD2 Mask */ 1306 1307 #define TK_CCBD0_CCBD3_Pos (24) /*!< TK_T::CCBD0: CCBD3 Position */ 1308 #define TK_CCBD0_CCBD3_Msk (0xfful << TK_CCBD0_CCBD3_Pos) /*!< TK_T::CCBD0: CCBD3 Mask */ 1309 1310 #define TK_CCBD1_CCBD4_Pos (0) /*!< TK_T::CCBD1: CCBD4 Position */ 1311 #define TK_CCBD1_CCBD4_Msk (0xfful << TK_CCBD1_CCBD4_Pos) /*!< TK_T::CCBD1: CCBD4 Mask */ 1312 1313 #define TK_CCBD1_CCBD5_Pos (8) /*!< TK_T::CCBD1: CCBD5 Position */ 1314 #define TK_CCBD1_CCBD5_Msk (0xfful << TK_CCBD1_CCBD5_Pos) /*!< TK_T::CCBD1: CCBD5 Mask */ 1315 1316 #define TK_CCBD1_CCBD6_Pos (16) /*!< TK_T::CCBD1: CCBD6 Position */ 1317 #define TK_CCBD1_CCBD6_Msk (0xfful << TK_CCBD1_CCBD6_Pos) /*!< TK_T::CCBD1: CCBD6 Mask */ 1318 1319 #define TK_CCBD1_CCBD7_Pos (24) /*!< TK_T::CCBD1: CCBD7 Position */ 1320 #define TK_CCBD1_CCBD7_Msk (0xfful << TK_CCBD1_CCBD7_Pos) /*!< TK_T::CCBD1: CCBD7 Mask */ 1321 1322 #define TK_CCBD2_CCBD8_Pos (0) /*!< TK_T::CCBD2: CCBD8 Position */ 1323 #define TK_CCBD2_CCBD8_Msk (0xfful << TK_CCBD2_CCBD8_Pos) /*!< TK_T::CCBD2: CCBD8 Mask */ 1324 1325 #define TK_CCBD2_CCBD9_Pos (8) /*!< TK_T::CCBD2: CCBD9 Position */ 1326 #define TK_CCBD2_CCBD9_Msk (0xfful << TK_CCBD2_CCBD9_Pos) /*!< TK_T::CCBD2: CCBD9 Mask */ 1327 1328 #define TK_CCBD2_CCBD10_Pos (16) /*!< TK_T::CCBD2: CCBD10 Position */ 1329 #define TK_CCBD2_CCBD10_Msk (0xfful << TK_CCBD2_CCBD10_Pos) /*!< TK_T::CCBD2: CCBD10 Mask */ 1330 1331 #define TK_CCBD2_CCBD11_Pos (24) /*!< TK_T::CCBD2: CCBD11 Position */ 1332 #define TK_CCBD2_CCBD11_Msk (0xfful << TK_CCBD2_CCBD11_Pos) /*!< TK_T::CCBD2: CCBD11 Mask */ 1333 1334 #define TK_CCBD3_CCBD12_Pos (0) /*!< TK_T::CCBD3: CCBD12 Position */ 1335 #define TK_CCBD3_CCBD12_Msk (0xfful << TK_CCBD3_CCBD12_Pos) /*!< TK_T::CCBD3: CCBD12 Mask */ 1336 1337 #define TK_CCBD3_CCBD13_Pos (8) /*!< TK_T::CCBD3: CCBD13 Position */ 1338 #define TK_CCBD3_CCBD13_Msk (0xfful << TK_CCBD3_CCBD13_Pos) /*!< TK_T::CCBD3: CCBD13 Mask */ 1339 1340 #define TK_CCBD3_CCBD14_Pos (16) /*!< TK_T::CCBD3: CCBD14 Position */ 1341 #define TK_CCBD3_CCBD14_Msk (0xfful << TK_CCBD3_CCBD14_Pos) /*!< TK_T::CCBD3: CCBD14 Mask */ 1342 1343 #define TK_CCBD3_CCBD15_Pos (24) /*!< TK_T::CCBD3: CCBD15 Position */ 1344 #define TK_CCBD3_CCBD15_Msk (0xfful << TK_CCBD3_CCBD15_Pos) /*!< TK_T::CCBD3: CCBD15 Mask */ 1345 1346 #define TK_CCBD4_CCBD16_Pos (0) /*!< TK_T::CCBD4: CCBD16 Position */ 1347 #define TK_CCBD4_CCBD16_Msk (0xfful << TK_CCBD4_CCBD16_Pos) /*!< TK_T::CCBD4: CCBD16 Mask */ 1348 1349 #define TK_CCBD4_CCBD_ALL_Pos (8) /*!< TK_T::CCBD4: CCBD_ALL Position */ 1350 #define TK_CCBD4_CCBD_ALL_Msk (0xfful << TK_CCBD4_CCBD_ALL_Pos) /*!< TK_T::CCBD4: CCBD_ALL Mask */ 1351 1352 #define TK_IDLSC_IDLS0_Pos (0) /*!< TK_T::IDLSC: IDLS0 Position */ 1353 #define TK_IDLSC_IDLS0_Msk (0x3ul << TK_IDLSC_IDLS0_Pos) /*!< TK_T::IDLSC: IDLS0 Mask */ 1354 1355 #define TK_IDLSC_IDLS1_Pos (2) /*!< TK_T::IDLSC: IDLS1 Position */ 1356 #define TK_IDLSC_IDLS1_Msk (0x3ul << TK_IDLSC_IDLS1_Pos) /*!< TK_T::IDLSC: IDLS1 Mask */ 1357 1358 #define TK_IDLSC_IDLS2_Pos (4) /*!< TK_T::IDLSC: IDLS2 Position */ 1359 #define TK_IDLSC_IDLS2_Msk (0x3ul << TK_IDLSC_IDLS2_Pos) /*!< TK_T::IDLSC: IDLS2 Mask */ 1360 1361 #define TK_IDLSC_IDLS3_Pos (6) /*!< TK_T::IDLSC: IDLS3 Position */ 1362 #define TK_IDLSC_IDLS3_Msk (0x3ul << TK_IDLSC_IDLS3_Pos) /*!< TK_T::IDLSC: IDLS3 Mask */ 1363 1364 #define TK_IDLSC_IDLS4_Pos (8) /*!< TK_T::IDLSC: IDLS4 Position */ 1365 #define TK_IDLSC_IDLS4_Msk (0x3ul << TK_IDLSC_IDLS4_Pos) /*!< TK_T::IDLSC: IDLS4 Mask */ 1366 1367 #define TK_IDLSC_IDLS5_Pos (10) /*!< TK_T::IDLSC: IDLS5 Position */ 1368 #define TK_IDLSC_IDLS5_Msk (0x3ul << TK_IDLSC_IDLS5_Pos) /*!< TK_T::IDLSC: IDLS5 Mask */ 1369 1370 #define TK_IDLSC_IDLS6_Pos (12) /*!< TK_T::IDLSC: IDLS6 Position */ 1371 #define TK_IDLSC_IDLS6_Msk (0x3ul << TK_IDLSC_IDLS6_Pos) /*!< TK_T::IDLSC: IDLS6 Mask */ 1372 1373 #define TK_IDLSC_IDLS7_Pos (14) /*!< TK_T::IDLSC: IDLS7 Position */ 1374 #define TK_IDLSC_IDLS7_Msk (0x3ul << TK_IDLSC_IDLS7_Pos) /*!< TK_T::IDLSC: IDLS7 Mask */ 1375 1376 #define TK_IDLSC_IDLS8_Pos (16) /*!< TK_T::IDLSC: IDLS8 Position */ 1377 #define TK_IDLSC_IDLS8_Msk (0x3ul << TK_IDLSC_IDLS8_Pos) /*!< TK_T::IDLSC: IDLS8 Mask */ 1378 1379 #define TK_IDLSC_IDLS9_Pos (18) /*!< TK_T::IDLSC: IDLS9 Position */ 1380 #define TK_IDLSC_IDLS9_Msk (0x3ul << TK_IDLSC_IDLS9_Pos) /*!< TK_T::IDLSC: IDLS9 Mask */ 1381 1382 #define TK_IDLSC_IDLS10_Pos (20) /*!< TK_T::IDLSC: IDLS10 Position */ 1383 #define TK_IDLSC_IDLS10_Msk (0x3ul << TK_IDLSC_IDLS10_Pos) /*!< TK_T::IDLSC: IDLS10 Mask */ 1384 1385 #define TK_IDLSC_IDLS11_Pos (22) /*!< TK_T::IDLSC: IDLS11 Position */ 1386 #define TK_IDLSC_IDLS11_Msk (0x3ul << TK_IDLSC_IDLS11_Pos) /*!< TK_T::IDLSC: IDLS11 Mask */ 1387 1388 #define TK_IDLSC_IDLS12_Pos (24) /*!< TK_T::IDLSC: IDLS12 Position */ 1389 #define TK_IDLSC_IDLS12_Msk (0x3ul << TK_IDLSC_IDLS12_Pos) /*!< TK_T::IDLSC: IDLS12 Mask */ 1390 1391 #define TK_IDLSC_IDLS13_Pos (26) /*!< TK_T::IDLSC: IDLS13 Position */ 1392 #define TK_IDLSC_IDLS13_Msk (0x3ul << TK_IDLSC_IDLS13_Pos) /*!< TK_T::IDLSC: IDLS13 Mask */ 1393 1394 #define TK_IDLSC_IDLS14_Pos (28) /*!< TK_T::IDLSC: IDLS14 Position */ 1395 #define TK_IDLSC_IDLS14_Msk (0x3ul << TK_IDLSC_IDLS14_Pos) /*!< TK_T::IDLSC: IDLS14 Mask */ 1396 1397 #define TK_IDLSC_IDLS15_Pos (30) /*!< TK_T::IDLSC: IDLS15 Position */ 1398 #define TK_IDLSC_IDLS15_Msk (0x3ul << TK_IDLSC_IDLS15_Pos) /*!< TK_T::IDLSC: IDLS15 Mask */ 1399 1400 #define TK_POLSEL_POL0_Pos (0) /*!< TK_T::POLSEL: POL0 Position */ 1401 #define TK_POLSEL_POL0_Msk (0x3ul << TK_POLSEL_POL0_Pos) /*!< TK_T::POLSEL: POL0 Mask */ 1402 1403 #define TK_POLSEL_POL1_Pos (2) /*!< TK_T::POLSEL: POL1 Position */ 1404 #define TK_POLSEL_POL1_Msk (0x3ul << TK_POLSEL_POL1_Pos) /*!< TK_T::POLSEL: POL1 Mask */ 1405 1406 #define TK_POLSEL_POL2_Pos (4) /*!< TK_T::POLSEL: POL2 Position */ 1407 #define TK_POLSEL_POL2_Msk (0x3ul << TK_POLSEL_POL2_Pos) /*!< TK_T::POLSEL: POL2 Mask */ 1408 1409 #define TK_POLSEL_POL3_Pos (6) /*!< TK_T::POLSEL: POL3 Position */ 1410 #define TK_POLSEL_POL3_Msk (0x3ul << TK_POLSEL_POL3_Pos) /*!< TK_T::POLSEL: POL3 Mask */ 1411 1412 #define TK_POLSEL_POL4_Pos (8) /*!< TK_T::POLSEL: POL4 Position */ 1413 #define TK_POLSEL_POL4_Msk (0x3ul << TK_POLSEL_POL4_Pos) /*!< TK_T::POLSEL: POL4 Mask */ 1414 1415 #define TK_POLSEL_POL5_Pos (10) /*!< TK_T::POLSEL: POL5 Position */ 1416 #define TK_POLSEL_POL5_Msk (0x3ul << TK_POLSEL_POL5_Pos) /*!< TK_T::POLSEL: POL5 Mask */ 1417 1418 #define TK_POLSEL_POL6_Pos (12) /*!< TK_T::POLSEL: POL6 Position */ 1419 #define TK_POLSEL_POL6_Msk (0x3ul << TK_POLSEL_POL6_Pos) /*!< TK_T::POLSEL: POL6 Mask */ 1420 1421 #define TK_POLSEL_POL7_Pos (14) /*!< TK_T::POLSEL: POL7 Position */ 1422 #define TK_POLSEL_POL7_Msk (0x3ul << TK_POLSEL_POL7_Pos) /*!< TK_T::POLSEL: POL7 Mask */ 1423 1424 #define TK_POLSEL_POL8_Pos (16) /*!< TK_T::POLSEL: POL8 Position */ 1425 #define TK_POLSEL_POL8_Msk (0x3ul << TK_POLSEL_POL8_Pos) /*!< TK_T::POLSEL: POL8 Mask */ 1426 1427 #define TK_POLSEL_POL9_Pos (18) /*!< TK_T::POLSEL: POL9 Position */ 1428 #define TK_POLSEL_POL9_Msk (0x3ul << TK_POLSEL_POL9_Pos) /*!< TK_T::POLSEL: POL9 Mask */ 1429 1430 #define TK_POLSEL_POL10_Pos (20) /*!< TK_T::POLSEL: POL10 Position */ 1431 #define TK_POLSEL_POL10_Msk (0x3ul << TK_POLSEL_POL10_Pos) /*!< TK_T::POLSEL: POL10 Mask */ 1432 1433 #define TK_POLSEL_POL11_Pos (22) /*!< TK_T::POLSEL: POL11 Position */ 1434 #define TK_POLSEL_POL11_Msk (0x3ul << TK_POLSEL_POL11_Pos) /*!< TK_T::POLSEL: POL11 Mask */ 1435 1436 #define TK_POLSEL_POL12_Pos (24) /*!< TK_T::POLSEL: POL12 Position */ 1437 #define TK_POLSEL_POL12_Msk (0x3ul << TK_POLSEL_POL12_Pos) /*!< TK_T::POLSEL: POL12 Mask */ 1438 1439 #define TK_POLSEL_POL13_Pos (26) /*!< TK_T::POLSEL: POL13 Position */ 1440 #define TK_POLSEL_POL13_Msk (0x3ul << TK_POLSEL_POL13_Pos) /*!< TK_T::POLSEL: POL13 Mask */ 1441 1442 #define TK_POLSEL_POL14_Pos (28) /*!< TK_T::POLSEL: POL14 Position */ 1443 #define TK_POLSEL_POL14_Msk (0x3ul << TK_POLSEL_POL14_Pos) /*!< TK_T::POLSEL: POL14 Mask */ 1444 1445 #define TK_POLSEL_POL15_Pos (30) /*!< TK_T::POLSEL: POL15 Position */ 1446 #define TK_POLSEL_POL15_Msk (0x3ul << TK_POLSEL_POL15_Pos) /*!< TK_T::POLSEL: POL15 Mask */ 1447 1448 #define TK_POLC_IDLS16_Pos (0) /*!< TK_T::POLC: IDLS16 Position */ 1449 #define TK_POLC_IDLS16_Msk (0x3ul << TK_POLC_IDLS16_Pos) /*!< TK_T::POLC: IDLS16 Mask */ 1450 1451 #define TK_POLC_POL16_Pos (2) /*!< TK_T::POLC: POL16 Position */ 1452 #define TK_POLC_POL16_Msk (0x3ul << TK_POLC_POL16_Pos) /*!< TK_T::POLC: POL16 Mask */ 1453 1454 #define TK_POLC_POL_CAP_Pos (4) /*!< TK_T::POLC: POL_CAP Position */ 1455 #define TK_POLC_POL_CAP_Msk (0x3ul << TK_POLC_POL_CAP_Pos) /*!< TK_T::POLC: POL_CAP Mask */ 1456 1457 #define TK_POLC_POLEN0_Pos (8) /*!< TK_T::POLC: POLEN0 Position */ 1458 #define TK_POLC_POLEN0_Msk (0x1ul << TK_POLC_POLEN0_Pos) /*!< TK_T::POLC: POLEN0 Mask */ 1459 1460 #define TK_POLC_POLEN1_Pos (9) /*!< TK_T::POLC: POLEN1 Position */ 1461 #define TK_POLC_POLEN1_Msk (0x1ul << TK_POLC_POLEN1_Pos) /*!< TK_T::POLC: POLEN1 Mask */ 1462 1463 #define TK_POLC_POLEN2_Pos (10) /*!< TK_T::POLC: POLEN2 Position */ 1464 #define TK_POLC_POLEN2_Msk (0x1ul << TK_POLC_POLEN2_Pos) /*!< TK_T::POLC: POLEN2 Mask */ 1465 1466 #define TK_POLC_POLEN3_Pos (11) /*!< TK_T::POLC: POLEN3 Position */ 1467 #define TK_POLC_POLEN3_Msk (0x1ul << TK_POLC_POLEN3_Pos) /*!< TK_T::POLC: POLEN3 Mask */ 1468 1469 #define TK_POLC_POLEN4_Pos (12) /*!< TK_T::POLC: POLEN4 Position */ 1470 #define TK_POLC_POLEN4_Msk (0x1ul << TK_POLC_POLEN4_Pos) /*!< TK_T::POLC: POLEN4 Mask */ 1471 1472 #define TK_POLC_POLEN5_Pos (13) /*!< TK_T::POLC: POLEN5 Position */ 1473 #define TK_POLC_POLEN5_Msk (0x1ul << TK_POLC_POLEN5_Pos) /*!< TK_T::POLC: POLEN5 Mask */ 1474 1475 #define TK_POLC_POLEN6_Pos (14) /*!< TK_T::POLC: POLEN6 Position */ 1476 #define TK_POLC_POLEN6_Msk (0x1ul << TK_POLC_POLEN6_Pos) /*!< TK_T::POLC: POLEN6 Mask */ 1477 1478 #define TK_POLC_POLEN7_Pos (15) /*!< TK_T::POLC: POLEN7 Position */ 1479 #define TK_POLC_POLEN7_Msk (0x1ul << TK_POLC_POLEN7_Pos) /*!< TK_T::POLC: POLEN7 Mask */ 1480 1481 #define TK_POLC_POLEN8_Pos (16) /*!< TK_T::POLC: POLEN8 Position */ 1482 #define TK_POLC_POLEN8_Msk (0x1ul << TK_POLC_POLEN8_Pos) /*!< TK_T::POLC: POLEN8 Mask */ 1483 1484 #define TK_POLC_POLEN9_Pos (17) /*!< TK_T::POLC: POLEN9 Position */ 1485 #define TK_POLC_POLEN9_Msk (0x1ul << TK_POLC_POLEN9_Pos) /*!< TK_T::POLC: POLEN9 Mask */ 1486 1487 #define TK_POLC_POLEN10_Pos (18) /*!< TK_T::POLC: POLEN10 Position */ 1488 #define TK_POLC_POLEN10_Msk (0x1ul << TK_POLC_POLEN10_Pos) /*!< TK_T::POLC: POLEN10 Mask */ 1489 1490 #define TK_POLC_POLEN11_Pos (19) /*!< TK_T::POLC: POLEN11 Position */ 1491 #define TK_POLC_POLEN11_Msk (0x1ul << TK_POLC_POLEN11_Pos) /*!< TK_T::POLC: POLEN11 Mask */ 1492 1493 #define TK_POLC_POLEN12_Pos (20) /*!< TK_T::POLC: POLEN12 Position */ 1494 #define TK_POLC_POLEN12_Msk (0x1ul << TK_POLC_POLEN12_Pos) /*!< TK_T::POLC: POLEN12 Mask */ 1495 1496 #define TK_POLC_POLEN13_Pos (21) /*!< TK_T::POLC: POLEN13 Position */ 1497 #define TK_POLC_POLEN13_Msk (0x1ul << TK_POLC_POLEN13_Pos) /*!< TK_T::POLC: POLEN13 Mask */ 1498 1499 #define TK_POLC_POLEN14_Pos (22) /*!< TK_T::POLC: POLEN14 Position */ 1500 #define TK_POLC_POLEN14_Msk (0x1ul << TK_POLC_POLEN14_Pos) /*!< TK_T::POLC: POLEN14 Mask */ 1501 1502 #define TK_POLC_POLEN15_Pos (23) /*!< TK_T::POLC: POLEN15 Position */ 1503 #define TK_POLC_POLEN15_Msk (0x1ul << TK_POLC_POLEN15_Pos) /*!< TK_T::POLC: POLEN15 Mask */ 1504 1505 #define TK_POLC_POLEN16_Pos (24) /*!< TK_T::POLC: POLEN16 Position */ 1506 #define TK_POLC_POLEN16_Msk (0x1ul << TK_POLC_POLEN16_Pos) /*!< TK_T::POLC: POLEN16 Mask */ 1507 1508 #define TK_POLC_POL_INIT_Pos (31) /*!< TK_T::POLC: POL_INIT Position */ 1509 #define TK_POLC_POL_INIT_Msk (0x1ul << TK_POLC_POL_INIT_Pos) /*!< TK_T::POLC: POL_INIT Mask */ 1510 1511 #define TK_STA_BUSY_Pos (0) /*!< TK_T::STA: BUSY Position */ 1512 #define TK_STA_BUSY_Msk (0x1ul << TK_STA_BUSY_Pos) /*!< TK_T::STA: BUSY Mask */ 1513 1514 #define TK_STA_SCIF_Pos (1) /*!< TK_T::STA: SCIF Position */ 1515 #define TK_STA_SCIF_Msk (0x1ul << TK_STA_SCIF_Pos) /*!< TK_T::STA: SCIF Mask */ 1516 1517 #define TK_STA_TKIF_Pos (6) /*!< TK_T::STA: TKIF Position */ 1518 #define TK_STA_TKIF_Msk (0x1ul << TK_STA_TKIF_Pos) /*!< TK_T::STA: TKIF Mask */ 1519 1520 #define TK_STA_TKIF_ALL_Pos (7) /*!< TK_T::STA: TKIF_ALL Position */ 1521 #define TK_STA_TKIF_ALL_Msk (0x1ul << TK_STA_TKIF_ALL_Pos) /*!< TK_T::STA: TKIF_ALL Mask */ 1522 1523 #define TK_STA_TKIF0_Pos (8) /*!< TK_T::STA: TKIF0 Position */ 1524 #define TK_STA_TKIF0_Msk (0x1ul << TK_STA_TKIF0_Pos) /*!< TK_T::STA: TKIF0 Mask */ 1525 1526 #define TK_STA_TKIF1_Pos (9) /*!< TK_T::STA: TKIF1 Position */ 1527 #define TK_STA_TKIF1_Msk (0x1ul << TK_STA_TKIF1_Pos) /*!< TK_T::STA: TKIF1 Mask */ 1528 1529 #define TK_STA_TKIF2_Pos (10) /*!< TK_T::STA: TKIF2 Position */ 1530 #define TK_STA_TKIF2_Msk (0x1ul << TK_STA_TKIF2_Pos) /*!< TK_T::STA: TKIF2 Mask */ 1531 1532 #define TK_STA_TKIF3_Pos (11) /*!< TK_T::STA: TKIF3 Position */ 1533 #define TK_STA_TKIF3_Msk (0x1ul << TK_STA_TKIF3_Pos) /*!< TK_T::STA: TKIF3 Mask */ 1534 1535 #define TK_STA_TKIF4_Pos (12) /*!< TK_T::STA: TKIF4 Position */ 1536 #define TK_STA_TKIF4_Msk (0x1ul << TK_STA_TKIF4_Pos) /*!< TK_T::STA: TKIF4 Mask */ 1537 1538 #define TK_STA_TKIF5_Pos (13) /*!< TK_T::STA: TKIF5 Position */ 1539 #define TK_STA_TKIF5_Msk (0x1ul << TK_STA_TKIF5_Pos) /*!< TK_T::STA: TKIF5 Mask */ 1540 1541 #define TK_STA_TKIF6_Pos (14) /*!< TK_T::STA: TKIF6 Position */ 1542 #define TK_STA_TKIF6_Msk (0x1ul << TK_STA_TKIF6_Pos) /*!< TK_T::STA: TKIF6 Mask */ 1543 1544 #define TK_STA_TKIF7_Pos (15) /*!< TK_T::STA: TKIF7 Position */ 1545 #define TK_STA_TKIF7_Msk (0x1ul << TK_STA_TKIF7_Pos) /*!< TK_T::STA: TKIF7 Mask */ 1546 1547 #define TK_STA_TKIF8_Pos (16) /*!< TK_T::STA: TKIF8 Position */ 1548 #define TK_STA_TKIF8_Msk (0x1ul << TK_STA_TKIF8_Pos) /*!< TK_T::STA: TKIF8 Mask */ 1549 1550 #define TK_STA_TKIF9_Pos (17) /*!< TK_T::STA: TKIF9 Position */ 1551 #define TK_STA_TKIF9_Msk (0x1ul << TK_STA_TKIF9_Pos) /*!< TK_T::STA: TKIF9 Mask */ 1552 1553 #define TK_STA_TKIF10_Pos (18) /*!< TK_T::STA: TKIF10 Position */ 1554 #define TK_STA_TKIF10_Msk (0x1ul << TK_STA_TKIF10_Pos) /*!< TK_T::STA: TKIF10 Mask */ 1555 1556 #define TK_STA_TKIF11_Pos (19) /*!< TK_T::STA: TKIF11 Position */ 1557 #define TK_STA_TKIF11_Msk (0x1ul << TK_STA_TKIF11_Pos) /*!< TK_T::STA: TKIF11 Mask */ 1558 1559 #define TK_STA_TKIF12_Pos (20) /*!< TK_T::STA: TKIF12 Position */ 1560 #define TK_STA_TKIF12_Msk (0x1ul << TK_STA_TKIF12_Pos) /*!< TK_T::STA: TKIF12 Mask */ 1561 1562 #define TK_STA_TKIF13_Pos (21) /*!< TK_T::STA: TKIF13 Position */ 1563 #define TK_STA_TKIF13_Msk (0x1ul << TK_STA_TKIF13_Pos) /*!< TK_T::STA: TKIF13 Mask */ 1564 1565 #define TK_STA_TKIF14_Pos (22) /*!< TK_T::STA: TKIF14 Position */ 1566 #define TK_STA_TKIF14_Msk (0x1ul << TK_STA_TKIF14_Pos) /*!< TK_T::STA: TKIF14 Mask */ 1567 1568 #define TK_STA_TKIF15_Pos (23) /*!< TK_T::STA: TKIF15 Position */ 1569 #define TK_STA_TKIF15_Msk (0x1ul << TK_STA_TKIF15_Pos) /*!< TK_T::STA: TKIF15 Mask */ 1570 1571 #define TK_STA_TKIF16_Pos (24) /*!< TK_T::STA: TKIF16 Position */ 1572 #define TK_STA_TKIF16_Msk (0x1ul << TK_STA_TKIF16_Pos) /*!< TK_T::STA: TKIF16 Mask */ 1573 1574 #define TK_DAT0_TKDAT0_Pos (0) /*!< TK_T::DAT0: TKDAT0 Position */ 1575 #define TK_DAT0_TKDAT0_Msk (0xfful << TK_DAT0_TKDAT0_Pos) /*!< TK_T::DAT0: TKDAT0 Mask */ 1576 1577 #define TK_DAT0_TKDAT1_Pos (8) /*!< TK_T::DAT0: TKDAT1 Position */ 1578 #define TK_DAT0_TKDAT1_Msk (0xfful << TK_DAT0_TKDAT1_Pos) /*!< TK_T::DAT0: TKDAT1 Mask */ 1579 1580 #define TK_DAT0_TKDAT2_Pos (16) /*!< TK_T::DAT0: TKDAT2 Position */ 1581 #define TK_DAT0_TKDAT2_Msk (0xfful << TK_DAT0_TKDAT2_Pos) /*!< TK_T::DAT0: TKDAT2 Mask */ 1582 1583 #define TK_DAT0_TKDAT3_Pos (24) /*!< TK_T::DAT0: TKDAT3 Position */ 1584 #define TK_DAT0_TKDAT3_Msk (0xfful << TK_DAT0_TKDAT3_Pos) /*!< TK_T::DAT0: TKDAT3 Mask */ 1585 1586 #define TK_DAT1_TKDAT4_Pos (0) /*!< TK_T::DAT1: TKDAT4 Position */ 1587 #define TK_DAT1_TKDAT4_Msk (0xfful << TK_DAT1_TKDAT4_Pos) /*!< TK_T::DAT1: TKDAT4 Mask */ 1588 1589 #define TK_DAT1_TKDAT5_Pos (8) /*!< TK_T::DAT1: TKDAT5 Position */ 1590 #define TK_DAT1_TKDAT5_Msk (0xfful << TK_DAT1_TKDAT5_Pos) /*!< TK_T::DAT1: TKDAT5 Mask */ 1591 1592 #define TK_DAT1_TKDAT6_Pos (16) /*!< TK_T::DAT1: TKDAT6 Position */ 1593 #define TK_DAT1_TKDAT6_Msk (0xfful << TK_DAT1_TKDAT6_Pos) /*!< TK_T::DAT1: TKDAT6 Mask */ 1594 1595 #define TK_DAT1_TKDAT7_Pos (24) /*!< TK_T::DAT1: TKDAT7 Position */ 1596 #define TK_DAT1_TKDAT7_Msk (0xfful << TK_DAT1_TKDAT7_Pos) /*!< TK_T::DAT1: TKDAT7 Mask */ 1597 1598 #define TK_DAT2_TKDAT8_Pos (0) /*!< TK_T::DAT2: TKDAT8 Position */ 1599 #define TK_DAT2_TKDAT8_Msk (0xfful << TK_DAT2_TKDAT8_Pos) /*!< TK_T::DAT2: TKDAT8 Mask */ 1600 1601 #define TK_DAT2_TKDAT9_Pos (8) /*!< TK_T::DAT2: TKDAT9 Position */ 1602 #define TK_DAT2_TKDAT9_Msk (0xfful << TK_DAT2_TKDAT9_Pos) /*!< TK_T::DAT2: TKDAT9 Mask */ 1603 1604 #define TK_DAT2_TKDAT10_Pos (16) /*!< TK_T::DAT2: TKDAT10 Position */ 1605 #define TK_DAT2_TKDAT10_Msk (0xfful << TK_DAT2_TKDAT10_Pos) /*!< TK_T::DAT2: TKDAT10 Mask */ 1606 1607 #define TK_DAT2_TKDAT11_Pos (24) /*!< TK_T::DAT2: TKDAT11 Position */ 1608 #define TK_DAT2_TKDAT11_Msk (0xfful << TK_DAT2_TKDAT11_Pos) /*!< TK_T::DAT2: TKDAT11 Mask */ 1609 1610 #define TK_DAT3_TKDAT12_Pos (0) /*!< TK_T::DAT3: TKDAT12 Position */ 1611 #define TK_DAT3_TKDAT12_Msk (0xfful << TK_DAT3_TKDAT12_Pos) /*!< TK_T::DAT3: TKDAT12 Mask */ 1612 1613 #define TK_DAT3_TKDAT13_Pos (8) /*!< TK_T::DAT3: TKDAT13 Position */ 1614 #define TK_DAT3_TKDAT13_Msk (0xfful << TK_DAT3_TKDAT13_Pos) /*!< TK_T::DAT3: TKDAT13 Mask */ 1615 1616 #define TK_DAT3_TKDAT14_Pos (16) /*!< TK_T::DAT3: TKDAT14 Position */ 1617 #define TK_DAT3_TKDAT14_Msk (0xfful << TK_DAT3_TKDAT14_Pos) /*!< TK_T::DAT3: TKDAT14 Mask */ 1618 1619 #define TK_DAT3_TKDAT15_Pos (24) /*!< TK_T::DAT3: TKDAT15 Position */ 1620 #define TK_DAT3_TKDAT15_Msk (0xfful << TK_DAT3_TKDAT15_Pos) /*!< TK_T::DAT3: TKDAT15 Mask */ 1621 1622 #define TK_DAT4_TKDAT16_Pos (0) /*!< TK_T::DAT4: TKDAT16 Position */ 1623 #define TK_DAT4_TKDAT16_Msk (0xfful << TK_DAT4_TKDAT16_Pos) /*!< TK_T::DAT4: TKDAT16 Mask */ 1624 1625 #define TK_DAT4_TKDAT_ALL_Pos (8) /*!< TK_T::DAT4: TKDAT_ALL Position */ 1626 #define TK_DAT4_TKDAT_ALL_Msk (0xfful << TK_DAT4_TKDAT_ALL_Pos) /*!< TK_T::DAT4: TKDAT_ALL Mask */ 1627 1628 #define TK_INTEN_SCTHIE_Pos (0) /*!< TK_T::INTEN: SCTHIE Position */ 1629 #define TK_INTEN_SCTHIE_Msk (0x1ul << TK_INTEN_SCTHIE_Pos) /*!< TK_T::INTEN: SCTHIE Mask */ 1630 1631 #define TK_INTEN_SCIE_Pos (1) /*!< TK_T::INTEN: SCIE Position */ 1632 #define TK_INTEN_SCIE_Msk (0x1ul << TK_INTEN_SCIE_Pos) /*!< TK_T::INTEN: SCIE Mask */ 1633 1634 #define TK_THC01_HTH0_Pos (8) /*!< TK_T::THC01: HTH0 Position */ 1635 #define TK_THC01_HTH0_Msk (0xfful << TK_THC01_HTH0_Pos) /*!< TK_T::THC01: HTH0 Mask */ 1636 1637 #define TK_THC01_HTH1_Pos (24) /*!< TK_T::THC01: HTH1 Position */ 1638 #define TK_THC01_HTH1_Msk (0xfful << TK_THC01_HTH1_Pos) /*!< TK_T::THC01: HTH1 Mask */ 1639 1640 #define TK_THC23_HTH2_Pos (8) /*!< TK_T::THC23: HTH2 Position */ 1641 #define TK_THC23_HTH2_Msk (0xfful << TK_THC23_HTH2_Pos) /*!< TK_T::THC23: HTH2 Mask */ 1642 1643 #define TK_THC23_HTH3_Pos (24) /*!< TK_T::THC23: HTH3 Position */ 1644 #define TK_THC23_HTH3_Msk (0xfful << TK_THC23_HTH3_Pos) /*!< TK_T::THC23: HTH3 Mask */ 1645 1646 #define TK_THC45_HTH4_Pos (8) /*!< TK_T::THC45: HTH4 Position */ 1647 #define TK_THC45_HTH4_Msk (0xfful << TK_THC45_HTH4_Pos) /*!< TK_T::THC45: HTH4 Mask */ 1648 1649 #define TK_THC45_HTH5_Pos (24) /*!< TK_T::THC45: HTH5 Position */ 1650 #define TK_THC45_HTH5_Msk (0xfful << TK_THC45_HTH5_Pos) /*!< TK_T::THC45: HTH5 Mask */ 1651 1652 #define TK_THC67_HTH6_Pos (8) /*!< TK_T::THC67: HTH6 Position */ 1653 #define TK_THC67_HTH6_Msk (0xfful << TK_THC67_HTH6_Pos) /*!< TK_T::THC67: HTH6 Mask */ 1654 1655 #define TK_THC67_HTH7_Pos (24) /*!< TK_T::THC67: HTH7 Position */ 1656 #define TK_THC67_HTH7_Msk (0xfful << TK_THC67_HTH7_Pos) /*!< TK_T::THC67: HTH7 Mask */ 1657 1658 #define TK_THC89_HTH8_Pos (8) /*!< TK_T::THC89: HTH8 Position */ 1659 #define TK_THC89_HTH8_Msk (0xfful << TK_THC89_HTH8_Pos) /*!< TK_T::THC89: HTH8 Mask */ 1660 1661 #define TK_THC89_HTH9_Pos (24) /*!< TK_T::THC89: HTH9 Position */ 1662 #define TK_THC89_HTH9_Msk (0xfful << TK_THC89_HTH9_Pos) /*!< TK_T::THC89: HTH9 Mask */ 1663 1664 #define TK_THC1011_HTH10_Pos (8) /*!< TK_T::THC1011: HTH10 Position */ 1665 #define TK_THC1011_HTH10_Msk (0xfful << TK_THC1011_HTH10_Pos) /*!< TK_T::THC1011: HTH10 Mask */ 1666 1667 #define TK_THC1011_HTH11_Pos (24) /*!< TK_T::THC1011: HTH11 Position */ 1668 #define TK_THC1011_HTH11_Msk (0xfful << TK_THC1011_HTH11_Pos) /*!< TK_T::THC1011: HTH11 Mask */ 1669 1670 #define TK_THC1213_HTH12_Pos (8) /*!< TK_T::THC1213: HTH12 Position */ 1671 #define TK_THC1213_HTH12_Msk (0xfful << TK_THC1213_HTH12_Pos) /*!< TK_T::THC1213: HTH12 Mask */ 1672 1673 #define TK_THC1213_HTH13_Pos (24) /*!< TK_T::THC1213: HTH13 Position */ 1674 #define TK_THC1213_HTH13_Msk (0xfful << TK_THC1213_HTH13_Pos) /*!< TK_T::THC1213: HTH13 Mask */ 1675 1676 #define TK_THC1415_HTH14_Pos (8) /*!< TK_T::THC1415: HTH14 Position */ 1677 #define TK_THC1415_HTH14_Msk (0xfful << TK_THC1415_HTH14_Pos) /*!< TK_T::THC1415: HTH14 Mask */ 1678 1679 #define TK_THC1415_HTH15_Pos (24) /*!< TK_T::THC1415: HTH15 Position */ 1680 #define TK_THC1415_HTH15_Msk (0xfful << TK_THC1415_HTH15_Pos) /*!< TK_T::THC1415: HTH15 Mask */ 1681 1682 #define TK_THC16_HTH16_Pos (8) /*!< TK_T::THC16: HTH16 Position */ 1683 #define TK_THC16_HTH16_Msk (0xfful << TK_THC16_HTH16_Pos) /*!< TK_T::THC16: HTH16 Mask */ 1684 1685 #define TK_THC16_HTH_ALL_Pos (24) /*!< TK_T::THC16: HTH_ALL Position */ 1686 #define TK_THC16_HTH_ALL_Msk (0xfful << TK_THC16_HTH_ALL_Pos) /*!< TK_T::THC16: HTH_ALL Mask */ 1687 1688 #define TK_REFCBD0_CBD0_Pos (0) /*!< TK_T::REFCBD0: CBD0 Position */ 1689 #define TK_REFCBD0_CBD0_Msk (0xfful << TK_REFCBD0_CBD0_Pos) /*!< TK_T::REFCBD0: CBD0 Mask */ 1690 1691 #define TK_REFCBD0_CBD1_Pos (8) /*!< TK_T::REFCBD0: CBD1 Position */ 1692 #define TK_REFCBD0_CBD1_Msk (0xfful << TK_REFCBD0_CBD1_Pos) /*!< TK_T::REFCBD0: CBD1 Mask */ 1693 1694 #define TK_REFCBD0_CBD2_Pos (16) /*!< TK_T::REFCBD0: CBD2 Position */ 1695 #define TK_REFCBD0_CBD2_Msk (0xfful << TK_REFCBD0_CBD2_Pos) /*!< TK_T::REFCBD0: CBD2 Mask */ 1696 1697 #define TK_REFCBD0_CBD3_Pos (24) /*!< TK_T::REFCBD0: CBD3 Position */ 1698 #define TK_REFCBD0_CBD3_Msk (0xfful << TK_REFCBD0_CBD3_Pos) /*!< TK_T::REFCBD0: CBD3 Mask */ 1699 1700 #define TK_REFCBD1_CBD4_Pos (0) /*!< TK_T::REFCBD1: CBD4 Position */ 1701 #define TK_REFCBD1_CBD4_Msk (0xfful << TK_REFCBD1_CBD4_Pos) /*!< TK_T::REFCBD1: CBD4 Mask */ 1702 1703 #define TK_REFCBD1_CBD5_Pos (8) /*!< TK_T::REFCBD1: CBD5 Position */ 1704 #define TK_REFCBD1_CBD5_Msk (0xfful << TK_REFCBD1_CBD5_Pos) /*!< TK_T::REFCBD1: CBD5 Mask */ 1705 1706 #define TK_REFCBD1_CBD6_Pos (16) /*!< TK_T::REFCBD1: CBD6 Position */ 1707 #define TK_REFCBD1_CBD6_Msk (0xfful << TK_REFCBD1_CBD6_Pos) /*!< TK_T::REFCBD1: CBD6 Mask */ 1708 1709 #define TK_REFCBD1_CBD7_Pos (24) /*!< TK_T::REFCBD1: CBD7 Position */ 1710 #define TK_REFCBD1_CBD7_Msk (0xfful << TK_REFCBD1_CBD7_Pos) /*!< TK_T::REFCBD1: CBD7 Mask */ 1711 1712 #define TK_REFCBD2_CBD8_Pos (0) /*!< TK_T::REFCBD2: CBD8 Position */ 1713 #define TK_REFCBD2_CBD8_Msk (0xfful << TK_REFCBD2_CBD8_Pos) /*!< TK_T::REFCBD2: CBD8 Mask */ 1714 1715 #define TK_REFCBD2_CBD9_Pos (8) /*!< TK_T::REFCBD2: CBD9 Position */ 1716 #define TK_REFCBD2_CBD9_Msk (0xfful << TK_REFCBD2_CBD9_Pos) /*!< TK_T::REFCBD2: CBD9 Mask */ 1717 1718 #define TK_REFCBD2_CBD10_Pos (16) /*!< TK_T::REFCBD2: CBD10 Position */ 1719 #define TK_REFCBD2_CBD10_Msk (0xfful << TK_REFCBD2_CBD10_Pos) /*!< TK_T::REFCBD2: CBD10 Mask */ 1720 1721 #define TK_REFCBD2_CBD11_Pos (24) /*!< TK_T::REFCBD2: CBD11 Position */ 1722 #define TK_REFCBD2_CBD11_Msk (0xfful << TK_REFCBD2_CBD11_Pos) /*!< TK_T::REFCBD2: CBD11 Mask */ 1723 1724 #define TK_REFCBD3_CBD12_Pos (0) /*!< TK_T::REFCBD3: CBD12 Position */ 1725 #define TK_REFCBD3_CBD12_Msk (0xfful << TK_REFCBD3_CBD12_Pos) /*!< TK_T::REFCBD3: CBD12 Mask */ 1726 1727 #define TK_REFCBD3_CBD13_Pos (8) /*!< TK_T::REFCBD3: CBD13 Position */ 1728 #define TK_REFCBD3_CBD13_Msk (0xfful << TK_REFCBD3_CBD13_Pos) /*!< TK_T::REFCBD3: CBD13 Mask */ 1729 1730 #define TK_REFCBD3_CBD14_Pos (16) /*!< TK_T::REFCBD3: CBD14 Position */ 1731 #define TK_REFCBD3_CBD14_Msk (0xfful << TK_REFCBD3_CBD14_Pos) /*!< TK_T::REFCBD3: CBD14 Mask */ 1732 1733 #define TK_REFCBD3_CBD15_Pos (24) /*!< TK_T::REFCBD3: CBD15 Position */ 1734 #define TK_REFCBD3_CBD15_Msk (0xfful << TK_REFCBD3_CBD15_Pos) /*!< TK_T::REFCBD3: CBD15 Mask */ 1735 1736 #define TK_REFCBD4_CBD16_Pos (0) /*!< TK_T::REFCBD4: CBD16 Position */ 1737 #define TK_REFCBD4_CBD16_Msk (0xfful << TK_REFCBD4_CBD16_Pos) /*!< TK_T::REFCBD4: CBD16 Mask */ 1738 1739 #define TK_REFCBD4_CBD_ALL_Pos (8) /*!< TK_T::REFCBD4: CBD_ALL Position */ 1740 #define TK_REFCBD4_CBD_ALL_Msk (0xfful << TK_REFCBD4_CBD_ALL_Pos) /*!< TK_T::REFCBD4: CBD_ALL Mask */ 1741 1742 #define TK_SCANC1_TK17SEN_Pos (0) /*!< TK_T::SCANC1: TK17SEN Position */ 1743 #define TK_SCANC1_TK17SEN_Msk (0x1ul << TK_SCANC1_TK17SEN_Pos) /*!< TK_T::SCANC1: TK17SEN Mask */ 1744 1745 #define TK_REFC1_TK17REN_Pos (0) /*!< TK_T::REFC1: TK17REN Position */ 1746 #define TK_REFC1_TK17REN_Msk (0x1ul << TK_REFC1_TK17REN_Pos) /*!< TK_T::REFC1: TK17REN Mask */ 1747 1748 #define TK_CCBD5_CCBD17_Pos (0) /*!< TK_T::CCBD5: CCBD17 Position */ 1749 #define TK_CCBD5_CCBD17_Msk (0xfful << TK_CCBD5_CCBD17_Pos) /*!< TK_T::CCBD5: CCBD17 Mask */ 1750 1751 #define TK_IDLSC1_IDLS17_Pos (0) /*!< TK_T::IDLSC1: IDLS17 Position */ 1752 #define TK_IDLSC1_IDLS17_Msk (0x3ul << TK_IDLSC1_IDLS17_Pos) /*!< TK_T::IDLSC1: IDLS17 Mask */ 1753 1754 #define TK_POLSEL1_POL17_Pos (0) /*!< TK_T::POLSEL1: POL17 Position */ 1755 #define TK_POLSEL1_POL17_Msk (0x3ul << TK_POLSEL1_POL17_Pos) /*!< TK_T::POLSEL1: POL17 Mask */ 1756 1757 #define TK_POLC1_POLEN17_Pos (0) /*!< TK_T::POLC1: POLEN17 Position */ 1758 #define TK_POLC1_POLEN17_Msk (0x1ul << TK_POLC1_POLEN17_Pos) /*!< TK_T::POLC1: POLEN17 Mask */ 1759 1760 #define TK_STA1_TKIF17_Pos (0) /*!< TK_T::STA1: TKIF17 Position */ 1761 #define TK_STA1_TKIF17_Msk (0x1ul << TK_STA1_TKIF17_Pos) /*!< TK_T::STA1: TKIF17 Mask */ 1762 1763 #define TK_DAT5_TKDAT17_Pos (0) /*!< TK_T::DAT5: TKDAT17 Position */ 1764 #define TK_DAT5_TKDAT17_Msk (0xfful << TK_DAT5_TKDAT17_Pos) /*!< TK_T::DAT5: TKDAT17 Mask */ 1765 1766 #define TK_THC17_HTH17_Pos (8) /*!< TK_T::THC17: HTH17 Position */ 1767 #define TK_THC17_HTH17_Msk (0xfful << TK_THC17_HTH17_Pos) /*!< TK_T::THC17: HTH17 Mask */ 1768 1769 #define TK_REFCBD5_CBD17_Pos (0) /*!< TK_T::REFCBD5: CBD17 Position */ 1770 #define TK_REFCBD5_CBD17_Msk (0xfful << TK_REFCBD5_CBD17_Pos) /*!< TK_T::REFCBD5: CBD17 Mask */ 1771 1772 #define TK_EXTCBC_EXT_CBSEL_Pos (0) /*!< TK_T::EXTCBC: EXT_CBSEL Position */ 1773 #define TK_EXTCBC_EXT_CBSEL_Msk (0x3ul << TK_EXTCBC_EXT_CBSEL_Pos) /*!< TK_T::EXTCBC: EXT_CBSEL Mask */ 1774 1775 #define TK_EXTCCBD0_CCBD0_Pos (0) /*!< TK_T::EXTCCBD0: CCBD0 Position */ 1776 #define TK_EXTCCBD0_CCBD0_Msk (0x1ul << TK_EXTCCBD0_CCBD0_Pos) /*!< TK_T::EXTCCBD0: CCBD0 Mask */ 1777 1778 #define TK_EXTCCBD0_CCBD1_Pos (8) /*!< TK_T::EXTCCBD0: CCBD1 Position */ 1779 #define TK_EXTCCBD0_CCBD1_Msk (0x1ul << TK_EXTCCBD0_CCBD1_Pos) /*!< TK_T::EXTCCBD0: CCBD1 Mask */ 1780 1781 #define TK_EXTCCBD0_CCBD2_Pos (16) /*!< TK_T::EXTCCBD0: CCBD2 Position */ 1782 #define TK_EXTCCBD0_CCBD2_Msk (0x1ul << TK_EXTCCBD0_CCBD2_Pos) /*!< TK_T::EXTCCBD0: CCBD2 Mask */ 1783 1784 #define TK_EXTCCBD0_CCBD3_Pos (24) /*!< TK_T::EXTCCBD0: CCBD3 Position */ 1785 #define TK_EXTCCBD0_CCBD3_Msk (0x1ul << TK_EXTCCBD0_CCBD3_Pos) /*!< TK_T::EXTCCBD0: CCBD3 Mask */ 1786 1787 #define TK_EXTCCBD1_CCBD4_Pos (0) /*!< TK_T::EXTCCBD1: CCBD4 Position */ 1788 #define TK_EXTCCBD1_CCBD4_Msk (0x1ul << TK_EXTCCBD1_CCBD4_Pos) /*!< TK_T::EXTCCBD1: CCBD4 Mask */ 1789 1790 #define TK_EXTCCBD1_CCBD5_Pos (8) /*!< TK_T::EXTCCBD1: CCBD5 Position */ 1791 #define TK_EXTCCBD1_CCBD5_Msk (0x1ul << TK_EXTCCBD1_CCBD5_Pos) /*!< TK_T::EXTCCBD1: CCBD5 Mask */ 1792 1793 #define TK_EXTCCBD1_CCBD6_Pos (16) /*!< TK_T::EXTCCBD1: CCBD6 Position */ 1794 #define TK_EXTCCBD1_CCBD6_Msk (0x1ul << TK_EXTCCBD1_CCBD6_Pos) /*!< TK_T::EXTCCBD1: CCBD6 Mask */ 1795 1796 #define TK_EXTCCBD1_CCBD7_Pos (24) /*!< TK_T::EXTCCBD1: CCBD7 Position */ 1797 #define TK_EXTCCBD1_CCBD7_Msk (0x1ul << TK_EXTCCBD1_CCBD7_Pos) /*!< TK_T::EXTCCBD1: CCBD7 Mask */ 1798 1799 #define TK_EXTCCBD2_CCBD8_Pos (0) /*!< TK_T::EXTCCBD2: CCBD8 Position */ 1800 #define TK_EXTCCBD2_CCBD8_Msk (0x1ul << TK_EXTCCBD2_CCBD8_Pos) /*!< TK_T::EXTCCBD2: CCBD8 Mask */ 1801 1802 #define TK_EXTCCBD2_CCBD9_Pos (8) /*!< TK_T::EXTCCBD2: CCBD9 Position */ 1803 #define TK_EXTCCBD2_CCBD9_Msk (0x1ul << TK_EXTCCBD2_CCBD9_Pos) /*!< TK_T::EXTCCBD2: CCBD9 Mask */ 1804 1805 #define TK_EXTCCBD2_CCBD10_Pos (16) /*!< TK_T::EXTCCBD2: CCBD10 Position */ 1806 #define TK_EXTCCBD2_CCBD10_Msk (0x1ul << TK_EXTCCBD2_CCBD10_Pos) /*!< TK_T::EXTCCBD2: CCBD10 Mask */ 1807 1808 #define TK_EXTCCBD2_CCBD11_Pos (24) /*!< TK_T::EXTCCBD2: CCBD11 Position */ 1809 #define TK_EXTCCBD2_CCBD11_Msk (0x1ul << TK_EXTCCBD2_CCBD11_Pos) /*!< TK_T::EXTCCBD2: CCBD11 Mask */ 1810 1811 #define TK_EXTCCBD3_CCBD12_Pos (0) /*!< TK_T::EXTCCBD3: CCBD12 Position */ 1812 #define TK_EXTCCBD3_CCBD12_Msk (0x1ul << TK_EXTCCBD3_CCBD12_Pos) /*!< TK_T::EXTCCBD3: CCBD12 Mask */ 1813 1814 #define TK_EXTCCBD3_CCBD13_Pos (8) /*!< TK_T::EXTCCBD3: CCBD13 Position */ 1815 #define TK_EXTCCBD3_CCBD13_Msk (0x1ul << TK_EXTCCBD3_CCBD13_Pos) /*!< TK_T::EXTCCBD3: CCBD13 Mask */ 1816 1817 #define TK_EXTCCBD3_CCBD14_Pos (16) /*!< TK_T::EXTCCBD3: CCBD14 Position */ 1818 #define TK_EXTCCBD3_CCBD14_Msk (0x1ul << TK_EXTCCBD3_CCBD14_Pos) /*!< TK_T::EXTCCBD3: CCBD14 Mask */ 1819 1820 #define TK_EXTCCBD3_CCBD15_Pos (24) /*!< TK_T::EXTCCBD3: CCBD15 Position */ 1821 #define TK_EXTCCBD3_CCBD15_Msk (0x1ul << TK_EXTCCBD3_CCBD15_Pos) /*!< TK_T::EXTCCBD3: CCBD15 Mask */ 1822 1823 #define TK_EXTCCBD4_CCBD16_Pos (0) /*!< TK_T::EXTCCBD4: CCBD16 Position */ 1824 #define TK_EXTCCBD4_CCBD16_Msk (0x1ul << TK_EXTCCBD4_CCBD16_Pos) /*!< TK_T::EXTCCBD4: CCBD16 Mask */ 1825 1826 #define TK_EXTCCBD4_CCBDALL_Pos (8) /*!< TK_T::EXTCCBD4: CCBDALL Position */ 1827 #define TK_EXTCCBD4_CCBDALL_Msk (0x1ul << TK_EXTCCBD4_CCBDALL_Pos) /*!< TK_T::EXTCCBD4: CCBDALL Mask */ 1828 1829 #define TK_EXTCCBD5_CCBD17_Pos (0) /*!< TK_T::EXTCCBD5: CCBD17 Position */ 1830 #define TK_EXTCCBD5_CCBD17_Msk (0x1ul << TK_EXTCCBD5_CCBD17_Pos) /*!< TK_T::EXTCCBD5: CCBD17 Mask */ 1831 1832 #define TK_EXTREFCBD0_EXT_CBD0_Pos (0) /*!< TK_T::EXTREFCBD0: EXT_CBD0 Position */ 1833 #define TK_EXTREFCBD0_EXT_CBD0_Msk (0x1ul << TK_EXTREFCBD0_EXT_CBD0_Pos) /*!< TK_T::EXTREFCBD0: EXT_CBD0 Mask */ 1834 1835 #define TK_EXTREFCBD0_EXT_CBD1_Pos (8) /*!< TK_T::EXTREFCBD0: EXT_CBD1 Position */ 1836 #define TK_EXTREFCBD0_EXT_CBD1_Msk (0x1ul << TK_EXTREFCBD0_EXT_CBD1_Pos) /*!< TK_T::EXTREFCBD0: EXT_CBD1 Mask */ 1837 1838 #define TK_EXTREFCBD0_EXT_CBD2_Pos (16) /*!< TK_T::EXTREFCBD0: EXT_CBD2 Position */ 1839 #define TK_EXTREFCBD0_EXT_CBD2_Msk (0x1ul << TK_EXTREFCBD0_EXT_CBD2_Pos) /*!< TK_T::EXTREFCBD0: EXT_CBD2 Mask */ 1840 1841 #define TK_EXTREFCBD0_EXT_CBD3_Pos (24) /*!< TK_T::EXTREFCBD0: EXT_CBD3 Position */ 1842 #define TK_EXTREFCBD0_EXT_CBD3_Msk (0x1ul << TK_EXTREFCBD0_EXT_CBD3_Pos) /*!< TK_T::EXTREFCBD0: EXT_CBD3 Mask */ 1843 1844 #define TK_EXTREFCBD1_EXT_CBD4_Pos (0) /*!< TK_T::EXTREFCBD1: EXT_CBD4 Position */ 1845 #define TK_EXTREFCBD1_EXT_CBD4_Msk (0x1ul << TK_EXTREFCBD1_EXT_CBD4_Pos) /*!< TK_T::EXTREFCBD1: EXT_CBD4 Mask */ 1846 1847 #define TK_EXTREFCBD1_EXT_CBD5_Pos (8) /*!< TK_T::EXTREFCBD1: EXT_CBD5 Position */ 1848 #define TK_EXTREFCBD1_EXT_CBD5_Msk (0x1ul << TK_EXTREFCBD1_EXT_CBD5_Pos) /*!< TK_T::EXTREFCBD1: EXT_CBD5 Mask */ 1849 1850 #define TK_EXTREFCBD1_EXT_CBD6_Pos (16) /*!< TK_T::EXTREFCBD1: EXT_CBD6 Position */ 1851 #define TK_EXTREFCBD1_EXT_CBD6_Msk (0x1ul << TK_EXTREFCBD1_EXT_CBD6_Pos) /*!< TK_T::EXTREFCBD1: EXT_CBD6 Mask */ 1852 1853 #define TK_EXTREFCBD1_EXT_CBD7_Pos (24) /*!< TK_T::EXTREFCBD1: EXT_CBD7 Position */ 1854 #define TK_EXTREFCBD1_EXT_CBD7_Msk (0x1ul << TK_EXTREFCBD1_EXT_CBD7_Pos) /*!< TK_T::EXTREFCBD1: EXT_CBD7 Mask */ 1855 1856 #define TK_EXTREFCBD2_EXT_CBD8_Pos (0) /*!< TK_T::EXTREFCBD2: EXT_CBD8 Position */ 1857 #define TK_EXTREFCBD2_EXT_CBD8_Msk (0x1ul << TK_EXTREFCBD2_EXT_CBD8_Pos) /*!< TK_T::EXTREFCBD2: EXT_CBD8 Mask */ 1858 1859 #define TK_EXTREFCBD2_EXT_CBD9_Pos (8) /*!< TK_T::EXTREFCBD2: EXT_CBD9 Position */ 1860 #define TK_EXTREFCBD2_EXT_CBD9_Msk (0x1ul << TK_EXTREFCBD2_EXT_CBD9_Pos) /*!< TK_T::EXTREFCBD2: EXT_CBD9 Mask */ 1861 1862 #define TK_EXTREFCBD2_EXT_CBD10_Pos (16) /*!< TK_T::EXTREFCBD2: EXT_CBD10 Position */ 1863 #define TK_EXTREFCBD2_EXT_CBD10_Msk (0x1ul << TK_EXTREFCBD2_EXT_CBD10_Pos) /*!< TK_T::EXTREFCBD2: EXT_CBD10 Mask */ 1864 1865 #define TK_EXTREFCBD2_EXT_CBD11_Pos (24) /*!< TK_T::EXTREFCBD2: EXT_CBD11 Position */ 1866 #define TK_EXTREFCBD2_EXT_CBD11_Msk (0x1ul << TK_EXTREFCBD2_EXT_CBD11_Pos) /*!< TK_T::EXTREFCBD2: EXT_CBD11 Mask */ 1867 1868 #define TK_EXTREFCBD3_EXT_CBD12_Pos (0) /*!< TK_T::EXTREFCBD3: EXT_CBD12 Position */ 1869 #define TK_EXTREFCBD3_EXT_CBD12_Msk (0x1ul << TK_EXTREFCBD3_EXT_CBD12_Pos) /*!< TK_T::EXTREFCBD3: EXT_CBD12 Mask */ 1870 1871 #define TK_EXTREFCBD3_EXT_CBD13_Pos (8) /*!< TK_T::EXTREFCBD3: EXT_CBD13 Position */ 1872 #define TK_EXTREFCBD3_EXT_CBD13_Msk (0x1ul << TK_EXTREFCBD3_EXT_CBD13_Pos) /*!< TK_T::EXTREFCBD3: EXT_CBD13 Mask */ 1873 1874 #define TK_EXTREFCBD3_EXT_CBD14_Pos (16) /*!< TK_T::EXTREFCBD3: EXT_CBD14 Position */ 1875 #define TK_EXTREFCBD3_EXT_CBD14_Msk (0x1ul << TK_EXTREFCBD3_EXT_CBD14_Pos) /*!< TK_T::EXTREFCBD3: EXT_CBD14 Mask */ 1876 1877 #define TK_EXTREFCBD3_EXT_CBD15_Pos (24) /*!< TK_T::EXTREFCBD3: EXT_CBD15 Position */ 1878 #define TK_EXTREFCBD3_EXT_CBD15_Msk (0x1ul << TK_EXTREFCBD3_EXT_CBD15_Pos) /*!< TK_T::EXTREFCBD3: EXT_CBD15 Mask */ 1879 1880 #define TK_EXTREFCBD4_EXT_CBD16_Pos (0) /*!< TK_T::EXTREFCBD4: EXT_CBD16 Position */ 1881 #define TK_EXTREFCBD4_EXT_CBD16_Msk (0x1ul << TK_EXTREFCBD4_EXT_CBD16_Pos) /*!< TK_T::EXTREFCBD4: EXT_CBD16 Mask */ 1882 1883 #define TK_EXTREFCBD4_EXT_CBDALL_Pos (8) /*!< TK_T::EXTREFCBD4: EXT_CBDALL Position */ 1884 #define TK_EXTREFCBD4_EXT_CBDALL_Msk (0x1ul << TK_EXTREFCBD4_EXT_CBDALL_Pos) /*!< TK_T::EXTREFCBD4: EXT_CBDALL Mask */ 1885 1886 #define TK_EXTREFCBD5_EXT_CBD17_Pos (0) /*!< TK_T::EXTREFCBD5: EXT_CBD17 Position */ 1887 #define TK_EXTREFCBD5_EXT_CBD17_Msk (0x1ul << TK_EXTREFCBD5_EXT_CBD17_Pos) /*!< TK_T::EXTREFCBD5: EXT_CBD17 Mask */ 1888 1889 /**@}*/ /* TK_CONST */ 1890 /**@}*/ /* end of TK register group */ 1891 1892 1893 /**@}*/ /* end of REGISTER group */ 1894
