1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 #define TI_SCI_MSG_QUERY_FW_CAPS 0x0022 26 27 /* Device requests */ 28 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 29 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 30 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 31 32 /* Low Power Mode Requests */ 33 #define TI_SCI_MSG_ENTER_SLEEP 0x0301 34 35 /* Clock requests */ 36 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 37 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 38 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 39 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 40 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 41 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 42 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 43 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 44 45 /* Processor Control Messages */ 46 #define TISCI_MSG_PROC_REQUEST 0xc000 47 #define TISCI_MSG_PROC_RELEASE 0xc001 48 #define TISCI_MSG_PROC_HANDOVER 0xc005 49 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 50 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 51 #define TISCI_MSG_PROC_AUTH_BOOT_IMAGE 0xc120 52 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 53 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 54 55 /** 56 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 57 * @type: Type of messages: One of TI_SCI_MSG* values 58 * @host: Host of the message 59 * @seq: Message identifier indicating a transfer sequence 60 * @flags: Flag for the message 61 */ 62 struct ti_sci_msg_hdr { 63 uint16_t type; 64 uint8_t host; 65 uint8_t seq; 66 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 67 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 68 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 69 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 70 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 71 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 72 /* Additional Flags */ 73 uint32_t flags; 74 } __packed; 75 76 /** 77 * struct ti_sci_msg_version_req - Request for firmware version information 78 * @hdr: Generic header 79 * 80 * Request for TI_SCI_MSG_VERSION 81 */ 82 struct ti_sci_msg_req_version { 83 struct ti_sci_msg_hdr hdr; 84 } __packed; 85 86 /** 87 * struct ti_sci_msg_resp_version - Response for firmware version information 88 * @hdr: Generic header 89 * @firmware_description: String describing the firmware 90 * @firmware_revision: Firmware revision 91 * @abi_major: Major version of the ABI that firmware supports 92 * @abi_minor: Minor version of the ABI that firmware supports 93 * @sub_version: Sub-version number of the firmware 94 * @patch_version: Patch-version number of the firmware. 95 * 96 * In general, ABI version changes follow the rule that minor version increments 97 * are backward compatible. Major revision changes in ABI may not be 98 * backward compatible. 99 * 100 * Response to request TI_SCI_MSG_VERSION 101 */ 102 struct ti_sci_msg_resp_version { 103 struct ti_sci_msg_hdr hdr; 104 #define FIRMWARE_DESCRIPTION_LENGTH 32 105 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 106 uint16_t firmware_revision; 107 uint8_t abi_major; 108 uint8_t abi_minor; 109 uint8_t sub_version; 110 uint8_t patch_version; 111 } __packed; 112 113 /** 114 * struct ti_sci_msg_req_reboot - Reboot the SoC 115 * @hdr: Generic Header 116 * @domain: Domain to be reset, 0 for full SoC reboot 117 * 118 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 119 * ACK/NACK message. 120 */ 121 struct ti_sci_msg_req_reboot { 122 struct ti_sci_msg_hdr hdr; 123 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 124 uint8_t domain; 125 } __packed; 126 127 /** 128 * struct ti_sci_msg_resp_query_fw_caps - Response for query firmware caps 129 * @hdr: Generic header 130 * @fw_caps: Each bit in fw_caps indicating one FW/SOC capability 131 * MSG_FLAG_CAPS_GENERIC: Generic capability (LPM not supported) 132 * MSG_FLAG_CAPS_LPM_DEEP_SLEEP: Deep Sleep LPM 133 * MSG_FLAG_CAPS_LPM_MCU_ONLY: MCU only LPM 134 * MSG_FLAG_CAPS_LPM_STANDBY: Standby LPM 135 * MSG_FLAG_CAPS_LPM_PARTIAL_IO: Partial IO in LPM 136 * 137 * Response to a generic message with message type TI_SCI_MSG_QUERY_FW_CAPS 138 * providing currently available SOC/firmware capabilities. SoC that don't 139 * support low power modes return only MSG_FLAG_CAPS_GENERIC capability. 140 */ 141 struct ti_sci_msg_resp_query_fw_caps { 142 struct ti_sci_msg_hdr hdr; 143 #define MSG_FLAG_CAPS_GENERIC TI_SCI_MSG_FLAG(0) 144 #define MSG_FLAG_CAPS_LPM_DEEP_SLEEP TI_SCI_MSG_FLAG(1) 145 #define MSG_FLAG_CAPS_LPM_MCU_ONLY TI_SCI_MSG_FLAG(2) 146 #define MSG_FLAG_CAPS_LPM_STANDBY TI_SCI_MSG_FLAG(3) 147 #define MSG_FLAG_CAPS_LPM_PARTIAL_IO TI_SCI_MSG_FLAG(4) 148 uint64_t fw_caps; 149 } __packed; 150 151 /** 152 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 153 * @hdr: Generic header 154 * @id: Indicates which device to modify 155 * @reserved: Reserved space in message, must be 0 for backward compatibility 156 * @state: The desired state of the device. 157 * 158 * Certain flags can also be set to alter the device state: 159 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 160 * The meaning of this flag will vary slightly from device to device and from 161 * SoC to SoC but it generally allows the device to wake the SoC out of deep 162 * suspend states. 163 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 164 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 165 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 166 * If another host already has this device set to STATE_RETENTION or STATE_ON, 167 * the message will fail. Once successful, other hosts attempting to set 168 * STATE_RETENTION or STATE_ON will fail. 169 * 170 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 171 * ACK/NACK message. 172 */ 173 struct ti_sci_msg_req_set_device_state { 174 /* Additional hdr->flags options */ 175 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 176 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 177 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 178 struct ti_sci_msg_hdr hdr; 179 uint32_t id; 180 uint32_t reserved; 181 182 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 183 #define MSG_DEVICE_SW_STATE_RETENTION 1 184 #define MSG_DEVICE_SW_STATE_ON 2 185 uint8_t state; 186 } __packed; 187 188 /** 189 * struct ti_sci_msg_req_get_device_state - Request to get device. 190 * @hdr: Generic header 191 * @id: Device Identifier 192 * 193 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 194 * information 195 */ 196 struct ti_sci_msg_req_get_device_state { 197 struct ti_sci_msg_hdr hdr; 198 uint32_t id; 199 } __packed; 200 201 /** 202 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 203 * @hdr: Generic header 204 * @context_loss_count: Indicates how many times the device has lost context. A 205 * driver can use this monotonic counter to determine if the device has 206 * lost context since the last time this message was exchanged. 207 * @resets: Programmed state of the reset lines. 208 * @programmed_state: The state as programmed by set_device. 209 * - Uses the MSG_DEVICE_SW_* macros 210 * @current_state: The actual state of the hardware. 211 * 212 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 213 */ 214 struct ti_sci_msg_resp_get_device_state { 215 struct ti_sci_msg_hdr hdr; 216 uint32_t context_loss_count; 217 uint32_t resets; 218 uint8_t programmed_state; 219 #define MSG_DEVICE_HW_STATE_OFF 0 220 #define MSG_DEVICE_HW_STATE_ON 1 221 #define MSG_DEVICE_HW_STATE_TRANS 2 222 uint8_t current_state; 223 } __packed; 224 225 /** 226 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 227 * configuration of the device 228 * @hdr: Generic header 229 * @id: Indicates which device to modify 230 * @resets: A bit field of resets for the device. The meaning, behavior, 231 * and usage of the reset flags are device specific. 0 for a bit 232 * indicates releasing the reset represented by that bit while 1 233 * indicates keeping it held. 234 * 235 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 236 * ACK/NACK message. 237 */ 238 struct ti_sci_msg_req_set_device_resets { 239 struct ti_sci_msg_hdr hdr; 240 uint32_t id; 241 uint32_t resets; 242 } __packed; 243 244 /** 245 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 246 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 247 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 248 * via spread spectrum clocking. 249 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 250 * frequency to be changed while it is running so long as it 251 * is within the min/max limits. 252 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 253 * is only applicable to clock inputs on the SoC pseudo-device. 254 * @dev_id: Device identifier this request is for 255 * @clk_id: Clock identifier for the device for this request. 256 * Each device has it's own set of clock inputs. This indexes 257 * which clock input to modify. 258 * @request_state: Request the state for the clock to be set to. 259 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 260 * it can be disabled, regardless of the state of the device 261 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 262 * automatically manage the state of this clock. If the device 263 * is enabled, then the clock is enabled. If the device is set 264 * to off or retention, then the clock is internally set as not 265 * being required by the device.(default) 266 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 267 * regardless of the state of the device. 268 * 269 * Normally, all required clocks are managed by TISCI entity, this is used 270 * only for specific control *IF* required. Auto managed state is 271 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 272 * will explicitly control. 273 * 274 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 275 * ACK or NACK message. 276 */ 277 struct ti_sci_msg_req_set_clock_state { 278 /* Additional hdr->flags options */ 279 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 280 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 281 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 282 struct ti_sci_msg_hdr hdr; 283 uint32_t dev_id; 284 uint8_t clk_id; 285 #define MSG_CLOCK_SW_STATE_UNREQ 0 286 #define MSG_CLOCK_SW_STATE_AUTO 1 287 #define MSG_CLOCK_SW_STATE_REQ 2 288 uint8_t request_state; 289 } __packed; 290 291 /** 292 * struct ti_sci_msg_req_get_clock_state - Request for clock state 293 * @hdr: Generic Header 294 * @dev_id: Device identifier this request is for 295 * @clk_id: Clock identifier for the device for this request. 296 * Each device has it's own set of clock inputs. This indexes 297 * which clock input to get state of. 298 * 299 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 300 * of the clock 301 */ 302 struct ti_sci_msg_req_get_clock_state { 303 struct ti_sci_msg_hdr hdr; 304 uint32_t dev_id; 305 uint8_t clk_id; 306 } __packed; 307 308 /** 309 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 310 * @hdr: Generic Header 311 * @programmed_state: Any programmed state of the clock. This is one of 312 * MSG_CLOCK_SW_STATE* values. 313 * @current_state: Current state of the clock. This is one of: 314 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 315 * MSG_CLOCK_HW_STATE_READY: Clock is ready 316 * 317 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 318 */ 319 struct ti_sci_msg_resp_get_clock_state { 320 struct ti_sci_msg_hdr hdr; 321 uint8_t programmed_state; 322 #define MSG_CLOCK_HW_STATE_NOT_READY 0 323 #define MSG_CLOCK_HW_STATE_READY 1 324 uint8_t current_state; 325 } __packed; 326 327 /** 328 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 329 * @hdr: Generic Header 330 * @dev_id: Device identifier this request is for 331 * @clk_id: Clock identifier for the device for this request. 332 * Each device has it's own set of clock inputs. This indexes 333 * which clock input to modify. 334 * @parent_id: The new clock parent is selectable by an index via this 335 * parameter. 336 * 337 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 338 * ACK / NACK message. 339 */ 340 struct ti_sci_msg_req_set_clock_parent { 341 struct ti_sci_msg_hdr hdr; 342 uint32_t dev_id; 343 uint8_t clk_id; 344 uint8_t parent_id; 345 } __packed; 346 347 /** 348 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 349 * @hdr: Generic Header 350 * @dev_id: Device identifier this request is for 351 * @clk_id: Clock identifier for the device for this request. 352 * Each device has it's own set of clock inputs. This indexes 353 * which clock input to get the parent for. 354 * 355 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 356 */ 357 struct ti_sci_msg_req_get_clock_parent { 358 struct ti_sci_msg_hdr hdr; 359 uint32_t dev_id; 360 uint8_t clk_id; 361 } __packed; 362 363 /** 364 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 365 * @hdr: Generic Header 366 * @parent_id: The current clock parent 367 * 368 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 369 */ 370 struct ti_sci_msg_resp_get_clock_parent { 371 struct ti_sci_msg_hdr hdr; 372 uint8_t parent_id; 373 } __packed; 374 375 /** 376 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 377 * @hdr: Generic header 378 * @dev_id: Device identifier this request is for 379 * @clk_id: Clock identifier for the device for this request. 380 * 381 * This request provides information about how many clock parent options 382 * are available for a given clock to a device. This is typically used 383 * for input clocks. 384 * 385 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 386 * message, or NACK in case of inability to satisfy request. 387 */ 388 struct ti_sci_msg_req_get_clock_num_parents { 389 struct ti_sci_msg_hdr hdr; 390 uint32_t dev_id; 391 uint8_t clk_id; 392 } __packed; 393 394 /** 395 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 396 * @hdr: Generic header 397 * @num_parents: Number of clock parents 398 * 399 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 400 */ 401 struct ti_sci_msg_resp_get_clock_num_parents { 402 struct ti_sci_msg_hdr hdr; 403 uint8_t num_parents; 404 } __packed; 405 406 /** 407 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 408 * @hdr: Generic Header 409 * @dev_id: Device identifier this request is for 410 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 411 * allowable programmed frequency and does not account for clock 412 * tolerances and jitter. 413 * @target_freq_hz: The target clock frequency. A frequency will be found 414 * as close to this target frequency as possible. 415 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 416 * allowable programmed frequency and does not account for clock 417 * tolerances and jitter. 418 * @clk_id: Clock identifier for the device for this request. 419 * 420 * NOTE: Normally clock frequency management is automatically done by TISCI 421 * entity. In case of specific requests, TISCI evaluates capability to achieve 422 * requested frequency within provided range and responds with 423 * result message. 424 * 425 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 426 * or NACK in case of inability to satisfy request. 427 */ 428 struct ti_sci_msg_req_query_clock_freq { 429 struct ti_sci_msg_hdr hdr; 430 uint32_t dev_id; 431 uint64_t min_freq_hz; 432 uint64_t target_freq_hz; 433 uint64_t max_freq_hz; 434 uint8_t clk_id; 435 } __packed; 436 437 /** 438 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 439 * @hdr: Generic Header 440 * @freq_hz: Frequency that is the best match in Hz. 441 * 442 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 443 * cannot be satisfied, the message will be of type NACK. 444 */ 445 struct ti_sci_msg_resp_query_clock_freq { 446 struct ti_sci_msg_hdr hdr; 447 uint64_t freq_hz; 448 } __packed; 449 450 /** 451 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 452 * @hdr: Generic Header 453 * @dev_id: Device identifier this request is for 454 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 455 * allowable programmed frequency and does not account for clock 456 * tolerances and jitter. 457 * @target_freq_hz: The target clock frequency. The clock will be programmed 458 * at a rate as close to this target frequency as possible. 459 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 460 * allowable programmed frequency and does not account for clock 461 * tolerances and jitter. 462 * @clk_id: Clock identifier for the device for this request. 463 * 464 * NOTE: Normally clock frequency management is automatically done by TISCI 465 * entity. In case of specific requests, TISCI evaluates capability to achieve 466 * requested range and responds with success/failure message. 467 * 468 * This sets the desired frequency for a clock within an allowable 469 * range. This message will fail on an enabled clock unless 470 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 471 * if other clocks have their frequency modified due to this message, 472 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 473 * 474 * Calling set frequency on a clock input to the SoC pseudo-device will 475 * inform the PMMC of that clock's frequency. Setting a frequency of 476 * zero will indicate the clock is disabled. 477 * 478 * Calling set frequency on clock outputs from the SoC pseudo-device will 479 * function similarly to setting the clock frequency on a device. 480 * 481 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 482 * message. 483 */ 484 struct ti_sci_msg_req_set_clock_freq { 485 struct ti_sci_msg_hdr hdr; 486 uint32_t dev_id; 487 uint64_t min_freq_hz; 488 uint64_t target_freq_hz; 489 uint64_t max_freq_hz; 490 uint8_t clk_id; 491 } __packed; 492 493 /** 494 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 495 * @hdr: Generic Header 496 * @dev_id: Device identifier this request is for 497 * @clk_id: Clock identifier for the device for this request. 498 * 499 * NOTE: Normally clock frequency management is automatically done by TISCI 500 * entity. In some cases, clock frequencies are configured by host. 501 * 502 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 503 * that the clock is currently at. 504 */ 505 struct ti_sci_msg_req_get_clock_freq { 506 struct ti_sci_msg_hdr hdr; 507 uint32_t dev_id; 508 uint8_t clk_id; 509 } __packed; 510 511 /** 512 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 513 * @hdr: Generic Header 514 * @freq_hz: Frequency that the clock is currently on, in Hz. 515 * 516 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 517 */ 518 struct ti_sci_msg_resp_get_clock_freq { 519 struct ti_sci_msg_hdr hdr; 520 uint64_t freq_hz; 521 } __packed; 522 523 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 524 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 525 #define TISCI_ADDR_HIGH_SHIFT 32 526 527 /** 528 * struct ti_sci_msg_req_proc_request - Request a processor 529 * 530 * @hdr: Generic Header 531 * @processor_id: ID of processor 532 * 533 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 534 * message. 535 */ 536 struct ti_sci_msg_req_proc_request { 537 struct ti_sci_msg_hdr hdr; 538 uint8_t processor_id; 539 } __packed; 540 541 /** 542 * struct ti_sci_msg_req_proc_release - Release a processor 543 * 544 * @hdr: Generic Header 545 * @processor_id: ID of processor 546 * 547 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 548 * message. 549 */ 550 struct ti_sci_msg_req_proc_release { 551 struct ti_sci_msg_hdr hdr; 552 uint8_t processor_id; 553 } __packed; 554 555 /** 556 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 557 * 558 * @hdr: Generic Header 559 * @processor_id: ID of processor 560 * @host_id: New Host we want to give control to 561 * 562 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 563 * message. 564 */ 565 struct ti_sci_msg_req_proc_handover { 566 struct ti_sci_msg_hdr hdr; 567 uint8_t processor_id; 568 uint8_t host_id; 569 } __packed; 570 571 /* A53 Config Flags */ 572 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 573 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 574 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 575 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 576 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 577 578 /* R5 Config Flags */ 579 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 580 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 581 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 582 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 583 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 584 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 585 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 586 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 587 588 /** 589 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 590 * @hdr: Generic Header 591 * @processor_id: ID of processor 592 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 593 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 594 * @config_flags_set: Optional Processor specific Config Flags to set. 595 * Setting a bit here implies required bit sets to 1. 596 * @config_flags_clear: Optional Processor specific Config Flags to clear. 597 * Setting a bit here implies required bit gets cleared. 598 * 599 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 600 * ACK/NACK message. 601 */ 602 struct ti_sci_msg_req_set_proc_boot_config { 603 struct ti_sci_msg_hdr hdr; 604 uint8_t processor_id; 605 uint32_t bootvector_low; 606 uint32_t bootvector_high; 607 uint32_t config_flags_set; 608 uint32_t config_flags_clear; 609 } __packed; 610 611 /* ARMV8 Control Flags */ 612 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 613 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 614 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 615 616 /* R5 Control Flags */ 617 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 618 619 /** 620 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 621 * @hdr: Generic Header 622 * @processor_id: ID of processor 623 * @config_flags_set: Optional Processor specific Config Flags to set. 624 * Setting a bit here implies required bit sets to 1. 625 * @config_flags_clear: Optional Processor specific Config Flags to clear. 626 * Setting a bit here implies required bit gets cleared. 627 * 628 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 629 * message. 630 */ 631 struct ti_sci_msg_req_set_proc_boot_ctrl { 632 struct ti_sci_msg_hdr hdr; 633 uint8_t processor_id; 634 uint32_t control_flags_set; 635 uint32_t control_flags_clear; 636 } __packed; 637 638 /** 639 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 640 * @hdr: Generic Header 641 * @processor_id: ID of processor 642 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 643 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 644 * 645 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 646 * ACK/NACK message. 647 */ 648 struct ti_sci_msg_req_proc_auth_boot_image { 649 struct ti_sci_msg_hdr hdr; 650 uint8_t processor_id; 651 uint32_t cert_addr_low; 652 uint32_t cert_addr_high; 653 } __packed; 654 655 /** 656 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 657 * @hdr: Generic Header 658 * @processor_id: ID of processor 659 * 660 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 661 * message, or NACK in case of inability to satisfy request. 662 */ 663 struct ti_sci_msg_req_get_proc_boot_status { 664 struct ti_sci_msg_hdr hdr; 665 uint8_t processor_id; 666 } __packed; 667 668 /* ARMv8 Status Flags */ 669 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 670 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 671 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 672 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 673 674 /* R5 Status Flags */ 675 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 676 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 677 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 678 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 679 680 /** 681 * \brief Processor Status Response 682 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 683 * @hdr: Generic Header 684 * @processor_id: ID of processor 685 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 686 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 687 * @config_flags: Optional Processor specific Config Flags set. 688 * @control_flags: Optional Processor specific Control Flags. 689 * @status_flags: Optional Processor specific Status Flags set. 690 * 691 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 692 */ 693 struct ti_sci_msg_resp_get_proc_boot_status { 694 struct ti_sci_msg_hdr hdr; 695 uint8_t processor_id; 696 uint32_t bootvector_low; 697 uint32_t bootvector_high; 698 uint32_t config_flags; 699 uint32_t control_flags; 700 uint32_t status_flags; 701 } __packed; 702 703 /** 704 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 705 * @hdr: Generic Header 706 * @processor_id: ID of processor 707 * @num_wait_iterations Total number of iterations we will check before 708 * we will timeout and give up 709 * @num_match_iterations How many iterations should we have continued 710 * status to account for status bits glitching. 711 * This is to make sure that match occurs for 712 * consecutive checks. This implies that the 713 * worst case should consider that the stable 714 * time should at the worst be num_wait_iterations 715 * num_match_iterations to prevent timeout. 716 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 717 * between each status checks. This is the minimum 718 * duration, and overhead of register reads and 719 * checks are on top of this and can vary based on 720 * varied conditions. 721 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 722 * before the very first check in the first 723 * iteration of status check loop. This is the 724 * minimum duration, and overhead of register 725 * reads and checks are. 726 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 727 * status matching this field requested MUST be 1. 728 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 729 * bits matching this field requested MUST be 1. 730 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 731 * status matching this field requested MUST be 0. 732 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 733 * bits matching this field requested MUST be 0. 734 * 735 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 736 * message, or NACK in case of inability to satisfy request. 737 */ 738 struct ti_sci_msg_req_wait_proc_boot_status { 739 struct ti_sci_msg_hdr hdr; 740 uint8_t processor_id; 741 uint8_t num_wait_iterations; 742 uint8_t num_match_iterations; 743 uint8_t delay_per_iteration_us; 744 uint8_t delay_before_iterations_us; 745 uint32_t status_flags_1_set_all_wait; 746 uint32_t status_flags_1_set_any_wait; 747 uint32_t status_flags_1_clr_all_wait; 748 uint32_t status_flags_1_clr_any_wait; 749 } __packed; 750 751 /** 752 * struct ti_sci_msg_req_enter_sleep - Request for TI_SCI_MSG_ENTER_SLEEP. 753 * 754 * @hdr Generic Header 755 * @mode Low power mode to enter. 756 * @proc_id Processor id to be restored. 757 * @core_resume_lo Low 32-bits of physical pointer to address for core 758 * to begin execution upon resume. 759 * @core_resume_hi High 32-bits of physical pointer to address for core 760 * to begin execution upon resume. 761 * 762 * This message is to be sent after TI_SCI_MSG_PREPARE_SLEEP is sent from OS 763 * and is what actually triggers entry into the specified low power mode. 764 */ 765 struct ti_sci_msg_req_enter_sleep { 766 struct ti_sci_msg_hdr hdr; 767 uint8_t mode; 768 uint8_t processor_id; 769 uint32_t core_resume_lo; 770 uint32_t core_resume_hi; 771 } __packed; 772 773 #endif /* TI_SCI_PROTOCOL_H */ 774
