1 /*
2 * Copyright (c) 2025 Måns Ansgariusson <mansgariusson@gmail.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #include <zephyr/kernel.h>
7 #include <zephyr/device.h>
8 #include <zephyr/sys/util.h>
9 #include <zephyr/drivers/i2c.h>
10 #include <zephyr/drivers/rtc.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/logging/log.h>
13
14 LOG_MODULE_REGISTER(rx8130ce, CONFIG_RTC_LOG_LEVEL);
15
16 #define DT_DRV_COMPAT epson_rx8130ce_rtc
17
18 enum registers {
19 TIME = 0x10,
20 ALARM = 0x17,
21 /* control registers */
22 EXTENSION = 0x1C,
23 FLAG = 0x1D,
24 CTRL0 = 0x1E,
25 CTRL1 = 0x1F,
26 OFFSET = 0x30,
27 };
28
29 #define RX8130CE_SECONDS_MASK GENMASK(6, 0)
30 #define RX8130CE_MINUTES_MASK GENMASK(6, 0)
31 #define RX8130CE_HOURS_MASK GENMASK(5, 0)
32 #define RX8130CE_DAYS_MASK GENMASK(5, 0)
33 #define RX8130CE_WEEKDAYS_MASK GENMASK(6, 0)
34 #define RX8130CE_MONTHS_MASK GENMASK(4, 0)
35 #define RX8130CE_YEARS_MASK GENMASK(7, 0)
36
37 #define RX8130CE_MONTHS_OFFSET (1)
38 #define RX8130CE_YEARS_OFFSET (100)
39
40 /* Alarm AE bit */
41 #define ALARM_DISABLE BIT(7)
42
43 /* Extension reg(0x1C) bit field */
44 #define EXT_TSEL0 BIT(0)
45 #define EXT_TSEL1 BIT(1)
46 #define EXT_TSEL2 BIT(2)
47 #define EXT_WADA BIT(3)
48 #define EXT_TE BIT(4)
49 #define EXT_USEL BIT(5)
50 #define EXT_FSEL0 BIT(6)
51 #define EXT_FSEL1 BIT(7)
52
53 /* Flag reg(0x1D) bit field */
54 #define FLAG_VBFF BIT(0)
55 #define FLAG_VLF BIT(1)
56 #define FLAG_RSF BIT(2)
57 #define FLAG_AF BIT(3)
58 #define FLAG_TF BIT(4)
59 #define FLAG_UF BIT(5)
60 #define FLAG_VBLF BIT(7)
61
62 /* Control0 reg(0x1E) bit field */
63 #define CTRL0_TBKE BIT(0)
64 #define CTRL0_TBKON BIT(1)
65 #define CTRL0_TSTP BIT(2)
66 #define CTRL0_AIE BIT(3)
67 #define CTRL0_TIE BIT(4)
68 #define CTRL0_UIE BIT(5)
69 #define CTRL0_STOP BIT(6)
70 #define CTRL0_TEST BIT(7)
71
72 /* ctrl1 reg(0x1F) bit field */
73 #define CTRL1_BFVSEL0 BIT(0)
74 #define CTRL1_BFVSEL1 BIT(1)
75 #define CTRL1_RSVSEL BIT(2)
76 #define CTRL1_INIEN BIT(4)
77 #define CTRL1_CHGEN BIT(5)
78 #define CTRL1_SMPTSEL0 BIT(6)
79 #define CTRL1_SMPTSEL1 BIT(7)
80
81
82 /* Digital Offest reg(0x30) bit field */
83 #define DIGITAL_OFFSET_NEG BIT(6)
84 #define DIGITAL_OFFSET_DTE BIT(7)
85
86 /* Digital Offset register values */
87 #define DIGITAL_OFFSET_MAX 192260
88 #define DIGITAL_OFFSET_MIN -195310
89 #define DIGITAL_OFFSET_STEP_PPB 3050
90
91 /**
92 * @brief rx8130ce control registers
93 * 0x1C extension register
94 * 0x1D Flag register
95 * 0x1E control0
96 * 0x1F ctrl1
97 */
98 struct __packed rx8130ce_registers {
99 uint8_t extension;
100 uint8_t flag;
101 uint8_t ctrl0;
102 uint8_t ctrl1;
103 };
104
105 struct __packed rx8130ce_time {
106 uint8_t second;
107 uint8_t minute;
108 uint8_t hour;
109 uint8_t weekday;
110 uint8_t day;
111 uint8_t month;
112 uint8_t year;
113 };
114
115 struct __packed rx8130ce_alarm {
116 uint8_t minute;
117 uint8_t hour;
118 union {
119 uint8_t wday;
120 uint8_t day;
121 };
122 };
123
124 struct rx8130ce_config {
125 const struct i2c_dt_spec i2c;
126 struct gpio_dt_spec irq;
127 uint16_t clockout_frequency;
128 uint8_t battery_switchover;
129 };
130
131 struct rx8130ce_data {
132 struct k_sem lock;
133 const struct device *dev;
134 struct rx8130ce_registers reg;
135
136 #if defined(CONFIG_RTC_ALARM) || defined(CONFIG_RTC_UPDATE)
137 struct gpio_callback irq_cb;
138 struct k_work irq_work;
139 #endif
140 #ifdef CONFIG_RTC_ALARM
141 void *alarm_user_data;
142 rtc_alarm_callback alarm_callback;
143 #endif /* CONFIG_RTC_ALARM */
144 #ifdef CONFIG_RTC_UPDATE
145 void *update_user_data;
146 rtc_update_callback update_callback;
147 #endif /* CONFIG_RTC_UPDATE */
148 };
149
wday2rtc(uint8_t wday)150 static inline uint8_t wday2rtc(uint8_t wday)
151 {
152 return 1 << wday;
153 }
154
rtc2wday(uint8_t rtc_wday)155 static inline uint8_t rtc2wday(uint8_t rtc_wday)
156 {
157 for (size_t bit = 0 ; bit < 7; bit++) {
158 if (rtc_wday & (1 << bit)) {
159 return bit;
160 }
161 }
162 return 0;
163 }
164
rx8130ce_get_time(const struct device * dev,struct rtc_time * timeptr)165 static int rx8130ce_get_time(const struct device *dev, struct rtc_time *timeptr)
166 {
167 int rc = 0;
168 struct rx8130ce_time rtc_time;
169 const struct rx8130ce_config *cfg = dev->config;
170 struct rx8130ce_data *data = dev->data;
171
172 memset(timeptr, 0U, sizeof(*timeptr));
173
174 k_sem_take(&data->lock, K_FOREVER);
175 rc = i2c_burst_read_dt(&cfg->i2c, TIME, (uint8_t *)&rtc_time, sizeof(rtc_time));
176 if (rc != 0) {
177 LOG_ERR("Failed to read time");
178 goto error;
179 }
180 timeptr->tm_sec = bcd2bin(rtc_time.second & RX8130CE_SECONDS_MASK);
181 timeptr->tm_min = bcd2bin(rtc_time.minute & RX8130CE_MINUTES_MASK);
182 timeptr->tm_hour = bcd2bin(rtc_time.hour & RX8130CE_HOURS_MASK);
183 timeptr->tm_mday = bcd2bin(rtc_time.day & RX8130CE_DAYS_MASK);
184 timeptr->tm_wday = rtc2wday(rtc_time.weekday & RX8130CE_WEEKDAYS_MASK);
185 timeptr->tm_mon = bcd2bin(rtc_time.month & RX8130CE_MONTHS_MASK) - RX8130CE_MONTHS_OFFSET;
186 timeptr->tm_year = bcd2bin(rtc_time.year & RX8130CE_YEARS_MASK) + RX8130CE_YEARS_OFFSET;
187 timeptr->tm_yday = -1;
188 timeptr->tm_isdst = -1;
189
190 error:
191 k_sem_give(&data->lock);
192 return rc;
193 }
194
rx8130ce_set_time(const struct device * dev,const struct rtc_time * timeptr)195 static int rx8130ce_set_time(const struct device *dev, const struct rtc_time *timeptr)
196 {
197 int rc = 0;
198 struct rx8130ce_time rtc_time;
199 const struct rx8130ce_config *cfg = dev->config;
200 struct rx8130ce_data *data = dev->data;
201
202 rtc_time.second = bin2bcd(timeptr->tm_sec);
203 rtc_time.minute = bin2bcd(timeptr->tm_min);
204 rtc_time.hour = bin2bcd(timeptr->tm_hour);
205 rtc_time.weekday = wday2rtc(timeptr->tm_wday);
206 rtc_time.day = bin2bcd(timeptr->tm_mday);
207 rtc_time.month = bin2bcd(timeptr->tm_mon + RX8130CE_MONTHS_OFFSET);
208 rtc_time.year = bin2bcd(timeptr->tm_year -
209 (timeptr->tm_year >= RX8130CE_YEARS_OFFSET ? RX8130CE_YEARS_OFFSET : 0));
210
211 k_sem_take(&data->lock, K_FOREVER);
212
213 rc = i2c_burst_write_dt(&cfg->i2c, TIME, (uint8_t *)&rtc_time, sizeof(rtc_time));
214 if (rc != 0) {
215 LOG_ERR("Failed to write time");
216 goto error;
217 }
218 LOG_DBG("set time: year = %d, mon = %d, mday = %d, hour = %d, min = %d, sec = %d",
219 timeptr->tm_year, timeptr->tm_mon, timeptr->tm_mday,
220 timeptr->tm_hour, timeptr->tm_min, timeptr->tm_sec);
221 error:
222 k_sem_give(&data->lock);
223 return rc;
224 }
225
226 #if defined(CONFIG_RTC_ALARM) || defined(CONFIG_RTC_UPDATE)
rx8130ce_irq_work_handler(struct k_work * work)227 static void rx8130ce_irq_work_handler(struct k_work *work)
228 {
229 int rc;
230 const struct device *dev = CONTAINER_OF(work, struct rx8130ce_data, irq_work)->dev;
231 struct rx8130ce_data *data = CONTAINER_OF(work, struct rx8130ce_data, irq_work);
232 const struct rx8130ce_config *cfg = data->dev->config;
233 #ifdef CONFIG_RTC_ALARM
234 rtc_alarm_callback alarm_callback = NULL;
235 void *alarm_user_data = NULL;
236 #endif /* CONFIG_RTC_ALARM */
237 #ifdef CONFIG_RTC_UPDATE
238 rtc_update_callback update_callback = NULL;
239 void *update_user_data = NULL;
240 #endif /* CONFIG_RTC_UPDATE */
241
242 k_sem_take(&data->lock, K_FOREVER);
243 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
244 if (rc != 0) {
245 LOG_ERR("Failed to read flag register");
246 goto exit;
247 }
248 #ifdef CONFIG_RTC_ALARM
249 if ((data->reg.flag & FLAG_AF) != 0) {
250 LOG_INF("Alarm triggered");
251 alarm_callback = data->alarm_callback;
252 alarm_user_data = data->alarm_user_data;
253 }
254 #endif /* CONFIG_RTC_ALARM */
255 #ifdef CONFIG_RTC_UPDATE
256 if ((data->reg.flag & FLAG_UF) != 0) {
257 LOG_INF("Update triggered");
258 update_callback = data->update_callback;
259 update_user_data = data->update_user_data;
260 }
261 #endif /* CONFIG_RTC_UPDATE */
262 /* Clear alarm flags */
263 data->reg.flag &= ~(FLAG_AF | FLAG_UF);
264 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
265 if (rc != 0) {
266 LOG_ERR("Failed to clear alarm flag");
267 goto exit;
268 }
269 exit:
270 k_sem_give(&data->lock);
271
272 #ifdef CONFIG_RTC_ALARM
273 if (alarm_callback) {
274 alarm_callback(dev, 0, alarm_user_data);
275 }
276 #endif /* CONFIG_RTC_ALARM */
277 #ifdef CONFIG_RTC_UPDATE
278 if (update_callback) {
279 update_callback(dev, update_user_data);
280 }
281 #endif /* CONFIG_RTC_UPDATE */
282 }
283
rx8130ce_irq(const struct device * dev,struct gpio_callback * cb,uint32_t pins)284 static void rx8130ce_irq(const struct device *dev, struct gpio_callback *cb, uint32_t pins)
285 {
286 struct rx8130ce_data *data = CONTAINER_OF(cb, struct rx8130ce_data, irq_cb);
287
288 LOG_DBG("IRQ-recv");
289 k_work_submit(&data->irq_work);
290 }
291 #endif /* CONFIG_RTC_ALARM || CONFIG_RTC_UPDATE */
292
293 #ifdef CONFIG_RTC_ALARM
294 #define RX8130CE_ALARM_MASK (RTC_ALARM_TIME_MASK_MINUTE | RTC_ALARM_TIME_MASK_HOUR | \
295 RTC_ALARM_TIME_MASK_MONTHDAY)
rx8130ce_alarm_get_supported_fields(const struct device * dev,uint16_t id,uint16_t * mask)296 static int rx8130ce_alarm_get_supported_fields(const struct device *dev, uint16_t id,
297 uint16_t *mask)
298 {
299 const struct rx8130ce_config *cfg = dev->config;
300
301 if (cfg->irq.port == NULL) {
302 LOG_ERR("IRQ not configured");
303 return -ENOTSUP;
304 }
305
306 if (id != 0U) {
307 LOG_ERR("invalid ID %d", id);
308 return -EINVAL;
309 }
310
311 *mask = RX8130CE_ALARM_MASK;
312 return 0;
313 }
314
rx8130ce_alarm_set_time(const struct device * dev,uint16_t id,uint16_t mask,const struct rtc_time * timeptr)315 static int rx8130ce_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask,
316 const struct rtc_time *timeptr)
317 {
318 int rc = 0;
319 bool alarm_enabled = false;
320 struct rx8130ce_alarm alarm_time;
321 struct rx8130ce_data *data = dev->data;
322 const struct rx8130ce_config *cfg = dev->config;
323
324 if (id != 0U) {
325 LOG_ERR("invalid ID %d", id);
326 return -EINVAL;
327 }
328
329 if ((mask & ~(RX8130CE_ALARM_MASK)) != 0U) {
330 LOG_ERR("unsupported alarm field mask 0x%04x", mask);
331 return -EINVAL;
332 }
333
334 k_sem_take(&data->lock, K_FOREVER);
335
336 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
337 if (rc != 0) {
338 LOG_ERR("Failed to read control registers");
339 goto error;
340 }
341 /* Prevent alarm interrupts inadvertently while entering settings/time */
342 if ((data->reg.ctrl0 & CTRL0_AIE) != 0) {
343 alarm_enabled = true;
344 data->reg.ctrl0 &= ~CTRL0_AIE;
345 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg,
346 sizeof(data->reg));
347 if (rc != 0) {
348 LOG_ERR("Failed to write time");
349 goto error;
350 }
351 }
352
353 /* Set alarm */
354 if (alarm_enabled) {
355 data->reg.ctrl0 |= CTRL0_AIE;
356 }
357
358 alarm_time.minute = bin2bcd(timeptr->tm_min);
359 alarm_time.hour = bin2bcd(timeptr->tm_hour);
360 alarm_time.day = bin2bcd(timeptr->tm_mday);
361 data->reg.extension |= EXT_WADA;
362
363 if ((mask & RTC_ALARM_TIME_MASK_MINUTE) == 0U) {
364 alarm_time.minute |= ALARM_DISABLE;
365 }
366 if ((mask & RTC_ALARM_TIME_MASK_HOUR) == 0U) {
367 alarm_time.hour |= ALARM_DISABLE;
368 }
369 if ((mask & RTC_ALARM_TIME_MASK_MONTHDAY) == 0U) {
370 alarm_time.day |= ALARM_DISABLE;
371 }
372
373 /* Write alarm time */
374 rc = i2c_burst_write_dt(&cfg->i2c, ALARM, (uint8_t *)&alarm_time, sizeof(alarm_time));
375 if (rc != 0) {
376 LOG_ERR("Failed to write alarm time");
377 goto error;
378 }
379
380 /* Enable alarm */
381 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
382 if (rc != 0) {
383 LOG_ERR("Failed to write control registers");
384 goto error;
385 }
386 error:
387 k_sem_give(&data->lock);
388 return rc;
389
390 }
391
rx8130ce_alarm_get_time(const struct device * dev,uint16_t id,uint16_t * mask,struct rtc_time * timeptr)392 static int rx8130ce_alarm_get_time(const struct device *dev, uint16_t id, uint16_t *mask,
393 struct rtc_time *timeptr)
394 {
395 int rc = 0;
396 struct rx8130ce_alarm alarm_time;
397 struct rx8130ce_data *data = dev->data;
398 const struct rx8130ce_config *cfg = dev->config;
399
400 if (id != 0U) {
401 LOG_ERR("invalid ID %d", id);
402 return -EINVAL;
403 }
404
405 k_sem_take(&data->lock, K_FOREVER);
406 *mask = 0U;
407 memset(timeptr, 0x00, sizeof(*timeptr));
408 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
409 if (rc != 0) {
410 LOG_ERR("Failed to read control registers");
411 goto error;
412 }
413
414 rc = i2c_burst_read_dt(&cfg->i2c, ALARM, (uint8_t *)&alarm_time, sizeof(alarm_time));
415 if (rc != 0) {
416 LOG_ERR("Failed to read alarm time");
417 goto error;
418 }
419
420 timeptr->tm_min = bcd2bin(alarm_time.minute & RX8130CE_MINUTES_MASK);
421 timeptr->tm_hour = bcd2bin(alarm_time.hour & RX8130CE_HOURS_MASK);
422 if (!(alarm_time.minute & ALARM_DISABLE)) {
423 *mask |= RTC_ALARM_TIME_MASK_MINUTE;
424 }
425 if (!(alarm_time.hour & ALARM_DISABLE)) {
426 *mask |= RTC_ALARM_TIME_MASK_HOUR;
427 }
428 if (data->reg.extension & EXT_WADA) {
429 timeptr->tm_mday = bcd2bin(alarm_time.day);
430 if (!(alarm_time.day & ALARM_DISABLE)) {
431 *mask |= RTC_ALARM_TIME_MASK_MONTHDAY;
432 }
433 } else {
434 timeptr->tm_wday = rtc2wday(alarm_time.wday);
435 if (!(alarm_time.wday & ALARM_DISABLE)) {
436 *mask |= RTC_ALARM_TIME_MASK_WEEKDAY;
437 }
438 }
439 error:
440 k_sem_give(&data->lock);
441 return rc;
442 }
443
rx8130ce_alarm_is_pending(const struct device * dev,uint16_t id)444 static int rx8130ce_alarm_is_pending(const struct device *dev, uint16_t id)
445 {
446 int rc = 0;
447 struct rx8130ce_data *data = dev->data;
448 const struct rx8130ce_config *cfg = dev->config;
449
450 if (id != 0U) {
451 LOG_ERR("invalid ID %d", id);
452 return -EINVAL;
453 }
454
455 k_sem_take(&data->lock, K_FOREVER);
456 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
457 if (rc != 0) {
458 LOG_ERR("Failed to read control registers");
459 goto error;
460 }
461
462 rc = (data->reg.ctrl0 & CTRL0_AIE) != 0;
463 error:
464 k_sem_give(&data->lock);
465 return rc;
466 }
467
rx8130ce_alarm_set_callback(const struct device * dev,uint16_t id,rtc_alarm_callback callback,void * user_data)468 static int rx8130ce_alarm_set_callback(const struct device *dev, uint16_t id,
469 rtc_alarm_callback callback, void *user_data)
470 {
471 int rc = 0;
472 struct rx8130ce_data *data = dev->data;
473 const struct rx8130ce_config *cfg = dev->config;
474
475 if (id != 0U) {
476 LOG_ERR("invalid ID %d", id);
477 return -EINVAL;
478 }
479 if (cfg->irq.port == NULL) {
480 LOG_ERR("IRQ not configured");
481 return -ENOTSUP;
482 }
483
484 k_sem_take(&data->lock, K_FOREVER);
485 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
486 if (rc != 0) {
487 LOG_ERR("Failed to read control registers");
488 goto exit;
489 }
490 if (callback == NULL) {
491 data->alarm_user_data = NULL;
492 data->alarm_callback = NULL;
493 data->reg.ctrl0 &= ~CTRL0_AIE;
494 #ifdef CONFIG_RTC_UPDATE
495 if (data->update_callback == NULL) {
496 #endif
497 rc = gpio_pin_interrupt_configure_dt(&cfg->irq, GPIO_INT_DISABLE);
498 if (rc != 0) {
499 LOG_ERR("Failed to disable interrupt");
500 goto exit;
501 }
502 #ifdef CONFIG_RTC_UPDATE
503 }
504 #endif
505 } else {
506 /* Enable alarm interrupt & clear Alarm flag */
507 data->reg.ctrl0 |= CTRL0_AIE;
508 data->reg.flag &= ~FLAG_AF;
509 data->alarm_callback = callback;
510 data->alarm_user_data = user_data;
511 rc = gpio_pin_interrupt_configure_dt(&cfg->irq, GPIO_INT_EDGE_TO_ACTIVE);
512 if (rc != 0) {
513 LOG_ERR("Failed to configure interrupt");
514 goto exit;
515 }
516 }
517 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
518 if (rc != 0) {
519 LOG_ERR("Failed to write control registers");
520 goto exit;
521 }
522 exit:
523 k_sem_give(&data->lock);
524 return rc;
525 }
526 #endif /* CONFIG_RTC_ALARM */
527
528 #ifdef CONFIG_RTC_UPDATE
rx8130ce_update_set_callback(const struct device * dev,rtc_update_callback callback,void * user_data)529 static int rx8130ce_update_set_callback(const struct device *dev, rtc_update_callback callback,
530 void *user_data)
531 {
532 int rc = 0;
533 const struct rx8130ce_config *cfg = dev->config;
534 struct rx8130ce_data *data = dev->data;
535
536 if (cfg->irq.port == NULL) {
537 LOG_ERR("IRQ not configured");
538 return -ENOTSUP;
539 }
540
541 k_sem_take(&data->lock, K_FOREVER);
542 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
543 if (rc != 0) {
544 LOG_ERR("Failed to read control registers");
545 goto exit;
546 }
547 if (callback == NULL) {
548 data->reg.ctrl0 &= ~CTRL0_UIE;
549 data->update_user_data = NULL;
550 data->update_callback = NULL;
551
552 #ifdef CONFIG_RTC_ALARM
553 if (data->alarm_callback == NULL) {
554 #endif
555 rc = gpio_pin_interrupt_configure_dt(&cfg->irq, GPIO_INT_DISABLE);
556 if (rc != 0) {
557 LOG_ERR("Failed to disable interrupt");
558 goto exit;
559 }
560 #ifdef CONFIG_RTC_ALARM
561 }
562 #endif
563 } else {
564 data->reg.ctrl0 |= CTRL0_UIE;
565 data->update_callback = callback;
566 data->update_user_data = user_data;
567 rc = gpio_pin_interrupt_configure_dt(&cfg->irq, GPIO_INT_EDGE_TO_ACTIVE);
568 if (rc != 0) {
569 LOG_ERR("Failed to configure interrupt");
570 goto exit;
571 }
572 }
573 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
574 if (rc != 0) {
575 LOG_ERR("Failed to write control registers");
576 goto exit;
577 }
578 exit:
579 k_sem_give(&data->lock);
580 return rc;
581
582 }
583 #endif /* CONFIG_RTC_UPDATE */
584
585 #ifdef CONFIG_RTC_CALIBRATION
rx8130ce_set_calibration(const struct device * dev,int32_t freq_ppb)586 static int rx8130ce_set_calibration(const struct device *dev, int32_t freq_ppb)
587 {
588 int rc;
589 const struct rx8130ce_config *cfg = dev->config;
590 struct rx8130ce_data *data = dev->data;
591 uint8_t offset = 0;
592
593 if (freq_ppb < DIGITAL_OFFSET_MIN || freq_ppb > DIGITAL_OFFSET_MAX) {
594 LOG_ERR("Invalid calibration value: %d", freq_ppb);
595 return -EINVAL;
596 }
597
598 k_sem_take(&data->lock, K_FOREVER);
599 /* Explanation see section 17 of the datasheet */
600 if (freq_ppb < 0) {
601 offset |= DIGITAL_OFFSET_DTE;
602 offset |= DIGITAL_OFFSET_NEG;
603 offset |= 128 - (-freq_ppb / DIGITAL_OFFSET_STEP_PPB);
604 } else if (freq_ppb > 0) {
605 offset |= DIGITAL_OFFSET_DTE;
606 offset |= freq_ppb / DIGITAL_OFFSET_STEP_PPB;
607 }
608 LOG_DBG("set calibration: offset = 0x%02x, from %d", offset, freq_ppb);
609
610 rc = i2c_burst_write_dt(&cfg->i2c, OFFSET, &offset, sizeof(offset));
611 if (rc != 0) {
612 LOG_ERR("Failed to write calibration value");
613 goto exit;
614 }
615 exit:
616 k_sem_give(&data->lock);
617 return rc;
618 }
619
rx8130ce_get_calibration(const struct device * dev,int32_t * freq_ppb)620 static int rx8130ce_get_calibration(const struct device *dev, int32_t *freq_ppb)
621 {
622 int rc;
623 const struct rx8130ce_config *cfg = dev->config;
624 struct rx8130ce_data *data = dev->data;
625 uint8_t offset;
626 *freq_ppb = 0;
627
628 k_sem_take(&data->lock, K_FOREVER);
629 rc = i2c_burst_read_dt(&cfg->i2c, OFFSET, &offset, sizeof(offset));
630 if (rc != 0) {
631 LOG_ERR("Failed to read calibration value");
632 goto exit;
633 }
634 /* Explanation see section 17 of the datasheet */
635 if (offset & DIGITAL_OFFSET_DTE) {
636 offset &= ~DIGITAL_OFFSET_DTE;
637 if (offset & DIGITAL_OFFSET_NEG) {
638 *freq_ppb = -((128 - offset) * DIGITAL_OFFSET_STEP_PPB);
639 } else {
640 *freq_ppb = offset * DIGITAL_OFFSET_STEP_PPB;
641 }
642 }
643 LOG_DBG("get calibration: offset = 0x%02x, freq_ppb = %d", offset, *freq_ppb);
644
645 exit:
646 k_sem_give(&data->lock);
647 return rc;
648 }
649 #endif /* CONFIG_RTC_CALIBRATION */
650
651
rx8130ce_init(const struct device * dev)652 static int rx8130ce_init(const struct device *dev)
653 {
654 int rc;
655 const struct rx8130ce_config *cfg = dev->config;
656 struct rx8130ce_data *data = dev->data;
657
658 data->dev = dev;
659 k_sem_init(&data->lock, 1, 1);
660 if (!i2c_is_ready_dt(&cfg->i2c)) {
661 LOG_ERR("I2C bus not ready");
662 return -ENODEV;
663 }
664
665 /* read all control registers */
666 rc = i2c_burst_read_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
667 if (rc != 0) {
668 LOG_ERR("Failed to read control registers");
669 return rc;
670 }
671 data->reg.flag = 0x00;
672 data->reg.extension &= ~EXT_TE;
673
674
675 switch (cfg->clockout_frequency) {
676 case 0: /* OFF */
677 data->reg.extension |= EXT_FSEL1 | EXT_FSEL0;
678 break;
679 case 1: /* 1 Hz */
680 data->reg.extension &= ~EXT_FSEL0;
681 data->reg.extension |= EXT_FSEL1;
682 break;
683 case 1024: /* 1.024 kHz */
684 data->reg.extension |= EXT_FSEL0;
685 data->reg.extension &= ~EXT_FSEL1;
686 break;
687 case 32768: /* 32.768 kHz */
688 data->reg.extension &= ~(EXT_FSEL1 | EXT_FSEL0);
689 break;
690 default:
691 LOG_ERR("Invalid clockout frequency option: %d", cfg->clockout_frequency);
692 return -EINVAL;
693 }
694
695 if (cfg->battery_switchover != 0) {
696 /* Enable initial voltage detection, following settings depend
697 * on if the CTRL1_INIEN has been set prior (lifetime)
698 */
699 data->reg.ctrl1 |= CTRL1_INIEN;
700 rc = i2c_burst_write_dt(&cfg->i2c, CTRL1,
701 (uint8_t *)&data->reg.ctrl1, sizeof(data->reg.ctrl1));
702 if (rc != 0) {
703 LOG_ERR("Failed to write ctrl1 register");
704 return rc;
705 }
706 }
707
708 switch (cfg->battery_switchover) {
709 case 1: /* Power switch on, non rechargeable battery */
710 data->reg.ctrl1 |= CTRL1_INIEN;
711 break;
712 case 2: /* Power switch on, rechargeable battery */
713 data->reg.ctrl1 &= ~(CTRL1_INIEN | CTRL1_CHGEN);
714 break;
715 case 3: /* Power switch on, rechargeable battery, i2c & Fout disabled if VDD < Vdet1 */
716 data->reg.ctrl1 |= CTRL1_CHGEN | CTRL1_INIEN;
717 break;
718 case 4: /* Power switch on, rechargeable battery, i2c & Fout always enabled */
719 data->reg.ctrl1 |= CTRL1_CHGEN;
720 data->reg.ctrl1 &= ~CTRL1_INIEN;
721 break;
722 }
723
724 #if defined(CONFIG_RTC_ALARM) || defined(CONFIG_RTC_UPDATE)
725 k_work_init(&data->irq_work, rx8130ce_irq_work_handler);
726 if (cfg->irq.port != NULL) {
727 gpio_pin_configure_dt(&cfg->irq, GPIO_INPUT);
728 gpio_init_callback(&data->irq_cb, rx8130ce_irq, BIT(cfg->irq.pin));
729 rc = gpio_add_callback_dt(&cfg->irq, &data->irq_cb);
730 if (rc != 0) {
731 LOG_ERR("Failed to add callback");
732 return rc;
733 }
734 }
735 #endif /* CONFIG_RTC_ALARM || CONFIG_RTC_UPDATE */
736 rc = i2c_burst_write_dt(&cfg->i2c, EXTENSION, (uint8_t *)&data->reg, sizeof(data->reg));
737 if (rc != 0) {
738 LOG_ERR("Failed to write control registers");
739 return rc;
740 }
741 return 0;
742 }
743 static DEVICE_API(rtc, rx8130ce_driver_api) = {
744 .set_time = rx8130ce_set_time,
745 .get_time = rx8130ce_get_time,
746 #ifdef CONFIG_RTC_ALARM
747 .alarm_get_supported_fields = rx8130ce_alarm_get_supported_fields,
748 .alarm_set_time = rx8130ce_alarm_set_time,
749 .alarm_get_time = rx8130ce_alarm_get_time,
750 .alarm_is_pending = rx8130ce_alarm_is_pending,
751 .alarm_set_callback = rx8130ce_alarm_set_callback,
752 #endif /* CONFIG_RTC_ALARM */
753 #ifdef CONFIG_RTC_UPDATE
754 .update_set_callback = rx8130ce_update_set_callback,
755 #endif /* CONFIG_RTC_UPDATE */
756 #ifdef CONFIG_RTC_CALIBRATION
757 .set_calibration = rx8130ce_set_calibration,
758 .get_calibration = rx8130ce_get_calibration,
759 #endif /* CONFIG_RTC_CALIBRATION */
760 };
761
762 #define RX8130CE_INIT(inst) \
763 static const struct rx8130ce_config rx8130ce_config_##inst = { \
764 .i2c = I2C_DT_SPEC_INST_GET(inst), \
765 .clockout_frequency = DT_INST_PROP_OR(inst, clockout_frequency, 0), \
766 .battery_switchover = DT_INST_PROP_OR(inst, battery_switchover, 0), \
767 .irq = GPIO_DT_SPEC_INST_GET_OR(inst, irq_gpios, {0}), \
768 }; \
769 \
770 static struct rx8130ce_data rx8130ce_data_##inst; \
771 \
772 DEVICE_DT_INST_DEFINE(inst, &rx8130ce_init, NULL, \
773 &rx8130ce_data_##inst, &rx8130ce_config_##inst, POST_KERNEL, \
774 CONFIG_RTC_INIT_PRIORITY, &rx8130ce_driver_api);
775
776 DT_INST_FOREACH_STATUS_OKAY(RX8130CE_INIT)
777
