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Searched defs:TIM4_AF1_ETRSEL_0 (Results 1 – 25 of 27) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h7878 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32g0c1xx.h9412 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32g0b1xx.h9108 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h32819 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153axx_ca7.h34370 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151fxx_cm4.h32982 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151axx_ca7.h32819 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151axx_cm4.h32785 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151dxx_cm4.h32785 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151cxx_ca7.h33016 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151cxx_cm4.h32982 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp151fxx_ca7.h33016 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153axx_cm4.h34336 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153cxx_ca7.h34567 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153cxx_cm4.h34533 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153dxx_ca7.h34370 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153dxx_cm4.h34336 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153fxx_ca7.h34567 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp153fxx_cm4.h34533 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157axx_ca7.h35593 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157axx_cm4.h35559 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157cxx_ca7.h35790 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157cxx_cm4.h35756 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157dxx_ca7.h35593 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32mp157dxx_cm4.h35559 #define TIM4_AF1_ETRSEL_0 (0x1UL << TIM4_AF1_ETRSEL_Pos) /*!< 0x00004000 */ macro

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