1 /**
2   ******************************************************************************
3   * @file    stm32l0xx_hal_tim_ex.h
4   * @author  MCD Application Team
5   * @brief   Header file of TIM HAL Extended module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L0xx_HAL_TIM_EX_H
21 #define STM32L0xx_HAL_TIM_EX_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l0xx_hal_def.h"
29 
30 /** @addtogroup STM32L0xx_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup TIMEx
35   * @{
36   */
37 
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
40   * @{
41   */
42 
43 /**
44   * @}
45   */
46 /* End of exported types -----------------------------------------------------*/
47 
48 /* Exported constants --------------------------------------------------------*/
49 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
50   * @{
51   */
52 
53 /** @defgroup TIMEx_Remap TIM Extended Remapping
54   * @{
55   */
56 #define TIM2_ETR_GPIO                     0x00000000U                               /*!< TIM2 ETR input is connected to ORed GPIOs */
57 #if defined(RCC_HSI48_SUPPORT)
58 #define TIM2_ETR_HSI48                    TIM2_OR_ETR_RMP_2                         /*!< TIM2 ETR input is connected to HSI48 clock */
59 #endif /* RCC_HSI48_SUPPORT */
60 #define TIM2_ETR_HSI16                    (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0)   /*!< TIM2 ETR input is connected to HSI16 clock */
61 #define TIM2_ETR_LSE                      (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)   /*!< TIM2 ETR input is connected to LSE clock */
62 #if defined(COMP1) && defined(COMP2)
63 #define TIM2_ETR_COMP2_OUT                (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)   /*!< TIM2 ETR input is connected to COMP2_OUT */
64 #define TIM2_ETR_COMP1_OUT                TIM2_OR_ETR_RMP                           /*!< TIM2 ETR input is connected to COMP1_OUT */
65 #endif /* COMP1 && COMP2 */
66 
67 #define TIM2_TI4_GPIO                     0x00000000U                               /*!< TIM2 TI4 input connected to ORed GPIOs */
68 #if defined(COMP1) && defined(COMP2)
69 #define TIM2_TI4_COMP2                    TIM2_OR_TI4_RMP_0                         /*!< TIM2 TI4 input connected to COMP2_OUT */
70 #define TIM2_TI4_COMP1                    TIM2_OR_TI4_RMP_1                         /*!< TIM2 TI4 input connected to COMP1_OUT */
71 #endif /* COMP1 && COMP2 */
72 
73 #if defined(TIM3)
74 #if defined(USB)
75 #define TIM3_TI4_USB_NOE                  0x00000000U                               /*!< USB_NOE selected selected for PC9 (AF2) remapping */
76 #endif /* USB */
77 
78 #define TIM3_TI4_GPIOC9_AF2               TIM3_OR_TI4_RMP                           /*!< TIM3_CH4 selected for PC9 (AF2) remapping */
79 #define TIM3_TI2_GPIO_DEF                 0x00000000U                               /*!< TIM3_CH2 selected for PB5 (AF4) remapping */
80 #define TIM3_TI2_GPIOB5_AF4               TIM3_OR_TI2_RMP                           /*!< TIM22_CH2 selected for PB5 (AF4) remapping */
81 
82 #if defined(USB)
83 #define TIM3_TI1_USB_SOF                  0x00000000U                               /*!< TIM3 TI1 input connected to USB_SOF */
84 #endif /* USB */
85 
86 #define TIM3_TI1_GPIO                     TIM3_OR_TI1_RMP                           /*!< TIM3 TI1 input connected to ORed GPIOs */
87 #define TIM3_ETR_GPIO                     0x00000000U                               /*!< TIM3 ETR input connected to ORed GPIOs */
88 #define TIM3_ETR_HSI                      TIM3_OR_ETR_RMP_1                         /*!< TIM3_ETR input is connected to HSI48 clock */
89 #endif /* TIM3 */
90 
91 #define TIM21_ETR_GPIO                    0x00000000U                               /*!< TIM21 ETR input connected to ORed GPIOs */
92 #if defined(COMP1) && defined(COMP2)
93 #define TIM21_ETR_COMP2_OUT               TIM21_OR_ETR_RMP_0                        /*!< TIM21 ETR input connected to COMP2_OUT */
94 #define TIM21_ETR_COMP1_OUT               TIM21_OR_ETR_RMP_1                        /*!< TIM21 ETR input connected to COMP1_OUT */
95 #endif /* COMP1 && COMP2 */
96 #define TIM21_ETR_LSE                     TIM21_OR_ETR_RMP                          /*!< TIM21 ETR input connected to LSE clock */
97 
98 #define TIM21_TI1_GPIO                    0x00000000U                               /*!< TIM21 TI1 input connected to ORed GPIOs */
99 #define TIM21_TI1_MCO                     TIM21_OR_TI1_RMP                          /*!< TIM21 TI1 input connected to MCO clock */
100 #define TIM21_TI1_RTC_WKUT_IT             TIM21_OR_TI1_RMP_0                        /*!< TIM21 TI1 input connected to RTC WAKEUP interrupt */
101 #define TIM21_TI1_HSE_RTC                 TIM21_OR_TI1_RMP_1                        /*!< TIM21 TI1 input connected to HSE_RTC clock */
102 #define TIM21_TI1_MSI                     (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1) /*!< TIM21 TI1 input connected to MSI clock */
103 #define TIM21_TI1_LSE                     TIM21_OR_TI1_RMP_2                        /*!< TIM21 TI1 input connected to LSE clock */
104 #define TIM21_TI1_LSI                     (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0) /*!< TIM21 TI1 input connected to LSI clock */
105 #if defined(COMP1)
106 #define TIM21_TI1_COMP1_OUT               (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1) /*!< TIM21 TI1 input connected to COMP1_OUT */
107 #endif /* COMP1 */
108 
109 #define TIM21_TI2_GPIO                    0x00000000U                               /*!< TIM21 TI2 input connected to ORed GPIOs */
110 #if defined(COMP2)
111 #define TIM21_TI2_COMP2_OUT               TIM21_OR_TI2_RMP                          /*!< TIM21 TI2 input connected to COMP2_OUT */
112 #endif /* COMP2 */
113 
114 #if defined(TIM22)
115 #define TIM22_ETR_GPIO                    0x00000000U                               /*!< TIM22 ETR input is connected to ORed GPIOs */
116 #if defined(COMP1) && defined(COMP2)
117 #define TIM22_ETR_COMP2_OUT               TIM22_OR_ETR_RMP_0                        /*!< TIM22 ETR input is connected to COMP2_OUT */
118 #define TIM22_ETR_COMP1_OUT               TIM22_OR_ETR_RMP_1                        /*!< TIM22 ETR input is connected to COMP1_OUT */
119 #endif /* COMP1 && COMP2 */
120 #define TIM22_ETR_LSE                     TIM22_OR_ETR_RMP                          /*!< TIM22 ETR input is connected to LSE clock */
121 
122 #define TIM22_TI1_GPIO                   0x00000000U                                /*!< TIM22 TI1 input is connected to ORed GPIOs */
123 #if defined(COMP1) && defined(COMP2)
124 #define TIM22_TI1_COMP2_OUT               TIM22_OR_TI1_RMP_0                        /*!< TIM22 TI1 input is connected to COMP2_OUT */
125 #define TIM22_TI1_COMP1_OUT               TIM22_OR_TI1_RMP_1                        /*!< TIM22 TI1 input is connected to COMP1_OUT */
126 #endif /* COMP1 && COMP2 */
127 #endif /* TIM22 */
128 /**
129   * @}
130   */
131 
132 /**
133   * @}
134   */
135 /* End of exported constants -------------------------------------------------*/
136 
137 /* Exported macro ------------------------------------------------------------*/
138 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
139   * @{
140   */
141 
142 /**
143   * @}
144   */
145 /* End of exported macro -----------------------------------------------------*/
146 
147 /* Private macro -------------------------------------------------------------*/
148 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
149   * @{
150   */
151 #if defined(TIM3) && defined(TIM22)
152 
153 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
154   ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
155    (((__INSTANCE__) == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
156    (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \
157    (((__INSTANCE__) == TIM3)   &&  ((__TIM_REMAP__) <=  (TIM3_OR_ETR_RMP  | TIM3_OR_TI1_RMP  | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP))))
158 
159 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
160   ((((__INSTANCE__) == TIM2)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   ||   \
161                                    ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
162                                    ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
163                                    ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
164    (((__INSTANCE__) == TIM3) &&   (((__CHANNEL__) == TIM_CHANNEL_1)   ||   \
165                                    ((__CHANNEL__) == TIM_CHANNEL_2)   ||   \
166                                    ((__CHANNEL__) == TIM_CHANNEL_3)   ||   \
167                                    ((__CHANNEL__) == TIM_CHANNEL_4))) ||   \
168    (((__INSTANCE__) == TIM21) &&  (((__CHANNEL__) == TIM_CHANNEL_1)   ||   \
169                                    ((__CHANNEL__) == TIM_CHANNEL_2))) ||   \
170    (((__INSTANCE__) == TIM22) &&  (((__CHANNEL__) == TIM_CHANNEL_1)   ||   \
171                                    ((__CHANNEL__) == TIM_CHANNEL_2))))
172 
173 #elif defined(TIM22)
174 
175 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
176   ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
177    (((__INSTANCE__) == TIM22)  &&  ((__TIM_REMAP__) <=  (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
178    (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
179 
180 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
181   ((((__INSTANCE__) == TIM2)  &&   (((__CHANNEL__) == TIM_CHANNEL_1)   || \
182                                     ((__CHANNEL__) == TIM_CHANNEL_2)   || \
183                                     ((__CHANNEL__) == TIM_CHANNEL_3)   || \
184                                     ((__CHANNEL__) == TIM_CHANNEL_4))) || \
185    (((__INSTANCE__) == TIM21)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
186                                     ((__CHANNEL__) == TIM_CHANNEL_2))) || \
187    (((__INSTANCE__) == TIM22)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
188                                     ((__CHANNEL__) == TIM_CHANNEL_2))))
189 #else
190 
191 #define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__)               \
192   ((((__INSTANCE__) == TIM2)   &&  ((__TIM_REMAP__) <=  (TIM2_OR_TI4_RMP  | TIM2_OR_ETR_RMP))) || \
193    (((__INSTANCE__) == TIM21)  &&  ((__TIM_REMAP__) <=  (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
194 
195 #define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__)     \
196   ((((__INSTANCE__) == TIM2)  &&   (((__CHANNEL__) == TIM_CHANNEL_1)   || \
197                                     ((__CHANNEL__) == TIM_CHANNEL_2)   || \
198                                     ((__CHANNEL__) == TIM_CHANNEL_3)   || \
199                                     ((__CHANNEL__) == TIM_CHANNEL_4))) || \
200    (((__INSTANCE__) == TIM21)  &&  (((__CHANNEL__) == TIM_CHANNEL_1)   || \
201                                     ((__CHANNEL__) == TIM_CHANNEL_2))))
202 #endif /* TIM3 && TIM22 */
203 
204 /**
205   * @}
206   */
207 /* End of private macro ------------------------------------------------------*/
208 
209 /* Exported functions --------------------------------------------------------*/
210 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
211   * @{
212   */
213 
214 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
215   *  @brief    Peripheral Control functions
216   * @{
217   */
218 /* Extended Control functions  ************************************************/
219 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
220                                                         const TIM_MasterConfigTypeDef *sMasterConfig);
221 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
222 /**
223   * @}
224   */
225 
226 /**
227   * @}
228   */
229 /* End of exported functions -------------------------------------------------*/
230 
231 /**
232   * @}
233   */
234 
235 /**
236   * @}
237   */
238 
239 #ifdef __cplusplus
240 }
241 #endif
242 
243 
244 #endif /* STM32L0xx_HAL_TIM_EX_H */
245