1 /*
2  * Copyright (c) 2013-2018 Arm Limited
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "Driver_Flash.h"
18 #include "low_level_ospi_flash.h"
19 #include <string.h>
20 #include "stm32hal.h"
21 #include "flash_layout.h"
22 #include "board_ospi.h"
23 #include <stdio.h>
24 
25 
26 #ifndef ARG_UNUSED
27 #define ARG_UNUSED(arg)  ((void)arg)
28 #endif /* ARG_UNUSED */
29 
30 /* config for flash driver */
31 #define OSPI_FLASH0_TOTAL_SIZE   OSPI_FLASH_TOTAL_SIZE
32 #define OSPI_FLASH0_SECTOR_SIZE  MX25LM51245G_SUBSECTOR_4K /* Must be same as internal flash sector size */
33 #define OSPI_FLASH0_PAGE_SIZE    MX25LM51245G_PAGE_SIZE
34 #define OSPI_FLASH0_PROG_UNIT    0x2 /* 2 bytes for OSPI DTR mode */
35 #define OSPI_FLASH0_ERASED_VAL   0xff
36 
37 /*
38 #define DEBUG_OSPI_FLASH_ACCESS
39 */
40 /* Driver version */
41 #define ARM_OSPI_FLASH_DRV_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0)
42 
43 static const ARM_DRIVER_VERSION DriverVersion =
44 {
45   ARM_FLASH_API_VERSION,  /* Defined in the CMSIS Flash Driver header file */
46   ARM_OSPI_FLASH_DRV_VERSION
47 };
48 
49 /**
50   * \brief Flash driver capability macro definitions \ref ARM_FLASH_CAPABILITIES
51   */
52 /* Flash Ready event generation capability values */
53 #define EVENT_READY_NOT_AVAILABLE   (0u)
54 #define EVENT_READY_AVAILABLE       (1u)
55 /* Data access size values */
56 #define DATA_WIDTH_8BIT             (0u)
57 #define DATA_WIDTH_16BIT            (1u)
58 #define DATA_WIDTH_32BIT            (2u)
59 /* Chip erase capability values */
60 #define CHIP_ERASE_NOT_SUPPORTED    (0u)
61 #define CHIP_ERASE_SUPPORTED        (1u)
62 
63 /* Driver Capabilities */
64 static const ARM_FLASH_CAPABILITIES DriverCapabilities =
65 {
66   EVENT_READY_NOT_AVAILABLE,
67   DATA_WIDTH_16BIT, /* 16bits for DTR mode */
68   CHIP_ERASE_SUPPORTED
69 };
70 
71 static const uint32_t data_width_byte[] = {
72     sizeof(uint8_t),
73     sizeof(uint16_t),
74     sizeof(uint32_t),
75 };
76 /**
77   * \brief Flash status macro definitions \ref ARM_FLASH_STATUS
78   */
79 /* Busy status values of the Flash driver  */
80 #define DRIVER_STATUS_IDLE      (0u)
81 #define DRIVER_STATUS_BUSY      (1u)
82 /* Error status values of the Flash driver */
83 #define DRIVER_STATUS_NO_ERROR  (0u)
84 #define DRIVER_STATUS_ERROR     (1u)
85 
86 /**
87   * \brief Arm Flash device structure.
88   */
89 struct arm_ospi_flash_dev_t
90 {
91   struct low_level_ospi_device *dev;
92   ARM_FLASH_INFO *data;       /*!< OSPI FLASH memory device data */
93 };
94 /**
95   * @}
96   */
97 
98 /**
99   * \brief      Check if the Flash memory boundaries are not violated.
100   * \param[in]  flash_dev  Flash device structure \ref arm_ospi_flash_dev_t
101   * \param[in]  offset     Highest Flash memory address which would be accessed.
102   * \return     Returns true if Flash memory boundaries are not violated, false
103   *             otherwise.
104   */
105 
is_range_valid(struct arm_ospi_flash_dev_t * flash_dev,uint32_t offset)106 static bool is_range_valid(struct arm_ospi_flash_dev_t *flash_dev,
107                            uint32_t offset)
108 {
109   uint32_t flash_limit = 0;
110 
111   /* Calculating the highest address of the Flash memory address range */
112   flash_limit = OSPI_FLASH_TOTAL_SIZE - 1;
113 
114   return (offset > flash_limit) ? (false) : (true) ;
115 }
116 /**
117   * \brief        Check if the parameter is an erasable page.
118   * \param[in]    flash_dev  Flash device structure \ref arm_ospi_flash_dev_t
119   * \param[in]    param      Any number that can be checked against the
120   *                          program_unit, e.g. Flash memory address or
121   *                          data length in bytes.
122   * \return       Returns true if param is a sector eraseable, false
123   *               otherwise.
124   */
is_erase_allow(struct arm_ospi_flash_dev_t * flash_dev,uint32_t param)125 static bool is_erase_allow(struct arm_ospi_flash_dev_t *flash_dev,
126                            uint32_t param)
127 {
128   /*  allow erase in range provided by device info */
129   struct ospi_flash_vect *vect = &flash_dev->dev->erase;
130   uint32_t nb;
131   for (nb = 0; nb < vect->nb; nb++)
132     if ((param >= vect->range[nb].base) && (param <= vect->range[nb].limit))
133     {
134       return true;
135     }
136   return false;
137 }
138 /**
139   * \brief        Check if the parameter is writeable area.
140   * \param[in]    flash_dev  Flash device structure \ref arm_ospi_flash_dev_t
141   * \param[in]    param      Any number that can be checked against the
142   *                          program_unit, e.g. Flash memory address or
143   *                          data length in bytes.
144   * \return       Returns true if param is aligned to program_unit, false
145   *               otherwise.
146   */
147 
is_write_allow(struct arm_ospi_flash_dev_t * flash_dev,uint32_t start,uint32_t len)148 static bool is_write_allow(struct arm_ospi_flash_dev_t *flash_dev,
149                            uint32_t start, uint32_t len)
150 {
151   /*  allow write access in area provided by device info */
152   struct ospi_flash_vect *vect = &flash_dev->dev->write;
153   uint32_t nb;
154   for (nb = 0; nb < vect->nb; nb++)
155     if ((start >= vect->range[nb].base) && ((start + len - 1) <= vect->range[nb].limit))
156     {
157       return true;
158     }
159   return false;
160 }
161 
162 /**
163   * \brief        Check if the parameter is aligned to program_unit.
164   * \param[in]    flash_dev  Flash device structure \ref arm_ospi_flash_dev_t
165   * \param[in]    param      Any number that can be checked against the
166   *                          program_unit, e.g. Flash memory address or
167   *                          data length in bytes.
168   * \return       Returns true if param is aligned to program_unit, false
169   *               otherwise.
170   */
171 
is_write_aligned(struct arm_ospi_flash_dev_t * flash_dev,uint32_t param)172 static bool is_write_aligned(struct arm_ospi_flash_dev_t *flash_dev,
173                              uint32_t param)
174 {
175   return ((param % flash_dev->data->program_unit) != 0) ? (false) : (true);
176 }
177 /**
178   * \brief        Check if the parameter is aligned to page_unit.
179   * \param[in]    flash_dev  Flash device structure \ref arm_ospi_flash_dev_t
180   * \param[in]    param      Any number that can be checked against the
181   *                          program_unit, e.g. Flash memory address or
182   *                          data length in bytes.
183   * \return       Returns true if param is aligned to sector_unit, false
184   *               otherwise.
185   */
is_erase_aligned(struct arm_ospi_flash_dev_t * flash_dev,uint32_t param)186 static bool is_erase_aligned(struct arm_ospi_flash_dev_t *flash_dev,
187                              uint32_t param)
188 {
189   return ((param % (flash_dev->data->sector_size)) != 0) ? (false) : (true);
190 }
191 
192 
193 static ARM_FLASH_INFO ARM_OSPI_FLASH0_DEV_DATA =
194 {
195   .sector_info    = NULL,     /* Uniform sector layout */
196   .sector_count   = OSPI_FLASH0_TOTAL_SIZE / OSPI_FLASH0_SECTOR_SIZE,
197   .sector_size    = OSPI_FLASH0_SECTOR_SIZE,
198   .page_size      = OSPI_FLASH0_PAGE_SIZE,
199   .program_unit   = OSPI_FLASH0_PROG_UNIT, /* Minimum write size in bytes */
200   .erased_value   = OSPI_FLASH0_ERASED_VAL
201 };
202 
203 static struct arm_ospi_flash_dev_t ARM_OSPI_FLASH0_DEV =
204 {
205   .dev    = &(OSPI_FLASH0_DEV),
206   .data   = &(ARM_OSPI_FLASH0_DEV_DATA)
207 };
208 
209 /* Flash Status */
210 static ARM_FLASH_STATUS ARM_OSPI_FLASH0_STATUS = {0, 0, 0};
211 
Ospi_Flash_GetVersion(void)212 static ARM_DRIVER_VERSION Ospi_Flash_GetVersion(void)
213 {
214   return DriverVersion;
215 }
216 
Ospi_Flash_GetCapabilities(void)217 static ARM_FLASH_CAPABILITIES Ospi_Flash_GetCapabilities(void)
218 {
219   return DriverCapabilities;
220 }
221 
Ospi_Flash_Initialize(ARM_Flash_SignalEvent_t cb_event)222 static int32_t Ospi_Flash_Initialize(ARM_Flash_SignalEvent_t cb_event)
223 {
224   ARG_UNUSED(cb_event);
225   BSP_OSPI_NOR_Init_t flash;
226 
227   /* OSPI device configuration:
228      OPI mode, DTR rate: instruction, address and data on eight lines with
229      sampling on both edges of clock.
230    */
231   flash.InterfaceMode = BSP_OSPI_NOR_OPI_MODE;
232   flash.TransferRate  = BSP_OSPI_NOR_DTR_TRANSFER;
233   if (BSP_OSPI_NOR_Init(0, &flash) != BSP_ERROR_NONE)
234   {
235     return ARM_DRIVER_ERROR_SPECIFIC;
236   }
237   else
238   {
239     return ARM_DRIVER_OK;
240   }
241 }
242 
Ospi_Flash_Uninitialize(void)243 static int32_t Ospi_Flash_Uninitialize(void)
244 {
245   if (BSP_OSPI_NOR_DeInit(0) != BSP_ERROR_NONE)
246   {
247     return ARM_DRIVER_ERROR_SPECIFIC;
248   }
249   else
250   {
251     return ARM_DRIVER_OK;
252   }
253 }
254 
Ospi_Flash_PowerControl(ARM_POWER_STATE state)255 static int32_t Ospi_Flash_PowerControl(ARM_POWER_STATE state)
256 {
257   switch (state)
258   {
259     case ARM_POWER_FULL:
260       /* Nothing to be done */
261       return ARM_DRIVER_OK;
262     case ARM_POWER_OFF:
263     case ARM_POWER_LOW:
264       return ARM_DRIVER_ERROR_UNSUPPORTED;
265     default:
266       return ARM_DRIVER_ERROR_PARAMETER;
267   }
268 }
269 
Ospi_Flash_ReadData(uint32_t addr,void * data,uint32_t cnt)270 static int32_t Ospi_Flash_ReadData(uint32_t addr, void *data, uint32_t cnt)
271 {
272   int32_t err = BSP_ERROR_NONE;
273   uint8_t data_tmp[2];
274   /* Conversion between data items and bytes */
275   cnt *= data_width_byte[DriverCapabilities.data_width];
276   ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_NO_ERROR;
277 
278 #ifdef DEBUG_OSPI_FLASH_ACCESS
279   printf("read ospi 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
280 #endif /*  DEBUG_OSPI_FLASH_ACCESS */
281 
282   /* Check Flash memory boundaries */
283   if (!is_range_valid(&ARM_OSPI_FLASH0_DEV, addr + cnt - 1))
284   {
285 #ifdef DEBUG_OSPI_FLASH_ACCESS
286     printf("read ospi not allowed 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
287 #endif
288     ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_ERROR;
289     return ARM_DRIVER_ERROR_PARAMETER;
290   }
291 
292   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
293 
294   /* ensure previous operation is finished (erase/write) : GetStatus()
295      such verification is done (inside BSP driver) at the begining of erase or write operation  but
296      not for read operation ==> in order to maximise BSP driver execution timing efficency */
297   while (BSP_OSPI_NOR_GetStatus(0) !=  BSP_ERROR_NONE)
298   {
299   }
300 
301   /* OSPI DTR mode constraint: split read request to ensure read at
302    * even address with even number of bytes.
303    * Flash address to read is the offset from begin of external flash.
304    */
305   if (addr % 2)
306   {
307     err = BSP_OSPI_NOR_Read(0, (uint8_t *)data_tmp, addr - 1, 2);
308     *(uint8_t*)data = data_tmp[1];
309 
310     if (cnt > 1)
311     {
312       if (cnt % 2)
313       {
314         if (err == BSP_ERROR_NONE)
315         {
316           err = BSP_OSPI_NOR_Read(0, (uint8_t *)data + 1, (addr + 1), cnt - 1);
317         }
318       }
319       else
320       {
321         if (err == BSP_ERROR_NONE)
322         {
323           err = BSP_OSPI_NOR_Read(0, (uint8_t *)data + 1, (addr + 1), cnt - 2);
324         }
325 
326         if (err == BSP_ERROR_NONE)
327         {
328           err = BSP_OSPI_NOR_Read(0, (uint8_t *)data_tmp, addr + cnt - 1, 2);
329           *((uint8_t*)data + cnt - 1) = data_tmp[0];
330         }
331       }
332     }
333   }
334   else
335   {
336     if (cnt % 2)
337     {
338       if (cnt > 1)
339       {
340         err = BSP_OSPI_NOR_Read(0, (uint8_t *)data, addr, cnt - 1);
341       }
342 
343       if (err == BSP_ERROR_NONE)
344       {
345         err = BSP_OSPI_NOR_Read(0, (uint8_t *)data_tmp, addr + cnt - 1, 2);
346         *((uint8_t*)data + cnt -1) = data_tmp[0];
347       }
348     }
349     else
350     {
351       err = BSP_OSPI_NOR_Read(0, (uint8_t *)data, addr, cnt);
352     }
353   }
354 
355   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_IDLE;
356 
357   if (err != BSP_ERROR_NONE)
358   {
359 #ifdef DEBUG_OSPI_FLASH_ACCESS
360     printf("failed read ospi 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
361 #endif /* DEBUG_OSPI_FLASH_ACCESS */
362     return ARM_DRIVER_ERROR;
363   }
364 
365   return ARM_DRIVER_OK;
366 }
367 
Ospi_Flash_ProgramData(uint32_t addr,const void * data,uint32_t cnt)368 static int32_t Ospi_Flash_ProgramData(uint32_t addr,
369                                       const void *data, uint32_t cnt)
370 {
371   int32_t err;
372 
373   ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_NO_ERROR;
374   /* Conversion between data items and bytes */
375   cnt *= data_width_byte[DriverCapabilities.data_width];
376 #ifdef DEBUG_OSPI_FLASH_ACCESS
377   printf("write ospi 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
378 #endif /* DEBUG_OSPI_FLASH_ACCESS */
379   /* Check Flash memory boundaries and alignment with minimum write size
380    * (program_unit), data size also needs to be a multiple of program_unit.
381    */
382   if ((!is_range_valid(&ARM_OSPI_FLASH0_DEV, addr + cnt - 1)) ||
383       (!is_write_aligned(&ARM_OSPI_FLASH0_DEV, addr))     ||
384       (!is_write_aligned(&ARM_OSPI_FLASH0_DEV, cnt))      ||
385       (!is_write_allow(&ARM_OSPI_FLASH0_DEV, addr, cnt))
386      )
387   {
388 #ifdef DEBUG_OSPI_FLASH_ACCESS
389     printf("write ospi not allowed 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
390 #endif
391     ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_ERROR;
392     return ARM_DRIVER_ERROR_PARAMETER;
393   }
394 
395   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
396 
397   /* ospi flash address to write is the offset from begin of external flash */
398   err = BSP_OSPI_NOR_Write(0, (uint8_t *) data, addr, cnt);
399 
400   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_IDLE;
401 
402   if (err != BSP_ERROR_NONE)
403   {
404 #ifdef DEBUG_OSPI_FLASH_ACCESS
405     printf("failed write ospi 0x%x n=%x \r\n", (addr + OSPI_FLASH_BASE_ADDRESS), cnt);
406 #endif /* DEBUG_OSPI_FLASH_ACCESS */
407     return ARM_DRIVER_ERROR;
408   }
409   return ARM_DRIVER_OK;
410 }
411 
Ospi_Flash_EraseSector(uint32_t addr)412 static int32_t Ospi_Flash_EraseSector(uint32_t addr)
413 {
414   int32_t err;
415 
416   ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_NO_ERROR;
417 
418 #ifdef DEBUG_OSPI_FLASH_ACCESS
419   printf("erase ospi 0x%x\r\n", (addr + OSPI_FLASH_BASE_ADDRESS));
420 #endif /* DEBUG_OSPI_FLASH_ACCESS */
421   if (!(is_range_valid(&ARM_OSPI_FLASH0_DEV, addr)) ||
422       !(is_erase_aligned(&ARM_OSPI_FLASH0_DEV, addr)) ||
423       !(is_erase_allow(&ARM_OSPI_FLASH0_DEV, addr)))
424   {
425 #ifdef DEBUG_OSPI_FLASH_ACCESS
426     printf("erase ospi not allowed 0x%x\r\n", (addr + OSPI_FLASH_BASE_ADDRESS));
427 #endif
428     ARM_OSPI_FLASH0_STATUS.error = DRIVER_STATUS_ERROR;
429     return ARM_DRIVER_ERROR_PARAMETER;
430   }
431 
432   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
433 
434   if (ARM_OSPI_FLASH0_DEV.data->sector_size == MX25LM51245G_SUBSECTOR_4K)
435   {
436     err = BSP_OSPI_NOR_Erase_Block(0, addr, MX25LM51245G_ERASE_4K);
437   }
438   else if (ARM_OSPI_FLASH0_DEV.data->sector_size == MX25LM51245G_SECTOR_64K)
439   {
440     err = BSP_OSPI_NOR_Erase_Block(0, addr, MX25LM51245G_ERASE_64K);
441   }
442   else
443   {
444     err = BSP_ERROR_WRONG_PARAM;
445   }
446 
447   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_IDLE;
448 
449   if (err != BSP_ERROR_NONE)
450   {
451 #ifdef DEBUG_OSPI_FLASH_ACCESS
452     printf("erase ospi failed 0x%x\r\n", (addr + OSPI_FLASH_BASE_ADDRESS));
453 #endif
454     return ARM_DRIVER_ERROR;
455   }
456   return ARM_DRIVER_OK;
457 }
458 
Ospi_Flash_EraseChip(void)459 static int32_t Ospi_Flash_EraseChip(void)
460 {
461   return ARM_DRIVER_ERROR_UNSUPPORTED;
462 }
463 
Ospi_Flash_GetStatus(void)464 static ARM_FLASH_STATUS Ospi_Flash_GetStatus(void)
465 {
466   return ARM_OSPI_FLASH0_STATUS;
467 }
468 
Ospi_Flash_GetInfo(void)469 static ARM_FLASH_INFO *Ospi_Flash_GetInfo(void)
470 {
471   return ARM_OSPI_FLASH0_DEV.data;
472 }
473 
474 ARM_DRIVER_FLASH TFM_Driver_OSPI_FLASH0 =
475 {
476   Ospi_Flash_GetVersion,
477   Ospi_Flash_GetCapabilities,
478   Ospi_Flash_Initialize,
479   Ospi_Flash_Uninitialize,
480   Ospi_Flash_PowerControl,
481   Ospi_Flash_ReadData,
482   Ospi_Flash_ProgramData,
483   Ospi_Flash_EraseSector,
484   Ospi_Flash_EraseChip,
485   Ospi_Flash_GetStatus,
486   Ospi_Flash_GetInfo
487 };
488 
489 /**
490   * @brief This function configures the ospi flash in execution mode.
491   * @note
492   * @retval execution_status
493   */
Ospi_Flash_Config_Exe(void)494 int32_t Ospi_Flash_Config_Exe(void)
495 {
496   int32_t err;
497 
498 #ifdef DEBUG_OSPI_FLASH_ACCESS
499   printf("memory mapped ospi\r\n");
500 #endif /*  DEBUG_OSPI_FLASH_ACCESS */
501 
502   ARM_OSPI_FLASH0_STATUS.busy = DRIVER_STATUS_BUSY;
503 
504   /* ensure previous operation is finished (erase/write) : GetStatus()
505      such verification is done (inside BSP driver) at the begining of erase or write operation  but
506      not for read operation ==> in order to maximise BSP driver execution timing efficency */
507   while (BSP_OSPI_NOR_GetStatus(0) !=  BSP_ERROR_NONE)
508   {
509   }
510 
511   /* Enable memory map mode */
512   err = BSP_OSPI_NOR_EnableMemoryMappedMode(0);
513 
514   if (err != BSP_ERROR_NONE)
515   {
516 #ifdef DEBUG_OSPI_FLASH_ACCESS
517     printf("failed memory mapped ospi\r\n");
518 #endif /* DEBUG_OSPI_FLASH_ACCESS */
519     return ARM_DRIVER_ERROR;
520   }
521 
522   return ARM_DRIVER_OK;
523 }
524