/hal_nxp-3.5.0/s32/mcux/devices/S32K344/ |
D | S32K344_device.h | 2445 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003C, array step: 0x100… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/ |
D | MIMX8QM6_ca53.h | 18571 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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D | MIMX8QM6_cm4_core0.h | 13648 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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D | MIMX8QM6_cm4_core1.h | 13648 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/ |
D | MIMX9352_cm33.h | 17880 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003C, array step: 0x100… member
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D | MIMX9352_ca55.h | 15821 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/ |
D | MIMX8ML8_ca53.h | 17809 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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D | MIMX8ML8_dsp.h | 17383 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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D | MIMX8ML8_cm7.h | 17782 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/ |
D | MIMX8DX2_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/ |
D | MIMX8DX1_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/ |
D | MIMX8QX2_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/ |
D | MIMX8ML6_cm7.h | 17782 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/ |
D | MIMX8ML4_cm7.h | 17782 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/ |
D | MIMX8QX1_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/ |
D | MIMX8ML3_cm7.h | 17782 …__IO uint16_t TCD_CSR; /**< TCD Control and Status, array offset: 0x1003… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/ |
D | MIMX8QX4_cm4.h | 40632 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/ |
D | MIMX8QX5_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/ |
D | MIMX8UX6_cm4.h | 40635 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/ |
D | MIMX8QX6_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/ |
D | MIMX8UX5_cm4.h | 40635 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/ |
D | MIMX8DX5_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/ |
D | MIMX8DX6_cm4.h | 40634 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/ |
D | MIMX8DX4_cm4.h | 40632 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/ |
D | MIMX8DX3_cm4.h | 40632 …__IO uint16_t TCD_CSR; /**< TCD Control and Status Register, array offse… member
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