1 /*
2 * Copyright 2021-2022 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 /**
7 * @file Stm_Ip.c
8 *
9 * @addtogroup stm_ip Stm IPL
10 *
11 * @{
12 */
13
14 #ifdef __cplusplus
15 extern "C"{
16 #endif
17
18 /*==================================================================================================
19 * INCLUDE FILES
20 * 1) system and project includes
21 * 2) needed interfaces from external units
22 * 3) internal and external interfaces from this unit
23 ==================================================================================================*/
24 #include "Stm_Ip.h"
25
26 #if (STD_ON == STM_IP_ENABLE_USER_MODE_SUPPORT)
27 #define USER_MODE_REG_PROT_ENABLED (STM_IP_ENABLE_USER_MODE_SUPPORT)
28 #include "RegLockMacros.h"
29 #endif
30 /*==================================================================================================
31 * SOURCE FILE VERSION INFORMATION
32 ==================================================================================================*/
33
34 #define STM_IP_VENDOR_ID_C 43
35 #define STM_IP_AR_RELEASE_MAJOR_VERSION_C 4
36 #define STM_IP_AR_RELEASE_MINOR_VERSION_C 7
37 #define STM_IP_AR_RELEASE_REVISION_VERSION_C 0
38 #define STM_IP_SW_MAJOR_VERSION_C 0
39 #define STM_IP_SW_MINOR_VERSION_C 9
40 #define STM_IP_SW_PATCH_VERSION_C 0
41
42 /*==================================================================================================
43 * FILE VERSION CHECKS
44 ==================================================================================================*/
45 #if (STD_ON == STM_IP_ENABLE_USER_MODE_SUPPORT)
46 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
47 #if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != STM_IP_AR_RELEASE_MAJOR_VERSION_C) || \
48 (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != STM_IP_AR_RELEASE_MINOR_VERSION_C))
49 #error "AutoSar Version Numbers of RegLockMacros.h and Stm_Ip.c are different"
50 #endif
51 #endif
52 #endif
53
54 #if (STM_IP_VENDOR_ID != STM_IP_VENDOR_ID_C)
55 #error "Stm_Ip.h and Stm_Ip.c have different vendor ids"
56 #endif
57 /* Check if header file and Gpt header file are of the same Autosar version */
58 #if ((STM_IP_AR_RELEASE_MAJOR_VERSION != STM_IP_AR_RELEASE_MAJOR_VERSION_C) || \
59 (STM_IP_AR_RELEASE_MINOR_VERSION != STM_IP_AR_RELEASE_MINOR_VERSION_C) || \
60 (STM_IP_AR_RELEASE_REVISION_VERSION != STM_IP_AR_RELEASE_REVISION_VERSION_C) \
61 )
62 #error "AutoSar Version Numbers of Stm_Ip.h and Stm_Ip.c are different"
63 #endif
64 /* Check if source file and GPT header file are of the same Software version */
65 #if ((STM_IP_SW_MAJOR_VERSION != STM_IP_SW_MAJOR_VERSION_C) || \
66 (STM_IP_SW_MINOR_VERSION != STM_IP_SW_MINOR_VERSION_C) || \
67 (STM_IP_SW_PATCH_VERSION != STM_IP_SW_PATCH_VERSION_C) \
68 )
69 #error "Software Version Numbers of Stm_Ip.h and Stm_Ip.c are different"
70 #endif
71 /*==================================================================================================
72 * LOCAL DEFINIES
73 ==================================================================================================*/
74
75 /*==================================================================================================
76 * LOCAL MACROS
77 ==================================================================================================*/
78
79 /*==================================================================================================
80 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
81 ==================================================================================================*/
82
83 /*==================================================================================================
84 * LOCAL CONSTANTS
85 ==================================================================================================*/
86
87 /*==================================================================================================
88 * LOCAL VARIABLES
89 ==================================================================================================*/
90
91 /*==================================================================================================
92 * GLOBAL CONSTANTS
93 ==================================================================================================*/
94
95 /*==================================================================================================
96 * GLOBAL VARIABLES
97 ==================================================================================================*/
98 #if (STM_IP_USED == STD_ON)
99
100 #define GPT_START_SEC_VAR_CLEARED_32
101 #include "Gpt_MemMap.h"
102 /** @brief Global array variable used to store the runtime target time value. */
103 uint32 Stm_Ip_u32TargetValue[STM_INSTANCE_COUNT][STM_CHANNEL_COUNT];
104 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
105 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
106 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
107 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
108 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
109 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
110 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
111 uint32 Stm_Ip_u32NextTargetValue[STM_INSTANCE_COUNT][STM_CHANNEL_COUNT];
112 #endif
113 #define GPT_STOP_SEC_VAR_CLEARED_32
114 #include "Gpt_MemMap.h"
115
116 #define GPT_START_SEC_CONST_UNSPECIFIED
117 #include "Gpt_MemMap.h"
118 /** @brief Table of base addresses for STM instances. */
119 STM_Type * const stmBase[STM_INSTANCE_COUNT] = IP_STM_BASE_PTRS;
120 #define GPT_STOP_SEC_CONST_UNSPECIFIED
121 #include "Gpt_MemMap.h"
122
123 #define GPT_START_SEC_VAR_INIT_UNSPECIFIED
124 #include "Gpt_MemMap.h"
125 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
126 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
127 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
128 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
129 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
130 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
131 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
132 /** @brief Global array variable used to channel state for process common interrupt */
133 static Stm_Ip_ChState Stm_Ip_u32ChState[STM_INSTANCE_COUNT][STM_CHANNEL_COUNT] = {
134 {
135 {
136 (boolean)FALSE,
137 NULL_PTR,
138 0U,
139 STM_IP_CH_MODE_CONTINUOUS
140 }
141 }
142 };
143 #endif
144 #if (STM_IP_SET_CLOCK_MODE == STD_ON)
145 static Stm_Ip_InstanceState Stm_Ip_u32InstanceState[STM_INSTANCE_COUNT] = {
146 {
147 0U,
148 0U
149 }
150 };
151 #endif
152 #define GPT_STOP_SEC_VAR_INIT_UNSPECIFIED
153 #include "Gpt_MemMap.h"
154 /*==================================================================================================
155 * LOCAL FUNCTION PROTOTYPES
156 ==================================================================================================*/
157 #define GPT_START_SEC_CODE
158 #include "Gpt_MemMap.h"
159
160 static inline void Stm_Ip_SetDebugMode(uint8 instance, boolean stopRun);
161 static inline void Stm_Ip_TimerEnable(uint8 instance, boolean enable);
162 static inline uint32 Stm_Ip_GetTimerEnableBit(uint8 instance);
163 static inline void Stm_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue);
164 static inline void Stm_Ip_ChannelEnable(uint8 instance, uint8 channel, boolean enable);
165 static inline void Stm_Ip_ClearInterruptFlag(uint8 instance, uint8 channel);
166 static inline void Stm_Ip_SetCmpValue(uint8 instance, uint8 channel, uint32 compareValue);
167 static inline uint32 Stm_Ip_GetCmpValue(uint8 instance, uint8 channel);
168 static inline void Stm_Ip_SetCntValue(uint8 instance, uint32 counterValue);
169 static inline uint32 Stm_Ip_GetCntValue(uint8 instance);
170
171
172 #if (STM_IP_MODULE_SINGLE_INTERRUPT == STD_ON)
173 #ifdef STM_0_ISR_USED
174 ISR(STM_0_ISR);
175 #endif
176 #ifdef STM_1_ISR_USED
177 ISR(STM_1_ISR);
178 #endif
179 #ifdef STM_2_ISR_USED
180 ISR(STM_2_ISR);
181 #endif
182 #ifdef STM_3_ISR_USED
183 ISR(STM_3_ISR);
184 #endif
185 #ifdef STM_4_ISR_USED
186 ISR(STM_4_ISR);
187 #endif
188 #ifdef STM_5_ISR_USED
189 ISR(STM_5_ISR);
190 #endif
191 #ifdef STM_6_ISR_USED
192 ISR(STM_6_ISR);
193 #endif
194 #ifdef STM_7_ISR_USED
195 ISR(STM_7_ISR);
196 #endif
197 #ifdef STM_8_ISR_USED
198 ISR(STM_8_ISR);
199 #endif
200 #ifdef STM_9_ISR_USED
201 ISR(STM_9_ISR);
202 #endif
203 #ifdef STM_10_ISR_USED
204 ISR(STM_10_ISR);
205 #endif
206 #ifdef STM_11_ISR_USED
207 ISR(STM_11_ISR);
208 #endif
209 #ifdef STM_12_ISR_USED
210 ISR(STM_12_ISR);
211 #endif
212 #ifdef SMU_STM_0_ISR_USED
213 ISR(SMU_STM_0_ISR);
214 #endif
215 #ifdef SMU_STM_2_ISR_USED
216 ISR(SMU_STM_2_ISR);
217 #endif
218 #ifdef CE_STM_0_ISR_USED
219 ISR(CE_STM_0_ISR);
220 #endif
221 #ifdef CE_STM_1_ISR_USED
222 ISR(CE_STM_1_ISR);
223 #endif
224 #ifdef CE_STM_2_ISR_USED
225 ISR(CE_STM_2_ISR);
226 #endif
227 #ifdef RTU0_STM_0_ISR_USED
228 ISR(RTU0_STM_0_ISR);
229 #endif
230 #ifdef RTU0_STM_1_ISR_USED
231 ISR(RTU0_STM_1_ISR);
232 #endif
233 #ifdef RTU0_STM_2_ISR_USED
234 ISR(RTU0_STM_2_ISR);
235 #endif
236 #ifdef RTU0_STM_3_ISR_USED
237 ISR(RTU0_STM_3_ISR);
238 #endif
239 #ifdef RTU1_STM_0_ISR_USED
240 ISR(RTU1_STM_0_ISR);
241 #endif
242 #ifdef RTU1_STM_1_ISR_USED
243 ISR(RTU1_STM_1_ISR);
244 #endif
245 #ifdef RTU1_STM_2_ISR_USED
246 ISR(RTU1_STM_2_ISR);
247 #endif
248 #ifdef RTU1_STM_3_ISR_USED
249 ISR(RTU1_STM_3_ISR);
250 #endif
251
252 #endif /* STM_IP_MODULE_SINGLE_INTERRUPT == STD_ON */
253 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
254 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
255 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
256 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
257 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
258 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
259 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
260 static inline void Stm_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel);
261 static inline uint32 Stm_Ip_GetInterruptBit(uint8 instance, uint8 channel);
262 #endif
263
264 #if (STD_ON == STM_IP_ENABLE_USER_MODE_SUPPORT)
265 void Stm_Ip_SetUserAccessAllowed(uint32 StmBaseAddr);
266 #endif
267
268
269 #if (defined(MCAL_STM_REG_PROT_AVAILABLE) && (STD_ON == STM_IP_ENABLE_USER_MODE_SUPPORT))
270
271 #define Call_Stm_Ip_SetUserAccessAllowed(StmBaseAddr) OsIf_Trusted_Call1param(Stm_Ip_SetUserAccessAllowed,(StmBaseAddr))
272
273 #else
274
275 #define Call_Stm_Ip_SetUserAccessAllowed(StmBaseAddr)
276 #endif
277
278
279 #if (defined(MCAL_STM_REG_PROT_AVAILABLE) && (STD_ON == STM_IP_ENABLE_USER_MODE_SUPPORT))
280 /**
281 * @brief Enables STM registers writing in User Mode by configuring REG_PROT
282 * @details Sets the UAA (User Access Allowed) bit of the STM IP allowing STM registers writing in User Mode
283 *
284 * @param[in] none
285 *
286 * @return none
287 *
288 * @pre Should be executed in supervisor mode
289 * @post none
290 */
Stm_Ip_SetUserAccessAllowed(uint32 StmBaseAddr)291 void Stm_Ip_SetUserAccessAllowed (uint32 StmBaseAddr)
292 {
293 SET_USER_ACCESS_ALLOWED(StmBaseAddr, STM_PROT_MEM_U32);
294 }
295 #endif /* STM_IP_ENABLE_USER_MODE_SUPPORT */
296
297 /*==================================================================================================
298 * LOCAL FUNCTIONS
299 ==================================================================================================*/
300 /*================================================================================================*/
301 /**
302 * @brief
303 * Function Name : Stm_Ip_GetInterruptFlag
304 * Description : Gets interrupt request flag:
305 *
306 * @param[in] instance STM hw instance number
307 * @param[in] channel STM hw channel number
308 *
309 * @return flag flag bit value 0/1
310 *
311 */
Stm_Ip_GetInterruptFlag(uint8 instance,uint8 channel)312 uint32 Stm_Ip_GetInterruptFlag(uint8 instance, uint8 channel)
313 {
314 uint32 flag = 0U;
315 flag = stmBase[instance]->CHANNEL[channel].CIR;
316 return flag;
317 }
318
Stm_Ip_SetDebugMode(uint8 instance,boolean stopRun)319 static inline void Stm_Ip_SetDebugMode(uint8 instance, boolean stopRun)
320 {
321 SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_29();
322 /* Enable DebugMode */
323 if (TRUE == stopRun)
324 {
325 stmBase[instance]->CR |= STM_CR_FRZ_MASK;
326 }
327 else
328 {
329 stmBase[instance]->CR &= ~STM_CR_FRZ_MASK;
330 }
331 SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_29();
332 }
333
Stm_Ip_TimerEnable(uint8 instance,boolean enable)334 static inline void Stm_Ip_TimerEnable(uint8 instance, boolean enable)
335 {
336 SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_30();
337 /* Enable TEN */
338 if (TRUE == enable)
339 {
340 stmBase[instance]->CR |= STM_CR_TEN_MASK;
341 }
342 else
343 {
344 stmBase[instance]->CR &= ~STM_CR_TEN_MASK;
345 }
346 SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_30();
347 }
348
Stm_Ip_GetTimerEnableBit(uint8 instance)349 static inline uint32 Stm_Ip_GetTimerEnableBit(uint8 instance)
350 {
351 uint32 flag = 0;
352 /* Get TimerEnableBit value*/
353 flag = (stmBase[instance]->CR & STM_CR_TEN_MASK) >> STM_CR_TEN_SHIFT;
354
355 return flag;
356 }
357
Stm_Ip_SetPrescaler(uint8 instance,uint8 prescalerValue)358 static inline void Stm_Ip_SetPrescaler(uint8 instance, uint8 prescalerValue)
359 {
360 /* SetPrescaler value*/
361 stmBase[instance]->CR = (stmBase[instance]->CR & (~STM_CR_CPS_MASK)) | STM_CR_CPS(prescalerValue);
362
363 }
364
Stm_Ip_ChannelEnable(uint8 instance,uint8 channel,boolean enable)365 static inline void Stm_Ip_ChannelEnable(uint8 instance, uint8 channel, boolean enable)
366 {
367 SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_31();
368 /* Enable ChannelEnable */
369 if (TRUE == enable)
370 {
371 stmBase[instance]->CHANNEL[channel].CCR |= STM_CCR_CEN_MASK;
372 }
373 else
374 {
375 stmBase[instance]->CHANNEL[channel].CCR &= ~STM_CCR_CEN_MASK;
376 }
377 SchM_Exit_Gpt_GPT_EXCLUSIVE_AREA_31();
378 }
379
Stm_Ip_ClearInterruptFlag(uint8 instance,uint8 channel)380 static inline void Stm_Ip_ClearInterruptFlag(uint8 instance, uint8 channel)
381 {
382 /* Clear InterruptFlag */
383 stmBase[instance]->CHANNEL[channel].CIR = STM_CIR_CIF_MASK;
384 }
385
386 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
387 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
388 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
389 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
390 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
391 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
392 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
Stm_Ip_GetInterruptBit(uint8 instance,uint8 channel)393 static inline uint32 Stm_Ip_GetInterruptBit(uint8 instance, uint8 channel)
394 {
395 uint32 flag = 0U;
396 /* Get InterruptBit CCR*/
397 flag = stmBase[instance]->CHANNEL[channel].CCR;
398 return flag;
399 }
400 #endif
401
Stm_Ip_SetCmpValue(uint8 instance,uint8 channel,uint32 compareValue)402 static inline void Stm_Ip_SetCmpValue(uint8 instance, uint8 channel, uint32 compareValue)
403 {
404 /* Set compareValue */
405 stmBase[instance]->CHANNEL[channel].CMP = compareValue;
406 }
407
Stm_Ip_GetCmpValue(uint8 instance,uint8 channel)408 static inline uint32 Stm_Ip_GetCmpValue(uint8 instance, uint8 channel)
409 {
410 uint32 currentCmpValue;
411 /* Get compareValue */
412 currentCmpValue = stmBase[instance]->CHANNEL[channel].CMP;
413 return currentCmpValue;
414 }
415
Stm_Ip_SetCntValue(uint8 instance,uint32 counterValue)416 static inline void Stm_Ip_SetCntValue(uint8 instance, uint32 counterValue)
417 {
418 /* Set counterValue */
419 stmBase[instance]->CNT = counterValue;
420 }
421
Stm_Ip_GetCntValue(uint8 instance)422 static inline uint32 Stm_Ip_GetCntValue(uint8 instance)
423 {
424 uint32 currentCntValue;
425 /* Get counterValue */
426 currentCntValue = stmBase[instance]->CNT;
427 return currentCntValue;
428 }
429
430 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
431 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
432 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
433 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
434 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
435 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
436 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
437 /**
438 * @brief Driver routine to process all the interrupts of STM.
439 * @details Support function used by interrupt service routines to implement STM specific operations
440 * and call the upper layer handler to implement non-hardware specific operations.
441 *
442 * @param[in] instance STM hw instance number
443 * @param[in] channel STM hw channel number
444 *
445 * @implements Stm_Ip_ProcessCommonInterrupt_Activity
446 */
Stm_Ip_ProcessCommonInterrupt(uint8 instance,uint8 channel)447 static inline void Stm_Ip_ProcessCommonInterrupt(uint8 instance, uint8 channel)
448 {
449 uint32 oldCmpValue = 0U;
450 uint32 targetValue = 0U;
451
452 #if(STM_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
453 if(0x0U != Stm_Ip_u32NextTargetValue[instance][channel])
454 {
455 Stm_Ip_u32TargetValue[instance][channel] = Stm_Ip_u32NextTargetValue[instance][channel];
456 Stm_Ip_u32NextTargetValue[instance][channel] = 0x0U;
457 }
458 #endif
459 /* Check if channel mode is ONE-SHOT */
460 if((STM_IP_CH_MODE_ONESHOT == Stm_Ip_u32ChState[instance][channel].channelMode))
461 {
462 Stm_Ip_DisableChannel(instance, channel);
463 }
464 else
465 {
466 /*Get current CMP value*/
467 oldCmpValue = Stm_Ip_GetCmpValue(instance, channel);
468 /*Get current target value*/
469 targetValue = Stm_Ip_u32TargetValue[instance][channel];
470 /*Set new CMP value*/
471 Stm_Ip_SetCmpValue(instance, channel, (oldCmpValue + targetValue));
472 }
473
474 /* Call upper layer handler */
475 if((TRUE == Stm_Ip_u32ChState[instance][channel].chInit) && \
476 (NULL_PTR != Stm_Ip_u32ChState[instance][channel].callback))
477 {
478 Stm_Ip_u32ChState[instance][channel].callback(Stm_Ip_u32ChState[instance][channel].callbackParam);
479 }
480 }
481 #endif
482
483 /*==================================================================================================
484 * GLOBAL FUNCTIONS
485 ==================================================================================================*/
486 /*================================================================================================*/
487 /**
488 * @brief Function Name : Stm_Ip_Init
489 * @details Initializes the STM instance. This functions is called for each STM hw Instance and:
490 * - sets the counter value
491 * - configures the freeze mode
492 * - sets the prescaler value
493 * - enables the STM counter
494 *
495 * @param[in] instance STM hw instance number
496 * @param[in] configPtr Pointer to a selected configuration structure
497 * @return void
498 * @pre The data structure including the configuration set required for initializing the GPT driver
499 * @implements Stm_Ip_Init_Activity
500 */
Stm_Ip_Init(uint8 instance,const Stm_Ip_InstanceConfigType * configPtr)501 void Stm_Ip_Init(uint8 instance, const Stm_Ip_InstanceConfigType *configPtr)
502 {
503 #if STM_IP_DEV_ERROR_DETECT == STD_ON
504 DevAssert(STM_INSTANCE_COUNT > instance);
505 DevAssert(NULL_PTR != configPtr);
506 #endif
507 /* Enable register access from user mode, if enabled from configuration file */
508 Call_Stm_Ip_SetUserAccessAllowed((uint32)stmBase[instance]);
509 Stm_Ip_SetCntValue(instance, 0U);
510 Stm_Ip_SetDebugMode(instance, configPtr->stopInDebugMode);
511 Stm_Ip_SetPrescaler(instance, configPtr->clockPrescaler);
512 Stm_Ip_TimerEnable(instance, TRUE);
513 #if (STM_IP_SET_CLOCK_MODE == STD_ON)
514 Stm_Ip_u32InstanceState[instance].clockPrescaler = configPtr->clockPrescaler;
515 Stm_Ip_u32InstanceState[instance].clockAlternatePrescaler = configPtr->clockAlternatePrescaler;
516 #endif
517 }
518
519 /*================================================================================================*/
520 /**
521 * @brief Function Name : Stm_Ip_InitChannel
522 * @details Initializes the STM channels. This functions is called for each STM hw channel and:
523 * - disables hw channel
524 * - clears interrupt clear
525 * - sets compare value to 0
526 * - initializes the state sructure for common process interrupt
527 *
528 * @param[in] instance STM hw instance number
529 * @param[in] configPtr Pointer to a selected configuration structure
530 * @return void
531 * @pre The data structure including the configuration set required for initializing the GPT driver
532 * @implements Stm_Ip_InitChannel_Activity
533 */
Stm_Ip_InitChannel(uint8 instance,const Stm_Ip_ChannelConfigType * configPtr)534 void Stm_Ip_InitChannel(uint8 instance, const Stm_Ip_ChannelConfigType *configPtr)
535 {
536 #if STM_IP_DEV_ERROR_DETECT == STD_ON
537 DevAssert(NULL_PTR != configPtr);
538 DevAssert(STM_INSTANCE_COUNT > instance);
539 DevAssert(STM_CHANNEL_COUNT > configPtr->hwChannel);
540 #endif
541
542 /*Disable hw channel */
543 Stm_Ip_ChannelEnable(instance, configPtr->hwChannel, FALSE);
544 /* Clear Interrupt Flag */
545 Stm_Ip_ClearInterruptFlag(instance, configPtr->hwChannel);
546 /*Set compare value to 0*/
547 Stm_Ip_SetCmpValue(instance, configPtr->hwChannel, 0U);
548 #if ((defined STM_0_ISR_USED) || (defined STM_1_ISR_USED) || (defined STM_2_ISR_USED) || (defined STM_3_ISR_USED) || \
549 (defined STM_4_ISR_USED) || (defined STM_5_ISR_USED) || (defined STM_6_ISR_USED) || (defined STM_7_ISR_USED) || \
550 (defined STM_8_ISR_USED) || (defined STM_9_ISR_USED) || (defined STM_10_ISR_USED) || (defined STM_11_ISR_USED) || \
551 (defined STM_12_ISR_USED)|| (defined SMU_STM_0_ISR_USED) || (defined SMU_STM_2_ISR_USED) || \
552 (defined CE_STM_0_ISR_USED) || (defined CE_STM_1_ISR_USED) || (defined CE_STM_2_ISR_USED) || \
553 (defined RTU0_STM_0_ISR_USED) || (defined RTU0_STM_1_ISR_USED) || (defined RTU0_STM_2_ISR_USED) || (defined RTU0_STM_3_ISR_USED) || \
554 (defined RTU1_STM_0_ISR_USED) || (defined RTU1_STM_1_ISR_USED) || (defined RTU1_STM_2_ISR_USED) || (defined RTU1_STM_3_ISR_USED))
555 Stm_Ip_u32ChState[instance][configPtr->hwChannel].chInit = TRUE;
556 Stm_Ip_u32ChState[instance][configPtr->hwChannel].callback = configPtr->callback;
557 Stm_Ip_u32ChState[instance][configPtr->hwChannel].callbackParam = configPtr->callbackParam;
558 Stm_Ip_u32ChState[instance][configPtr->hwChannel].channelMode = configPtr->channelMode;
559 #endif
560 }
561
562 /*================================================================================================*/
563 /**
564 * @brief Function Name : Stm_Ip_Deinit
565 * @details De-Initializes the STM module. This functions is called for each STM hw instance and:
566 * - resets all channels to default
567 * - sets to default prescaler bits
568 * - disables the STM counter
569 *
570 * @param[in] instance STM hw instance number
571 * @return void
572 * @pre The data structure including the configuration set required for initializing the GPT driver.
573 * @implements Stm_Ip_Deinit_Activity
574 */
Stm_Ip_Deinit(uint8 instance)575 void Stm_Ip_Deinit(uint8 instance)
576 {
577 #if STM_IP_DEV_ERROR_DETECT == STD_ON
578 DevAssert(STM_INSTANCE_COUNT > instance);
579 #endif
580
581 uint8 channelIndex;
582
583 /* Reset all channels to default */
584 for (channelIndex = 0; channelIndex < STM_CHANNEL_COUNT; channelIndex++)
585 {
586 /* Disable channels */
587 Stm_Ip_ChannelEnable(instance, channelIndex, FALSE);
588 /* Clear interrupt flags */
589 Stm_Ip_ClearInterruptFlag(instance, channelIndex);
590 /* Sets compare value to 0 */
591 Stm_Ip_SetCmpValue(instance, channelIndex, 0x0U);
592 }
593
594 /* Set to default prescaler bits */
595 Stm_Ip_SetPrescaler(instance, 0x0U);
596
597 /* Disable counter */
598 Stm_Ip_TimerEnable(instance, FALSE);
599 }
600
601 /*================================================================================================*/
602 /**
603 * @brief Function Name : Stm_Ip_StartCounting
604 * @details This function is called for starting the Stm timer channel
605 * - reads the current counter register value and sets the compare register to the sum of
606 * counter register value plus the timeout value
607 * - enables the STM channel
608 *
609 * @param[in] instance STM hw instance number
610 * @param[in] channel Stm channel
611 * @param[in] compareValue Compare value
612 * @return void
613 * @pre The driver needs to be initialized. This function is called for starting the STM timer channel.
614 * @implements Stm_Ip_StartCounting_Activity
615 */
Stm_Ip_StartCounting(uint8 instance,uint8 channel,uint32 compareValue)616 void Stm_Ip_StartCounting(uint8 instance, uint8 channel, uint32 compareValue)
617 {
618 #if STM_IP_DEV_ERROR_DETECT == STD_ON
619 DevAssert(STM_INSTANCE_COUNT > instance);
620 DevAssert(STM_CHANNEL_COUNT > channel);
621 #endif
622
623 uint32 currentCntValue;
624
625 currentCntValue = 0U;
626 Stm_Ip_u32TargetValue[instance][channel] = compareValue;
627 currentCntValue = Stm_Ip_GetCntValue(instance);
628 Stm_Ip_SetCmpValue(instance, channel, (currentCntValue + compareValue));
629 /*Enable hw Channel*/
630 Stm_Ip_ChannelEnable(instance, channel, TRUE);
631 }
632 /*================================================================================================*/
633 #if STM_IP_ABSOLUTE_COUNTING_API == STD_ON
634 /**
635 * @brief Function Name : Stm_Ip_StartCountingAbsolute
636 * @details This function is called for starting the Stm timer channel
637 * - sets the compare value without adding the current counter value to the timeout value
638 * - enables the STM channel
639 *
640 * @param[in] instance STM hw instance number
641 * @param[in] channel Stm channel
642 * @param[in] compareValue Compare value
643 * @return void
644 * @pre The driver needs to be initialized. This function is called for starting the STM timer channel.
645 * @implements Stm_Ip_StartCountingAbsolute_Activity
646 */
Stm_Ip_StartCountingAbsolute(uint8 instance,uint8 channel,uint32 compareValue)647 void Stm_Ip_StartCountingAbsolute(uint8 instance, uint8 channel, uint32 compareValue)
648 {
649 #if STM_IP_DEV_ERROR_DETECT == STD_ON
650 DevAssert(STM_INSTANCE_COUNT > instance);
651 DevAssert(STM_CHANNEL_COUNT > channel);
652 #endif
653
654 Stm_Ip_u32TargetValue[instance][channel] = 0U;
655 Stm_Ip_SetCmpValue(instance, channel, compareValue);
656 /*Enable hw Channel*/
657 Stm_Ip_ChannelEnable(instance, channel, TRUE);
658 }
659 #endif
660 /*================================================================================================*/
661 /**
662 * @brief Function Name : Stm_Ip_StartTimer
663 * @details This function is called for setting a new start counter value and enables the STM counter:
664 * - sets the new counter value
665 * - enables the STM counter
666 *
667 * @param[in] instance Stm hw instance
668 * @param[in] startValue counter value
669 * @return void
670 * @pre The driver needs to be initialized. This function is called for starting the STM timer channel.
671 * @implements Stm_Ip_StartTimer_Activity
672 */
Stm_Ip_StartTimer(uint8 instance,uint32 startValue)673 void Stm_Ip_StartTimer(uint8 instance, uint32 startValue)
674 {
675 #if STM_IP_DEV_ERROR_DETECT == STD_ON
676 DevAssert(STM_INSTANCE_COUNT > instance);
677 #endif
678
679 Stm_Ip_SetCntValue(instance, startValue);
680 Stm_Ip_TimerEnable(instance, TRUE);
681 }
682
683 /*================================================================================================*/
684 /**
685 * @brief Function Name : Stm_Ip_StopTimer
686 * @details Gpt driver function for stopping the Stm counter.
687 * - disables the STM counter
688 *
689 * @param[in] instance Stm hw instance
690 * @return void
691 * @pre The driver needs to be initialized. This function is called for stoping the STM timer channel.
692 * @implements Stm_Ip_StopTimer_Activity
693 */
Stm_Ip_StopTimer(uint8 instance)694 void Stm_Ip_StopTimer(uint8 instance)
695 {
696 #if STM_IP_DEV_ERROR_DETECT == STD_ON
697 DevAssert(STM_INSTANCE_COUNT > instance);
698 #endif
699
700 Stm_Ip_TimerEnable(instance, FALSE);
701 }
702
703 /*================================================================================================*/
704 /**
705 * @brief Function Name : Stm_Ip_EnableChannel
706 * @details Enables the channel selected.
707 *
708 * @param[in] instance Stm hw instance
709 * @param[in] channel Stm hw channel
710 * @return void
711 * @pre The driver needs to be initialized.
712 * @implements Stm_Ip_EnableChannel_Activity
713 */
Stm_Ip_EnableChannel(uint8 instance,uint8 channel)714 void Stm_Ip_EnableChannel(uint8 instance, uint8 channel)
715 {
716 #if STM_IP_DEV_ERROR_DETECT == STD_ON
717 DevAssert(STM_INSTANCE_COUNT > instance);
718 DevAssert(STM_CHANNEL_COUNT > channel);
719 #endif
720
721 Stm_Ip_ClearInterruptFlag(instance, channel);
722 Stm_Ip_ChannelEnable(instance, channel, TRUE);
723 }
724
725 /*================================================================================================*/
726 /**
727 * @brief Function Name : Stm_Ip_DisableChannel
728 * @details Disables the channel selected.
729 *
730 * @param[in] instance Stm hw instance
731 * @param[in] channel Stm hw channel
732 * @return void
733 * @pre The driver needs to be initialized.
734 * @implements Stm_Ip_DisableChannel_Activity
735 */
Stm_Ip_DisableChannel(uint8 instance,uint8 channel)736 void Stm_Ip_DisableChannel(uint8 instance, uint8 channel)
737 {
738 #if STM_IP_DEV_ERROR_DETECT == STD_ON
739 DevAssert(STM_INSTANCE_COUNT > instance);
740 DevAssert(STM_CHANNEL_COUNT > channel);
741 #endif
742
743 Stm_Ip_ChannelEnable(instance, channel, FALSE);
744 Stm_Ip_ClearInterruptFlag(instance, channel);
745 }
746
747 /*================================================================================================*/
748 /**
749 * @brief Function Name : Stm_Ip_GetCounterValue
750 * @details Gets the counter value.
751 *
752 * @param[in] instance Stm hw instance
753 *
754 * @return currentCounterValue current counter value
755 * @pre The driver needs to be initialized. This function is called for starting the STM timer channel.
756 * @implements Stm_Ip_GetCounterValue_Activity
757 */
Stm_Ip_GetCounterValue(uint8 instance)758 uint32 Stm_Ip_GetCounterValue(uint8 instance)
759 {
760 #if STM_IP_DEV_ERROR_DETECT == STD_ON
761 DevAssert(STM_INSTANCE_COUNT > instance);
762 #endif
763
764 uint32 currentCounterValue;
765
766 currentCounterValue = 0;
767
768 currentCounterValue = Stm_Ip_GetCntValue(instance);
769
770 return currentCounterValue;
771 }
772
773 /*================================================================================================*/
774 /**
775 * @brief Function Name : Stm_Ip_GetCompareValue
776 * @details Gets the compare value for selected channel
777 *
778 * @param[in] instance Stm hw instance
779 * @param[in] channel Stm hw channel
780 *
781 * @return currentCompareValue compare value for selected channel
782 * @pre The driver needs to be initialized.
783 * @implements Stm_Ip_GetCompareValue_Activity
784 */
Stm_Ip_GetCompareValue(uint8 instance,uint8 channel)785 uint32 Stm_Ip_GetCompareValue(uint8 instance, uint8 channel)
786 {
787 #if STM_IP_DEV_ERROR_DETECT == STD_ON
788 DevAssert(STM_INSTANCE_COUNT > instance);
789 DevAssert(STM_CHANNEL_COUNT > channel);
790 #endif
791
792 uint32 currentCompareValue;
793
794 currentCompareValue = 0;
795
796 currentCompareValue = Stm_Ip_GetCmpValue(instance, channel);
797
798 return currentCompareValue;
799 }
800
801 #if (STM_IP_CHANGE_NEXT_TIMEOUT_VALUE == STD_ON)
802 /*================================================================================================*/
803 /**
804 * @brief The function changes the Stm compare register value.
805 * @details This function:
806 * - Write next timeout to local variable
807 *
808 * @param[in] instance Stm hw instance
809 * @param[in] channel Channel
810 * @param[in] value Channel timeout value
811 * @return void
812 * @pre The driver needs to be initialized.
813 * @implements Stm_Ip_ChangeNextTimeoutValue_Activity
814 */
Stm_Ip_ChangeNextTimeoutValue(uint8 instance,uint8 channel,uint32 value)815 void Stm_Ip_ChangeNextTimeoutValue(uint8 instance, uint8 channel, uint32 value)
816 {
817 #if STM_IP_DEV_ERROR_DETECT == STD_ON
818 DevAssert(STM_INSTANCE_COUNT > instance);
819 DevAssert(STM_CHANNEL_COUNT > channel);
820 #endif
821
822 /* Update the target time value to be used on next cycle */
823 Stm_Ip_u32NextTargetValue[instance][channel] = value;
824
825 }
826 #endif
827
828 #if (STM_IP_SET_CLOCK_MODE == STD_ON)
829 /*================================================================================================*/
830 /**
831 * @brief The function changes the STM prescaler value.
832 * @details This function sets the STM prescaler based on the input mode.
833 *
834 * @param[in] instance Stm hw instance
835 * @param[in] clockMode STM_IP_CLOCKMODE_NORMAL or STM_IP_CLOCKMODE_ALTERNATE
836 *
837 * @return void
838 * @pre The driver needs to be initialized. On/Off by the configuration parameter: GPT_DUAL_CLOCK_MODE
839 * @implements Stm_Ip_SetClockMode_Activity
840 */
Stm_Ip_SetClockMode(uint8 instance,Stm_Ip_ClockModeType clockMode)841 void Stm_Ip_SetClockMode(uint8 instance, Stm_Ip_ClockModeType clockMode)
842 {
843 #if STM_IP_DEV_ERROR_DETECT == STD_ON
844 DevAssert(STM_INSTANCE_COUNT > instance);
845 #endif
846
847 if(STM_IP_CLOCKMODE_NORMAL == clockMode)
848 {
849 Stm_Ip_SetPrescaler(instance, Stm_Ip_u32InstanceState[instance].clockPrescaler);
850 }
851 else
852 {
853 Stm_Ip_SetPrescaler(instance, Stm_Ip_u32InstanceState[instance].clockAlternatePrescaler);
854 }
855
856 }
857 #endif
858
859 /*================================================================================================*/
860 /**
861 * @brief This function sets the STM prescaler, freeze bit and enables counter
862 * @details This function start counting with predefined values(like a free running timer)
863 *
864 * @param[in] instance Stm hw instance
865 * @param[in] prescaler Prescaler value
866 * @param[in] freezeEnable Freeze value
867 * @return void
868 * @pre The driver needs to be initialized
869 * @implements Stm_Ip_PredefCounting_Activity
870 */
Stm_Ip_PredefCounting(uint8 instance,uint8 prescaler,boolean freezeEnable)871 void Stm_Ip_PredefCounting(uint8 instance, uint8 prescaler, boolean freezeEnable)
872 {
873
874 /* Enable register access from user mode, if enabled from configuration file */
875 Call_Stm_Ip_SetUserAccessAllowed((uint32)stmBase[instance]);
876 /* check if the timer is not enabled - TEN bit*/
877 if(1U != Stm_Ip_GetTimerEnableBit(instance))
878 {
879 /* clear counter */
880 Stm_Ip_SetCntValue(instance, 0x0000U);
881 /* Set prescaler for stm timer */
882 Stm_Ip_SetPrescaler(instance, prescaler);
883 if (TRUE == freezeEnable)
884 {
885 Stm_Ip_SetDebugMode(instance, TRUE);
886 }
887 else
888 {
889 Stm_Ip_SetDebugMode(instance, FALSE);
890 }
891 /*Enable counting*/
892 Stm_Ip_TimerEnable(instance, TRUE);
893 }
894 }
895
896 /*================================================================================================*/
897 #if (STM_IP_MODULE_SINGLE_INTERRUPT == STD_ON) /* STM_IP_MODULE_SINGLE_INTERRUPT == STD_ON */
898 #ifdef STM_0_ISR_USED
899 /**
900 * @brief Interrupt handler for STM channels.
901 * @details Interrupt Service Routine corresponding to common STM_0 module.
902 * @param[in] none
903 * @return none
904 * @isr
905 * @pre The driver needs to be initialized.
906 */
ISR(STM_0_ISR)907 ISR(STM_0_ISR)
908 {
909 uint8 channel = 0U;
910 uint32 flagBits = 0U;
911 uint32 enableBits = 0U;
912 uint32 currentChannelMask = 0U;
913
914 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
915 {
916 currentChannelMask = (uint32)0x1U << (uint32)channel;
917 flagBits |= ((Stm_Ip_GetInterruptFlag(0U, channel)) << channel);
918 enableBits |= ((Stm_Ip_GetInterruptBit(0U, channel)) << channel);
919 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
920 {
921 Stm_Ip_ClearInterruptFlag(0U, channel);
922 }
923 }
924 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
925 {
926 currentChannelMask = (uint32)0x1U << (uint32)channel;
927 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
928 {
929 Stm_Ip_ProcessCommonInterrupt(0U, channel);
930 }
931 }
932 }
933 #endif
934 /*================================================================================================*/
935 #ifdef STM_1_ISR_USED
936 /**
937 * @brief Interrupt handler for STM channels.
938 * @details Interrupt Service Routine corresponding to common STM_1 module.
939 *
940 * @param[in] none
941 * @return void
942 * @isr
943 * @pre The driver needs to be initialized.
944 *
945 */
ISR(STM_1_ISR)946 ISR(STM_1_ISR)
947 {
948 uint8 channel = 0U;
949 uint32 flagBits = 0U;
950 uint32 enableBits = 0U;
951 uint32 currentChannelMask = 0U;
952
953 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
954 {
955 currentChannelMask = (uint32)0x1U << (uint32)channel;
956 flagBits |= ((Stm_Ip_GetInterruptFlag(1U, channel)) << channel);
957 enableBits |= ((Stm_Ip_GetInterruptBit(1U, channel)) << channel);
958 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
959 {
960 Stm_Ip_ClearInterruptFlag(1U, channel);
961 }
962 }
963 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
964 {
965 currentChannelMask = (uint32)0x1U << (uint32)channel;
966 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
967 {
968 Stm_Ip_ProcessCommonInterrupt(1U, channel);
969 }
970 }
971 }
972 #endif
973 /*================================================================================================*/
974 #ifdef STM_2_ISR_USED
975 /**
976 * @brief Interrupt handler for STM channels.
977 * @details Interrupt Service Routine corresponding to common STM_2 module.
978 *
979 * @param[in] none
980 * @return void
981 * @isr
982 * @pre The driver needs to be initialized.
983 *
984 */
ISR(STM_2_ISR)985 ISR(STM_2_ISR)
986 {
987 uint8 channel = 0U;
988 uint32 flagBits = 0U;
989 uint32 enableBits = 0U;
990 uint32 currentChannelMask = 0U;
991
992 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
993 {
994 currentChannelMask = (uint32)0x1U << (uint32)channel;
995 flagBits |= ((Stm_Ip_GetInterruptFlag(2U, channel)) << channel);
996 enableBits |= ((Stm_Ip_GetInterruptBit(2U, channel)) << channel);
997 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
998 {
999 Stm_Ip_ClearInterruptFlag(2U, channel);
1000 }
1001 }
1002 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1003 {
1004 currentChannelMask = (uint32)0x1U << (uint32)channel;
1005 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1006 {
1007 Stm_Ip_ProcessCommonInterrupt(2U, channel);
1008 }
1009 }
1010 }
1011 #endif
1012 /*================================================================================================*/
1013 #ifdef STM_3_ISR_USED
1014 /**
1015 * @brief Interrupt handler for STM channels.
1016 * @details Interrupt Service Routine corresponding to common STM_3 module.
1017 *
1018 * @param[in] none
1019 * @return void
1020 * @isr
1021 * @pre The driver needs to be initialized.
1022 *
1023 */
ISR(STM_3_ISR)1024 ISR(STM_3_ISR)
1025 {
1026 uint8 channel = 0U;
1027 uint32 flagBits = 0U;
1028 uint32 enableBits = 0U;
1029 uint32 currentChannelMask = 0U;
1030
1031 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1032 {
1033 currentChannelMask = (uint32)0x1U << (uint32)channel;
1034 flagBits |= ((Stm_Ip_GetInterruptFlag(3U, channel)) << channel);
1035 enableBits |= ((Stm_Ip_GetInterruptBit(3U, channel)) << channel);
1036 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1037 {
1038 Stm_Ip_ClearInterruptFlag(3U, channel);
1039 }
1040 }
1041 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1042 {
1043 currentChannelMask = (uint32)0x1U << (uint32)channel;
1044 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1045 {
1046 Stm_Ip_ProcessCommonInterrupt(3U, channel);
1047 }
1048 }
1049 }
1050 #endif
1051 /*================================================================================================*/
1052 #ifdef STM_4_ISR_USED
1053 /**
1054 * @brief Interrupt handler for STM channels.
1055 * @details Interrupt Service Routine corresponding to common STM_4 module.
1056 *
1057 * @param[in] none
1058 * @return void
1059 * @isr
1060 * @pre The driver needs to be initialized.
1061 *
1062 */
ISR(STM_4_ISR)1063 ISR(STM_4_ISR)
1064 {
1065 uint8 channel = 0U;
1066 uint32 flagBits = 0U;
1067 uint32 enableBits = 0U;
1068 uint32 currentChannelMask = 0U;
1069
1070 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1071 {
1072 currentChannelMask = (uint32)0x1U << (uint32)channel;
1073 flagBits |= ((Stm_Ip_GetInterruptFlag(4U, channel)) << channel);
1074 enableBits |= ((Stm_Ip_GetInterruptBit(4U, channel)) << channel);
1075 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1076 {
1077 Stm_Ip_ClearInterruptFlag(4U, channel);
1078 }
1079 }
1080 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1081 {
1082 currentChannelMask = (uint32)0x1U << (uint32)channel;
1083 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1084 {
1085 Stm_Ip_ProcessCommonInterrupt(4U, channel);
1086 }
1087 }
1088 }
1089 #endif
1090 /*================================================================================================*/
1091 #ifdef STM_5_ISR_USED
1092 /**
1093 * @brief Interrupt handler for STM channels.
1094 * @details Interrupt Service Routine corresponding to common STM_5 module.
1095 *
1096 * @param[in] none
1097 * @return void
1098 * @isr
1099 * @pre The driver needs to be initialized.
1100 *
1101 */
ISR(STM_5_ISR)1102 ISR(STM_5_ISR)
1103 {
1104 uint8 channel = 0U;
1105 uint32 flagBits = 0U;
1106 uint32 enableBits = 0U;
1107 uint32 currentChannelMask = 0U;
1108
1109 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1110 {
1111 currentChannelMask = (uint32)0x1U << (uint32)channel;
1112 flagBits |= ((Stm_Ip_GetInterruptFlag(5U, channel)) << channel);
1113 enableBits |= ((Stm_Ip_GetInterruptBit(5U, channel)) << channel);
1114 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1115 {
1116 Stm_Ip_ClearInterruptFlag(5U, channel);
1117 }
1118 }
1119 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1120 {
1121 currentChannelMask = (uint32)0x1U << (uint32)channel;
1122 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1123 {
1124 Stm_Ip_ProcessCommonInterrupt(5U, channel);
1125 }
1126 }
1127 }
1128 #endif
1129 /*================================================================================================*/
1130 #ifdef STM_6_ISR_USED
1131 /**
1132 * @brief Interrupt handler for STM channels.
1133 * @details Interrupt Service Routine corresponding to common STM_6 module.
1134 *
1135 * @param[in] none
1136 * @return void
1137 * @isr
1138 * @pre The driver needs to be initialized.
1139 *
1140 */
ISR(STM_6_ISR)1141 ISR(STM_6_ISR)
1142 {
1143 uint8 channel = 0U;
1144 uint32 flagBits = 0U;
1145 uint32 enableBits = 0U;
1146 uint32 currentChannelMask = 0U;
1147
1148 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1149 {
1150 currentChannelMask = (uint32)0x1U << (uint32)channel;
1151 flagBits |= ((Stm_Ip_GetInterruptFlag(6U, channel)) << channel);
1152 enableBits |= ((Stm_Ip_GetInterruptBit(6U, channel)) << channel);
1153 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1154 {
1155 Stm_Ip_ClearInterruptFlag(6U, channel);
1156 }
1157 }
1158 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1159 {
1160 currentChannelMask = (uint32)0x1U << (uint32)channel;
1161 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1162 {
1163 Stm_Ip_ProcessCommonInterrupt(6U, channel);
1164 }
1165 }
1166 }
1167 #endif
1168 /*================================================================================================*/
1169 #ifdef STM_7_ISR_USED
1170 /**
1171 * @brief Interrupt handler for STM channels.
1172 * @details Interrupt Service Routine corresponding to common STM_7 module.
1173 *
1174 * @param[in] none
1175 * @return void
1176 * @isr
1177 * @pre The driver needs to be initialized.
1178 *
1179 */
ISR(STM_7_ISR)1180 ISR(STM_7_ISR)
1181 {
1182 uint8 channel = 0U;
1183 uint32 flagBits = 0U;
1184 uint32 enableBits = 0U;
1185 uint32 currentChannelMask = 0U;
1186
1187 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1188 {
1189 currentChannelMask = (uint32)0x1U << (uint32)channel;
1190 flagBits |= ((Stm_Ip_GetInterruptFlag(7U, channel)) << channel);
1191 enableBits |= ((Stm_Ip_GetInterruptBit(7U, channel)) << channel);
1192 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1193 {
1194 Stm_Ip_ClearInterruptFlag(7U, channel);
1195 }
1196 }
1197 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1198 {
1199 currentChannelMask = (uint32)0x1U << (uint32)channel;
1200 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1201 {
1202 Stm_Ip_ProcessCommonInterrupt(7U, channel);
1203 }
1204 }
1205 }
1206 #endif
1207 /*================================================================================================*/
1208 #ifdef STM_8_ISR_USED
1209 /**
1210 * @brief Interrupt handler for STM channels.
1211 * @details Interrupt Service Routine corresponding to common STM_8 module.
1212 *
1213 * @param[in] none
1214 * @return void
1215 * @isr
1216 * @pre The driver needs to be initialized.
1217 *
1218 */
ISR(STM_8_ISR)1219 ISR(STM_8_ISR)
1220 {
1221 uint8 channel = 0U;
1222 uint32 flagBits = 0U;
1223 uint32 enableBits = 0U;
1224 uint32 currentChannelMask = 0U;
1225
1226 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1227 {
1228 currentChannelMask = (uint32)0x1U << (uint32)channel;
1229 flagBits |= ((Stm_Ip_GetInterruptFlag(8U, channel)) << channel);
1230 enableBits |= ((Stm_Ip_GetInterruptBit(8U, channel)) << channel);
1231 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1232 {
1233 Stm_Ip_ClearInterruptFlag(8U, channel);
1234 }
1235 }
1236 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1237 {
1238 currentChannelMask = (uint32)0x1U << (uint32)channel;
1239 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1240 {
1241 Stm_Ip_ProcessCommonInterrupt(8U, channel);
1242 }
1243 }
1244 }
1245 #endif
1246 /*================================================================================================*/
1247 #ifdef STM_9_ISR_USED
1248 /**
1249 * @brief Interrupt handler for STM channels.
1250 * @details Interrupt Service Routine corresponding to common STM_9 module.
1251 *
1252 * @param[in] none
1253 * @return void
1254 * @isr
1255 * @pre The driver needs to be initialized.
1256 *
1257 */
ISR(STM_9_ISR)1258 ISR(STM_9_ISR)
1259 {
1260 uint8 channel = 0U;
1261 uint32 flagBits = 0U;
1262 uint32 enableBits = 0U;
1263 uint32 currentChannelMask = 0U;
1264
1265 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1266 {
1267 currentChannelMask = (uint32)0x1U << (uint32)channel;
1268 flagBits |= ((Stm_Ip_GetInterruptFlag(9U, channel)) << channel);
1269 enableBits |= ((Stm_Ip_GetInterruptBit(9U, channel)) << channel);
1270 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1271 {
1272 Stm_Ip_ClearInterruptFlag(9U, channel);
1273 }
1274 }
1275 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1276 {
1277 currentChannelMask = (uint32)0x1U << (uint32)channel;
1278 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1279 {
1280 Stm_Ip_ProcessCommonInterrupt(9U, channel);
1281 }
1282 }
1283 }
1284 #endif
1285 /*================================================================================================*/
1286 #ifdef STM_10_ISR_USED
1287 /**
1288 * @brief Interrupt handler for STM channels.
1289 * @details Interrupt Service Routine corresponding to common STM_10 module.
1290 *
1291 * @param[in] none
1292 * @return void
1293 * @isr
1294 * @pre The driver needs to be initialized.
1295 *
1296 */
ISR(STM_10_ISR)1297 ISR(STM_10_ISR)
1298 {
1299 uint8 channel = 0U;
1300 uint32 flagBits = 0U;
1301 uint32 enableBits = 0U;
1302 uint32 currentChannelMask = 0U;
1303
1304 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1305 {
1306 currentChannelMask = (uint32)0x1U << (uint32)channel;
1307 flagBits |= ((Stm_Ip_GetInterruptFlag(10U, channel)) << channel);
1308 enableBits |= ((Stm_Ip_GetInterruptBit(10U, channel)) << channel);
1309 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1310 {
1311 Stm_Ip_ClearInterruptFlag(10U, channel);
1312 }
1313 }
1314 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1315 {
1316 currentChannelMask = (uint32)0x1U << (uint32)channel;
1317 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1318 {
1319 Stm_Ip_ProcessCommonInterrupt(10U, channel);
1320 }
1321 }
1322 }
1323 #endif
1324 /*================================================================================================*/
1325 #ifdef STM_11_ISR_USED
1326 /**
1327 * @brief Interrupt handler for STM channels.
1328 * @details Interrupt Service Routine corresponding to common STM_10 module.
1329 *
1330 * @param[in] none
1331 * @return void
1332 * @isr
1333 * @pre The driver needs to be initialized.
1334 *
1335 */
ISR(STM_11_ISR)1336 ISR(STM_11_ISR)
1337 {
1338 uint8 channel = 0U;
1339 uint32 flagBits = 0U;
1340 uint32 enableBits = 0U;
1341 uint32 currentChannelMask = 0U;
1342
1343 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1344 {
1345 currentChannelMask = (uint32)0x1U << (uint32)channel;
1346 flagBits |= ((Stm_Ip_GetInterruptFlag(11U, channel)) << channel);
1347 enableBits |= ((Stm_Ip_GetInterruptBit(11U, channel)) << channel);
1348 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1349 {
1350 Stm_Ip_ClearInterruptFlag(11U, channel);
1351 }
1352 }
1353 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1354 {
1355 currentChannelMask = (uint32)0x1U << (uint32)channel;
1356 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1357 {
1358 Stm_Ip_ProcessCommonInterrupt(11U, channel);
1359 }
1360 }
1361 }
1362 #endif
1363 /*================================================================================================*/
1364 #ifdef STM_12_ISR_USED
1365 /**
1366 * @brief Interrupt handler for STM channels.
1367 * @details Interrupt Service Routine corresponding to common STM_12 module.
1368 *
1369 * @param[in] none
1370 * @return void
1371 * @isr
1372 * @pre The driver needs to be initialized.
1373 *
1374 */
ISR(STM_12_ISR)1375 ISR(STM_12_ISR)
1376 {
1377 uint8 channel = 0U;
1378 uint32 flagBits = 0U;
1379 uint32 enableBits = 0U;
1380 uint32 currentChannelMask = 0U;
1381
1382 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1383 {
1384 currentChannelMask = (uint32)0x1U << (uint32)channel;
1385 flagBits |= ((Stm_Ip_GetInterruptFlag(12U, channel)) << channel);
1386 enableBits |= ((Stm_Ip_GetInterruptBit(12U, channel)) << channel);
1387 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1388 {
1389 Stm_Ip_ClearInterruptFlag(12U, channel);
1390 }
1391 }
1392 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1393 {
1394 currentChannelMask = (uint32)0x1U << (uint32)channel;
1395 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1396 {
1397 Stm_Ip_ProcessCommonInterrupt(12U, channel);
1398 }
1399 }
1400 }
1401 #endif
1402 /*================================================================================================*/
1403 #ifdef SMU_STM_0_ISR_USED
1404 /**
1405 * @brief Interrupt handler for STM channels.
1406 * @details Interrupt Service Routine corresponding to common STM_12 module.
1407 *
1408 * @param[in] none
1409 * @return void
1410 * @isr
1411 * @pre The driver needs to be initialized.
1412 *
1413 */
ISR(SMU_STM_0_ISR)1414 ISR(SMU_STM_0_ISR)
1415 {
1416 uint8 channel = 0U;
1417 uint32 flagBits = 0U;
1418 uint32 enableBits = 0U;
1419 uint32 currentChannelMask = 0U;
1420
1421 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1422 {
1423 currentChannelMask = (uint32)0x1U << (uint32)channel;
1424 flagBits |= ((Stm_Ip_GetInterruptFlag(11U, channel)) << channel);
1425 enableBits |= ((Stm_Ip_GetInterruptBit(11U, channel)) << channel);
1426 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1427 {
1428 Stm_Ip_ClearInterruptFlag(11U, channel);
1429 }
1430 }
1431 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1432 {
1433 currentChannelMask = (uint32)0x1U << (uint32)channel;
1434 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1435 {
1436 Stm_Ip_ProcessCommonInterrupt(11U, channel);
1437 }
1438 }
1439 }
1440 #endif
1441 /*================================================================================================*/
1442 #ifdef SMU_STM_2_ISR_USED
1443 /**
1444 * @brief Interrupt handler for STM channels.
1445 * @details Interrupt Service Routine corresponding to common STM_12 module.
1446 *
1447 * @param[in] none
1448 * @return void
1449 * @isr
1450 * @pre The driver needs to be initialized.
1451 *
1452 */
ISR(SMU_STM_2_ISR)1453 ISR(SMU_STM_2_ISR)
1454 {
1455 uint8 channel = 0U;
1456 uint32 flagBits = 0U;
1457 uint32 enableBits = 0U;
1458 uint32 currentChannelMask = 0U;
1459
1460 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1461 {
1462 currentChannelMask = (uint32)0x1U << (uint32)channel;
1463 flagBits |= ((Stm_Ip_GetInterruptFlag(12U, channel)) << channel);
1464 enableBits |= ((Stm_Ip_GetInterruptBit(12U, channel)) << channel);
1465 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1466 {
1467 Stm_Ip_ClearInterruptFlag(12U, channel);
1468 }
1469 }
1470 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1471 {
1472 currentChannelMask = (uint32)0x1U << (uint32)channel;
1473 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1474 {
1475 Stm_Ip_ProcessCommonInterrupt(12U, channel);
1476 }
1477 }
1478 }
1479 #endif
1480 /*================================================================================================*/
1481 #ifdef CE_STM_0_ISR_USED
1482 /**
1483 * @brief Interrupt handler for STM channels.
1484 * @details Interrupt Service Routine corresponding to common STM_12 module.
1485 *
1486 * @param[in] none
1487 * @return void
1488 * @isr
1489 * @pre The driver needs to be initialized.
1490 *
1491 */
ISR(CE_STM_0_ISR)1492 ISR(CE_STM_0_ISR)
1493 {
1494 uint8 channel = 0U;
1495 uint32 flagBits = 0U;
1496 uint32 enableBits = 0U;
1497 uint32 currentChannelMask = 0U;
1498
1499 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1500 {
1501 currentChannelMask = (uint32)0x1U << (uint32)channel;
1502 flagBits |= ((Stm_Ip_GetInterruptFlag(0U, channel)) << channel);
1503 enableBits |= ((Stm_Ip_GetInterruptBit(0U, channel)) << channel);
1504 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1505 {
1506 Stm_Ip_ClearInterruptFlag(0U, channel);
1507 }
1508 }
1509 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1510 {
1511 currentChannelMask = (uint32)0x1U << (uint32)channel;
1512 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1513 {
1514 Stm_Ip_ProcessCommonInterrupt(0U, channel);
1515 }
1516 }
1517 }
1518 #endif
1519 /*================================================================================================*/
1520 #ifdef CE_STM_1_ISR_USED
1521 /**
1522 * @brief Interrupt handler for STM channels.
1523 * @details Interrupt Service Routine corresponding to common STM_12 module.
1524 *
1525 * @param[in] none
1526 * @return void
1527 * @isr
1528 * @pre The driver needs to be initialized.
1529 *
1530 */
ISR(CE_STM_1_ISR)1531 ISR(CE_STM_1_ISR)
1532 {
1533 uint8 channel = 0U;
1534 uint32 flagBits = 0U;
1535 uint32 enableBits = 0U;
1536 uint32 currentChannelMask = 0U;
1537
1538 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1539 {
1540 currentChannelMask = (uint32)0x1U << (uint32)channel;
1541 flagBits |= ((Stm_Ip_GetInterruptFlag(1U, channel)) << channel);
1542 enableBits |= ((Stm_Ip_GetInterruptBit(1U, channel)) << channel);
1543 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1544 {
1545 Stm_Ip_ClearInterruptFlag(1U, channel);
1546 }
1547 }
1548 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1549 {
1550 currentChannelMask = (uint32)0x1U << (uint32)channel;
1551 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1552 {
1553 Stm_Ip_ProcessCommonInterrupt(1U, channel);
1554 }
1555 }
1556 }
1557 #endif
1558 /*================================================================================================*/
1559 #ifdef CE_STM_2_ISR_USED
1560 /**
1561 * @brief Interrupt handler for STM channels.
1562 * @details Interrupt Service Routine corresponding to common STM_12 module.
1563 *
1564 * @param[in] none
1565 * @return void
1566 * @isr
1567 * @pre The driver needs to be initialized.
1568 *
1569 */
ISR(CE_STM_2_ISR)1570 ISR(CE_STM_2_ISR)
1571 {
1572 uint8 channel = 0U;
1573 uint32 flagBits = 0U;
1574 uint32 enableBits = 0U;
1575 uint32 currentChannelMask = 0U;
1576
1577 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1578 {
1579 currentChannelMask = (uint32)0x1U << (uint32)channel;
1580 flagBits |= ((Stm_Ip_GetInterruptFlag(2U, channel)) << channel);
1581 enableBits |= ((Stm_Ip_GetInterruptBit(2U, channel)) << channel);
1582 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1583 {
1584 Stm_Ip_ClearInterruptFlag(2U, channel);
1585 }
1586 }
1587 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1588 {
1589 currentChannelMask = (uint32)0x1U << (uint32)channel;
1590 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1591 {
1592 Stm_Ip_ProcessCommonInterrupt(2U, channel);
1593 }
1594 }
1595 }
1596 #endif
1597 /*================================================================================================*/
1598 #ifdef CE_STM_3_ISR_USED
1599 /**
1600 * @brief Interrupt handler for STM channels.
1601 * @details Interrupt Service Routine corresponding to common STM_12 module.
1602 *
1603 * @param[in] none
1604 * @return void
1605 * @isr
1606 * @pre The driver needs to be initialized.
1607 *
1608 */
ISR(CE_STM_3_ISR)1609 ISR(CE_STM_3_ISR)
1610 {
1611 uint8 channel = 0U;
1612 uint32 flagBits = 0U;
1613 uint32 enableBits = 0U;
1614 uint32 currentChannelMask = 0U;
1615
1616 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1617 {
1618 currentChannelMask = (uint32)0x1U << (uint32)channel;
1619 flagBits |= ((Stm_Ip_GetInterruptFlag(3U, channel)) << channel);
1620 enableBits |= ((Stm_Ip_GetInterruptBit(3U, channel)) << channel);
1621 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1622 {
1623 Stm_Ip_ClearInterruptFlag(3U, channel);
1624 }
1625 }
1626 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1627 {
1628 currentChannelMask = (uint32)0x1U << (uint32)channel;
1629 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1630 {
1631 Stm_Ip_ProcessCommonInterrupt(3U, channel);
1632 }
1633 }
1634 }
1635 #endif
1636 /*================================================================================================*/
1637 #ifdef RTU0_STM_0_ISR_USED
1638 /**
1639 * @brief Interrupt handler for STM channels.
1640 * @details Interrupt Service Routine corresponding to common STM_12 module.
1641 *
1642 * @param[in] none
1643 * @return void
1644 * @isr
1645 * @pre The driver needs to be initialized.
1646 *
1647 */
ISR(RTU0_STM_0_ISR)1648 ISR(RTU0_STM_0_ISR)
1649 {
1650 uint8 channel = 0U;
1651 uint32 flagBits = 0U;
1652 uint32 enableBits = 0U;
1653 uint32 currentChannelMask = 0U;
1654
1655 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1656 {
1657 currentChannelMask = (uint32)0x1U << (uint32)channel;
1658 flagBits |= ((Stm_Ip_GetInterruptFlag(3U, channel)) << channel);
1659 enableBits |= ((Stm_Ip_GetInterruptBit(3U, channel)) << channel);
1660 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1661 {
1662 Stm_Ip_ClearInterruptFlag(3U, channel);
1663 }
1664 }
1665 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1666 {
1667 currentChannelMask = (uint32)0x1U << (uint32)channel;
1668 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1669 {
1670 Stm_Ip_ProcessCommonInterrupt(3U, channel);
1671 }
1672 }
1673 }
1674 #endif
1675 /*================================================================================================*/
1676 #ifdef RTU0_STM_1_ISR_USED
1677 /**
1678 * @brief Interrupt handler for STM channels.
1679 * @details Interrupt Service Routine corresponding to common STM_12 module.
1680 *
1681 * @param[in] none
1682 * @return void
1683 * @isr
1684 * @pre The driver needs to be initialized.
1685 *
1686 */
ISR(RTU0_STM_1_ISR)1687 ISR(RTU0_STM_1_ISR)
1688 {
1689 uint8 channel = 0U;
1690 uint32 flagBits = 0U;
1691 uint32 enableBits = 0U;
1692 uint32 currentChannelMask = 0U;
1693
1694 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1695 {
1696 currentChannelMask = (uint32)0x1U << (uint32)channel;
1697 flagBits |= ((Stm_Ip_GetInterruptFlag(4U, channel)) << channel);
1698 enableBits |= ((Stm_Ip_GetInterruptBit(4U, channel)) << channel);
1699 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1700 {
1701 Stm_Ip_ClearInterruptFlag(4U, channel);
1702 }
1703 }
1704 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1705 {
1706 currentChannelMask = (uint32)0x1U << (uint32)channel;
1707 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1708 {
1709 Stm_Ip_ProcessCommonInterrupt(4U, channel);
1710 }
1711 }
1712 }
1713 #endif
1714 /*================================================================================================*/
1715 #ifdef RTU0_STM_2_ISR_USED
1716 /**
1717 * @brief Interrupt handler for STM channels.
1718 * @details Interrupt Service Routine corresponding to common STM_12 module.
1719 *
1720 * @param[in] none
1721 * @return void
1722 * @isr
1723 * @pre The driver needs to be initialized.
1724 *
1725 */
ISR(RTU0_STM_2_ISR)1726 ISR(RTU0_STM_2_ISR)
1727 {
1728 uint8 channel = 0U;
1729 uint32 flagBits = 0U;
1730 uint32 enableBits = 0U;
1731 uint32 currentChannelMask = 0U;
1732
1733 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1734 {
1735 currentChannelMask = (uint32)0x1U << (uint32)channel;
1736 flagBits |= ((Stm_Ip_GetInterruptFlag(5U, channel)) << channel);
1737 enableBits |= ((Stm_Ip_GetInterruptBit(5U, channel)) << channel);
1738 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1739 {
1740 Stm_Ip_ClearInterruptFlag(5U, channel);
1741 }
1742 }
1743 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1744 {
1745 currentChannelMask = (uint32)0x1U << (uint32)channel;
1746 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1747 {
1748 Stm_Ip_ProcessCommonInterrupt(5U, channel);
1749 }
1750 }
1751 }
1752 #endif
1753 /*================================================================================================*/
1754 #ifdef RTU0_STM_3_ISR_USED
1755 /**
1756 * @brief Interrupt handler for STM channels.
1757 * @details Interrupt Service Routine corresponding to common STM_12 module.
1758 *
1759 * @param[in] none
1760 * @return void
1761 * @isr
1762 * @pre The driver needs to be initialized.
1763 *
1764 */
ISR(RTU0_STM_3_ISR)1765 ISR(RTU0_STM_3_ISR)
1766 {
1767 uint8 channel = 0U;
1768 uint32 flagBits = 0U;
1769 uint32 enableBits = 0U;
1770 uint32 currentChannelMask = 0U;
1771
1772 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1773 {
1774 currentChannelMask = (uint32)0x1U << (uint32)channel;
1775 flagBits |= ((Stm_Ip_GetInterruptFlag(6U, channel)) << channel);
1776 enableBits |= ((Stm_Ip_GetInterruptBit(6U, channel)) << channel);
1777 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1778 {
1779 Stm_Ip_ClearInterruptFlag(6U, channel);
1780 }
1781 }
1782 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1783 {
1784 currentChannelMask = (uint32)0x1U << (uint32)channel;
1785 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1786 {
1787 Stm_Ip_ProcessCommonInterrupt(6U, channel);
1788 }
1789 }
1790 }
1791 #endif
1792 /*================================================================================================*/
1793 #ifdef RTU1_STM_0_ISR_USED
1794 /**
1795 * @brief Interrupt handler for STM channels.
1796 * @details Interrupt Service Routine corresponding to common STM_12 module.
1797 *
1798 * @param[in] none
1799 * @return void
1800 * @isr
1801 * @pre The driver needs to be initialized.
1802 *
1803 */
ISR(RTU1_STM_0_ISR)1804 ISR(RTU1_STM_0_ISR)
1805 {
1806 uint8 channel = 0U;
1807 uint32 flagBits = 0U;
1808 uint32 enableBits = 0U;
1809 uint32 currentChannelMask = 0U;
1810
1811 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1812 {
1813 currentChannelMask = (uint32)0x1U << (uint32)channel;
1814 flagBits |= ((Stm_Ip_GetInterruptFlag(7U, channel)) << channel);
1815 enableBits |= ((Stm_Ip_GetInterruptBit(7U, channel)) << channel);
1816 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1817 {
1818 Stm_Ip_ClearInterruptFlag(7U, channel);
1819 }
1820 }
1821 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1822 {
1823 currentChannelMask = (uint32)0x1U << (uint32)channel;
1824 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1825 {
1826 Stm_Ip_ProcessCommonInterrupt(7U, channel);
1827 }
1828 }
1829 }
1830 #endif
1831 /*================================================================================================*/
1832 #ifdef RTU1_STM_1_ISR_USED
1833 /**
1834 * @brief Interrupt handler for STM channels.
1835 * @details Interrupt Service Routine corresponding to common STM_12 module.
1836 *
1837 * @param[in] none
1838 * @return void
1839 * @isr
1840 * @pre The driver needs to be initialized.
1841 *
1842 */
ISR(RTU1_STM_1_ISR)1843 ISR(RTU1_STM_1_ISR)
1844 {
1845 uint8 channel = 0U;
1846 uint32 flagBits = 0U;
1847 uint32 enableBits = 0U;
1848 uint32 currentChannelMask = 0U;
1849
1850 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1851 {
1852 currentChannelMask = (uint32)0x1U << (uint32)channel;
1853 flagBits |= ((Stm_Ip_GetInterruptFlag(8U, channel)) << channel);
1854 enableBits |= ((Stm_Ip_GetInterruptBit(8U, channel)) << channel);
1855 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1856 {
1857 Stm_Ip_ClearInterruptFlag(8U, channel);
1858 }
1859 }
1860 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1861 {
1862 currentChannelMask = (uint32)0x1U << (uint32)channel;
1863 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1864 {
1865 Stm_Ip_ProcessCommonInterrupt(8U, channel);
1866 }
1867 }
1868 }
1869 #endif
1870 /*================================================================================================*/
1871 #ifdef RTU1_STM_2_ISR_USED
1872 /**
1873 * @brief Interrupt handler for STM channels.
1874 * @details Interrupt Service Routine corresponding to common STM_12 module.
1875 *
1876 * @param[in] none
1877 * @return void
1878 * @isr
1879 * @pre The driver needs to be initialized.
1880 *
1881 */
ISR(RTU1_STM_2_ISR)1882 ISR(RTU1_STM_2_ISR)
1883 {
1884 uint8 channel = 0U;
1885 uint32 flagBits = 0U;
1886 uint32 enableBits = 0U;
1887 uint32 currentChannelMask = 0U;
1888
1889 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1890 {
1891 currentChannelMask = (uint32)0x1U << (uint32)channel;
1892 flagBits |= ((Stm_Ip_GetInterruptFlag(9U, channel)) << channel);
1893 enableBits |= ((Stm_Ip_GetInterruptBit(9U, channel)) << channel);
1894 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1895 {
1896 Stm_Ip_ClearInterruptFlag(9U, channel);
1897 }
1898 }
1899 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1900 {
1901 currentChannelMask = (uint32)0x1U << (uint32)channel;
1902 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1903 {
1904 Stm_Ip_ProcessCommonInterrupt(9U, channel);
1905 }
1906 }
1907 }
1908 #endif
1909 /*================================================================================================*/
1910 #ifdef RTU1_STM_3_ISR_USED
1911 /**
1912 * @brief Interrupt handler for STM channels.
1913 * @details Interrupt Service Routine corresponding to common STM_12 module.
1914 *
1915 * @param[in] none
1916 * @return void
1917 * @isr
1918 * @pre The driver needs to be initialized.
1919 *
1920 */
ISR(RTU1_STM_3_ISR)1921 ISR(RTU1_STM_3_ISR)
1922 {
1923 uint8 channel = 0U;
1924 uint32 flagBits = 0U;
1925 uint32 enableBits = 0U;
1926 uint32 currentChannelMask = 0U;
1927
1928 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1929 {
1930 currentChannelMask = (uint32)0x1U << (uint32)channel;
1931 flagBits |= ((Stm_Ip_GetInterruptFlag(10U, channel)) << channel);
1932 enableBits |= ((Stm_Ip_GetInterruptBit(10U, channel)) << channel);
1933 if((currentChannelMask == (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1934 {
1935 Stm_Ip_ClearInterruptFlag(10U, channel);
1936 }
1937 }
1938 for (channel = 0U; channel < STM_CHANNEL_COUNT; channel++)
1939 {
1940 currentChannelMask = (uint32)0x1U << (uint32)channel;
1941 if((currentChannelMask== (flagBits & currentChannelMask)) && (currentChannelMask == (enableBits & currentChannelMask)))
1942 {
1943 Stm_Ip_ProcessCommonInterrupt(10U, channel);
1944 }
1945 }
1946 }
1947 #endif
1948 #endif /* STM_IP_MODULE_SINGLE_INTERRUPT == STD_ON */
1949
1950 #define GPT_STOP_SEC_CODE
1951 #include "Gpt_MemMap.h"
1952
1953 #endif /* STM_IP_USED == STD_ON */
1954 #ifdef __cplusplus
1955 }
1956 #endif /*STM_IP_C*/
1957 /** @} */
1958
1959
