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Searched defs:SYSCON_AHBCLKCTRL0_ROM_MASK (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h21292 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h21139 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h21139 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h21292 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h21139 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h21292 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h23560 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h22119 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h23560 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h20194 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h20195 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h21850 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h21851 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h22121 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h22120 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h22453 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
DLPC55S66_cm33_core0.h22453 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core0.h22452 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
DLPC55S69_cm33_core1.h22452 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h24389 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h24388 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h41617 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h41617 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h51322 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h56059 #define SYSCON_AHBCLKCTRL0_ROM_MASK (0x2U) macro

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