1 /*!
2 * \file sx1276.c
3 *
4 * \brief SX1276 driver implementation
5 *
6 * \copyright Revised BSD License, see section \ref LICENSE.
7 *
8 * \code
9 * ______ _
10 * / _____) _ | |
11 * ( (____ _____ ____ _| |_ _____ ____| |__
12 * \____ \| ___ | (_ _) ___ |/ ___) _ \
13 * _____) ) ____| | | || |_| ____( (___| | | |
14 * (______/|_____)_|_|_| \__)_____)\____)_| |_|
15 * (C)2013-2017 Semtech
16 *
17 * \endcode
18 *
19 * \author Miguel Luis ( Semtech )
20 *
21 * \author Gregory Cristian ( Semtech )
22 *
23 * \author Wael Guibene ( Semtech )
24 */
25 #include <math.h>
26 #include <string.h>
27 #include "utilities.h"
28 #include "timer.h"
29 #include "radio.h"
30 #include "delay.h"
31 #include "sx1276.h"
32 #include "sx1276-board.h"
33
34 /*!
35 * \brief Internal frequency of the radio
36 */
37 #define SX1276_XTAL_FREQ 32000000UL
38
39 /*!
40 * \brief Scaling factor used to perform fixed-point operations
41 */
42 #define SX1276_PLL_STEP_SHIFT_AMOUNT ( 8 )
43
44 /*!
45 * \brief PLL step - scaled with SX1276_PLL_STEP_SHIFT_AMOUNT
46 */
47 #define SX1276_PLL_STEP_SCALED ( SX1276_XTAL_FREQ >> ( 19 - SX1276_PLL_STEP_SHIFT_AMOUNT ) )
48
49 /*!
50 * \brief Radio buffer size
51 */
52 #define RX_TX_BUFFER_SIZE 256
53
54 /*
55 * Local types definition
56 */
57
58 /*!
59 * Radio registers definition
60 */
61 typedef struct
62 {
63 RadioModems_t Modem;
64 uint8_t Addr;
65 uint8_t Value;
66 }RadioRegisters_t;
67
68 /*!
69 * FSK bandwidth definition
70 */
71 typedef struct
72 {
73 uint32_t bandwidth;
74 uint8_t RegValue;
75 }FskBandwidth_t;
76
77
78 /*
79 * Private functions prototypes
80 */
81
82 /*!
83 * Performs the Rx chain calibration for LF and HF bands
84 * \remark Must be called just after the reset so all registers are at their
85 * default values
86 */
87 static void RxChainCalibration( void );
88
89 /*!
90 * \brief Sets the SX1276 in transmission mode for the given time
91 * \param [IN] timeout Transmission timeout [ms] [0: continuous, others timeout]
92 */
93 static void SX1276SetTx( uint32_t timeout );
94
95 /*!
96 * \brief Writes the buffer contents to the SX1276 FIFO
97 *
98 * \param [IN] buffer Buffer containing data to be put on the FIFO.
99 * \param [IN] size Number of bytes to be written to the FIFO
100 */
101 static void SX1276WriteFifo( uint8_t *buffer, uint8_t size );
102
103 /*!
104 * \brief Reads the contents of the SX1276 FIFO
105 *
106 * \param [OUT] buffer Buffer where to copy the FIFO read data.
107 * \param [IN] size Number of bytes to be read from the FIFO
108 */
109 static void SX1276ReadFifo( uint8_t *buffer, uint8_t size );
110
111 /*!
112 * \brief Sets the SX1276 operating mode
113 *
114 * \param [IN] opMode New operating mode
115 */
116 static void SX1276SetOpMode( uint8_t opMode );
117
118 /*!
119 * \brief Get frequency in Hertz for a given number of PLL steps
120 *
121 * \param [in] pllSteps Number of PLL steps
122 *
123 * \returns Frequency in Hertz
124 */
125 static uint32_t SX1276ConvertPllStepToFreqInHz( uint32_t pllSteps );
126
127 /*!
128 * \brief Get the number of PLL steps for a given frequency in Hertz
129 *
130 * \param [in] freqInHz Frequency in Hertz
131 *
132 * \returns Number of PLL steps
133 */
134 static uint32_t SX1276ConvertFreqInHzToPllStep( uint32_t freqInHz );
135
136 /*!
137 * \brief Get the parameter corresponding to a FSK Rx bandwith immediately above the minimum requested one.
138 *
139 * \param [in] bw Minimum required bandwith in Hz
140 *
141 * \returns parameter
142 */
143 static uint8_t GetFskBandwidthRegValue( uint32_t bw );
144
145 /*!
146 * \brief Get the actual value in Hertz of a given LoRa bandwidth
147 *
148 * \param [in] bw LoRa bandwidth parameter
149 *
150 * \returns Actual LoRa bandwidth in Hertz
151 */
152 static uint32_t SX1276GetLoRaBandwidthInHz( uint32_t bw );
153
154 /*!
155 * Compute the numerator for GFSK time-on-air computation.
156 *
157 * \remark To get the actual time-on-air in second, this value has to be divided by the GFSK bitrate in bits per
158 * second.
159 *
160 * \param [in] preambleLen
161 * \param [in] fixLen
162 * \param [in] payloadLen
163 * \param [in] crcOn
164 *
165 * \returns GFSK time-on-air numerator
166 */
167 static uint32_t SX1276GetGfskTimeOnAirNumerator( uint16_t preambleLen, bool fixLen,
168 uint8_t payloadLen, bool crcOn );
169
170 /*!
171 * Compute the numerator for LoRa time-on-air computation.
172 *
173 * \remark To get the actual time-on-air in second, this value has to be divided by the LoRa bandwidth in Hertz.
174 *
175 * \param [in] bandwidth
176 * \param [in] datarate
177 * \param [in] coderate
178 * \param [in] preambleLen
179 * \param [in] fixLen
180 * \param [in] payloadLen
181 * \param [in] crcOn
182 *
183 * \returns LoRa time-on-air numerator
184 */
185 static uint32_t SX1276GetLoRaTimeOnAirNumerator( uint32_t bandwidth,
186 uint32_t datarate, uint8_t coderate,
187 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
188 bool crcOn );
189
190 /*
191 * SX1276 DIO IRQ callback functions prototype
192 */
193
194 /*!
195 * \brief DIO 0 IRQ callback
196 */
197 static void SX1276OnDio0Irq( void* context );
198
199 /*!
200 * \brief DIO 1 IRQ callback
201 */
202 static void SX1276OnDio1Irq( void* context );
203
204 /*!
205 * \brief DIO 2 IRQ callback
206 */
207 static void SX1276OnDio2Irq( void* context );
208
209 /*!
210 * \brief DIO 3 IRQ callback
211 */
212 static void SX1276OnDio3Irq( void* context );
213
214 /*!
215 * \brief DIO 4 IRQ callback
216 */
217 static void SX1276OnDio4Irq( void* context );
218
219 /*!
220 * \brief Tx & Rx timeout timer callback
221 */
222 static void SX1276OnTimeoutIrq( void* context );
223
224 /*
225 * Private global constants
226 */
227
228 /*!
229 * Radio hardware registers initialization
230 *
231 * \remark RADIO_INIT_REGISTERS_VALUE is defined in sx1276-board.h file
232 */
233 const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
234
235 /*!
236 * Constant values need to compute the RSSI value
237 */
238 #define RSSI_OFFSET_LF -164
239 #define RSSI_OFFSET_HF -157
240
241 /*!
242 * Precomputed FSK bandwidth registers values
243 */
244 const FskBandwidth_t FskBandwidths[] =
245 {
246 { 2600 , 0x17 },
247 { 3100 , 0x0F },
248 { 3900 , 0x07 },
249 { 5200 , 0x16 },
250 { 6300 , 0x0E },
251 { 7800 , 0x06 },
252 { 10400 , 0x15 },
253 { 12500 , 0x0D },
254 { 15600 , 0x05 },
255 { 20800 , 0x14 },
256 { 25000 , 0x0C },
257 { 31300 , 0x04 },
258 { 41700 , 0x13 },
259 { 50000 , 0x0B },
260 { 62500 , 0x03 },
261 { 83333 , 0x12 },
262 { 100000, 0x0A },
263 { 125000, 0x02 },
264 { 166700, 0x11 },
265 { 200000, 0x09 },
266 { 250000, 0x01 },
267 { 300000, 0x00 }, // Invalid Bandwidth
268 };
269
270 /*
271 * Private global variables
272 */
273
274 /*!
275 * Radio callbacks variable
276 */
277 static RadioEvents_t *RadioEvents;
278
279 /*!
280 * Reception buffer
281 */
282 static uint8_t RxTxBuffer[RX_TX_BUFFER_SIZE];
283
284 /*
285 * Public global variables
286 */
287
288 /*!
289 * Radio hardware and global parameters
290 */
291 SX1276_t SX1276;
292
293 /*!
294 * Hardware DIO IRQ callback initialization
295 */
296 DioIrqHandler *DioIrq[] = { SX1276OnDio0Irq, SX1276OnDio1Irq,
297 SX1276OnDio2Irq, SX1276OnDio3Irq,
298 SX1276OnDio4Irq, NULL };
299
300 /*!
301 * Tx and Rx timers
302 */
303 TimerEvent_t TxTimeoutTimer;
304 TimerEvent_t RxTimeoutTimer;
305 TimerEvent_t RxTimeoutSyncWord;
306
307 /*
308 * Radio driver functions implementation
309 */
310
SX1276Init(RadioEvents_t * events)311 void SX1276Init( RadioEvents_t *events )
312 {
313 uint8_t i;
314
315 RadioEvents = events;
316
317 // Initialize driver timeout timers
318 TimerInit( &TxTimeoutTimer, SX1276OnTimeoutIrq );
319 TimerInit( &RxTimeoutTimer, SX1276OnTimeoutIrq );
320 TimerInit( &RxTimeoutSyncWord, SX1276OnTimeoutIrq );
321
322 SX1276Reset( );
323
324 RxChainCalibration( );
325
326 SX1276SetOpMode( RF_OPMODE_SLEEP );
327
328 SX1276IoIrqInit( DioIrq );
329
330 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
331 {
332 SX1276SetModem( RadioRegsInit[i].Modem );
333 SX1276Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
334 }
335
336 SX1276SetModem( MODEM_FSK );
337
338 SX1276.Settings.State = RF_IDLE;
339 }
340
SX1276GetStatus(void)341 RadioState_t SX1276GetStatus( void )
342 {
343 return SX1276.Settings.State;
344 }
345
SX1276SetChannel(uint32_t freq)346 void SX1276SetChannel( uint32_t freq )
347 {
348 uint32_t freqInPllSteps = SX1276ConvertFreqInHzToPllStep( freq );
349
350 SX1276.Settings.Channel = freq;
351
352 SX1276Write( REG_FRFMSB, ( uint8_t )( ( freqInPllSteps >> 16 ) & 0xFF ) );
353 SX1276Write( REG_FRFMID, ( uint8_t )( ( freqInPllSteps >> 8 ) & 0xFF ) );
354 SX1276Write( REG_FRFLSB, ( uint8_t )( freqInPllSteps & 0xFF ) );
355 }
356
SX1276IsChannelFree(uint32_t freq,uint32_t rxBandwidth,int16_t rssiThresh,uint32_t maxCarrierSenseTime)357 bool SX1276IsChannelFree( uint32_t freq, uint32_t rxBandwidth, int16_t rssiThresh, uint32_t maxCarrierSenseTime )
358 {
359 bool status = true;
360 int16_t rssi = 0;
361 uint32_t carrierSenseTime = 0;
362
363 SX1276SetSleep( );
364
365 SX1276SetModem( MODEM_FSK );
366
367 SX1276SetChannel( freq );
368
369 SX1276Write( REG_RXBW, GetFskBandwidthRegValue( rxBandwidth ) );
370 SX1276Write( REG_AFCBW, GetFskBandwidthRegValue( rxBandwidth ) );
371
372 SX1276SetOpMode( RF_OPMODE_RECEIVER );
373
374 DelayMs( 1 );
375
376 carrierSenseTime = TimerGetCurrentTime( );
377
378 // Perform carrier sense for maxCarrierSenseTime
379 while( TimerGetElapsedTime( carrierSenseTime ) < maxCarrierSenseTime )
380 {
381 rssi = SX1276ReadRssi( MODEM_FSK );
382
383 if( rssi > rssiThresh )
384 {
385 status = false;
386 break;
387 }
388 }
389 SX1276SetSleep( );
390 return status;
391 }
392
SX1276Random(void)393 uint32_t SX1276Random( void )
394 {
395 uint8_t i;
396 uint32_t rnd = 0;
397
398 /*
399 * Radio setup for random number generation
400 */
401 // Set LoRa modem ON
402 SX1276SetModem( MODEM_LORA );
403
404 // Disable LoRa modem interrupts
405 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
406 RFLR_IRQFLAGS_RXDONE |
407 RFLR_IRQFLAGS_PAYLOADCRCERROR |
408 RFLR_IRQFLAGS_VALIDHEADER |
409 RFLR_IRQFLAGS_TXDONE |
410 RFLR_IRQFLAGS_CADDONE |
411 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
412 RFLR_IRQFLAGS_CADDETECTED );
413
414 // Set radio in continuous reception
415 SX1276SetOpMode( RF_OPMODE_RECEIVER );
416
417 for( i = 0; i < 32; i++ )
418 {
419 DelayMs( 1 );
420 // Unfiltered RSSI value reading. Only takes the LSB value
421 rnd |= ( ( uint32_t )SX1276Read( REG_LR_RSSIWIDEBAND ) & 0x01 ) << i;
422 }
423
424 SX1276SetSleep( );
425
426 return rnd;
427 }
428
429 /*!
430 * Performs the Rx chain calibration for LF and HF bands
431 * \remark Must be called just after the reset so all registers are at their
432 * default values
433 */
RxChainCalibration(void)434 static void RxChainCalibration( void )
435 {
436 uint8_t regPaConfigInitVal;
437 uint32_t initialFreq;
438
439 // Save context
440 regPaConfigInitVal = SX1276Read( REG_PACONFIG );
441
442 initialFreq = SX1276ConvertPllStepToFreqInHz( ( ( ( uint32_t )SX1276Read( REG_FRFMSB ) << 16 ) |
443 ( ( uint32_t )SX1276Read( REG_FRFMID ) << 8 ) |
444 ( ( uint32_t )SX1276Read( REG_FRFLSB ) ) ) );
445
446 // Cut the PA just in case, RFO output, power = -1 dBm
447 SX1276Write( REG_PACONFIG, 0x00 );
448
449 // Launch Rx chain calibration for LF band
450 SX1276Write( REG_IMAGECAL, ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_MASK ) | RF_IMAGECAL_IMAGECAL_START );
451 while( ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_RUNNING ) == RF_IMAGECAL_IMAGECAL_RUNNING )
452 {
453 }
454
455 // Sets a Frequency in HF band
456 SX1276SetChannel( 868000000 );
457
458 // Launch Rx chain calibration for HF band
459 SX1276Write( REG_IMAGECAL, ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_MASK ) | RF_IMAGECAL_IMAGECAL_START );
460 while( ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_RUNNING ) == RF_IMAGECAL_IMAGECAL_RUNNING )
461 {
462 }
463
464 // Restore context
465 SX1276Write( REG_PACONFIG, regPaConfigInitVal );
466 SX1276SetChannel( initialFreq );
467 }
468
SX1276SetRxConfig(RadioModems_t modem,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint32_t bandwidthAfc,uint16_t preambleLen,uint16_t symbTimeout,bool fixLen,uint8_t payloadLen,bool crcOn,bool freqHopOn,uint8_t hopPeriod,bool iqInverted,bool rxContinuous)469 void SX1276SetRxConfig( RadioModems_t modem, uint32_t bandwidth,
470 uint32_t datarate, uint8_t coderate,
471 uint32_t bandwidthAfc, uint16_t preambleLen,
472 uint16_t symbTimeout, bool fixLen,
473 uint8_t payloadLen,
474 bool crcOn, bool freqHopOn, uint8_t hopPeriod,
475 bool iqInverted, bool rxContinuous )
476 {
477 SX1276SetModem( modem );
478
479 switch( modem )
480 {
481 case MODEM_FSK:
482 {
483 SX1276.Settings.Fsk.Bandwidth = bandwidth;
484 SX1276.Settings.Fsk.Datarate = datarate;
485 SX1276.Settings.Fsk.BandwidthAfc = bandwidthAfc;
486 SX1276.Settings.Fsk.FixLen = fixLen;
487 SX1276.Settings.Fsk.PayloadLen = payloadLen;
488 SX1276.Settings.Fsk.CrcOn = crcOn;
489 SX1276.Settings.Fsk.IqInverted = iqInverted;
490 SX1276.Settings.Fsk.RxContinuous = rxContinuous;
491 SX1276.Settings.Fsk.PreambleLen = preambleLen;
492 SX1276.Settings.Fsk.RxSingleTimeout = ( uint32_t )symbTimeout * 8000UL / datarate;
493
494 uint32_t bitRate = ( uint32_t )( SX1276_XTAL_FREQ / datarate );
495 SX1276Write( REG_BITRATEMSB, ( uint8_t )( bitRate >> 8 ) );
496 SX1276Write( REG_BITRATELSB, ( uint8_t )( bitRate & 0xFF ) );
497
498 SX1276Write( REG_RXBW, GetFskBandwidthRegValue( bandwidth ) );
499 SX1276Write( REG_AFCBW, GetFskBandwidthRegValue( bandwidthAfc ) );
500
501 SX1276Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
502 SX1276Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
503
504 if( fixLen == 1 )
505 {
506 SX1276Write( REG_PAYLOADLENGTH, payloadLen );
507 }
508 else
509 {
510 SX1276Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
511 }
512
513 SX1276Write( REG_PACKETCONFIG1,
514 ( SX1276Read( REG_PACKETCONFIG1 ) &
515 RF_PACKETCONFIG1_CRC_MASK &
516 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
517 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
518 ( crcOn << 4 ) );
519 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
520 }
521 break;
522 case MODEM_LORA:
523 {
524 if( bandwidth > 2 )
525 {
526 // Fatal error: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported
527 while( 1 );
528 }
529 bandwidth += 7;
530 SX1276.Settings.LoRa.Bandwidth = bandwidth;
531 SX1276.Settings.LoRa.Datarate = datarate;
532 SX1276.Settings.LoRa.Coderate = coderate;
533 SX1276.Settings.LoRa.PreambleLen = preambleLen;
534 SX1276.Settings.LoRa.FixLen = fixLen;
535 SX1276.Settings.LoRa.PayloadLen = payloadLen;
536 SX1276.Settings.LoRa.CrcOn = crcOn;
537 SX1276.Settings.LoRa.FreqHopOn = freqHopOn;
538 SX1276.Settings.LoRa.HopPeriod = hopPeriod;
539 SX1276.Settings.LoRa.IqInverted = iqInverted;
540 SX1276.Settings.LoRa.RxContinuous = rxContinuous;
541
542 if( datarate > 12 )
543 {
544 datarate = 12;
545 }
546 else if( datarate < 6 )
547 {
548 datarate = 6;
549 }
550
551 if( ( ( bandwidth == 7 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
552 ( ( bandwidth == 8 ) && ( datarate == 12 ) ) )
553 {
554 SX1276.Settings.LoRa.LowDatarateOptimize = 0x01;
555 }
556 else
557 {
558 SX1276.Settings.LoRa.LowDatarateOptimize = 0x00;
559 }
560
561 SX1276Write( REG_LR_MODEMCONFIG1,
562 ( SX1276Read( REG_LR_MODEMCONFIG1 ) &
563 RFLR_MODEMCONFIG1_BW_MASK &
564 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
565 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK ) |
566 ( bandwidth << 4 ) | ( coderate << 1 ) |
567 fixLen );
568
569 SX1276Write( REG_LR_MODEMCONFIG2,
570 ( SX1276Read( REG_LR_MODEMCONFIG2 ) &
571 RFLR_MODEMCONFIG2_SF_MASK &
572 RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK &
573 RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) |
574 ( datarate << 4 ) | ( crcOn << 2 ) |
575 ( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
576
577 SX1276Write( REG_LR_MODEMCONFIG3,
578 ( SX1276Read( REG_LR_MODEMCONFIG3 ) &
579 RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK ) |
580 ( SX1276.Settings.LoRa.LowDatarateOptimize << 3 ) );
581
582 SX1276Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
583
584 SX1276Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
585 SX1276Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
586
587 if( fixLen == 1 )
588 {
589 SX1276Write( REG_LR_PAYLOADLENGTH, payloadLen );
590 }
591
592 if( SX1276.Settings.LoRa.FreqHopOn == true )
593 {
594 SX1276Write( REG_LR_PLLHOP, ( SX1276Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
595 SX1276Write( REG_LR_HOPPERIOD, SX1276.Settings.LoRa.HopPeriod );
596 }
597
598 if( ( bandwidth == 9 ) && ( SX1276.Settings.Channel > RF_MID_BAND_THRESH ) )
599 {
600 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
601 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x02 );
602 SX1276Write( REG_LR_HIGHBWOPTIMIZE2, 0x64 );
603 }
604 else if( bandwidth == 9 )
605 {
606 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
607 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x02 );
608 SX1276Write( REG_LR_HIGHBWOPTIMIZE2, 0x7F );
609 }
610 else
611 {
612 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
613 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x03 );
614 }
615
616 if( datarate == 6 )
617 {
618 SX1276Write( REG_LR_DETECTOPTIMIZE,
619 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
620 RFLR_DETECTIONOPTIMIZE_MASK ) |
621 RFLR_DETECTIONOPTIMIZE_SF6 );
622 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
623 RFLR_DETECTIONTHRESH_SF6 );
624 }
625 else
626 {
627 SX1276Write( REG_LR_DETECTOPTIMIZE,
628 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
629 RFLR_DETECTIONOPTIMIZE_MASK ) |
630 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
631 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
632 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
633 }
634 }
635 break;
636 }
637 }
638
SX1276SetTxConfig(RadioModems_t modem,int8_t power,uint32_t fdev,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,bool crcOn,bool freqHopOn,uint8_t hopPeriod,bool iqInverted,uint32_t timeout)639 void SX1276SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
640 uint32_t bandwidth, uint32_t datarate,
641 uint8_t coderate, uint16_t preambleLen,
642 bool fixLen, bool crcOn, bool freqHopOn,
643 uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
644 {
645 SX1276SetModem( modem );
646
647 SX1276SetRfTxPower( power );
648
649 switch( modem )
650 {
651 case MODEM_FSK:
652 {
653 SX1276.Settings.Fsk.Power = power;
654 SX1276.Settings.Fsk.Fdev = fdev;
655 SX1276.Settings.Fsk.Bandwidth = bandwidth;
656 SX1276.Settings.Fsk.Datarate = datarate;
657 SX1276.Settings.Fsk.PreambleLen = preambleLen;
658 SX1276.Settings.Fsk.FixLen = fixLen;
659 SX1276.Settings.Fsk.CrcOn = crcOn;
660 SX1276.Settings.Fsk.IqInverted = iqInverted;
661 SX1276.Settings.Fsk.TxTimeout = timeout;
662
663 uint32_t fdevInPllSteps = SX1276ConvertFreqInHzToPllStep( fdev );
664 SX1276Write( REG_FDEVMSB, ( uint8_t )( fdevInPllSteps >> 8 ) );
665 SX1276Write( REG_FDEVLSB, ( uint8_t )( fdevInPllSteps & 0xFF ) );
666
667 uint32_t bitRate = ( uint32_t )( SX1276_XTAL_FREQ / datarate );
668 SX1276Write( REG_BITRATEMSB, ( uint8_t )( bitRate >> 8 ) );
669 SX1276Write( REG_BITRATELSB, ( uint8_t )( bitRate & 0xFF ) );
670
671 SX1276Write( REG_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
672 SX1276Write( REG_PREAMBLELSB, preambleLen & 0xFF );
673
674 SX1276Write( REG_PACKETCONFIG1,
675 ( SX1276Read( REG_PACKETCONFIG1 ) &
676 RF_PACKETCONFIG1_CRC_MASK &
677 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
678 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
679 ( crcOn << 4 ) );
680 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
681 }
682 break;
683 case MODEM_LORA:
684 {
685 SX1276.Settings.LoRa.Power = power;
686 if( bandwidth > 2 )
687 {
688 // Fatal error: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported
689 while( 1 );
690 }
691 bandwidth += 7;
692 SX1276.Settings.LoRa.Bandwidth = bandwidth;
693 SX1276.Settings.LoRa.Datarate = datarate;
694 SX1276.Settings.LoRa.Coderate = coderate;
695 SX1276.Settings.LoRa.PreambleLen = preambleLen;
696 SX1276.Settings.LoRa.FixLen = fixLen;
697 SX1276.Settings.LoRa.FreqHopOn = freqHopOn;
698 SX1276.Settings.LoRa.HopPeriod = hopPeriod;
699 SX1276.Settings.LoRa.CrcOn = crcOn;
700 SX1276.Settings.LoRa.IqInverted = iqInverted;
701 SX1276.Settings.LoRa.TxTimeout = timeout;
702
703 if( datarate > 12 )
704 {
705 datarate = 12;
706 }
707 else if( datarate < 6 )
708 {
709 datarate = 6;
710 }
711 if( ( ( bandwidth == 7 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
712 ( ( bandwidth == 8 ) && ( datarate == 12 ) ) )
713 {
714 SX1276.Settings.LoRa.LowDatarateOptimize = 0x01;
715 }
716 else
717 {
718 SX1276.Settings.LoRa.LowDatarateOptimize = 0x00;
719 }
720
721 if( SX1276.Settings.LoRa.FreqHopOn == true )
722 {
723 SX1276Write( REG_LR_PLLHOP, ( SX1276Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
724 SX1276Write( REG_LR_HOPPERIOD, SX1276.Settings.LoRa.HopPeriod );
725 }
726
727 SX1276Write( REG_LR_MODEMCONFIG1,
728 ( SX1276Read( REG_LR_MODEMCONFIG1 ) &
729 RFLR_MODEMCONFIG1_BW_MASK &
730 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
731 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK ) |
732 ( bandwidth << 4 ) | ( coderate << 1 ) |
733 fixLen );
734
735 SX1276Write( REG_LR_MODEMCONFIG2,
736 ( SX1276Read( REG_LR_MODEMCONFIG2 ) &
737 RFLR_MODEMCONFIG2_SF_MASK &
738 RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK ) |
739 ( datarate << 4 ) | ( crcOn << 2 ) );
740
741 SX1276Write( REG_LR_MODEMCONFIG3,
742 ( SX1276Read( REG_LR_MODEMCONFIG3 ) &
743 RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK ) |
744 ( SX1276.Settings.LoRa.LowDatarateOptimize << 3 ) );
745
746 SX1276Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
747 SX1276Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
748
749 if( datarate == 6 )
750 {
751 SX1276Write( REG_LR_DETECTOPTIMIZE,
752 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
753 RFLR_DETECTIONOPTIMIZE_MASK ) |
754 RFLR_DETECTIONOPTIMIZE_SF6 );
755 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
756 RFLR_DETECTIONTHRESH_SF6 );
757 }
758 else
759 {
760 SX1276Write( REG_LR_DETECTOPTIMIZE,
761 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
762 RFLR_DETECTIONOPTIMIZE_MASK ) |
763 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
764 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
765 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
766 }
767 }
768 break;
769 }
770 }
771
SX1276GetTimeOnAir(RadioModems_t modem,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)772 uint32_t SX1276GetTimeOnAir( RadioModems_t modem, uint32_t bandwidth,
773 uint32_t datarate, uint8_t coderate,
774 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
775 bool crcOn )
776 {
777 uint32_t numerator = 0;
778 uint32_t denominator = 1;
779
780 switch( modem )
781 {
782 case MODEM_FSK:
783 {
784 numerator = 1000U * SX1276GetGfskTimeOnAirNumerator( preambleLen, fixLen, payloadLen, crcOn );
785 denominator = datarate;
786 }
787 break;
788 case MODEM_LORA:
789 {
790 numerator = 1000U * SX1276GetLoRaTimeOnAirNumerator( bandwidth, datarate, coderate, preambleLen, fixLen,
791 payloadLen, crcOn );
792 denominator = SX1276GetLoRaBandwidthInHz( bandwidth );
793 }
794 break;
795 }
796 // Perform integral ceil()
797 return ( numerator + denominator - 1 ) / denominator;
798 }
799
SX1276Send(uint8_t * buffer,uint8_t size)800 void SX1276Send( uint8_t *buffer, uint8_t size )
801 {
802 uint32_t txTimeout = 0;
803
804 switch( SX1276.Settings.Modem )
805 {
806 case MODEM_FSK:
807 {
808 SX1276.Settings.FskPacketHandler.NbBytes = 0;
809 SX1276.Settings.FskPacketHandler.Size = size;
810
811 if( SX1276.Settings.Fsk.FixLen == false )
812 {
813 SX1276WriteFifo( ( uint8_t* )&size, 1 );
814 }
815 else
816 {
817 SX1276Write( REG_PAYLOADLENGTH, size );
818 }
819
820 if( ( size > 0 ) && ( size <= 64 ) )
821 {
822 SX1276.Settings.FskPacketHandler.ChunkSize = size;
823 }
824 else
825 {
826 memcpy1( RxTxBuffer, buffer, size );
827 SX1276.Settings.FskPacketHandler.ChunkSize = 32;
828 }
829
830 // Write payload buffer
831 SX1276WriteFifo( buffer, SX1276.Settings.FskPacketHandler.ChunkSize );
832 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.ChunkSize;
833 txTimeout = SX1276.Settings.Fsk.TxTimeout;
834 }
835 break;
836 case MODEM_LORA:
837 {
838 if( SX1276.Settings.LoRa.IqInverted == true )
839 {
840 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_ON ) );
841 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
842 }
843 else
844 {
845 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
846 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
847 }
848
849 SX1276.Settings.LoRaPacketHandler.Size = size;
850
851 // Initializes the payload size
852 SX1276Write( REG_LR_PAYLOADLENGTH, size );
853
854 // Full buffer used for Tx
855 SX1276Write( REG_LR_FIFOTXBASEADDR, 0 );
856 SX1276Write( REG_LR_FIFOADDRPTR, 0 );
857
858 // FIFO operations can not take place in Sleep mode
859 if( ( SX1276Read( REG_OPMODE ) & ~RF_OPMODE_MASK ) == RF_OPMODE_SLEEP )
860 {
861 SX1276SetStby( );
862 DelayMs( 1 );
863 }
864 // Write payload buffer
865 SX1276WriteFifo( buffer, size );
866 txTimeout = SX1276.Settings.LoRa.TxTimeout;
867 }
868 break;
869 }
870
871 SX1276SetTx( txTimeout );
872 }
873
SX1276SetSleep(void)874 void SX1276SetSleep( void )
875 {
876 TimerStop( &RxTimeoutTimer );
877 TimerStop( &TxTimeoutTimer );
878 TimerStop( &RxTimeoutSyncWord );
879
880 SX1276SetOpMode( RF_OPMODE_SLEEP );
881
882 // Disable TCXO radio is in SLEEP mode
883 SX1276SetBoardTcxo( false );
884
885 SX1276.Settings.State = RF_IDLE;
886 }
887
SX1276SetStby(void)888 void SX1276SetStby( void )
889 {
890 TimerStop( &RxTimeoutTimer );
891 TimerStop( &TxTimeoutTimer );
892 TimerStop( &RxTimeoutSyncWord );
893
894 SX1276SetOpMode( RF_OPMODE_STANDBY );
895 SX1276.Settings.State = RF_IDLE;
896 }
897
SX1276SetRx(uint32_t timeout)898 void SX1276SetRx( uint32_t timeout )
899 {
900 bool rxContinuous = false;
901 TimerStop( &TxTimeoutTimer );
902
903 switch( SX1276.Settings.Modem )
904 {
905 case MODEM_FSK:
906 {
907 rxContinuous = SX1276.Settings.Fsk.RxContinuous;
908
909 // DIO0=PayloadReady
910 // DIO1=FifoLevel
911 // DIO2=SyncAddr
912 // DIO3=FifoEmpty
913 // DIO4=Preamble
914 // DIO5=ModeReady
915 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
916 RF_DIOMAPPING1_DIO1_MASK &
917 RF_DIOMAPPING1_DIO2_MASK ) |
918 RF_DIOMAPPING1_DIO0_00 |
919 RF_DIOMAPPING1_DIO1_00 |
920 RF_DIOMAPPING1_DIO2_11 );
921
922 SX1276Write( REG_DIOMAPPING2, ( SX1276Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
923 RF_DIOMAPPING2_MAP_MASK ) |
924 RF_DIOMAPPING2_DIO4_11 |
925 RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
926
927 SX1276.Settings.FskPacketHandler.FifoThresh = SX1276Read( REG_FIFOTHRESH ) & 0x3F;
928
929 SX1276Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
930
931 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
932 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
933 SX1276.Settings.FskPacketHandler.NbBytes = 0;
934 SX1276.Settings.FskPacketHandler.Size = 0;
935 }
936 break;
937 case MODEM_LORA:
938 {
939 if( SX1276.Settings.LoRa.IqInverted == true )
940 {
941 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_ON | RFLR_INVERTIQ_TX_OFF ) );
942 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
943 }
944 else
945 {
946 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
947 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
948 }
949
950 // ERRATA 2.3 - Receiver Spurious Reception of a LoRa Signal
951 if( SX1276.Settings.LoRa.Bandwidth < 9 )
952 {
953 SX1276Write( REG_LR_DETECTOPTIMIZE, SX1276Read( REG_LR_DETECTOPTIMIZE ) & 0x7F );
954 SX1276Write( REG_LR_IFFREQ2, 0x00 );
955 switch( SX1276.Settings.LoRa.Bandwidth )
956 {
957 case 0: // 7.8 kHz
958 SX1276Write( REG_LR_IFFREQ1, 0x48 );
959 SX1276SetChannel(SX1276.Settings.Channel + 7810 );
960 break;
961 case 1: // 10.4 kHz
962 SX1276Write( REG_LR_IFFREQ1, 0x44 );
963 SX1276SetChannel(SX1276.Settings.Channel + 10420 );
964 break;
965 case 2: // 15.6 kHz
966 SX1276Write( REG_LR_IFFREQ1, 0x44 );
967 SX1276SetChannel(SX1276.Settings.Channel + 15620 );
968 break;
969 case 3: // 20.8 kHz
970 SX1276Write( REG_LR_IFFREQ1, 0x44 );
971 SX1276SetChannel(SX1276.Settings.Channel + 20830 );
972 break;
973 case 4: // 31.2 kHz
974 SX1276Write( REG_LR_IFFREQ1, 0x44 );
975 SX1276SetChannel(SX1276.Settings.Channel + 31250 );
976 break;
977 case 5: // 41.4 kHz
978 SX1276Write( REG_LR_IFFREQ1, 0x44 );
979 SX1276SetChannel(SX1276.Settings.Channel + 41670 );
980 break;
981 case 6: // 62.5 kHz
982 SX1276Write( REG_LR_IFFREQ1, 0x40 );
983 break;
984 case 7: // 125 kHz
985 SX1276Write( REG_LR_IFFREQ1, 0x40 );
986 break;
987 case 8: // 250 kHz
988 SX1276Write( REG_LR_IFFREQ1, 0x40 );
989 break;
990 }
991 }
992 else
993 {
994 SX1276Write( REG_LR_DETECTOPTIMIZE, SX1276Read( REG_LR_DETECTOPTIMIZE ) | 0x80 );
995 }
996
997 rxContinuous = SX1276.Settings.LoRa.RxContinuous;
998
999 if( SX1276.Settings.LoRa.FreqHopOn == true )
1000 {
1001 SX1276Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
1002 //RFLR_IRQFLAGS_RXDONE |
1003 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
1004 RFLR_IRQFLAGS_VALIDHEADER |
1005 RFLR_IRQFLAGS_TXDONE |
1006 RFLR_IRQFLAGS_CADDONE |
1007 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1008 RFLR_IRQFLAGS_CADDETECTED );
1009
1010 // DIO0=RxDone, DIO2=FhssChangeChannel
1011 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
1012 }
1013 else
1014 {
1015 SX1276Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
1016 //RFLR_IRQFLAGS_RXDONE |
1017 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
1018 RFLR_IRQFLAGS_VALIDHEADER |
1019 RFLR_IRQFLAGS_TXDONE |
1020 RFLR_IRQFLAGS_CADDONE |
1021 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1022 RFLR_IRQFLAGS_CADDETECTED );
1023
1024 // DIO0=RxDone
1025 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
1026 }
1027 SX1276Write( REG_LR_FIFORXBASEADDR, 0 );
1028 SX1276Write( REG_LR_FIFOADDRPTR, 0 );
1029 }
1030 break;
1031 }
1032
1033 memset( RxTxBuffer, 0, ( size_t )RX_TX_BUFFER_SIZE );
1034
1035 SX1276.Settings.State = RF_RX_RUNNING;
1036 if( timeout != 0 )
1037 {
1038 TimerSetValue( &RxTimeoutTimer, timeout );
1039 TimerStart( &RxTimeoutTimer );
1040 }
1041
1042 if( SX1276.Settings.Modem == MODEM_FSK )
1043 {
1044 SX1276SetOpMode( RF_OPMODE_RECEIVER );
1045
1046 if( rxContinuous == false )
1047 {
1048 TimerSetValue( &RxTimeoutSyncWord, SX1276.Settings.Fsk.RxSingleTimeout );
1049 TimerStart( &RxTimeoutSyncWord );
1050 }
1051 }
1052 else
1053 {
1054 if( rxContinuous == true )
1055 {
1056 SX1276SetOpMode( RFLR_OPMODE_RECEIVER );
1057 }
1058 else
1059 {
1060 SX1276SetOpMode( RFLR_OPMODE_RECEIVER_SINGLE );
1061 }
1062 }
1063 }
1064
SX1276SetTx(uint32_t timeout)1065 static void SX1276SetTx( uint32_t timeout )
1066 {
1067 TimerStop( &RxTimeoutTimer );
1068
1069 TimerSetValue( &TxTimeoutTimer, timeout );
1070
1071 switch( SX1276.Settings.Modem )
1072 {
1073 case MODEM_FSK:
1074 {
1075 // DIO0=PacketSent
1076 // DIO1=FifoLevel
1077 // DIO2=FifoFull
1078 // DIO3=FifoEmpty
1079 // DIO4=LowBat
1080 // DIO5=ModeReady
1081 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
1082 RF_DIOMAPPING1_DIO1_MASK &
1083 RF_DIOMAPPING1_DIO2_MASK ) );
1084
1085 SX1276Write( REG_DIOMAPPING2, ( SX1276Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
1086 RF_DIOMAPPING2_MAP_MASK ) );
1087 SX1276.Settings.FskPacketHandler.FifoThresh = SX1276Read( REG_FIFOTHRESH ) & 0x3F;
1088 }
1089 break;
1090 case MODEM_LORA:
1091 {
1092 if( SX1276.Settings.LoRa.FreqHopOn == true )
1093 {
1094 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1095 RFLR_IRQFLAGS_RXDONE |
1096 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1097 RFLR_IRQFLAGS_VALIDHEADER |
1098 //RFLR_IRQFLAGS_TXDONE |
1099 RFLR_IRQFLAGS_CADDONE |
1100 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1101 RFLR_IRQFLAGS_CADDETECTED );
1102
1103 // DIO0=TxDone, DIO2=FhssChangeChannel
1104 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
1105 }
1106 else
1107 {
1108 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1109 RFLR_IRQFLAGS_RXDONE |
1110 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1111 RFLR_IRQFLAGS_VALIDHEADER |
1112 //RFLR_IRQFLAGS_TXDONE |
1113 RFLR_IRQFLAGS_CADDONE |
1114 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1115 RFLR_IRQFLAGS_CADDETECTED );
1116
1117 // DIO0=TxDone
1118 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_01 );
1119 }
1120 }
1121 break;
1122 }
1123
1124 SX1276.Settings.State = RF_TX_RUNNING;
1125 TimerStart( &TxTimeoutTimer );
1126 SX1276SetOpMode( RF_OPMODE_TRANSMITTER );
1127 }
1128
SX1276StartCad(void)1129 void SX1276StartCad( void )
1130 {
1131 switch( SX1276.Settings.Modem )
1132 {
1133 case MODEM_FSK:
1134 {
1135
1136 }
1137 break;
1138 case MODEM_LORA:
1139 {
1140 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1141 RFLR_IRQFLAGS_RXDONE |
1142 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1143 RFLR_IRQFLAGS_VALIDHEADER |
1144 RFLR_IRQFLAGS_TXDONE |
1145 //RFLR_IRQFLAGS_CADDONE |
1146 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
1147 //RFLR_IRQFLAGS_CADDETECTED
1148 );
1149
1150 // DIO3=CADDone
1151 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFLR_DIOMAPPING1_DIO3_00 );
1152
1153 SX1276.Settings.State = RF_CAD;
1154 SX1276SetOpMode( RFLR_OPMODE_CAD );
1155 }
1156 break;
1157 default:
1158 break;
1159 }
1160 }
1161
SX1276SetTxContinuousWave(uint32_t freq,int8_t power,uint16_t time)1162 void SX1276SetTxContinuousWave( uint32_t freq, int8_t power, uint16_t time )
1163 {
1164 uint32_t timeout = ( uint32_t )time * 1000;
1165
1166 SX1276SetChannel( freq );
1167
1168 SX1276SetTxConfig( MODEM_FSK, power, 0, 0, 4800, 0, 5, false, false, 0, 0, 0, timeout );
1169
1170 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK ) );
1171 // Disable radio interrupts
1172 SX1276Write( REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_11 );
1173 SX1276Write( REG_DIOMAPPING2, RF_DIOMAPPING2_DIO4_10 | RF_DIOMAPPING2_DIO5_10 );
1174
1175 TimerSetValue( &TxTimeoutTimer, timeout );
1176
1177 SX1276.Settings.State = RF_TX_RUNNING;
1178 TimerStart( &TxTimeoutTimer );
1179 SX1276SetOpMode( RF_OPMODE_TRANSMITTER );
1180 }
1181
SX1276ReadRssi(RadioModems_t modem)1182 int16_t SX1276ReadRssi( RadioModems_t modem )
1183 {
1184 int16_t rssi = 0;
1185
1186 switch( modem )
1187 {
1188 case MODEM_FSK:
1189 rssi = -( SX1276Read( REG_RSSIVALUE ) >> 1 );
1190 break;
1191 case MODEM_LORA:
1192 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1193 {
1194 rssi = RSSI_OFFSET_HF + SX1276Read( REG_LR_RSSIVALUE );
1195 }
1196 else
1197 {
1198 rssi = RSSI_OFFSET_LF + SX1276Read( REG_LR_RSSIVALUE );
1199 }
1200 break;
1201 default:
1202 rssi = -1;
1203 break;
1204 }
1205 return rssi;
1206 }
1207
SX1276SetOpMode(uint8_t opMode)1208 static void SX1276SetOpMode( uint8_t opMode )
1209 {
1210 #if defined( USE_RADIO_DEBUG )
1211 switch( opMode )
1212 {
1213 case RF_OPMODE_TRANSMITTER:
1214 SX1276DbgPinTxWrite( 1 );
1215 SX1276DbgPinRxWrite( 0 );
1216 break;
1217 case RF_OPMODE_RECEIVER:
1218 case RFLR_OPMODE_RECEIVER_SINGLE:
1219 SX1276DbgPinTxWrite( 0 );
1220 SX1276DbgPinRxWrite( 1 );
1221 break;
1222 default:
1223 SX1276DbgPinTxWrite( 0 );
1224 SX1276DbgPinRxWrite( 0 );
1225 break;
1226 }
1227 #endif
1228 if( opMode == RF_OPMODE_SLEEP )
1229 {
1230 SX1276SetAntSwLowPower( true );
1231 }
1232 else
1233 {
1234 // Enable TCXO if operating mode different from SLEEP.
1235 SX1276SetBoardTcxo( true );
1236 SX1276SetAntSwLowPower( false );
1237 SX1276SetAntSw( opMode );
1238 }
1239 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
1240 }
1241
SX1276SetModem(RadioModems_t modem)1242 void SX1276SetModem( RadioModems_t modem )
1243 {
1244 if( ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 )
1245 {
1246 SX1276.Settings.Modem = MODEM_LORA;
1247 }
1248 else
1249 {
1250 SX1276.Settings.Modem = MODEM_FSK;
1251 }
1252
1253 if( SX1276.Settings.Modem == modem )
1254 {
1255 return;
1256 }
1257
1258 SX1276.Settings.Modem = modem;
1259 switch( SX1276.Settings.Modem )
1260 {
1261 default:
1262 case MODEM_FSK:
1263 SX1276SetOpMode( RF_OPMODE_SLEEP );
1264 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_OFF );
1265
1266 SX1276Write( REG_DIOMAPPING1, 0x00 );
1267 SX1276Write( REG_DIOMAPPING2, 0x30 ); // DIO5=ModeReady
1268 break;
1269 case MODEM_LORA:
1270 SX1276SetOpMode( RF_OPMODE_SLEEP );
1271 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_ON );
1272
1273 SX1276Write( REG_DIOMAPPING1, 0x00 );
1274 SX1276Write( REG_DIOMAPPING2, 0x00 );
1275 break;
1276 }
1277 }
1278
SX1276Write(uint32_t addr,uint8_t data)1279 void SX1276Write( uint32_t addr, uint8_t data )
1280 {
1281 SX1276WriteBuffer( addr, &data, 1 );
1282 }
1283
SX1276Read(uint32_t addr)1284 uint8_t SX1276Read( uint32_t addr )
1285 {
1286 uint8_t data;
1287 SX1276ReadBuffer( addr, &data, 1 );
1288 return data;
1289 }
1290
1291 #ifndef __ZEPHYR__
SX1276WriteBuffer(uint32_t addr,uint8_t * buffer,uint8_t size)1292 void SX1276WriteBuffer( uint32_t addr, uint8_t *buffer, uint8_t size )
1293 {
1294 uint8_t i;
1295
1296 //NSS = 0;
1297 GpioWrite( &SX1276.Spi.Nss, 0 );
1298
1299 SpiInOut( &SX1276.Spi, addr | 0x80 );
1300 for( i = 0; i < size; i++ )
1301 {
1302 SpiInOut( &SX1276.Spi, buffer[i] );
1303 }
1304
1305 //NSS = 1;
1306 GpioWrite( &SX1276.Spi.Nss, 1 );
1307 }
1308
SX1276ReadBuffer(uint32_t addr,uint8_t * buffer,uint8_t size)1309 void SX1276ReadBuffer( uint32_t addr, uint8_t *buffer, uint8_t size )
1310 {
1311 uint8_t i;
1312
1313 //NSS = 0;
1314 GpioWrite( &SX1276.Spi.Nss, 0 );
1315
1316 SpiInOut( &SX1276.Spi, addr & 0x7F );
1317
1318 for( i = 0; i < size; i++ )
1319 {
1320 buffer[i] = SpiInOut( &SX1276.Spi, 0 );
1321 }
1322
1323 //NSS = 1;
1324 GpioWrite( &SX1276.Spi.Nss, 1 );
1325 }
1326 #endif
1327
SX1276WriteFifo(uint8_t * buffer,uint8_t size)1328 static void SX1276WriteFifo( uint8_t *buffer, uint8_t size )
1329 {
1330 SX1276WriteBuffer( 0, buffer, size );
1331 }
1332
SX1276ReadFifo(uint8_t * buffer,uint8_t size)1333 static void SX1276ReadFifo( uint8_t *buffer, uint8_t size )
1334 {
1335 SX1276ReadBuffer( 0, buffer, size );
1336 }
1337
SX1276SetMaxPayloadLength(RadioModems_t modem,uint8_t max)1338 void SX1276SetMaxPayloadLength( RadioModems_t modem, uint8_t max )
1339 {
1340 SX1276SetModem( modem );
1341
1342 switch( modem )
1343 {
1344 case MODEM_FSK:
1345 if( SX1276.Settings.Fsk.FixLen == false )
1346 {
1347 SX1276Write( REG_PAYLOADLENGTH, max );
1348 }
1349 break;
1350 case MODEM_LORA:
1351 SX1276Write( REG_LR_PAYLOADMAXLENGTH, max );
1352 break;
1353 }
1354 }
1355
SX1276SetPublicNetwork(bool enable)1356 void SX1276SetPublicNetwork( bool enable )
1357 {
1358 SX1276SetModem( MODEM_LORA );
1359 SX1276.Settings.LoRa.PublicNetwork = enable;
1360 if( enable == true )
1361 {
1362 // Change LoRa modem SyncWord
1363 SX1276Write( REG_LR_SYNCWORD, LORA_MAC_PUBLIC_SYNCWORD );
1364 }
1365 else
1366 {
1367 // Change LoRa modem SyncWord
1368 SX1276Write( REG_LR_SYNCWORD, LORA_MAC_PRIVATE_SYNCWORD );
1369 }
1370 }
1371
SX1276GetWakeupTime(void)1372 uint32_t SX1276GetWakeupTime( void )
1373 {
1374 return SX1276GetBoardTcxoWakeupTime( ) + RADIO_WAKEUP_TIME;
1375 }
1376
SX1276ConvertPllStepToFreqInHz(uint32_t pllSteps)1377 static uint32_t SX1276ConvertPllStepToFreqInHz( uint32_t pllSteps )
1378 {
1379 uint32_t freqInHzInt;
1380 uint32_t freqInHzFrac;
1381
1382 // freqInHz = pllSteps * ( SX1276_XTAL_FREQ / 2^19 )
1383 // Get integer and fractional parts of the frequency computed with a PLL step scaled value
1384 freqInHzInt = pllSteps >> SX1276_PLL_STEP_SHIFT_AMOUNT;
1385 freqInHzFrac = pllSteps - ( freqInHzInt << SX1276_PLL_STEP_SHIFT_AMOUNT );
1386
1387 // Apply the scaling factor to retrieve a frequency in Hz (+ ceiling)
1388 return freqInHzInt * SX1276_PLL_STEP_SCALED +
1389 ( ( freqInHzFrac * SX1276_PLL_STEP_SCALED + ( 128 ) ) >> SX1276_PLL_STEP_SHIFT_AMOUNT );
1390 }
1391
SX1276ConvertFreqInHzToPllStep(uint32_t freqInHz)1392 static uint32_t SX1276ConvertFreqInHzToPllStep( uint32_t freqInHz )
1393 {
1394 uint32_t stepsInt;
1395 uint32_t stepsFrac;
1396
1397 // pllSteps = freqInHz / (SX1276_XTAL_FREQ / 2^19 )
1398 // Get integer and fractional parts of the frequency computed with a PLL step scaled value
1399 stepsInt = freqInHz / SX1276_PLL_STEP_SCALED;
1400 stepsFrac = freqInHz - ( stepsInt * SX1276_PLL_STEP_SCALED );
1401
1402 // Apply the scaling factor to retrieve a frequency in Hz (+ ceiling)
1403 return ( stepsInt << SX1276_PLL_STEP_SHIFT_AMOUNT ) +
1404 ( ( ( stepsFrac << SX1276_PLL_STEP_SHIFT_AMOUNT ) + ( SX1276_PLL_STEP_SCALED >> 1 ) ) /
1405 SX1276_PLL_STEP_SCALED );
1406 }
1407
GetFskBandwidthRegValue(uint32_t bw)1408 static uint8_t GetFskBandwidthRegValue( uint32_t bw )
1409 {
1410 uint8_t i;
1411
1412 for( i = 0; i < ( sizeof( FskBandwidths ) / sizeof( FskBandwidth_t ) ) - 1; i++ )
1413 {
1414 if( ( bw >= FskBandwidths[i].bandwidth ) && ( bw < FskBandwidths[i + 1].bandwidth ) )
1415 {
1416 return FskBandwidths[i].RegValue;
1417 }
1418 }
1419 // ERROR: Value not found
1420 while( 1 );
1421 }
1422
SX1276GetLoRaBandwidthInHz(uint32_t bw)1423 static uint32_t SX1276GetLoRaBandwidthInHz( uint32_t bw )
1424 {
1425 uint32_t bandwidthInHz = 0;
1426
1427 switch( bw )
1428 {
1429 case 0: // 125 kHz
1430 bandwidthInHz = 125000UL;
1431 break;
1432 case 1: // 250 kHz
1433 bandwidthInHz = 250000UL;
1434 break;
1435 case 2: // 500 kHz
1436 bandwidthInHz = 500000UL;
1437 break;
1438 }
1439
1440 return bandwidthInHz;
1441 }
1442
SX1276GetGfskTimeOnAirNumerator(uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)1443 static uint32_t SX1276GetGfskTimeOnAirNumerator( uint16_t preambleLen, bool fixLen,
1444 uint8_t payloadLen, bool crcOn )
1445 {
1446 const uint8_t syncWordLength = 3;
1447
1448 return ( preambleLen << 3 ) +
1449 ( ( fixLen == false ) ? 8 : 0 ) +
1450 ( syncWordLength << 3 ) +
1451 ( ( payloadLen +
1452 ( 0 ) + // Address filter size
1453 ( ( crcOn == true ) ? 2 : 0 )
1454 ) << 3
1455 );
1456 }
1457
SX1276GetLoRaTimeOnAirNumerator(uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)1458 static uint32_t SX1276GetLoRaTimeOnAirNumerator( uint32_t bandwidth,
1459 uint32_t datarate, uint8_t coderate,
1460 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
1461 bool crcOn )
1462 {
1463 int32_t crDenom = coderate + 4;
1464 bool lowDatareOptimize = false;
1465
1466 // Ensure that the preamble length is at least 12 symbols when using SF5 or
1467 // SF6
1468 if( ( datarate == 5 ) || ( datarate == 6 ) )
1469 {
1470 if( preambleLen < 12 )
1471 {
1472 preambleLen = 12;
1473 }
1474 }
1475
1476 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
1477 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
1478 {
1479 lowDatareOptimize = true;
1480 }
1481
1482 int32_t ceilDenominator;
1483 int32_t ceilNumerator = ( payloadLen << 3 ) +
1484 ( crcOn ? 16 : 0 ) -
1485 ( 4 * datarate ) +
1486 ( fixLen ? 0 : 20 );
1487
1488 if( datarate <= 6 )
1489 {
1490 ceilDenominator = 4 * datarate;
1491 }
1492 else
1493 {
1494 ceilNumerator += 8;
1495
1496 if( lowDatareOptimize == true )
1497 {
1498 ceilDenominator = 4 * ( datarate - 2 );
1499 }
1500 else
1501 {
1502 ceilDenominator = 4 * datarate;
1503 }
1504 }
1505
1506 if( ceilNumerator < 0 )
1507 {
1508 ceilNumerator = 0;
1509 }
1510
1511 // Perform integral ceil()
1512 int32_t intermediate =
1513 ( ( ceilNumerator + ceilDenominator - 1 ) / ceilDenominator ) * crDenom + preambleLen + 12;
1514
1515 if( datarate <= 6 )
1516 {
1517 intermediate += 2;
1518 }
1519
1520 return ( uint32_t )( ( 4 * intermediate + 1 ) * ( 1 << ( datarate - 2 ) ) );
1521 }
1522
SX1276OnTimeoutIrq(void * context)1523 static void SX1276OnTimeoutIrq( void* context )
1524 {
1525 switch( SX1276.Settings.State )
1526 {
1527 case RF_RX_RUNNING:
1528 if( SX1276.Settings.Modem == MODEM_FSK )
1529 {
1530 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1531 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1532 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1533 SX1276.Settings.FskPacketHandler.Size = 0;
1534
1535 // Clear Irqs
1536 SX1276Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
1537 RF_IRQFLAGS1_PREAMBLEDETECT |
1538 RF_IRQFLAGS1_SYNCADDRESSMATCH );
1539 SX1276Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
1540
1541 if( SX1276.Settings.Fsk.RxContinuous == true )
1542 {
1543 // Continuous mode restart Rx chain
1544 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1545 }
1546 else
1547 {
1548 SX1276.Settings.State = RF_IDLE;
1549 TimerStop( &RxTimeoutSyncWord );
1550 }
1551 }
1552 if( ( RadioEvents != NULL ) && ( RadioEvents->RxTimeout != NULL ) )
1553 {
1554 RadioEvents->RxTimeout( );
1555 }
1556 break;
1557 case RF_TX_RUNNING:
1558 // Tx timeout shouldn't happen.
1559 // Reported issue of SPI data corruption resulting in TX TIMEOUT
1560 // is NOT related to a bug in radio transceiver.
1561 // It is mainly caused by improper PCB routing of SPI lines and/or
1562 // violation of SPI specifications.
1563 // To mitigate redesign, Semtech offers a workaround which resets
1564 // the radio transceiver and putting it into a known state.
1565
1566 // BEGIN WORKAROUND
1567
1568 // Reset the radio
1569 SX1276Reset( );
1570
1571 // Calibrate Rx chain
1572 RxChainCalibration( );
1573
1574 // Initialize radio default values
1575 SX1276SetOpMode( RF_OPMODE_SLEEP );
1576
1577 for( uint8_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
1578 {
1579 SX1276SetModem( RadioRegsInit[i].Modem );
1580 SX1276Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
1581 }
1582 SX1276SetModem( MODEM_FSK );
1583
1584 // Restore previous network type setting.
1585 SX1276SetPublicNetwork( SX1276.Settings.LoRa.PublicNetwork );
1586 // END WORKAROUND
1587
1588 SX1276.Settings.State = RF_IDLE;
1589 if( ( RadioEvents != NULL ) && ( RadioEvents->TxTimeout != NULL ) )
1590 {
1591 RadioEvents->TxTimeout( );
1592 }
1593 break;
1594 default:
1595 break;
1596 }
1597 }
1598
SX1276OnDio0Irq(void * context)1599 static void SX1276OnDio0Irq( void* context )
1600 {
1601 volatile uint8_t irqFlags = 0;
1602
1603 switch( SX1276.Settings.State )
1604 {
1605 case RF_RX_RUNNING:
1606 //TimerStop( &RxTimeoutTimer );
1607 // RxDone interrupt
1608 switch( SX1276.Settings.Modem )
1609 {
1610 case MODEM_FSK:
1611 if( SX1276.Settings.Fsk.CrcOn == true )
1612 {
1613 irqFlags = SX1276Read( REG_IRQFLAGS2 );
1614 if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
1615 {
1616 // Clear Irqs
1617 SX1276Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
1618 RF_IRQFLAGS1_PREAMBLEDETECT |
1619 RF_IRQFLAGS1_SYNCADDRESSMATCH );
1620 SX1276Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
1621
1622 TimerStop( &RxTimeoutTimer );
1623
1624 if( SX1276.Settings.Fsk.RxContinuous == false )
1625 {
1626 TimerStop( &RxTimeoutSyncWord );
1627 SX1276.Settings.State = RF_IDLE;
1628 }
1629 else
1630 {
1631 // Continuous mode restart Rx chain
1632 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1633 }
1634
1635 if( ( RadioEvents != NULL ) && ( RadioEvents->RxError != NULL ) )
1636 {
1637 RadioEvents->RxError( );
1638 }
1639 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1640 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1641 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1642 SX1276.Settings.FskPacketHandler.Size = 0;
1643 break;
1644 }
1645 }
1646
1647 // Read received packet size
1648 if( ( SX1276.Settings.FskPacketHandler.Size == 0 ) && ( SX1276.Settings.FskPacketHandler.NbBytes == 0 ) )
1649 {
1650 if( SX1276.Settings.Fsk.FixLen == false )
1651 {
1652 SX1276ReadFifo( ( uint8_t* )&SX1276.Settings.FskPacketHandler.Size, 1 );
1653 }
1654 else
1655 {
1656 SX1276.Settings.FskPacketHandler.Size = SX1276Read( REG_PAYLOADLENGTH );
1657 }
1658 SX1276ReadFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1659 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1660 }
1661 else
1662 {
1663 SX1276ReadFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1664 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1665 }
1666
1667 TimerStop( &RxTimeoutTimer );
1668
1669 if( SX1276.Settings.Fsk.RxContinuous == false )
1670 {
1671 SX1276.Settings.State = RF_IDLE;
1672 TimerStop( &RxTimeoutSyncWord );
1673 }
1674 else
1675 {
1676 // Continuous mode restart Rx chain
1677 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1678 }
1679
1680 if( ( RadioEvents != NULL ) && ( RadioEvents->RxDone != NULL ) )
1681 {
1682 RadioEvents->RxDone( RxTxBuffer, SX1276.Settings.FskPacketHandler.Size, SX1276.Settings.FskPacketHandler.RssiValue, 0 );
1683 }
1684 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1685 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1686 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1687 SX1276.Settings.FskPacketHandler.Size = 0;
1688 break;
1689 case MODEM_LORA:
1690 {
1691 // Clear Irq
1692 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXDONE );
1693
1694 irqFlags = SX1276Read( REG_LR_IRQFLAGS );
1695 if( ( irqFlags & RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK ) == RFLR_IRQFLAGS_PAYLOADCRCERROR )
1696 {
1697 // Clear Irq
1698 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_PAYLOADCRCERROR );
1699
1700 if( SX1276.Settings.LoRa.RxContinuous == false )
1701 {
1702 SX1276.Settings.State = RF_IDLE;
1703 }
1704 TimerStop( &RxTimeoutTimer );
1705
1706 if( ( RadioEvents != NULL ) && ( RadioEvents->RxError != NULL ) )
1707 {
1708 RadioEvents->RxError( );
1709 }
1710 break;
1711 }
1712
1713 // Returns SNR value [dB] rounded to the nearest integer value
1714 SX1276.Settings.LoRaPacketHandler.SnrValue = ( ( ( int8_t )SX1276Read( REG_LR_PKTSNRVALUE ) ) + 2 ) >> 2;
1715
1716 int16_t rssi = SX1276Read( REG_LR_PKTRSSIVALUE );
1717 if( SX1276.Settings.LoRaPacketHandler.SnrValue < 0 )
1718 {
1719 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1720 {
1721 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_HF + rssi + ( rssi >> 4 ) +
1722 SX1276.Settings.LoRaPacketHandler.SnrValue;
1723 }
1724 else
1725 {
1726 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_LF + rssi + ( rssi >> 4 ) +
1727 SX1276.Settings.LoRaPacketHandler.SnrValue;
1728 }
1729 }
1730 else
1731 {
1732 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1733 {
1734 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_HF + rssi + ( rssi >> 4 );
1735 }
1736 else
1737 {
1738 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_LF + rssi + ( rssi >> 4 );
1739 }
1740 }
1741
1742 SX1276.Settings.LoRaPacketHandler.Size = SX1276Read( REG_LR_RXNBBYTES );
1743 SX1276Write( REG_LR_FIFOADDRPTR, SX1276Read( REG_LR_FIFORXCURRENTADDR ) );
1744 SX1276ReadFifo( RxTxBuffer, SX1276.Settings.LoRaPacketHandler.Size );
1745
1746 if( SX1276.Settings.LoRa.RxContinuous == false )
1747 {
1748 SX1276.Settings.State = RF_IDLE;
1749 }
1750 TimerStop( &RxTimeoutTimer );
1751
1752 if( ( RadioEvents != NULL ) && ( RadioEvents->RxDone != NULL ) )
1753 {
1754 RadioEvents->RxDone( RxTxBuffer, SX1276.Settings.LoRaPacketHandler.Size, SX1276.Settings.LoRaPacketHandler.RssiValue, SX1276.Settings.LoRaPacketHandler.SnrValue );
1755 }
1756 }
1757 break;
1758 default:
1759 break;
1760 }
1761 break;
1762 case RF_TX_RUNNING:
1763 TimerStop( &TxTimeoutTimer );
1764 // TxDone interrupt
1765 switch( SX1276.Settings.Modem )
1766 {
1767 case MODEM_LORA:
1768 // Clear Irq
1769 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_TXDONE );
1770 // Intentional fall through
1771 case MODEM_FSK:
1772 default:
1773 SX1276.Settings.State = RF_IDLE;
1774 if( ( RadioEvents != NULL ) && ( RadioEvents->TxDone != NULL ) )
1775 {
1776 RadioEvents->TxDone( );
1777 }
1778 break;
1779 }
1780 break;
1781 default:
1782 break;
1783 }
1784 }
1785
SX1276OnDio1Irq(void * context)1786 static void SX1276OnDio1Irq( void* context )
1787 {
1788 switch( SX1276.Settings.State )
1789 {
1790 case RF_RX_RUNNING:
1791 switch( SX1276.Settings.Modem )
1792 {
1793 case MODEM_FSK:
1794 // Check FIFO level DIO1 pin state
1795 //
1796 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1797 // verify DIO1 pin state in order to decide if something has to be done.
1798 // When radio is operating in FSK reception mode a rising edge must be detected in order to handle the
1799 // IRQ.
1800 if( SX1276GetDio1PinState( ) == 0 )
1801 {
1802 break;
1803 }
1804 // Stop timer
1805 TimerStop( &RxTimeoutSyncWord );
1806
1807 // FifoLevel interrupt
1808 // Read received packet size
1809 if( ( SX1276.Settings.FskPacketHandler.Size == 0 ) && ( SX1276.Settings.FskPacketHandler.NbBytes == 0 ) )
1810 {
1811 if( SX1276.Settings.Fsk.FixLen == false )
1812 {
1813 SX1276ReadFifo( ( uint8_t* )&SX1276.Settings.FskPacketHandler.Size, 1 );
1814 }
1815 else
1816 {
1817 SX1276.Settings.FskPacketHandler.Size = SX1276Read( REG_PAYLOADLENGTH );
1818 }
1819 }
1820
1821 // ERRATA 3.1 - PayloadReady Set for 31.25ns if FIFO is Empty
1822 //
1823 // When FifoLevel interrupt is used to offload the
1824 // FIFO, the microcontroller should monitor both
1825 // PayloadReady and FifoLevel interrupts, and
1826 // read only (FifoThreshold-1) bytes off the FIFO
1827 // when FifoLevel fires
1828 if( ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes ) >= SX1276.Settings.FskPacketHandler.FifoThresh )
1829 {
1830 SX1276ReadFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.FifoThresh - 1 );
1831 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.FifoThresh - 1;
1832 }
1833 else
1834 {
1835 SX1276ReadFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1836 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1837 }
1838 break;
1839 case MODEM_LORA:
1840 // Check RxTimeout DIO1 pin state
1841 //
1842 // DIO1 irq is setup to be triggered on rsing and falling edges
1843 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1844 // verify DIO1 pin state in order to decide if something has to be done.
1845 // When radio is operating in LoRa reception mode a rising edge must be detected in order to handle the
1846 // IRQ.
1847 if( SX1276GetDio1PinState( ) == 0 )
1848 {
1849 break;
1850 }
1851 // Sync time out
1852 TimerStop( &RxTimeoutTimer );
1853 // Clear Irq
1854 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXTIMEOUT );
1855
1856 SX1276.Settings.State = RF_IDLE;
1857 if( ( RadioEvents != NULL ) && ( RadioEvents->RxTimeout != NULL ) )
1858 {
1859 RadioEvents->RxTimeout( );
1860 }
1861 break;
1862 default:
1863 break;
1864 }
1865 break;
1866 case RF_TX_RUNNING:
1867 switch( SX1276.Settings.Modem )
1868 {
1869 case MODEM_FSK:
1870 // Check FIFO level DIO1 pin state
1871 //
1872 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1873 // verify DIO1 pin state in order to decide if something has to be done.
1874 // When radio is operating in FSK transmission mode a falling edge must be detected in order to handle
1875 // the IRQ.
1876 if( SX1276GetDio1PinState( ) == 1 )
1877 {
1878 break;
1879 }
1880
1881 // FifoLevel interrupt
1882 if( ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes ) > SX1276.Settings.FskPacketHandler.ChunkSize )
1883 {
1884 SX1276WriteFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.ChunkSize );
1885 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.ChunkSize;
1886 }
1887 else
1888 {
1889 // Write the last chunk of data
1890 SX1276WriteFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1891 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes;
1892 }
1893 break;
1894 case MODEM_LORA:
1895 break;
1896 default:
1897 break;
1898 }
1899 break;
1900 default:
1901 break;
1902 }
1903 }
1904
SX1276OnDio2Irq(void * context)1905 static void SX1276OnDio2Irq( void* context )
1906 {
1907 switch( SX1276.Settings.State )
1908 {
1909 case RF_RX_RUNNING:
1910 switch( SX1276.Settings.Modem )
1911 {
1912 case MODEM_FSK:
1913 // Checks if DIO4 is connected. If it is not PreambleDetected is set to true.
1914 if( SX1276.DIO4.port == NULL )
1915 {
1916 SX1276.Settings.FskPacketHandler.PreambleDetected = true;
1917 }
1918
1919 if( ( SX1276.Settings.FskPacketHandler.PreambleDetected != 0 ) && ( SX1276.Settings.FskPacketHandler.SyncWordDetected == 0 ) )
1920 {
1921 TimerStop( &RxTimeoutSyncWord );
1922
1923 SX1276.Settings.FskPacketHandler.SyncWordDetected = true;
1924
1925 SX1276.Settings.FskPacketHandler.RssiValue = -( SX1276Read( REG_RSSIVALUE ) >> 1 );
1926
1927 SX1276.Settings.FskPacketHandler.AfcValue = ( int32_t )SX1276ConvertPllStepToFreqInHz( ( ( uint16_t )SX1276Read( REG_AFCMSB ) << 8 ) |
1928 ( uint16_t )SX1276Read( REG_AFCLSB ) );
1929 SX1276.Settings.FskPacketHandler.RxGain = ( SX1276Read( REG_LNA ) >> 5 ) & 0x07;
1930 }
1931 break;
1932 case MODEM_LORA:
1933 if( SX1276.Settings.LoRa.FreqHopOn == true )
1934 {
1935 // Clear Irq
1936 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
1937
1938 if( ( RadioEvents != NULL ) && ( RadioEvents->FhssChangeChannel != NULL ) )
1939 {
1940 RadioEvents->FhssChangeChannel( ( SX1276Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
1941 }
1942 }
1943 break;
1944 default:
1945 break;
1946 }
1947 break;
1948 case RF_TX_RUNNING:
1949 switch( SX1276.Settings.Modem )
1950 {
1951 case MODEM_FSK:
1952 break;
1953 case MODEM_LORA:
1954 if( SX1276.Settings.LoRa.FreqHopOn == true )
1955 {
1956 // Clear Irq
1957 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
1958
1959 if( ( RadioEvents != NULL ) && ( RadioEvents->FhssChangeChannel != NULL ) )
1960 {
1961 RadioEvents->FhssChangeChannel( ( SX1276Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
1962 }
1963 }
1964 break;
1965 default:
1966 break;
1967 }
1968 break;
1969 default:
1970 break;
1971 }
1972 }
1973
SX1276OnDio3Irq(void * context)1974 static void SX1276OnDio3Irq( void* context )
1975 {
1976 switch( SX1276.Settings.Modem )
1977 {
1978 case MODEM_FSK:
1979 break;
1980 case MODEM_LORA:
1981 if( ( SX1276Read( REG_LR_IRQFLAGS ) & RFLR_IRQFLAGS_CADDETECTED ) == RFLR_IRQFLAGS_CADDETECTED )
1982 {
1983 // Clear Irq
1984 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDETECTED | RFLR_IRQFLAGS_CADDONE );
1985 if( ( RadioEvents != NULL ) && ( RadioEvents->CadDone != NULL ) )
1986 {
1987 RadioEvents->CadDone( true );
1988 }
1989 }
1990 else
1991 {
1992 // Clear Irq
1993 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
1994 if( ( RadioEvents != NULL ) && ( RadioEvents->CadDone != NULL ) )
1995 {
1996 RadioEvents->CadDone( false );
1997 }
1998 }
1999 break;
2000 default:
2001 break;
2002 }
2003 }
2004
SX1276OnDio4Irq(void * context)2005 static void SX1276OnDio4Irq( void* context )
2006 {
2007 switch( SX1276.Settings.Modem )
2008 {
2009 case MODEM_FSK:
2010 {
2011 if( SX1276.Settings.FskPacketHandler.PreambleDetected == false )
2012 {
2013 SX1276.Settings.FskPacketHandler.PreambleDetected = true;
2014 }
2015 }
2016 break;
2017 case MODEM_LORA:
2018 break;
2019 default:
2020 break;
2021 }
2022 }
2023
