1 /*
2  * Copyright (c) 2023 STMicroelectronics
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_
7 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_
8 
9 /** System clock */
10 #define STM32_SRC_SYSCLK	0x001
11 /** Fixed clocks  */
12 #define STM32_SRC_LSE		0x002
13 #define STM32_SRC_LSI		0x003
14 
15 /** Dummy: Add a specifier when no selection is possible */
16 #define NO_SEL			0xFF
17 
18 #define STM32_CLOCK_DIV_SHIFT	12
19 
20 /** Clock divider */
21 #define STM32_CLOCK_DIV(div)	(((div) - 1) << STM32_CLOCK_DIV_SHIFT)
22 
23 /** STM32 MCO configuration values */
24 #define STM32_MCO_CFGR_REG_MASK     0xFFFFU
25 #define STM32_MCO_CFGR_REG_SHIFT    0U
26 #define STM32_MCO_CFGR_SHIFT_MASK   0x3FU
27 #define STM32_MCO_CFGR_SHIFT_SHIFT  16U
28 #define STM32_MCO_CFGR_MASK_MASK    0x1FU
29 #define STM32_MCO_CFGR_MASK_SHIFT   22U
30 #define STM32_MCO_CFGR_VAL_MASK     0x1FU
31 #define STM32_MCO_CFGR_VAL_SHIFT    27U
32 
33 /**
34  * @brief STM32 MCO configuration register bit field
35  *
36  * @param reg    Offset to RCC register holding MCO configuration
37  * @param shift    Position of field within RCC register (= field LSB's index)
38  * @param mask    Mask of register field in RCC register
39  * @param val    Clock configuration field value (0~0x1F)
40  *
41  * @note 'reg' range:    0x0~0xFFFF    [ 00 : 15 ]
42  * @note 'shift' range:    0~63        [ 16 : 21 ]
43  * @note 'mask' range:    0x00~0x1F    [ 22 : 26 ]
44  * @note 'val' range:    0x00~0x1F    [ 27 : 31 ]
45  *
46  */
47 #define STM32_MCO_CFGR(val, mask, shift, reg)                        \
48 	((((reg) & STM32_MCO_CFGR_REG_MASK) << STM32_MCO_CFGR_REG_SHIFT) |        \
49 	 (((shift) & STM32_MCO_CFGR_SHIFT_MASK) << STM32_MCO_CFGR_SHIFT_SHIFT) |    \
50 	 (((mask) & STM32_MCO_CFGR_MASK_MASK) << STM32_MCO_CFGR_MASK_SHIFT) |        \
51 	 (((val) & STM32_MCO_CFGR_VAL_MASK) << STM32_MCO_CFGR_VAL_SHIFT))
52 
53 /**
54  * Pack RCC clock register offset and bit in two 32-bit values
55  * as expected for the Device Tree `clocks` property on STM32.
56  *
57  * @param bus STM32 bus name (expands to STM32_CLOCK_BUS_{bus})
58  * @param bit Clock bit
59  */
60 #define STM32_CLOCK(bus, bit) (STM32_CLOCK_BUS_##bus) (1 << bit)
61 
62 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_ */
63