1 /* 2 * Copyright (c) 2023 STMicrelectronics 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ 7 #define ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ 8 9 #include <zephyr/dt-bindings/adc/adc.h> 10 11 #define STM32_ADC_REG_MASK BIT_MASK(8) 12 #define STM32_ADC_REG_SHIFT 0U 13 #define STM32_ADC_SHIFT_MASK BIT_MASK(5) 14 #define STM32_ADC_SHIFT_SHIFT 8U 15 #define STM32_ADC_MASK_MASK BIT_MASK(3) 16 #define STM32_ADC_MASK_SHIFT 13U 17 #define STM32_ADC_REG_VAL_MASK BIT_MASK(3) 18 #define STM32_ADC_REG_VAL_SHIFT 16U 19 #define STM32_ADC_REAL_VAL_MASK BIT_MASK(13) 20 #define STM32_ADC_REAL_VAL_SHIFT 19U 21 22 /** 23 * @brief STM32 ADC configuration bit field. 24 * 25 * - reg (0..0xFF) [ 0 : 7 ] 26 * - shift (0..31) [ 8 : 12 ] 27 * - mask (0x1, 0x3, 0x7) [ 13 : 15 ] 28 * - reg_val (0..7) [ 16 : 18 ] 29 * - real_val (0..8191) [ 19 : 31 ] 30 * 31 * @param reg ADC_x register offset 32 * @param shift Position within ADC_x. 33 * @param mask Mask for the ADC_x field. 34 * @param reg_val Register value (0, 1, ... 7). 35 * @param real_val Real corresponding value (0, 1, ... 8191). 36 */ 37 #define STM32_ADC(real_val, reg_val, mask, shift, reg) \ 38 ((((reg) & STM32_ADC_REG_MASK) << STM32_ADC_REG_SHIFT) | \ 39 (((shift) & STM32_ADC_SHIFT_MASK) << STM32_ADC_SHIFT_SHIFT) | \ 40 (((mask) & STM32_ADC_MASK_MASK) << STM32_ADC_MASK_SHIFT) | \ 41 (((reg_val) & STM32_ADC_REG_VAL_MASK) << STM32_ADC_REG_VAL_SHIFT) | \ 42 (((real_val) & STM32_ADC_REAL_VAL_MASK) << STM32_ADC_REAL_VAL_SHIFT)) 43 44 #define STM32_ADC_GET_REAL_VAL(val) \ 45 (((val) >> STM32_ADC_REAL_VAL_SHIFT) & STM32_ADC_REAL_VAL_MASK) 46 47 #define STM32_ADC_GET_REG_VAL(val) \ 48 (((val) >> STM32_ADC_REG_VAL_SHIFT) & STM32_ADC_REG_VAL_MASK) 49 50 #define STM32_ADC_GET_MASK(val) \ 51 (((val) >> STM32_ADC_MASK_SHIFT) & STM32_ADC_MASK_MASK) 52 53 #define STM32_ADC_GET_SHIFT(val) \ 54 (((val) >> STM32_ADC_SHIFT_SHIFT) & STM32_ADC_SHIFT_MASK) 55 56 #define STM32_ADC_GET_REG(val) \ 57 (((val) >> STM32_ADC_REG_SHIFT) & STM32_ADC_REG_MASK) 58 59 /* 60 * Macro used to store resolution info. STM32_ADC_RES_* macros are defined in 61 * respective stm32xx_adc.h files 62 */ 63 #define STM32_ADC_RES(resolution, reg_val) \ 64 STM32_ADC(resolution, reg_val, STM32_ADC_RES_MASK, STM32_ADC_RES_SHIFT, \ 65 STM32_ADC_RES_REG) 66 67 /** 68 * @name STM32 ADC clock source 69 * This value is to set <st,adc-clock-source> 70 * One or both values may not apply to all series. Refer to the RefMan 71 * @{ 72 */ 73 #define SYNC 1 74 #define ASYNC 2 75 /** @} */ 76 77 /** 78 * @name STM32 ADC sequencer type 79 * This value is to set <st,adc-sequencer> 80 * One or both values may not apply to all series. Refer to the RefMan 81 * @{ 82 */ 83 #define NOT_FULLY_CONFIGURABLE 0 84 #define FULLY_CONFIGURABLE 1 85 /** @} */ 86 87 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ */ 88
