1 /** 2 ****************************************************************************** 3 * @file stm32f4xx.h 4 * @author MCD Application Team 5 * @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File. 6 * 7 * The file is the unique include file that the application programmer 8 * is using in the C source code, usually in main.c. This file contains: 9 * - Configuration section that allows to select: 10 * - The STM32F4xx device used in the target application 11 * - To use or not the peripheral's drivers in application code(i.e. 12 * code will be based on direct access to peripheral's registers 13 * rather than drivers API), this option is controlled by 14 * "#define USE_HAL_DRIVER" 15 * 16 ****************************************************************************** 17 * @attention 18 * 19 * Copyright (c) 2017 STMicroelectronics. 20 * All rights reserved. 21 * 22 * This software is licensed under terms that can be found in the LICENSE file 23 * in the root directory of this software component. 24 * If no LICENSE file comes with this software, it is provided AS-IS. 25 * 26 ****************************************************************************** 27 */ 28 29 /** @addtogroup CMSIS 30 * @{ 31 */ 32 33 /** @addtogroup stm32f4xx 34 * @{ 35 */ 36 37 #ifndef __STM32F4xx_H 38 #define __STM32F4xx_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif /* __cplusplus */ 43 44 /** @addtogroup Library_configuration_section 45 * @{ 46 */ 47 48 /** 49 * @brief STM32 Family 50 */ 51 #if !defined (STM32F4) 52 #define STM32F4 53 #endif /* STM32F4 */ 54 55 /* Uncomment the line below according to the target STM32 device used in your 56 application 57 */ 58 #if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \ 59 !defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \ 60 !defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \ 61 !defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \ 62 !defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \ 63 !defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx) 64 /* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */ 65 /* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */ 66 /* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */ 67 /* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */ 68 /* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */ 69 /* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */ 70 /* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG, 71 STM32F439NI, STM32F429IG and STM32F429II Devices */ 72 /* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG, 73 STM32F439NI, STM32F439IG and STM32F439II Devices */ 74 /* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */ 75 /* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */ 76 /* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */ 77 /* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */ 78 /* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */ 79 /* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices */ 80 /* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC, 81 and STM32F446ZE Devices */ 82 /* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG, 83 STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices */ 84 /* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BG 85 and STM32F479NG Devices */ 86 /* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices */ 87 /* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices */ 88 /* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices */ 89 /* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices */ 90 /* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG, 91 STM32F413RG, STM32F413VG and STM32F413ZG Devices */ 92 /* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */ 93 #endif 94 95 /* Tip: To avoid modifying this file each time you need to switch between these 96 devices, you can define the device in your toolchain compiler preprocessor. 97 */ 98 #if !defined (USE_HAL_DRIVER) 99 /** 100 * @brief Comment the line below if you will not use the peripherals drivers. 101 In this case, these drivers will not be included and the application code will 102 be based on direct access to peripherals registers 103 */ 104 /*#define USE_HAL_DRIVER */ 105 #endif /* USE_HAL_DRIVER */ 106 107 /** 108 * @brief CMSIS version number V2.6.8 109 */ 110 #define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */ 111 #define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */ 112 #define __STM32F4xx_CMSIS_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */ 113 #define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ 114 #define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\ 115 |(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\ 116 |(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\ 117 |(__STM32F4xx_CMSIS_VERSION_RC)) 118 119 /** 120 * @} 121 */ 122 123 /** @addtogroup Device_Included 124 * @{ 125 */ 126 127 #if defined(STM32F405xx) 128 #include "stm32f405xx.h" 129 #elif defined(STM32F415xx) 130 #include "stm32f415xx.h" 131 #elif defined(STM32F407xx) 132 #include "stm32f407xx.h" 133 #elif defined(STM32F417xx) 134 #include "stm32f417xx.h" 135 #elif defined(STM32F427xx) 136 #include "stm32f427xx.h" 137 #elif defined(STM32F437xx) 138 #include "stm32f437xx.h" 139 #elif defined(STM32F429xx) 140 #include "stm32f429xx.h" 141 #elif defined(STM32F439xx) 142 #include "stm32f439xx.h" 143 #elif defined(STM32F401xC) 144 #include "stm32f401xc.h" 145 #elif defined(STM32F401xE) 146 #include "stm32f401xe.h" 147 #elif defined(STM32F410Tx) 148 #include "stm32f410tx.h" 149 #elif defined(STM32F410Cx) 150 #include "stm32f410cx.h" 151 #elif defined(STM32F410Rx) 152 #include "stm32f410rx.h" 153 #elif defined(STM32F411xE) 154 #include "stm32f411xe.h" 155 #elif defined(STM32F446xx) 156 #include "stm32f446xx.h" 157 #elif defined(STM32F469xx) 158 #include "stm32f469xx.h" 159 #elif defined(STM32F479xx) 160 #include "stm32f479xx.h" 161 #elif defined(STM32F412Cx) 162 #include "stm32f412cx.h" 163 #elif defined(STM32F412Zx) 164 #include "stm32f412zx.h" 165 #elif defined(STM32F412Rx) 166 #include "stm32f412rx.h" 167 #elif defined(STM32F412Vx) 168 #include "stm32f412vx.h" 169 #elif defined(STM32F413xx) 170 #include "stm32f413xx.h" 171 #elif defined(STM32F423xx) 172 #include "stm32f423xx.h" 173 #else 174 #error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)" 175 #endif 176 177 /** 178 * @} 179 */ 180 181 /** @addtogroup Exported_types 182 * @{ 183 */ 184 typedef enum 185 { 186 RESET = 0U, 187 SET = !RESET 188 } FlagStatus, ITStatus; 189 190 typedef enum 191 { 192 DISABLE = 0U, 193 ENABLE = !DISABLE 194 } FunctionalState; 195 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 196 197 typedef enum 198 { 199 SUCCESS = 0U, 200 ERROR = !SUCCESS 201 } ErrorStatus; 202 203 /** 204 * @} 205 */ 206 207 208 /** @addtogroup Exported_macro 209 * @{ 210 */ 211 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 212 213 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 214 215 #define READ_BIT(REG, BIT) ((REG) & (BIT)) 216 217 #define CLEAR_REG(REG) ((REG) = (0x0)) 218 219 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 220 221 #define READ_REG(REG) ((REG)) 222 223 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 224 225 #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) 226 227 /* Use of CMSIS compiler intrinsics for register exclusive access */ 228 /* Atomic 32-bit register access macro to set one or several bits */ 229 #define ATOMIC_SET_BIT(REG, BIT) \ 230 do { \ 231 uint32_t val; \ 232 do { \ 233 val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ 234 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 235 } while(0) 236 237 /* Atomic 32-bit register access macro to clear one or several bits */ 238 #define ATOMIC_CLEAR_BIT(REG, BIT) \ 239 do { \ 240 uint32_t val; \ 241 do { \ 242 val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ 243 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 244 } while(0) 245 246 /* Atomic 32-bit register access macro to clear and set one or several bits */ 247 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 248 do { \ 249 uint32_t val; \ 250 do { \ 251 val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 252 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 253 } while(0) 254 255 /* Atomic 16-bit register access macro to set one or several bits */ 256 #define ATOMIC_SETH_BIT(REG, BIT) \ 257 do { \ 258 uint16_t val; \ 259 do { \ 260 val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ 261 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 262 } while(0) 263 264 /* Atomic 16-bit register access macro to clear one or several bits */ 265 #define ATOMIC_CLEARH_BIT(REG, BIT) \ 266 do { \ 267 uint16_t val; \ 268 do { \ 269 val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ 270 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 271 } while(0) 272 273 /* Atomic 16-bit register access macro to clear and set one or several bits */ 274 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ 275 do { \ 276 uint16_t val; \ 277 do { \ 278 val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 279 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 280 } while(0) 281 282 /** 283 * @} 284 */ 285 286 #if defined (USE_HAL_DRIVER) 287 #include "stm32f4xx_hal.h" 288 #endif /* USE_HAL_DRIVER */ 289 290 #ifdef __cplusplus 291 } 292 #endif /* __cplusplus */ 293 294 #endif /* __STM32F4xx_H */ 295 /** 296 * @} 297 */ 298 299 /** 300 * @} 301 */ 302
