1 /**
2   ******************************************************************************
3   * @file    stm32f0xx.h
4   * @author  MCD Application Team
5   * @brief   CMSIS STM32F0xx Device Peripheral Access Layer Header File.
6   *
7   *          The file is the unique include file that the application programmer
8   *          is using in the C source code, usually in main.c. This file contains:
9   *           - Configuration section that allows to select:
10   *              - The STM32F0xx device used in the target application
11   *              - To use or not the peripheral's drivers in application code(i.e.
12   *                code will be based on direct access to peripheral's registers
13   *                rather than drivers API), this option is controlled by
14   *                "#define USE_HAL_DRIVER"
15   *
16   ******************************************************************************
17   * @attention
18   *
19   * Copyright (c) 2016 STMicroelectronics.
20   * All rights reserved.
21   *
22   * This software is licensed under terms that can be found in the LICENSE file
23   * in the root directory of this software component.
24   * If no LICENSE file comes with this software, it is provided AS-IS.
25   *
26   ******************************************************************************
27   */
28 /** @addtogroup CMSIS
29   * @{
30   */
31 
32 /** @addtogroup stm32f0xx
33   * @{
34   */
35 
36 #ifndef __STM32F0xx_H
37 #define __STM32F0xx_H
38 
39 #ifdef __cplusplus
40  extern "C" {
41 #endif /* __cplusplus */
42 
43 /** @addtogroup Library_configuration_section
44   * @{
45   */
46 
47 /**
48   * @brief STM32 Family
49   */
50 #if !defined  (STM32F0)
51 #define STM32F0
52 #endif /* STM32F0 */
53 
54 /** Uncomment the line below according to the target STM32 device used in your application.
55   * stm32f0xxxx.h file contains:
56   * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
57   * - IRQ channel definition
58   * - Peripheral memory mapping and physical registers address definition
59   * - Peripheral pointer declaration and driver header file inclusion
60   * - Product miscellaneous configuration: assert macros, ...
61   * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family's superset.
62   */
63 
64 #if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
65     !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
66     !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
67     !defined (STM32F051x8) && !defined (STM32F058xx) &&                           \
68     !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
69     !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
70   /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
71   /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
72   /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
73   /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
74   /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
75   /* #define STM32F048xx */  /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
76   /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
77   /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
78   /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
79   /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
80   /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
81   /* #define STM32F072xB */  /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
82   /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
83   /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */
84   /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
85   /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
86 #endif
87 /* Legacy aliases */
88 #if defined (STM32F048x6)
89  #define STM32F048xx
90 #endif /* STM32F048x6 */
91 
92 /*  Tip: To avoid modifying this file each time you need to switch between these
93         devices, you can define the device in your toolchain compiler preprocessor.
94   */
95 #if !defined  (USE_HAL_DRIVER)
96 /**
97  * @brief Comment the line below if you will not use the peripherals drivers.
98    In this case, these drivers will not be included and the application code will
99    be based on direct access to peripherals registers
100    */
101   /*#define USE_HAL_DRIVER */
102 #endif /* USE_HAL_DRIVER */
103 
104 /**
105   * @brief CMSIS Device version number V2.3.7
106   */
107 #define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
108 #define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
109 #define __STM32F0_DEVICE_VERSION_SUB2   (0x07) /*!< [15:8]  sub2 version */
110 #define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
111 #define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
112                                         |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
113                                         |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
114                                         |(__STM32F0_DEVICE_VERSION_RC))
115 
116 /**
117   * @}
118   */
119 
120 /** @addtogroup Device_Included
121   * @{
122   */
123 
124 #if defined(STM32F030x6)
125   #include "stm32f030x6.h"
126 #elif defined(STM32F030x8)
127   #include "stm32f030x8.h"
128 #elif defined(STM32F031x6)
129   #include "stm32f031x6.h"
130 #elif defined(STM32F038xx)
131   #include "stm32f038xx.h"
132 #elif defined(STM32F042x6)
133   #include "stm32f042x6.h"
134 #elif defined(STM32F048xx)
135   #include "stm32f048xx.h"
136 #elif defined(STM32F051x8)
137   #include "stm32f051x8.h"
138 #elif defined(STM32F058xx)
139   #include "stm32f058xx.h"
140 #elif defined(STM32F070x6)
141   #include "stm32f070x6.h"
142 #elif defined(STM32F070xB)
143   #include "stm32f070xb.h"
144 #elif defined(STM32F071xB)
145   #include "stm32f071xb.h"
146 #elif defined(STM32F072xB)
147   #include "stm32f072xb.h"
148 #elif defined(STM32F078xx)
149   #include "stm32f078xx.h"
150 #elif defined(STM32F091xC)
151   #include "stm32f091xc.h"
152 #elif defined(STM32F098xx)
153   #include "stm32f098xx.h"
154 #elif defined(STM32F030xC)
155   #include "stm32f030xc.h"
156 #else
157  #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
158 #endif
159 
160 /**
161   * @}
162   */
163 
164 /** @addtogroup Exported_types
165   * @{
166   */
167 typedef enum
168 {
169   RESET = 0U,
170   SET = !RESET
171 } FlagStatus, ITStatus;
172 
173 typedef enum
174 {
175   DISABLE = 0U,
176   ENABLE = !DISABLE
177 } FunctionalState;
178 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
179 
180 typedef enum
181 {
182   SUCCESS = 0U,
183   ERROR = !SUCCESS
184 } ErrorStatus;
185 
186 /**
187   * @}
188   */
189 
190 
191 /** @addtogroup Exported_macros
192   * @{
193   */
194 #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
195 
196 #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
197 
198 #define READ_BIT(REG, BIT)    ((REG) & (BIT))
199 
200 #define CLEAR_REG(REG)        ((REG) = (0x0))
201 
202 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
203 
204 #define READ_REG(REG)         ((REG))
205 
206 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
207 
208 /* Use of interrupt control for register exclusive access */
209 /* Atomic 32-bit register access macro to set one or several bits */
210 #define ATOMIC_SET_BIT(REG, BIT)                             \
211   do {                                                       \
212     uint32_t primask;                                        \
213     primask = __get_PRIMASK();                               \
214     __set_PRIMASK(1);                                        \
215     SET_BIT((REG), (BIT));                                   \
216     __set_PRIMASK(primask);                                  \
217   } while(0)
218 
219 /* Atomic 32-bit register access macro to clear one or several bits */
220 #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
221   do {                                                       \
222     uint32_t primask;                                        \
223     primask = __get_PRIMASK();                               \
224     __set_PRIMASK(1);                                        \
225     CLEAR_BIT((REG), (BIT));                                 \
226     __set_PRIMASK(primask);                                  \
227   } while(0)
228 
229 /* Atomic 32-bit register access macro to clear and set one or several bits */
230 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)            \
231   do {                                                       \
232     uint32_t primask;                                        \
233     primask = __get_PRIMASK();                               \
234     __set_PRIMASK(1);                                        \
235     MODIFY_REG((REG), (CLEARMSK), (SETMASK));                \
236     __set_PRIMASK(primask);                                  \
237   } while(0)
238 
239 /* Atomic 16-bit register access macro to set one or several bits */
240 #define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)                                   \
241 
242 /* Atomic 16-bit register access macro to clear one or several bits */
243 #define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)                               \
244 
245 /* Atomic 16-bit register access macro to clear and set one or several bits */
246 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
247 
248 /**
249   * @}
250   */
251 
252 #if defined (USE_HAL_DRIVER)
253  #include "stm32f0xx_hal.h"
254 #endif /* USE_HAL_DRIVER */
255 
256 
257 #ifdef __cplusplus
258 }
259 #endif /* __cplusplus */
260 
261 #endif /* __STM32F0xx_H */
262 /**
263   * @}
264   */
265 
266 /**
267   * @}
268   */
269 
270