Home
last modified time | relevance | path

Searched defs:STAT_CLR (Results 1 – 25 of 29) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h12325 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
37165 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h12613 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
37660 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h13843 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
39201 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h13765 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
39194 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h8244 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h8958 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h10498 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h10518 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h11540 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h12611 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h12979 __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h67381 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMXRT1166_cm7.h66479 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h67880 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMXRT1173_cm7.h66978 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h66981 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h77648 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMXRT1176_cm4.h78550 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h48328 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMX8UD7_dsp0.h49032 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMX8UD7_cm33.h50711 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h50711 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
DMIMX8UD3_dsp0.h49032 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h49103 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h47445 __IO uint32_t STAT_CLR; /**< Status Register, offset: 0x18 */ member

12