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Searched defs:SSARC_LP_INT_STATUS_ADDR_ERR_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h73074 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
DMIMXRT1175_cm7.h72172 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h71670 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
DMIMXRT1165_cm4.h72572 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h72172 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h78035 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
DMIMXRT1166_cm7.h77133 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h78534 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
DMIMXRT1173_cm7.h77632 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h77635 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h88302 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro
DMIMXRT1176_cm4.h89204 #define SSARC_LP_INT_STATUS_ADDR_ERR_MASK (0x80000000U) macro