1 /* 2 * Copyright 1997-2016 Freescale Semiconductor, Inc. 3 * Copyright 2016-2022 NXP 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*! 9 * @file S32Z2_CANXL_FILTER_BANK.h 10 * @version 1.8 11 * @date 2022-07-13 12 * @brief Peripheral Access Layer for S32Z2_CANXL_FILTER_BANK 13 * 14 * This file contains register definitions and macros for easy access to their 15 * bit fields. 16 * 17 * This file assumes LITTLE endian system. 18 */ 19 20 /** 21 * @page misra_violations MISRA-C:2012 violations 22 * 23 * @section [global] 24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced 25 * The SoC header defines typedef for all modules. 26 * 27 * @section [global] 28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced 29 * The SoC header defines macros for all modules and registers. 30 * 31 * @section [global] 32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro 33 * These are generated macros used for accessing the bit-fields from registers. 34 * 35 * @section [global] 36 * Violates MISRA 2012 Required Rule 5.1, identifier clash 37 * The supported compilers use more than 31 significant characters for identifiers. 38 * 39 * @section [global] 40 * Violates MISRA 2012 Required Rule 5.2, identifier clash 41 * The supported compilers use more than 31 significant characters for identifiers. 42 * 43 * @section [global] 44 * Violates MISRA 2012 Required Rule 5.4, identifier clash 45 * The supported compilers use more than 31 significant characters for identifiers. 46 * 47 * @section [global] 48 * Violates MISRA 2012 Required Rule 5.5, identifier clash 49 * The supported compilers use more than 31 significant characters for identifiers. 50 * 51 * @section [global] 52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler 53 * This type qualifier is needed to ensure correct I/O access and addressing. 54 */ 55 56 /* Prevention from multiple including the same memory map */ 57 #if !defined(S32Z2_CANXL_FILTER_BANK_H_) /* Check if memory map has not been already included */ 58 #define S32Z2_CANXL_FILTER_BANK_H_ 59 60 #include "S32Z2_COMMON.h" 61 62 /* ---------------------------------------------------------------------------- 63 -- CANXL_FILTER_BANK Peripheral Access Layer 64 ---------------------------------------------------------------------------- */ 65 66 /*! 67 * @addtogroup CANXL_FILTER_BANK_Peripheral_Access_Layer CANXL_FILTER_BANK Peripheral Access Layer 68 * @{ 69 */ 70 71 /** CANXL_FILTER_BANK - Register Layout Typedef */ 72 typedef struct { 73 __IO uint32_t AFCFG0; /**< Acceptance Filter Configuration, offset: 0x0 */ 74 __IO uint32_t VAMRCFG0; /**< VCAN Acceptance Mask or Range Configuration, offset: 0x4 */ 75 __IO uint32_t SAMRCFG0; /**< SDU Acceptance Mask or Range Configuration, offset: 0x8 */ 76 __IO uint32_t AAMRCFG0; /**< ADDR Acceptance Mask or Range Configuration, offset: 0xC */ 77 uint8_t RESERVED_0[12]; 78 __IO uint32_t VAFLT0_0; /**< VCAN Acceptance Filter, offset: 0x1C */ 79 __IO uint32_t VAFLT0_2; /**< VCAN Acceptance Filter, offset: 0x20 */ 80 __IO uint32_t VAFLT0_4; /**< VCAN Acceptance Filter, offset: 0x24 */ 81 __IO uint32_t VAFLT0_6; /**< VCAN Acceptance Filter, offset: 0x28 */ 82 __IO uint32_t VAFLT0_8; /**< VCAN Acceptance Filter, offset: 0x2C */ 83 __IO uint32_t VAFLT0_10; /**< VCAN Acceptance Filter, offset: 0x30 */ 84 __IO uint32_t VAFLT0_12; /**< VCAN Acceptance Filter, offset: 0x34 */ 85 __IO uint32_t VAFLT0_14; /**< VCAN Acceptance Filter, offset: 0x38 */ 86 __IO uint32_t VAFLT0_16; /**< VCAN Acceptance Filter, offset: 0x3C */ 87 __IO uint32_t VAFLT0_18; /**< VCAN Acceptance Filter, offset: 0x40 */ 88 __IO uint32_t VAFLT0_20; /**< VCAN Acceptance Filter, offset: 0x44 */ 89 __IO uint32_t VAFLT0_22; /**< VCAN Acceptance Filter, offset: 0x48 */ 90 __IO uint32_t VAFLT0_24; /**< VCAN Acceptance Filter, offset: 0x4C */ 91 __IO uint32_t VAFLT0_26; /**< VCAN Acceptance Filter, offset: 0x50 */ 92 __IO uint32_t VAFLT0_28; /**< VCAN Acceptance Filter, offset: 0x54 */ 93 __IO uint32_t VAFLT0_30; /**< VCAN Acceptance Filter, offset: 0x58 */ 94 __IO uint32_t SAFLT0_0; /**< SDU Acceptance Filter, offset: 0x5C */ 95 __IO uint32_t SAFLT0_2; /**< SDU Acceptance Filter, offset: 0x60 */ 96 __IO uint32_t SAFLT0_4; /**< SDU Acceptance Filter, offset: 0x64 */ 97 __IO uint32_t SAFLT0_6; /**< SDU Acceptance Filter, offset: 0x68 */ 98 __IO uint32_t SAFLT0_8; /**< SDU Acceptance Filter, offset: 0x6C */ 99 __IO uint32_t SAFLT0_10; /**< SDU Acceptance Filter, offset: 0x70 */ 100 __IO uint32_t SAFLT0_12; /**< SDU Acceptance Filter, offset: 0x74 */ 101 __IO uint32_t SAFLT0_14; /**< SDU Acceptance Filter, offset: 0x78 */ 102 __IO uint32_t SAFLT0_16; /**< SDU Acceptance Filter, offset: 0x7C */ 103 __IO uint32_t SAFLT0_18; /**< SDU Acceptance Filter, offset: 0x80 */ 104 __IO uint32_t SAFLT0_20; /**< SDU Acceptance Filter, offset: 0x84 */ 105 __IO uint32_t SAFLT0_22; /**< SDU Acceptance Filter, offset: 0x88 */ 106 __IO uint32_t SAFLT0_24; /**< SDU Acceptance Filter, offset: 0x8C */ 107 __IO uint32_t SAFLT0_26; /**< SDU Acceptance Filter, offset: 0x90 */ 108 __IO uint32_t SAFLT0_28; /**< SDU Acceptance Filter, offset: 0x94 */ 109 __IO uint32_t SAFLT0_30; /**< SDU Acceptance Filter, offset: 0x98 */ 110 __IO uint32_t AAFLT0_0L; /**< ADDR Acceptance Filter Low, offset: 0x9C */ 111 __IO uint32_t AAFLT0_0H; /**< ADDR Acceptance Filter High, offset: 0xA0 */ 112 __IO uint32_t AAFLT0_1L; /**< ADDR Acceptance Filter Low, offset: 0xA4 */ 113 __IO uint32_t AAFLT0_1H; /**< ADDR Acceptance Filter High, offset: 0xA8 */ 114 __IO uint32_t AAFLT0_2L; /**< ADDR Acceptance Filter Low, offset: 0xAC */ 115 __IO uint32_t AAFLT0_2H; /**< ADDR Acceptance Filter High, offset: 0xB0 */ 116 __IO uint32_t AAFLT0_3L; /**< ADDR Acceptance Filter Low, offset: 0xB4 */ 117 __IO uint32_t AAFLT0_3H; /**< ADDR Acceptance Filter High, offset: 0xB8 */ 118 __IO uint32_t AAFLT0_4L; /**< ADDR Acceptance Filter Low, offset: 0xBC */ 119 __IO uint32_t AAFLT0_4H; /**< ADDR Acceptance Filter High, offset: 0xC0 */ 120 __IO uint32_t AAFLT0_5L; /**< ADDR Acceptance Filter Low, offset: 0xC4 */ 121 __IO uint32_t AAFLT0_5H; /**< ADDR Acceptance Filter High, offset: 0xC8 */ 122 __IO uint32_t AAFLT0_6L; /**< ADDR Acceptance Filter Low, offset: 0xCC */ 123 __IO uint32_t AAFLT0_6H; /**< ADDR Acceptance Filter High, offset: 0xD0 */ 124 __IO uint32_t AAFLT0_7L; /**< ADDR Acceptance Filter Low, offset: 0xD4 */ 125 __IO uint32_t AAFLT0_7H; /**< ADDR Acceptance Filter High, offset: 0xD8 */ 126 __IO uint32_t AAFLT0_8L; /**< ADDR Acceptance Filter Low, offset: 0xDC */ 127 __IO uint32_t AAFLT0_8H; /**< ADDR Acceptance Filter High, offset: 0xE0 */ 128 __IO uint32_t AAFLT0_9L; /**< ADDR Acceptance Filter Low, offset: 0xE4 */ 129 __IO uint32_t AAFLT0_9H; /**< ADDR Acceptance Filter High, offset: 0xE8 */ 130 __IO uint32_t AAFLT0_10L; /**< ADDR Acceptance Filter Low, offset: 0xEC */ 131 __IO uint32_t AAFLT0_10H; /**< ADDR Acceptance Filter High, offset: 0xF0 */ 132 __IO uint32_t AAFLT0_11L; /**< ADDR Acceptance Filter Low, offset: 0xF4 */ 133 __IO uint32_t AAFLT0_11H; /**< ADDR Acceptance Filter High, offset: 0xF8 */ 134 __IO uint32_t AAFLT0_12L; /**< ADDR Acceptance Filter Low, offset: 0xFC */ 135 __IO uint32_t AAFLT0_12H; /**< ADDR Acceptance Filter High, offset: 0x100 */ 136 __IO uint32_t AAFLT0_13L; /**< ADDR Acceptance Filter Low, offset: 0x104 */ 137 __IO uint32_t AAFLT0_13H; /**< ADDR Acceptance Filter High, offset: 0x108 */ 138 __IO uint32_t AAFLT0_14L; /**< ADDR Acceptance Filter Low, offset: 0x10C */ 139 __IO uint32_t AAFLT0_14H; /**< ADDR Acceptance Filter High, offset: 0x110 */ 140 __IO uint32_t AAFLT0_15L; /**< ADDR Acceptance Filter Low, offset: 0x114 */ 141 __IO uint32_t AAFLT0_15H; /**< ADDR Acceptance Filter High, offset: 0x118 */ 142 __IO uint32_t AAFLT0_16L; /**< ADDR Acceptance Filter Low, offset: 0x11C */ 143 __IO uint32_t AAFLT0_16H; /**< ADDR Acceptance Filter High, offset: 0x120 */ 144 __IO uint32_t AAFLT0_17L; /**< ADDR Acceptance Filter Low, offset: 0x124 */ 145 __IO uint32_t AAFLT0_17H; /**< ADDR Acceptance Filter High, offset: 0x128 */ 146 __IO uint32_t AAFLT0_18L; /**< ADDR Acceptance Filter Low, offset: 0x12C */ 147 __IO uint32_t AAFLT0_18H; /**< ADDR Acceptance Filter High, offset: 0x130 */ 148 __IO uint32_t AAFLT0_19L; /**< ADDR Acceptance Filter Low, offset: 0x134 */ 149 __IO uint32_t AAFLT0_19H; /**< ADDR Acceptance Filter High, offset: 0x138 */ 150 __IO uint32_t AAFLT0_20L; /**< ADDR Acceptance Filter Low, offset: 0x13C */ 151 __IO uint32_t AAFLT0_20H; /**< ADDR Acceptance Filter High, offset: 0x140 */ 152 __IO uint32_t AAFLT0_21L; /**< ADDR Acceptance Filter Low, offset: 0x144 */ 153 __IO uint32_t AAFLT0_21H; /**< ADDR Acceptance Filter High, offset: 0x148 */ 154 __IO uint32_t AAFLT0_22L; /**< ADDR Acceptance Filter Low, offset: 0x14C */ 155 __IO uint32_t AAFLT0_22H; /**< ADDR Acceptance Filter High, offset: 0x150 */ 156 __IO uint32_t AAFLT0_23L; /**< ADDR Acceptance Filter Low, offset: 0x154 */ 157 __IO uint32_t AAFLT0_23H; /**< ADDR Acceptance Filter High, offset: 0x158 */ 158 __IO uint32_t AAFLT0_24L; /**< ADDR Acceptance Filter Low, offset: 0x15C */ 159 __IO uint32_t AAFLT0_24H; /**< ADDR Acceptance Filter High, offset: 0x160 */ 160 __IO uint32_t AAFLT0_25L; /**< ADDR Acceptance Filter Low, offset: 0x164 */ 161 __IO uint32_t AAFLT0_25H; /**< ADDR Acceptance Filter High, offset: 0x168 */ 162 __IO uint32_t AAFLT0_26L; /**< ADDR Acceptance Filter Low, offset: 0x16C */ 163 __IO uint32_t AAFLT0_26H; /**< ADDR Acceptance Filter High, offset: 0x170 */ 164 __IO uint32_t AAFLT0_27L; /**< ADDR Acceptance Filter Low, offset: 0x174 */ 165 __IO uint32_t AAFLT0_27H; /**< ADDR Acceptance Filter High, offset: 0x178 */ 166 __IO uint32_t AAFLT0_28L; /**< ADDR Acceptance Filter Low, offset: 0x17C */ 167 __IO uint32_t AAFLT0_28H; /**< ADDR Acceptance Filter High, offset: 0x180 */ 168 __IO uint32_t AAFLT0_29L; /**< ADDR Acceptance Filter Low, offset: 0x184 */ 169 __IO uint32_t AAFLT0_29H; /**< ADDR Acceptance Filter High, offset: 0x188 */ 170 __IO uint32_t AAFLT0_30L; /**< ADDR Acceptance Filter Low, offset: 0x18C */ 171 __IO uint32_t AAFLT0_30H; /**< ADDR Acceptance Filter High, offset: 0x190 */ 172 __IO uint32_t AAFLT0_31L; /**< ADDR Acceptance Filter Low, offset: 0x194 */ 173 __IO uint32_t AAFLT0_31H; /**< ADDR Acceptance Filter High, offset: 0x198 */ 174 uint8_t RESERVED_1[100]; 175 __IO uint32_t RFCFG0; /**< Rejection Filter Configuration, offset: 0x200 */ 176 __IO uint32_t VRMRCFG0; /**< VCAN Rejection Mask or Range Configuration, offset: 0x204 */ 177 __IO uint32_t SRMRCFG0; /**< SDU Rejection Mask or Range Configuration, offset: 0x208 */ 178 __IO uint32_t ARMRCFG0; /**< ADDR Rejection Mask or Range Configuration, offset: 0x20C */ 179 uint8_t RESERVED_2[12]; 180 __IO uint32_t VRFLT0_0; /**< VCAN Rejection Filter, offset: 0x21C */ 181 __IO uint32_t VRFLT0_2; /**< VCAN Rejection Filter, offset: 0x220 */ 182 __IO uint32_t VRFLT0_4; /**< VCAN Rejection Filter, offset: 0x224 */ 183 __IO uint32_t VRFLT0_6; /**< VCAN Rejection Filter, offset: 0x228 */ 184 __IO uint32_t VRFLT0_8; /**< VCAN Rejection Filter, offset: 0x22C */ 185 __IO uint32_t VRFLT0_10; /**< VCAN Rejection Filter, offset: 0x230 */ 186 __IO uint32_t VRFLT0_12; /**< VCAN Rejection Filter, offset: 0x234 */ 187 __IO uint32_t VRFLT0_14; /**< VCAN Rejection Filter, offset: 0x238 */ 188 __IO uint32_t VRFLT0_16; /**< VCAN Rejection Filter, offset: 0x23C */ 189 __IO uint32_t VRFLT0_18; /**< VCAN Rejection Filter, offset: 0x240 */ 190 __IO uint32_t VRFLT0_20; /**< VCAN Rejection Filter, offset: 0x244 */ 191 __IO uint32_t VRFLT0_22; /**< VCAN Rejection Filter, offset: 0x248 */ 192 __IO uint32_t VRFLT0_24; /**< VCAN Rejection Filter, offset: 0x24C */ 193 __IO uint32_t VRFLT0_26; /**< VCAN Rejection Filter, offset: 0x250 */ 194 __IO uint32_t VRFLT0_28; /**< VCAN Rejection Filter, offset: 0x254 */ 195 __IO uint32_t VRFLT0_30; /**< VCAN Rejection Filter, offset: 0x258 */ 196 __IO uint32_t SRFLT0_0; /**< SDU Rejection Filter, offset: 0x25C */ 197 __IO uint32_t SRFLT0_2; /**< SDU Rejection Filter, offset: 0x260 */ 198 __IO uint32_t SRFLT0_4; /**< SDU Rejection Filter, offset: 0x264 */ 199 __IO uint32_t SRFLT0_6; /**< SDU Rejection Filter, offset: 0x268 */ 200 __IO uint32_t SRFLT0_8; /**< SDU Rejection Filter, offset: 0x26C */ 201 __IO uint32_t SRFLT0_10; /**< SDU Rejection Filter, offset: 0x270 */ 202 __IO uint32_t SRFLT0_12; /**< SDU Rejection Filter, offset: 0x274 */ 203 __IO uint32_t SRFLT0_14; /**< SDU Rejection Filter, offset: 0x278 */ 204 __IO uint32_t SRFLT0_16; /**< SDU Rejection Filter, offset: 0x27C */ 205 __IO uint32_t SRFLT0_18; /**< SDU Rejection Filter, offset: 0x280 */ 206 __IO uint32_t SRFLT0_20; /**< SDU Rejection Filter, offset: 0x284 */ 207 __IO uint32_t SRFLT0_22; /**< SDU Rejection Filter, offset: 0x288 */ 208 __IO uint32_t SRFLT0_24; /**< SDU Rejection Filter, offset: 0x28C */ 209 __IO uint32_t SRFLT0_26; /**< SDU Rejection Filter, offset: 0x290 */ 210 __IO uint32_t SRFLT0_28; /**< SDU Rejection Filter, offset: 0x294 */ 211 __IO uint32_t SRFLT0_30; /**< SDU Rejection Filter, offset: 0x298 */ 212 __IO uint32_t ARFLT0_0L; /**< ADDR Rejection Filter Low, offset: 0x29C */ 213 __IO uint32_t ARFLT0_0H; /**< ADDR Rejection Filter High, offset: 0x2A0 */ 214 __IO uint32_t ARFLT0_1L; /**< ADDR Rejection Filter Low, offset: 0x2A4 */ 215 __IO uint32_t ARFLT0_1H; /**< ADDR Rejection Filter High, offset: 0x2A8 */ 216 __IO uint32_t ARFLT0_2L; /**< ADDR Rejection Filter Low, offset: 0x2AC */ 217 __IO uint32_t ARFLT0_2H; /**< ADDR Rejection Filter High, offset: 0x2B0 */ 218 __IO uint32_t ARFLT0_3L; /**< ADDR Rejection Filter Low, offset: 0x2B4 */ 219 __IO uint32_t ARFLT0_3H; /**< ADDR Rejection Filter High, offset: 0x2B8 */ 220 __IO uint32_t ARFLT0_4L; /**< ADDR Rejection Filter Low, offset: 0x2BC */ 221 __IO uint32_t ARFLT0_4H; /**< ADDR Rejection Filter High, offset: 0x2C0 */ 222 __IO uint32_t ARFLT0_5L; /**< ADDR Rejection Filter Low, offset: 0x2C4 */ 223 __IO uint32_t ARFLT0_5H; /**< ADDR Rejection Filter High, offset: 0x2C8 */ 224 __IO uint32_t ARFLT0_6L; /**< ADDR Rejection Filter Low, offset: 0x2CC */ 225 __IO uint32_t ARFLT0_6H; /**< ADDR Rejection Filter High, offset: 0x2D0 */ 226 __IO uint32_t ARFLT0_7L; /**< ADDR Rejection Filter Low, offset: 0x2D4 */ 227 __IO uint32_t ARFLT0_7H; /**< ADDR Rejection Filter High, offset: 0x2D8 */ 228 __IO uint32_t ARFLT0_8L; /**< ADDR Rejection Filter Low, offset: 0x2DC */ 229 __IO uint32_t ARFLT0_8H; /**< ADDR Rejection Filter High, offset: 0x2E0 */ 230 __IO uint32_t ARFLT0_9L; /**< ADDR Rejection Filter Low, offset: 0x2E4 */ 231 __IO uint32_t ARFLT0_9H; /**< ADDR Rejection Filter High, offset: 0x2E8 */ 232 __IO uint32_t ARFLT0_10L; /**< ADDR Rejection Filter Low, offset: 0x2EC */ 233 __IO uint32_t ARFLT0_10H; /**< ADDR Rejection Filter High, offset: 0x2F0 */ 234 __IO uint32_t ARFLT0_11L; /**< ADDR Rejection Filter Low, offset: 0x2F4 */ 235 __IO uint32_t ARFLT0_11H; /**< ADDR Rejection Filter High, offset: 0x2F8 */ 236 __IO uint32_t ARFLT0_12L; /**< ADDR Rejection Filter Low, offset: 0x2FC */ 237 __IO uint32_t ARFLT0_12H; /**< ADDR Rejection Filter High, offset: 0x300 */ 238 __IO uint32_t ARFLT0_13L; /**< ADDR Rejection Filter Low, offset: 0x304 */ 239 __IO uint32_t ARFLT0_13H; /**< ADDR Rejection Filter High, offset: 0x308 */ 240 __IO uint32_t ARFLT0_14L; /**< ADDR Rejection Filter Low, offset: 0x30C */ 241 __IO uint32_t ARFLT0_14H; /**< ADDR Rejection Filter High, offset: 0x310 */ 242 __IO uint32_t ARFLT0_15L; /**< ADDR Rejection Filter Low, offset: 0x314 */ 243 __IO uint32_t ARFLT0_15H; /**< ADDR Rejection Filter High, offset: 0x318 */ 244 __IO uint32_t ARFLT0_16L; /**< ADDR Rejection Filter Low, offset: 0x31C */ 245 __IO uint32_t ARFLT0_16H; /**< ADDR Rejection Filter High, offset: 0x320 */ 246 __IO uint32_t ARFLT0_17L; /**< ADDR Rejection Filter Low, offset: 0x324 */ 247 __IO uint32_t ARFLT0_17H; /**< ADDR Rejection Filter High, offset: 0x328 */ 248 __IO uint32_t ARFLT0_18L; /**< ADDR Rejection Filter Low, offset: 0x32C */ 249 __IO uint32_t ARFLT0_18H; /**< ADDR Rejection Filter High, offset: 0x330 */ 250 __IO uint32_t ARFLT0_19L; /**< ADDR Rejection Filter Low, offset: 0x334 */ 251 __IO uint32_t ARFLT0_19H; /**< ADDR Rejection Filter High, offset: 0x338 */ 252 __IO uint32_t ARFLT0_20L; /**< ADDR Rejection Filter Low, offset: 0x33C */ 253 __IO uint32_t ARFLT0_20H; /**< ADDR Rejection Filter High, offset: 0x340 */ 254 __IO uint32_t ARFLT0_21L; /**< ADDR Rejection Filter Low, offset: 0x344 */ 255 __IO uint32_t ARFLT0_21H; /**< ADDR Rejection Filter High, offset: 0x348 */ 256 __IO uint32_t ARFLT0_22L; /**< ADDR Rejection Filter Low, offset: 0x34C */ 257 __IO uint32_t ARFLT0_22H; /**< ADDR Rejection Filter High, offset: 0x350 */ 258 __IO uint32_t ARFLT0_23L; /**< ADDR Rejection Filter Low, offset: 0x354 */ 259 __IO uint32_t ARFLT0_23H; /**< ADDR Rejection Filter High, offset: 0x358 */ 260 __IO uint32_t ARFLT0_24L; /**< ADDR Rejection Filter Low, offset: 0x35C */ 261 __IO uint32_t ARFLT0_24H; /**< ADDR Rejection Filter High, offset: 0x360 */ 262 __IO uint32_t ARFLT0_25L; /**< ADDR Rejection Filter Low, offset: 0x364 */ 263 __IO uint32_t ARFLT0_25H; /**< ADDR Rejection Filter High, offset: 0x368 */ 264 __IO uint32_t ARFLT0_26L; /**< ADDR Rejection Filter Low, offset: 0x36C */ 265 __IO uint32_t ARFLT0_26H; /**< ADDR Rejection Filter High, offset: 0x370 */ 266 __IO uint32_t ARFLT0_27L; /**< ADDR Rejection Filter Low, offset: 0x374 */ 267 __IO uint32_t ARFLT0_27H; /**< ADDR Rejection Filter High, offset: 0x378 */ 268 __IO uint32_t ARFLT0_28L; /**< ADDR Rejection Filter Low, offset: 0x37C */ 269 __IO uint32_t ARFLT0_28H; /**< ADDR Rejection Filter High, offset: 0x380 */ 270 __IO uint32_t ARFLT0_29L; /**< ADDR Rejection Filter Low, offset: 0x384 */ 271 __IO uint32_t ARFLT0_29H; /**< ADDR Rejection Filter High, offset: 0x388 */ 272 __IO uint32_t ARFLT0_30L; /**< ADDR Rejection Filter Low, offset: 0x38C */ 273 __IO uint32_t ARFLT0_30H; /**< ADDR Rejection Filter High, offset: 0x390 */ 274 __IO uint32_t ARFLT0_31L; /**< ADDR Rejection Filter Low, offset: 0x394 */ 275 __IO uint32_t ARFLT0_31H; /**< ADDR Rejection Filter High, offset: 0x398 */ 276 uint8_t RESERVED_3[100]; 277 __IO uint32_t AFCFG1; /**< Acceptance Filter Configuration, offset: 0x400 */ 278 __IO uint32_t VAMRCFG1; /**< VCAN Acceptance Mask or Range Configuration, offset: 0x404 */ 279 __IO uint32_t SAMRCFG1; /**< SDU Acceptance Mask or Range Configuration, offset: 0x408 */ 280 __IO uint32_t AAMRCFG1; /**< ADDR Acceptance Mask or Range Configuration, offset: 0x40C */ 281 uint8_t RESERVED_4[12]; 282 __IO uint32_t VAFLT1_0; /**< VCAN Acceptance Filter, offset: 0x41C */ 283 __IO uint32_t VAFLT1_2; /**< VCAN Acceptance Filter, offset: 0x420 */ 284 __IO uint32_t VAFLT1_4; /**< VCAN Acceptance Filter, offset: 0x424 */ 285 __IO uint32_t VAFLT1_6; /**< VCAN Acceptance Filter, offset: 0x428 */ 286 __IO uint32_t VAFLT1_8; /**< VCAN Acceptance Filter, offset: 0x42C */ 287 __IO uint32_t VAFLT1_10; /**< VCAN Acceptance Filter, offset: 0x430 */ 288 __IO uint32_t VAFLT1_12; /**< VCAN Acceptance Filter, offset: 0x434 */ 289 __IO uint32_t VAFLT1_14; /**< VCAN Acceptance Filter, offset: 0x438 */ 290 __IO uint32_t VAFLT1_16; /**< VCAN Acceptance Filter, offset: 0x43C */ 291 __IO uint32_t VAFLT1_18; /**< VCAN Acceptance Filter, offset: 0x440 */ 292 __IO uint32_t VAFLT1_20; /**< VCAN Acceptance Filter, offset: 0x444 */ 293 __IO uint32_t VAFLT1_22; /**< VCAN Acceptance Filter, offset: 0x448 */ 294 __IO uint32_t VAFLT1_24; /**< VCAN Acceptance Filter, offset: 0x44C */ 295 __IO uint32_t VAFLT1_26; /**< VCAN Acceptance Filter, offset: 0x450 */ 296 __IO uint32_t VAFLT1_28; /**< VCAN Acceptance Filter, offset: 0x454 */ 297 __IO uint32_t VAFLT1_30; /**< VCAN Acceptance Filter, offset: 0x458 */ 298 __IO uint32_t SAFLT1_0; /**< SDU Acceptance Filter, offset: 0x45C */ 299 __IO uint32_t SAFLT1_2; /**< SDU Acceptance Filter, offset: 0x460 */ 300 __IO uint32_t SAFLT1_4; /**< SDU Acceptance Filter, offset: 0x464 */ 301 __IO uint32_t SAFLT1_6; /**< SDU Acceptance Filter, offset: 0x468 */ 302 __IO uint32_t SAFLT1_8; /**< SDU Acceptance Filter, offset: 0x46C */ 303 __IO uint32_t SAFLT1_10; /**< SDU Acceptance Filter, offset: 0x470 */ 304 __IO uint32_t SAFLT1_12; /**< SDU Acceptance Filter, offset: 0x474 */ 305 __IO uint32_t SAFLT1_14; /**< SDU Acceptance Filter, offset: 0x478 */ 306 __IO uint32_t SAFLT1_16; /**< SDU Acceptance Filter, offset: 0x47C */ 307 __IO uint32_t SAFLT1_18; /**< SDU Acceptance Filter, offset: 0x480 */ 308 __IO uint32_t SAFLT1_20; /**< SDU Acceptance Filter, offset: 0x484 */ 309 __IO uint32_t SAFLT1_22; /**< SDU Acceptance Filter, offset: 0x488 */ 310 __IO uint32_t SAFLT1_24; /**< SDU Acceptance Filter, offset: 0x48C */ 311 __IO uint32_t SAFLT1_26; /**< SDU Acceptance Filter, offset: 0x490 */ 312 __IO uint32_t SAFLT1_28; /**< SDU Acceptance Filter, offset: 0x494 */ 313 __IO uint32_t SAFLT1_30; /**< SDU Acceptance Filter, offset: 0x498 */ 314 __IO uint32_t AAFLT1_0L; /**< ADDR Acceptance Filter Low, offset: 0x49C */ 315 __IO uint32_t AAFLT1_0H; /**< ADDR Acceptance Filter High, offset: 0x4A0 */ 316 __IO uint32_t AAFLT1_1L; /**< ADDR Acceptance Filter Low, offset: 0x4A4 */ 317 __IO uint32_t AAFLT1_1H; /**< ADDR Acceptance Filter High, offset: 0x4A8 */ 318 __IO uint32_t AAFLT1_2L; /**< ADDR Acceptance Filter Low, offset: 0x4AC */ 319 __IO uint32_t AAFLT1_2H; /**< ADDR Acceptance Filter High, offset: 0x4B0 */ 320 __IO uint32_t AAFLT1_3L; /**< ADDR Acceptance Filter Low, offset: 0x4B4 */ 321 __IO uint32_t AAFLT1_3H; /**< ADDR Acceptance Filter High, offset: 0x4B8 */ 322 __IO uint32_t AAFLT1_4L; /**< ADDR Acceptance Filter Low, offset: 0x4BC */ 323 __IO uint32_t AAFLT1_4H; /**< ADDR Acceptance Filter High, offset: 0x4C0 */ 324 __IO uint32_t AAFLT1_5L; /**< ADDR Acceptance Filter Low, offset: 0x4C4 */ 325 __IO uint32_t AAFLT1_5H; /**< ADDR Acceptance Filter High, offset: 0x4C8 */ 326 __IO uint32_t AAFLT1_6L; /**< ADDR Acceptance Filter Low, offset: 0x4CC */ 327 __IO uint32_t AAFLT1_6H; /**< ADDR Acceptance Filter High, offset: 0x4D0 */ 328 __IO uint32_t AAFLT1_7L; /**< ADDR Acceptance Filter Low, offset: 0x4D4 */ 329 __IO uint32_t AAFLT1_7H; /**< ADDR Acceptance Filter High, offset: 0x4D8 */ 330 __IO uint32_t AAFLT1_8L; /**< ADDR Acceptance Filter Low, offset: 0x4DC */ 331 __IO uint32_t AAFLT1_8H; /**< ADDR Acceptance Filter High, offset: 0x4E0 */ 332 __IO uint32_t AAFLT1_9L; /**< ADDR Acceptance Filter Low, offset: 0x4E4 */ 333 __IO uint32_t AAFLT1_9H; /**< ADDR Acceptance Filter High, offset: 0x4E8 */ 334 __IO uint32_t AAFLT1_10L; /**< ADDR Acceptance Filter Low, offset: 0x4EC */ 335 __IO uint32_t AAFLT1_10H; /**< ADDR Acceptance Filter High, offset: 0x4F0 */ 336 __IO uint32_t AAFLT1_11L; /**< ADDR Acceptance Filter Low, offset: 0x4F4 */ 337 __IO uint32_t AAFLT1_11H; /**< ADDR Acceptance Filter High, offset: 0x4F8 */ 338 __IO uint32_t AAFLT1_12L; /**< ADDR Acceptance Filter Low, offset: 0x4FC */ 339 __IO uint32_t AAFLT1_12H; /**< ADDR Acceptance Filter High, offset: 0x500 */ 340 __IO uint32_t AAFLT1_13L; /**< ADDR Acceptance Filter Low, offset: 0x504 */ 341 __IO uint32_t AAFLT1_13H; /**< ADDR Acceptance Filter High, offset: 0x508 */ 342 __IO uint32_t AAFLT1_14L; /**< ADDR Acceptance Filter Low, offset: 0x50C */ 343 __IO uint32_t AAFLT1_14H; /**< ADDR Acceptance Filter High, offset: 0x510 */ 344 __IO uint32_t AAFLT1_15L; /**< ADDR Acceptance Filter Low, offset: 0x514 */ 345 __IO uint32_t AAFLT1_15H; /**< ADDR Acceptance Filter High, offset: 0x518 */ 346 __IO uint32_t AAFLT1_16L; /**< ADDR Acceptance Filter Low, offset: 0x51C */ 347 __IO uint32_t AAFLT1_16H; /**< ADDR Acceptance Filter High, offset: 0x520 */ 348 __IO uint32_t AAFLT1_17L; /**< ADDR Acceptance Filter Low, offset: 0x524 */ 349 __IO uint32_t AAFLT1_17H; /**< ADDR Acceptance Filter High, offset: 0x528 */ 350 __IO uint32_t AAFLT1_18L; /**< ADDR Acceptance Filter Low, offset: 0x52C */ 351 __IO uint32_t AAFLT1_18H; /**< ADDR Acceptance Filter High, offset: 0x530 */ 352 __IO uint32_t AAFLT1_19L; /**< ADDR Acceptance Filter Low, offset: 0x534 */ 353 __IO uint32_t AAFLT1_19H; /**< ADDR Acceptance Filter High, offset: 0x538 */ 354 __IO uint32_t AAFLT1_20L; /**< ADDR Acceptance Filter Low, offset: 0x53C */ 355 __IO uint32_t AAFLT1_20H; /**< ADDR Acceptance Filter High, offset: 0x540 */ 356 __IO uint32_t AAFLT1_21L; /**< ADDR Acceptance Filter Low, offset: 0x544 */ 357 __IO uint32_t AAFLT1_21H; /**< ADDR Acceptance Filter High, offset: 0x548 */ 358 __IO uint32_t AAFLT1_22L; /**< ADDR Acceptance Filter Low, offset: 0x54C */ 359 __IO uint32_t AAFLT1_22H; /**< ADDR Acceptance Filter High, offset: 0x550 */ 360 __IO uint32_t AAFLT1_23L; /**< ADDR Acceptance Filter Low, offset: 0x554 */ 361 __IO uint32_t AAFLT1_23H; /**< ADDR Acceptance Filter High, offset: 0x558 */ 362 __IO uint32_t AAFLT1_24L; /**< ADDR Acceptance Filter Low, offset: 0x55C */ 363 __IO uint32_t AAFLT1_24H; /**< ADDR Acceptance Filter High, offset: 0x560 */ 364 __IO uint32_t AAFLT1_25L; /**< ADDR Acceptance Filter Low, offset: 0x564 */ 365 __IO uint32_t AAFLT1_25H; /**< ADDR Acceptance Filter High, offset: 0x568 */ 366 __IO uint32_t AAFLT1_26L; /**< ADDR Acceptance Filter Low, offset: 0x56C */ 367 __IO uint32_t AAFLT1_26H; /**< ADDR Acceptance Filter High, offset: 0x570 */ 368 __IO uint32_t AAFLT1_27L; /**< ADDR Acceptance Filter Low, offset: 0x574 */ 369 __IO uint32_t AAFLT1_27H; /**< ADDR Acceptance Filter High, offset: 0x578 */ 370 __IO uint32_t AAFLT1_28L; /**< ADDR Acceptance Filter Low, offset: 0x57C */ 371 __IO uint32_t AAFLT1_28H; /**< ADDR Acceptance Filter High, offset: 0x580 */ 372 __IO uint32_t AAFLT1_29L; /**< ADDR Acceptance Filter Low, offset: 0x584 */ 373 __IO uint32_t AAFLT1_29H; /**< ADDR Acceptance Filter High, offset: 0x588 */ 374 __IO uint32_t AAFLT1_30L; /**< ADDR Acceptance Filter Low, offset: 0x58C */ 375 __IO uint32_t AAFLT1_30H; /**< ADDR Acceptance Filter High, offset: 0x590 */ 376 __IO uint32_t AAFLT1_31L; /**< ADDR Acceptance Filter Low, offset: 0x594 */ 377 __IO uint32_t AAFLT1_31H; /**< ADDR Acceptance Filter High, offset: 0x598 */ 378 uint8_t RESERVED_5[100]; 379 __IO uint32_t RFCFG1; /**< Rejection Filter Configuration, offset: 0x600 */ 380 __IO uint32_t VRMRCFG1; /**< VCAN Rejection Mask or Range Configuration, offset: 0x604 */ 381 __IO uint32_t SRMRCFG1; /**< SDU Rejection Mask or Range Configuration, offset: 0x608 */ 382 __IO uint32_t ARMRCFG1; /**< ADDR Rejection Mask or Range Configuration, offset: 0x60C */ 383 uint8_t RESERVED_6[12]; 384 __IO uint32_t VRFLT1_0; /**< VCAN Rejection Filter, offset: 0x61C */ 385 __IO uint32_t VRFLT1_2; /**< VCAN Rejection Filter, offset: 0x620 */ 386 __IO uint32_t VRFLT1_4; /**< VCAN Rejection Filter, offset: 0x624 */ 387 __IO uint32_t VRFLT1_6; /**< VCAN Rejection Filter, offset: 0x628 */ 388 __IO uint32_t VRFLT1_8; /**< VCAN Rejection Filter, offset: 0x62C */ 389 __IO uint32_t VRFLT1_10; /**< VCAN Rejection Filter, offset: 0x630 */ 390 __IO uint32_t VRFLT1_12; /**< VCAN Rejection Filter, offset: 0x634 */ 391 __IO uint32_t VRFLT1_14; /**< VCAN Rejection Filter, offset: 0x638 */ 392 __IO uint32_t VRFLT1_16; /**< VCAN Rejection Filter, offset: 0x63C */ 393 __IO uint32_t VRFLT1_18; /**< VCAN Rejection Filter, offset: 0x640 */ 394 __IO uint32_t VRFLT1_20; /**< VCAN Rejection Filter, offset: 0x644 */ 395 __IO uint32_t VRFLT1_22; /**< VCAN Rejection Filter, offset: 0x648 */ 396 __IO uint32_t VRFLT1_24; /**< VCAN Rejection Filter, offset: 0x64C */ 397 __IO uint32_t VRFLT1_26; /**< VCAN Rejection Filter, offset: 0x650 */ 398 __IO uint32_t VRFLT1_28; /**< VCAN Rejection Filter, offset: 0x654 */ 399 __IO uint32_t VRFLT1_30; /**< VCAN Rejection Filter, offset: 0x658 */ 400 __IO uint32_t SRFLT1_0; /**< SDU Rejection Filter, offset: 0x65C */ 401 __IO uint32_t SRFLT1_2; /**< SDU Rejection Filter, offset: 0x660 */ 402 __IO uint32_t SRFLT1_4; /**< SDU Rejection Filter, offset: 0x664 */ 403 __IO uint32_t SRFLT1_6; /**< SDU Rejection Filter, offset: 0x668 */ 404 __IO uint32_t SRFLT1_8; /**< SDU Rejection Filter, offset: 0x66C */ 405 __IO uint32_t SRFLT1_10; /**< SDU Rejection Filter, offset: 0x670 */ 406 __IO uint32_t SRFLT1_12; /**< SDU Rejection Filter, offset: 0x674 */ 407 __IO uint32_t SRFLT1_14; /**< SDU Rejection Filter, offset: 0x678 */ 408 __IO uint32_t SRFLT1_16; /**< SDU Rejection Filter, offset: 0x67C */ 409 __IO uint32_t SRFLT1_18; /**< SDU Rejection Filter, offset: 0x680 */ 410 __IO uint32_t SRFLT1_20; /**< SDU Rejection Filter, offset: 0x684 */ 411 __IO uint32_t SRFLT1_22; /**< SDU Rejection Filter, offset: 0x688 */ 412 __IO uint32_t SRFLT1_24; /**< SDU Rejection Filter, offset: 0x68C */ 413 __IO uint32_t SRFLT1_26; /**< SDU Rejection Filter, offset: 0x690 */ 414 __IO uint32_t SRFLT1_28; /**< SDU Rejection Filter, offset: 0x694 */ 415 __IO uint32_t SRFLT1_30; /**< SDU Rejection Filter, offset: 0x698 */ 416 __IO uint32_t ARFLT1_0L; /**< ADDR Rejection Filter Low, offset: 0x69C */ 417 __IO uint32_t ARFLT1_0H; /**< ADDR Rejection Filter High, offset: 0x6A0 */ 418 __IO uint32_t ARFLT1_1L; /**< ADDR Rejection Filter Low, offset: 0x6A4 */ 419 __IO uint32_t ARFLT1_1H; /**< ADDR Rejection Filter High, offset: 0x6A8 */ 420 __IO uint32_t ARFLT1_2L; /**< ADDR Rejection Filter Low, offset: 0x6AC */ 421 __IO uint32_t ARFLT1_2H; /**< ADDR Rejection Filter High, offset: 0x6B0 */ 422 __IO uint32_t ARFLT1_3L; /**< ADDR Rejection Filter Low, offset: 0x6B4 */ 423 __IO uint32_t ARFLT1_3H; /**< ADDR Rejection Filter High, offset: 0x6B8 */ 424 __IO uint32_t ARFLT1_4L; /**< ADDR Rejection Filter Low, offset: 0x6BC */ 425 __IO uint32_t ARFLT1_4H; /**< ADDR Rejection Filter High, offset: 0x6C0 */ 426 __IO uint32_t ARFLT1_5L; /**< ADDR Rejection Filter Low, offset: 0x6C4 */ 427 __IO uint32_t ARFLT1_5H; /**< ADDR Rejection Filter High, offset: 0x6C8 */ 428 __IO uint32_t ARFLT1_6L; /**< ADDR Rejection Filter Low, offset: 0x6CC */ 429 __IO uint32_t ARFLT1_6H; /**< ADDR Rejection Filter High, offset: 0x6D0 */ 430 __IO uint32_t ARFLT1_7L; /**< ADDR Rejection Filter Low, offset: 0x6D4 */ 431 __IO uint32_t ARFLT1_7H; /**< ADDR Rejection Filter High, offset: 0x6D8 */ 432 __IO uint32_t ARFLT1_8L; /**< ADDR Rejection Filter Low, offset: 0x6DC */ 433 __IO uint32_t ARFLT1_8H; /**< ADDR Rejection Filter High, offset: 0x6E0 */ 434 __IO uint32_t ARFLT1_9L; /**< ADDR Rejection Filter Low, offset: 0x6E4 */ 435 __IO uint32_t ARFLT1_9H; /**< ADDR Rejection Filter High, offset: 0x6E8 */ 436 __IO uint32_t ARFLT1_10L; /**< ADDR Rejection Filter Low, offset: 0x6EC */ 437 __IO uint32_t ARFLT1_10H; /**< ADDR Rejection Filter High, offset: 0x6F0 */ 438 __IO uint32_t ARFLT1_11L; /**< ADDR Rejection Filter Low, offset: 0x6F4 */ 439 __IO uint32_t ARFLT1_11H; /**< ADDR Rejection Filter High, offset: 0x6F8 */ 440 __IO uint32_t ARFLT1_12L; /**< ADDR Rejection Filter Low, offset: 0x6FC */ 441 __IO uint32_t ARFLT1_12H; /**< ADDR Rejection Filter High, offset: 0x700 */ 442 __IO uint32_t ARFLT1_13L; /**< ADDR Rejection Filter Low, offset: 0x704 */ 443 __IO uint32_t ARFLT1_13H; /**< ADDR Rejection Filter High, offset: 0x708 */ 444 __IO uint32_t ARFLT1_14L; /**< ADDR Rejection Filter Low, offset: 0x70C */ 445 __IO uint32_t ARFLT1_14H; /**< ADDR Rejection Filter High, offset: 0x710 */ 446 __IO uint32_t ARFLT1_15L; /**< ADDR Rejection Filter Low, offset: 0x714 */ 447 __IO uint32_t ARFLT1_15H; /**< ADDR Rejection Filter High, offset: 0x718 */ 448 __IO uint32_t ARFLT1_16L; /**< ADDR Rejection Filter Low, offset: 0x71C */ 449 __IO uint32_t ARFLT1_16H; /**< ADDR Rejection Filter High, offset: 0x720 */ 450 __IO uint32_t ARFLT1_17L; /**< ADDR Rejection Filter Low, offset: 0x724 */ 451 __IO uint32_t ARFLT1_17H; /**< ADDR Rejection Filter High, offset: 0x728 */ 452 __IO uint32_t ARFLT1_18L; /**< ADDR Rejection Filter Low, offset: 0x72C */ 453 __IO uint32_t ARFLT1_18H; /**< ADDR Rejection Filter High, offset: 0x730 */ 454 __IO uint32_t ARFLT1_19L; /**< ADDR Rejection Filter Low, offset: 0x734 */ 455 __IO uint32_t ARFLT1_19H; /**< ADDR Rejection Filter High, offset: 0x738 */ 456 __IO uint32_t ARFLT1_20L; /**< ADDR Rejection Filter Low, offset: 0x73C */ 457 __IO uint32_t ARFLT1_20H; /**< ADDR Rejection Filter High, offset: 0x740 */ 458 __IO uint32_t ARFLT1_21L; /**< ADDR Rejection Filter Low, offset: 0x744 */ 459 __IO uint32_t ARFLT1_21H; /**< ADDR Rejection Filter High, offset: 0x748 */ 460 __IO uint32_t ARFLT1_22L; /**< ADDR Rejection Filter Low, offset: 0x74C */ 461 __IO uint32_t ARFLT1_22H; /**< ADDR Rejection Filter High, offset: 0x750 */ 462 __IO uint32_t ARFLT1_23L; /**< ADDR Rejection Filter Low, offset: 0x754 */ 463 __IO uint32_t ARFLT1_23H; /**< ADDR Rejection Filter High, offset: 0x758 */ 464 __IO uint32_t ARFLT1_24L; /**< ADDR Rejection Filter Low, offset: 0x75C */ 465 __IO uint32_t ARFLT1_24H; /**< ADDR Rejection Filter High, offset: 0x760 */ 466 __IO uint32_t ARFLT1_25L; /**< ADDR Rejection Filter Low, offset: 0x764 */ 467 __IO uint32_t ARFLT1_25H; /**< ADDR Rejection Filter High, offset: 0x768 */ 468 __IO uint32_t ARFLT1_26L; /**< ADDR Rejection Filter Low, offset: 0x76C */ 469 __IO uint32_t ARFLT1_26H; /**< ADDR Rejection Filter High, offset: 0x770 */ 470 __IO uint32_t ARFLT1_27L; /**< ADDR Rejection Filter Low, offset: 0x774 */ 471 __IO uint32_t ARFLT1_27H; /**< ADDR Rejection Filter High, offset: 0x778 */ 472 __IO uint32_t ARFLT1_28L; /**< ADDR Rejection Filter Low, offset: 0x77C */ 473 __IO uint32_t ARFLT1_28H; /**< ADDR Rejection Filter High, offset: 0x780 */ 474 __IO uint32_t ARFLT1_29L; /**< ADDR Rejection Filter Low, offset: 0x784 */ 475 __IO uint32_t ARFLT1_29H; /**< ADDR Rejection Filter High, offset: 0x788 */ 476 __IO uint32_t ARFLT1_30L; /**< ADDR Rejection Filter Low, offset: 0x78C */ 477 __IO uint32_t ARFLT1_30H; /**< ADDR Rejection Filter High, offset: 0x790 */ 478 __IO uint32_t ARFLT1_31L; /**< ADDR Rejection Filter Low, offset: 0x794 */ 479 __IO uint32_t ARFLT1_31H; /**< ADDR Rejection Filter High, offset: 0x798 */ 480 } CANXL_FILTER_BANK_Type, *CANXL_FILTER_BANK_MemMapPtr; 481 482 /** Number of instances of the CANXL_FILTER_BANK module. */ 483 #define CANXL_FILTER_BANK_INSTANCE_COUNT (2u) 484 485 /* CANXL_FILTER_BANK - Peripheral instance base addresses */ 486 /** Peripheral CANXL_0__FILTER_BANK base address */ 487 #define IP_CANXL_0__FILTER_BANK_BASE (0x47422000u) 488 /** Peripheral CANXL_0__FILTER_BANK base pointer */ 489 #define IP_CANXL_0__FILTER_BANK ((CANXL_FILTER_BANK_Type *)IP_CANXL_0__FILTER_BANK_BASE) 490 /** Peripheral CANXL_1__FILTER_BANK base address */ 491 #define IP_CANXL_1__FILTER_BANK_BASE (0x47522000u) 492 /** Peripheral CANXL_1__FILTER_BANK base pointer */ 493 #define IP_CANXL_1__FILTER_BANK ((CANXL_FILTER_BANK_Type *)IP_CANXL_1__FILTER_BANK_BASE) 494 /** Array initializer of CANXL_FILTER_BANK peripheral base addresses */ 495 #define IP_CANXL_FILTER_BANK_BASE_ADDRS { IP_CANXL_0__FILTER_BANK_BASE, IP_CANXL_1__FILTER_BANK_BASE } 496 /** Array initializer of CANXL_FILTER_BANK peripheral base pointers */ 497 #define IP_CANXL_FILTER_BANK_BASE_PTRS { IP_CANXL_0__FILTER_BANK, IP_CANXL_1__FILTER_BANK } 498 499 /* ---------------------------------------------------------------------------- 500 -- CANXL_FILTER_BANK Register Masks 501 ---------------------------------------------------------------------------- */ 502 503 /*! 504 * @addtogroup CANXL_FILTER_BANK_Register_Masks CANXL_FILTER_BANK Register Masks 505 * @{ 506 */ 507 508 /*! @name AFCFG0 - Acceptance Filter Configuration */ 509 /*! @{ */ 510 511 #define CANXL_FILTER_BANK_AFCFG0_ACPTVCAN_MASK (0x1FU) 512 #define CANXL_FILTER_BANK_AFCFG0_ACPTVCAN_SHIFT (0U) 513 #define CANXL_FILTER_BANK_AFCFG0_ACPTVCAN_WIDTH (5U) 514 #define CANXL_FILTER_BANK_AFCFG0_ACPTVCAN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_ACPTVCAN_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_ACPTVCAN_MASK) 515 516 #define CANXL_FILTER_BANK_AFCFG0_AVCANEN_MASK (0x80U) 517 #define CANXL_FILTER_BANK_AFCFG0_AVCANEN_SHIFT (7U) 518 #define CANXL_FILTER_BANK_AFCFG0_AVCANEN_WIDTH (1U) 519 #define CANXL_FILTER_BANK_AFCFG0_AVCANEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_AVCANEN_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_AVCANEN_MASK) 520 521 #define CANXL_FILTER_BANK_AFCFG0_ACPTSDU_MASK (0x1F00U) 522 #define CANXL_FILTER_BANK_AFCFG0_ACPTSDU_SHIFT (8U) 523 #define CANXL_FILTER_BANK_AFCFG0_ACPTSDU_WIDTH (5U) 524 #define CANXL_FILTER_BANK_AFCFG0_ACPTSDU(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_ACPTSDU_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_ACPTSDU_MASK) 525 526 #define CANXL_FILTER_BANK_AFCFG0_ASDUEN_MASK (0x8000U) 527 #define CANXL_FILTER_BANK_AFCFG0_ASDUEN_SHIFT (15U) 528 #define CANXL_FILTER_BANK_AFCFG0_ASDUEN_WIDTH (1U) 529 #define CANXL_FILTER_BANK_AFCFG0_ASDUEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_ASDUEN_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_ASDUEN_MASK) 530 531 #define CANXL_FILTER_BANK_AFCFG0_ACPTADDR_MASK (0x1F0000U) 532 #define CANXL_FILTER_BANK_AFCFG0_ACPTADDR_SHIFT (16U) 533 #define CANXL_FILTER_BANK_AFCFG0_ACPTADDR_WIDTH (5U) 534 #define CANXL_FILTER_BANK_AFCFG0_ACPTADDR(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_ACPTADDR_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_ACPTADDR_MASK) 535 536 #define CANXL_FILTER_BANK_AFCFG0_AADDREN_MASK (0x800000U) 537 #define CANXL_FILTER_BANK_AFCFG0_AADDREN_SHIFT (23U) 538 #define CANXL_FILTER_BANK_AFCFG0_AADDREN_WIDTH (1U) 539 #define CANXL_FILTER_BANK_AFCFG0_AADDREN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG0_AADDREN_SHIFT)) & CANXL_FILTER_BANK_AFCFG0_AADDREN_MASK) 540 /*! @} */ 541 542 /*! @name VAMRCFG0 - VCAN Acceptance Mask or Range Configuration */ 543 /*! @{ */ 544 545 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0_MASK (0x1U) 546 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0_SHIFT (0U) 547 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0_WIDTH (1U) 548 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R0_MASK) 549 550 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1_MASK (0x2U) 551 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1_SHIFT (1U) 552 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1_WIDTH (1U) 553 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R1_MASK) 554 555 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2_MASK (0x4U) 556 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2_SHIFT (2U) 557 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2_WIDTH (1U) 558 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R2_MASK) 559 560 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3_MASK (0x8U) 561 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3_SHIFT (3U) 562 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3_WIDTH (1U) 563 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R3_MASK) 564 565 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4_MASK (0x10U) 566 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4_SHIFT (4U) 567 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4_WIDTH (1U) 568 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R4_MASK) 569 570 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5_MASK (0x20U) 571 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5_SHIFT (5U) 572 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5_WIDTH (1U) 573 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R5_MASK) 574 575 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6_MASK (0x40U) 576 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6_SHIFT (6U) 577 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6_WIDTH (1U) 578 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R6_MASK) 579 580 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7_MASK (0x80U) 581 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7_SHIFT (7U) 582 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7_WIDTH (1U) 583 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R7_MASK) 584 585 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8_MASK (0x100U) 586 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8_SHIFT (8U) 587 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8_WIDTH (1U) 588 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R8_MASK) 589 590 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9_MASK (0x200U) 591 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9_SHIFT (9U) 592 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9_WIDTH (1U) 593 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R9_MASK) 594 595 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10_MASK (0x400U) 596 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10_SHIFT (10U) 597 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10_WIDTH (1U) 598 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R10_MASK) 599 600 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11_MASK (0x800U) 601 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11_SHIFT (11U) 602 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11_WIDTH (1U) 603 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R11_MASK) 604 605 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12_MASK (0x1000U) 606 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12_SHIFT (12U) 607 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12_WIDTH (1U) 608 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R12_MASK) 609 610 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13_MASK (0x2000U) 611 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13_SHIFT (13U) 612 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13_WIDTH (1U) 613 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R13_MASK) 614 615 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14_MASK (0x4000U) 616 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14_SHIFT (14U) 617 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14_WIDTH (1U) 618 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R14_MASK) 619 620 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15_MASK (0x8000U) 621 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15_SHIFT (15U) 622 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15_WIDTH (1U) 623 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R15_MASK) 624 625 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16_MASK (0x10000U) 626 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16_SHIFT (16U) 627 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16_WIDTH (1U) 628 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R16_MASK) 629 630 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17_MASK (0x20000U) 631 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17_SHIFT (17U) 632 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17_WIDTH (1U) 633 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R17_MASK) 634 635 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18_MASK (0x40000U) 636 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18_SHIFT (18U) 637 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18_WIDTH (1U) 638 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R18_MASK) 639 640 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19_MASK (0x80000U) 641 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19_SHIFT (19U) 642 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19_WIDTH (1U) 643 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R19_MASK) 644 645 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20_MASK (0x100000U) 646 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20_SHIFT (20U) 647 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20_WIDTH (1U) 648 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R20_MASK) 649 650 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21_MASK (0x200000U) 651 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21_SHIFT (21U) 652 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21_WIDTH (1U) 653 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R21_MASK) 654 655 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22_MASK (0x400000U) 656 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22_SHIFT (22U) 657 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22_WIDTH (1U) 658 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R22_MASK) 659 660 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23_MASK (0x800000U) 661 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23_SHIFT (23U) 662 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23_WIDTH (1U) 663 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R23_MASK) 664 665 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24_MASK (0x1000000U) 666 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24_SHIFT (24U) 667 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24_WIDTH (1U) 668 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R24_MASK) 669 670 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25_MASK (0x2000000U) 671 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25_SHIFT (25U) 672 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25_WIDTH (1U) 673 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R25_MASK) 674 675 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26_MASK (0x4000000U) 676 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26_SHIFT (26U) 677 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26_WIDTH (1U) 678 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R26_MASK) 679 680 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27_MASK (0x8000000U) 681 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27_SHIFT (27U) 682 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27_WIDTH (1U) 683 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R27_MASK) 684 685 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28_MASK (0x10000000U) 686 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28_SHIFT (28U) 687 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28_WIDTH (1U) 688 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R28_MASK) 689 690 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29_MASK (0x20000000U) 691 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29_SHIFT (29U) 692 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29_WIDTH (1U) 693 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R29_MASK) 694 695 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30_MASK (0x40000000U) 696 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30_SHIFT (30U) 697 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30_WIDTH (1U) 698 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R30_MASK) 699 700 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31_MASK (0x80000000U) 701 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31_SHIFT (31U) 702 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31_WIDTH (1U) 703 #define CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG0_VMSK0R31_MASK) 704 /*! @} */ 705 706 /*! @name SAMRCFG0 - SDU Acceptance Mask or Range Configuration */ 707 /*! @{ */ 708 709 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0_MASK (0x1U) 710 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0_SHIFT (0U) 711 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0_WIDTH (1U) 712 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R0_MASK) 713 714 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1_MASK (0x2U) 715 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1_SHIFT (1U) 716 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1_WIDTH (1U) 717 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R1_MASK) 718 719 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2_MASK (0x4U) 720 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2_SHIFT (2U) 721 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2_WIDTH (1U) 722 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R2_MASK) 723 724 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3_MASK (0x8U) 725 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3_SHIFT (3U) 726 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3_WIDTH (1U) 727 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R3_MASK) 728 729 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4_MASK (0x10U) 730 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4_SHIFT (4U) 731 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4_WIDTH (1U) 732 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R4_MASK) 733 734 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5_MASK (0x20U) 735 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5_SHIFT (5U) 736 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5_WIDTH (1U) 737 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R5_MASK) 738 739 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6_MASK (0x40U) 740 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6_SHIFT (6U) 741 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6_WIDTH (1U) 742 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R6_MASK) 743 744 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7_MASK (0x80U) 745 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7_SHIFT (7U) 746 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7_WIDTH (1U) 747 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R7_MASK) 748 749 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8_MASK (0x100U) 750 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8_SHIFT (8U) 751 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8_WIDTH (1U) 752 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R8_MASK) 753 754 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9_MASK (0x200U) 755 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9_SHIFT (9U) 756 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9_WIDTH (1U) 757 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R9_MASK) 758 759 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10_MASK (0x400U) 760 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10_SHIFT (10U) 761 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10_WIDTH (1U) 762 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R10_MASK) 763 764 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11_MASK (0x800U) 765 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11_SHIFT (11U) 766 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11_WIDTH (1U) 767 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R11_MASK) 768 769 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12_MASK (0x1000U) 770 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12_SHIFT (12U) 771 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12_WIDTH (1U) 772 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R12_MASK) 773 774 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13_MASK (0x2000U) 775 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13_SHIFT (13U) 776 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13_WIDTH (1U) 777 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R13_MASK) 778 779 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14_MASK (0x4000U) 780 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14_SHIFT (14U) 781 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14_WIDTH (1U) 782 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R14_MASK) 783 784 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15_MASK (0x8000U) 785 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15_SHIFT (15U) 786 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15_WIDTH (1U) 787 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R15_MASK) 788 789 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16_MASK (0x10000U) 790 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16_SHIFT (16U) 791 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16_WIDTH (1U) 792 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R16_MASK) 793 794 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17_MASK (0x20000U) 795 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17_SHIFT (17U) 796 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17_WIDTH (1U) 797 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R17_MASK) 798 799 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18_MASK (0x40000U) 800 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18_SHIFT (18U) 801 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18_WIDTH (1U) 802 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R18_MASK) 803 804 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19_MASK (0x80000U) 805 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19_SHIFT (19U) 806 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19_WIDTH (1U) 807 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R19_MASK) 808 809 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20_MASK (0x100000U) 810 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20_SHIFT (20U) 811 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20_WIDTH (1U) 812 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R20_MASK) 813 814 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21_MASK (0x200000U) 815 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21_SHIFT (21U) 816 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21_WIDTH (1U) 817 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R21_MASK) 818 819 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22_MASK (0x400000U) 820 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22_SHIFT (22U) 821 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22_WIDTH (1U) 822 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R22_MASK) 823 824 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23_MASK (0x800000U) 825 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23_SHIFT (23U) 826 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23_WIDTH (1U) 827 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R23_MASK) 828 829 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24_MASK (0x1000000U) 830 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24_SHIFT (24U) 831 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24_WIDTH (1U) 832 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R24_MASK) 833 834 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25_MASK (0x2000000U) 835 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25_SHIFT (25U) 836 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25_WIDTH (1U) 837 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R25_MASK) 838 839 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26_MASK (0x4000000U) 840 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26_SHIFT (26U) 841 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26_WIDTH (1U) 842 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R26_MASK) 843 844 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27_MASK (0x8000000U) 845 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27_SHIFT (27U) 846 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27_WIDTH (1U) 847 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R27_MASK) 848 849 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28_MASK (0x10000000U) 850 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28_SHIFT (28U) 851 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28_WIDTH (1U) 852 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R28_MASK) 853 854 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29_MASK (0x20000000U) 855 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29_SHIFT (29U) 856 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29_WIDTH (1U) 857 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R29_MASK) 858 859 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30_MASK (0x40000000U) 860 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30_SHIFT (30U) 861 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30_WIDTH (1U) 862 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R30_MASK) 863 864 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31_MASK (0x80000000U) 865 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31_SHIFT (31U) 866 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31_WIDTH (1U) 867 #define CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG0_SMSK0R31_MASK) 868 /*! @} */ 869 870 /*! @name AAMRCFG0 - ADDR Acceptance Mask or Range Configuration */ 871 /*! @{ */ 872 873 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0_MASK (0x1U) 874 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0_SHIFT (0U) 875 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0_WIDTH (1U) 876 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R0_MASK) 877 878 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1_MASK (0x2U) 879 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1_SHIFT (1U) 880 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1_WIDTH (1U) 881 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R1_MASK) 882 883 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2_MASK (0x4U) 884 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2_SHIFT (2U) 885 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2_WIDTH (1U) 886 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R2_MASK) 887 888 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3_MASK (0x8U) 889 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3_SHIFT (3U) 890 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3_WIDTH (1U) 891 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R3_MASK) 892 893 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4_MASK (0x10U) 894 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4_SHIFT (4U) 895 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4_WIDTH (1U) 896 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R4_MASK) 897 898 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5_MASK (0x20U) 899 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5_SHIFT (5U) 900 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5_WIDTH (1U) 901 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R5_MASK) 902 903 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6_MASK (0x40U) 904 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6_SHIFT (6U) 905 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6_WIDTH (1U) 906 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R6_MASK) 907 908 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7_MASK (0x80U) 909 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7_SHIFT (7U) 910 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7_WIDTH (1U) 911 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R7_MASK) 912 913 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8_MASK (0x100U) 914 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8_SHIFT (8U) 915 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8_WIDTH (1U) 916 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R8_MASK) 917 918 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9_MASK (0x200U) 919 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9_SHIFT (9U) 920 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9_WIDTH (1U) 921 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R9_MASK) 922 923 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10_MASK (0x400U) 924 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10_SHIFT (10U) 925 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10_WIDTH (1U) 926 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R10_MASK) 927 928 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11_MASK (0x800U) 929 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11_SHIFT (11U) 930 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11_WIDTH (1U) 931 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R11_MASK) 932 933 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12_MASK (0x1000U) 934 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12_SHIFT (12U) 935 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12_WIDTH (1U) 936 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R12_MASK) 937 938 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13_MASK (0x2000U) 939 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13_SHIFT (13U) 940 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13_WIDTH (1U) 941 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R13_MASK) 942 943 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14_MASK (0x4000U) 944 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14_SHIFT (14U) 945 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14_WIDTH (1U) 946 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R14_MASK) 947 948 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15_MASK (0x8000U) 949 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15_SHIFT (15U) 950 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15_WIDTH (1U) 951 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R15_MASK) 952 953 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16_MASK (0x10000U) 954 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16_SHIFT (16U) 955 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16_WIDTH (1U) 956 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R16_MASK) 957 958 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17_MASK (0x20000U) 959 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17_SHIFT (17U) 960 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17_WIDTH (1U) 961 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R17_MASK) 962 963 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18_MASK (0x40000U) 964 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18_SHIFT (18U) 965 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18_WIDTH (1U) 966 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R18_MASK) 967 968 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19_MASK (0x80000U) 969 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19_SHIFT (19U) 970 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19_WIDTH (1U) 971 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R19_MASK) 972 973 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20_MASK (0x100000U) 974 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20_SHIFT (20U) 975 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20_WIDTH (1U) 976 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R20_MASK) 977 978 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21_MASK (0x200000U) 979 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21_SHIFT (21U) 980 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21_WIDTH (1U) 981 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R21_MASK) 982 983 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22_MASK (0x400000U) 984 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22_SHIFT (22U) 985 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22_WIDTH (1U) 986 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R22_MASK) 987 988 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23_MASK (0x800000U) 989 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23_SHIFT (23U) 990 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23_WIDTH (1U) 991 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R23_MASK) 992 993 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24_MASK (0x1000000U) 994 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24_SHIFT (24U) 995 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24_WIDTH (1U) 996 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R24_MASK) 997 998 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25_MASK (0x2000000U) 999 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25_SHIFT (25U) 1000 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25_WIDTH (1U) 1001 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R25_MASK) 1002 1003 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26_MASK (0x4000000U) 1004 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26_SHIFT (26U) 1005 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26_WIDTH (1U) 1006 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R26_MASK) 1007 1008 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27_MASK (0x8000000U) 1009 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27_SHIFT (27U) 1010 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27_WIDTH (1U) 1011 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R27_MASK) 1012 1013 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28_MASK (0x10000000U) 1014 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28_SHIFT (28U) 1015 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28_WIDTH (1U) 1016 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R28_MASK) 1017 1018 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29_MASK (0x20000000U) 1019 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29_SHIFT (29U) 1020 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29_WIDTH (1U) 1021 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R29_MASK) 1022 1023 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30_MASK (0x40000000U) 1024 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30_SHIFT (30U) 1025 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30_WIDTH (1U) 1026 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R30_MASK) 1027 1028 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31_MASK (0x80000000U) 1029 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31_SHIFT (31U) 1030 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31_WIDTH (1U) 1031 #define CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG0_AMSK0R31_MASK) 1032 /*! @} */ 1033 1034 /*! @name VAFLT0_0 - VCAN Acceptance Filter */ 1035 /*! @{ */ 1036 1037 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_L_MASK (0xFFU) 1038 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_L_SHIFT (0U) 1039 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_L_WIDTH (8U) 1040 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_0_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_0_VCANa_L_MASK) 1041 1042 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_H_MASK (0xFF00U) 1043 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_H_SHIFT (8U) 1044 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_H_WIDTH (8U) 1045 #define CANXL_FILTER_BANK_VAFLT0_0_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_0_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_0_VCANa_H_MASK) 1046 1047 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_L_MASK (0xFF0000U) 1048 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_L_SHIFT (16U) 1049 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_L_WIDTH (8U) 1050 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_0_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_0_VCANb_L_MASK) 1051 1052 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_H_MASK (0xFF000000U) 1053 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_H_SHIFT (24U) 1054 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_H_WIDTH (8U) 1055 #define CANXL_FILTER_BANK_VAFLT0_0_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_0_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_0_VCANb_H_MASK) 1056 /*! @} */ 1057 1058 /*! @name VAFLT0_2 - VCAN Acceptance Filter */ 1059 /*! @{ */ 1060 1061 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_L_MASK (0xFFU) 1062 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_L_SHIFT (0U) 1063 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_L_WIDTH (8U) 1064 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_2_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_2_VCANa_L_MASK) 1065 1066 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_H_MASK (0xFF00U) 1067 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_H_SHIFT (8U) 1068 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_H_WIDTH (8U) 1069 #define CANXL_FILTER_BANK_VAFLT0_2_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_2_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_2_VCANa_H_MASK) 1070 1071 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_L_MASK (0xFF0000U) 1072 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_L_SHIFT (16U) 1073 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_L_WIDTH (8U) 1074 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_2_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_2_VCANb_L_MASK) 1075 1076 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_H_MASK (0xFF000000U) 1077 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_H_SHIFT (24U) 1078 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_H_WIDTH (8U) 1079 #define CANXL_FILTER_BANK_VAFLT0_2_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_2_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_2_VCANb_H_MASK) 1080 /*! @} */ 1081 1082 /*! @name VAFLT0_4 - VCAN Acceptance Filter */ 1083 /*! @{ */ 1084 1085 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_L_MASK (0xFFU) 1086 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_L_SHIFT (0U) 1087 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_L_WIDTH (8U) 1088 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_4_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_4_VCANa_L_MASK) 1089 1090 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_H_MASK (0xFF00U) 1091 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_H_SHIFT (8U) 1092 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_H_WIDTH (8U) 1093 #define CANXL_FILTER_BANK_VAFLT0_4_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_4_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_4_VCANa_H_MASK) 1094 1095 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_L_MASK (0xFF0000U) 1096 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_L_SHIFT (16U) 1097 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_L_WIDTH (8U) 1098 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_4_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_4_VCANb_L_MASK) 1099 1100 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_H_MASK (0xFF000000U) 1101 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_H_SHIFT (24U) 1102 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_H_WIDTH (8U) 1103 #define CANXL_FILTER_BANK_VAFLT0_4_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_4_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_4_VCANb_H_MASK) 1104 /*! @} */ 1105 1106 /*! @name VAFLT0_6 - VCAN Acceptance Filter */ 1107 /*! @{ */ 1108 1109 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_L_MASK (0xFFU) 1110 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_L_SHIFT (0U) 1111 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_L_WIDTH (8U) 1112 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_6_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_6_VCANa_L_MASK) 1113 1114 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_H_MASK (0xFF00U) 1115 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_H_SHIFT (8U) 1116 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_H_WIDTH (8U) 1117 #define CANXL_FILTER_BANK_VAFLT0_6_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_6_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_6_VCANa_H_MASK) 1118 1119 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_L_MASK (0xFF0000U) 1120 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_L_SHIFT (16U) 1121 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_L_WIDTH (8U) 1122 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_6_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_6_VCANb_L_MASK) 1123 1124 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_H_MASK (0xFF000000U) 1125 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_H_SHIFT (24U) 1126 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_H_WIDTH (8U) 1127 #define CANXL_FILTER_BANK_VAFLT0_6_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_6_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_6_VCANb_H_MASK) 1128 /*! @} */ 1129 1130 /*! @name VAFLT0_8 - VCAN Acceptance Filter */ 1131 /*! @{ */ 1132 1133 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_L_MASK (0xFFU) 1134 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_L_SHIFT (0U) 1135 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_L_WIDTH (8U) 1136 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_8_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_8_VCANa_L_MASK) 1137 1138 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_H_MASK (0xFF00U) 1139 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_H_SHIFT (8U) 1140 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_H_WIDTH (8U) 1141 #define CANXL_FILTER_BANK_VAFLT0_8_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_8_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_8_VCANa_H_MASK) 1142 1143 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_L_MASK (0xFF0000U) 1144 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_L_SHIFT (16U) 1145 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_L_WIDTH (8U) 1146 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_8_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_8_VCANb_L_MASK) 1147 1148 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_H_MASK (0xFF000000U) 1149 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_H_SHIFT (24U) 1150 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_H_WIDTH (8U) 1151 #define CANXL_FILTER_BANK_VAFLT0_8_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_8_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_8_VCANb_H_MASK) 1152 /*! @} */ 1153 1154 /*! @name VAFLT0_10 - VCAN Acceptance Filter */ 1155 /*! @{ */ 1156 1157 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_L_MASK (0xFFU) 1158 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_L_SHIFT (0U) 1159 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_L_WIDTH (8U) 1160 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_10_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_10_VCANa_L_MASK) 1161 1162 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_H_MASK (0xFF00U) 1163 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_H_SHIFT (8U) 1164 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_H_WIDTH (8U) 1165 #define CANXL_FILTER_BANK_VAFLT0_10_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_10_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_10_VCANa_H_MASK) 1166 1167 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_L_MASK (0xFF0000U) 1168 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_L_SHIFT (16U) 1169 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_L_WIDTH (8U) 1170 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_10_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_10_VCANb_L_MASK) 1171 1172 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_H_MASK (0xFF000000U) 1173 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_H_SHIFT (24U) 1174 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_H_WIDTH (8U) 1175 #define CANXL_FILTER_BANK_VAFLT0_10_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_10_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_10_VCANb_H_MASK) 1176 /*! @} */ 1177 1178 /*! @name VAFLT0_12 - VCAN Acceptance Filter */ 1179 /*! @{ */ 1180 1181 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_L_MASK (0xFFU) 1182 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_L_SHIFT (0U) 1183 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_L_WIDTH (8U) 1184 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_12_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_12_VCANa_L_MASK) 1185 1186 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_H_MASK (0xFF00U) 1187 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_H_SHIFT (8U) 1188 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_H_WIDTH (8U) 1189 #define CANXL_FILTER_BANK_VAFLT0_12_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_12_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_12_VCANa_H_MASK) 1190 1191 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_L_MASK (0xFF0000U) 1192 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_L_SHIFT (16U) 1193 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_L_WIDTH (8U) 1194 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_12_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_12_VCANb_L_MASK) 1195 1196 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_H_MASK (0xFF000000U) 1197 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_H_SHIFT (24U) 1198 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_H_WIDTH (8U) 1199 #define CANXL_FILTER_BANK_VAFLT0_12_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_12_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_12_VCANb_H_MASK) 1200 /*! @} */ 1201 1202 /*! @name VAFLT0_14 - VCAN Acceptance Filter */ 1203 /*! @{ */ 1204 1205 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_L_MASK (0xFFU) 1206 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_L_SHIFT (0U) 1207 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_L_WIDTH (8U) 1208 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_14_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_14_VCANa_L_MASK) 1209 1210 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_H_MASK (0xFF00U) 1211 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_H_SHIFT (8U) 1212 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_H_WIDTH (8U) 1213 #define CANXL_FILTER_BANK_VAFLT0_14_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_14_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_14_VCANa_H_MASK) 1214 1215 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_L_MASK (0xFF0000U) 1216 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_L_SHIFT (16U) 1217 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_L_WIDTH (8U) 1218 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_14_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_14_VCANb_L_MASK) 1219 1220 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_H_MASK (0xFF000000U) 1221 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_H_SHIFT (24U) 1222 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_H_WIDTH (8U) 1223 #define CANXL_FILTER_BANK_VAFLT0_14_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_14_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_14_VCANb_H_MASK) 1224 /*! @} */ 1225 1226 /*! @name VAFLT0_16 - VCAN Acceptance Filter */ 1227 /*! @{ */ 1228 1229 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_L_MASK (0xFFU) 1230 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_L_SHIFT (0U) 1231 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_L_WIDTH (8U) 1232 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_16_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_16_VCANa_L_MASK) 1233 1234 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_H_MASK (0xFF00U) 1235 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_H_SHIFT (8U) 1236 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_H_WIDTH (8U) 1237 #define CANXL_FILTER_BANK_VAFLT0_16_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_16_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_16_VCANa_H_MASK) 1238 1239 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_L_MASK (0xFF0000U) 1240 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_L_SHIFT (16U) 1241 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_L_WIDTH (8U) 1242 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_16_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_16_VCANb_L_MASK) 1243 1244 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_H_MASK (0xFF000000U) 1245 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_H_SHIFT (24U) 1246 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_H_WIDTH (8U) 1247 #define CANXL_FILTER_BANK_VAFLT0_16_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_16_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_16_VCANb_H_MASK) 1248 /*! @} */ 1249 1250 /*! @name VAFLT0_18 - VCAN Acceptance Filter */ 1251 /*! @{ */ 1252 1253 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_L_MASK (0xFFU) 1254 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_L_SHIFT (0U) 1255 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_L_WIDTH (8U) 1256 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_18_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_18_VCANa_L_MASK) 1257 1258 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_H_MASK (0xFF00U) 1259 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_H_SHIFT (8U) 1260 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_H_WIDTH (8U) 1261 #define CANXL_FILTER_BANK_VAFLT0_18_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_18_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_18_VCANa_H_MASK) 1262 1263 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_L_MASK (0xFF0000U) 1264 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_L_SHIFT (16U) 1265 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_L_WIDTH (8U) 1266 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_18_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_18_VCANb_L_MASK) 1267 1268 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_H_MASK (0xFF000000U) 1269 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_H_SHIFT (24U) 1270 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_H_WIDTH (8U) 1271 #define CANXL_FILTER_BANK_VAFLT0_18_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_18_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_18_VCANb_H_MASK) 1272 /*! @} */ 1273 1274 /*! @name VAFLT0_20 - VCAN Acceptance Filter */ 1275 /*! @{ */ 1276 1277 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_L_MASK (0xFFU) 1278 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_L_SHIFT (0U) 1279 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_L_WIDTH (8U) 1280 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_20_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_20_VCANa_L_MASK) 1281 1282 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_H_MASK (0xFF00U) 1283 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_H_SHIFT (8U) 1284 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_H_WIDTH (8U) 1285 #define CANXL_FILTER_BANK_VAFLT0_20_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_20_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_20_VCANa_H_MASK) 1286 1287 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_L_MASK (0xFF0000U) 1288 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_L_SHIFT (16U) 1289 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_L_WIDTH (8U) 1290 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_20_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_20_VCANb_L_MASK) 1291 1292 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_H_MASK (0xFF000000U) 1293 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_H_SHIFT (24U) 1294 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_H_WIDTH (8U) 1295 #define CANXL_FILTER_BANK_VAFLT0_20_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_20_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_20_VCANb_H_MASK) 1296 /*! @} */ 1297 1298 /*! @name VAFLT0_22 - VCAN Acceptance Filter */ 1299 /*! @{ */ 1300 1301 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_L_MASK (0xFFU) 1302 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_L_SHIFT (0U) 1303 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_L_WIDTH (8U) 1304 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_22_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_22_VCANa_L_MASK) 1305 1306 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_H_MASK (0xFF00U) 1307 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_H_SHIFT (8U) 1308 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_H_WIDTH (8U) 1309 #define CANXL_FILTER_BANK_VAFLT0_22_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_22_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_22_VCANa_H_MASK) 1310 1311 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_L_MASK (0xFF0000U) 1312 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_L_SHIFT (16U) 1313 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_L_WIDTH (8U) 1314 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_22_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_22_VCANb_L_MASK) 1315 1316 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_H_MASK (0xFF000000U) 1317 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_H_SHIFT (24U) 1318 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_H_WIDTH (8U) 1319 #define CANXL_FILTER_BANK_VAFLT0_22_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_22_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_22_VCANb_H_MASK) 1320 /*! @} */ 1321 1322 /*! @name VAFLT0_24 - VCAN Acceptance Filter */ 1323 /*! @{ */ 1324 1325 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_L_MASK (0xFFU) 1326 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_L_SHIFT (0U) 1327 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_L_WIDTH (8U) 1328 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_24_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_24_VCANa_L_MASK) 1329 1330 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_H_MASK (0xFF00U) 1331 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_H_SHIFT (8U) 1332 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_H_WIDTH (8U) 1333 #define CANXL_FILTER_BANK_VAFLT0_24_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_24_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_24_VCANa_H_MASK) 1334 1335 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_L_MASK (0xFF0000U) 1336 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_L_SHIFT (16U) 1337 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_L_WIDTH (8U) 1338 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_24_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_24_VCANb_L_MASK) 1339 1340 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_H_MASK (0xFF000000U) 1341 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_H_SHIFT (24U) 1342 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_H_WIDTH (8U) 1343 #define CANXL_FILTER_BANK_VAFLT0_24_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_24_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_24_VCANb_H_MASK) 1344 /*! @} */ 1345 1346 /*! @name VAFLT0_26 - VCAN Acceptance Filter */ 1347 /*! @{ */ 1348 1349 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_L_MASK (0xFFU) 1350 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_L_SHIFT (0U) 1351 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_L_WIDTH (8U) 1352 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_26_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_26_VCANa_L_MASK) 1353 1354 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_H_MASK (0xFF00U) 1355 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_H_SHIFT (8U) 1356 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_H_WIDTH (8U) 1357 #define CANXL_FILTER_BANK_VAFLT0_26_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_26_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_26_VCANa_H_MASK) 1358 1359 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_L_MASK (0xFF0000U) 1360 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_L_SHIFT (16U) 1361 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_L_WIDTH (8U) 1362 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_26_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_26_VCANb_L_MASK) 1363 1364 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_H_MASK (0xFF000000U) 1365 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_H_SHIFT (24U) 1366 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_H_WIDTH (8U) 1367 #define CANXL_FILTER_BANK_VAFLT0_26_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_26_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_26_VCANb_H_MASK) 1368 /*! @} */ 1369 1370 /*! @name VAFLT0_28 - VCAN Acceptance Filter */ 1371 /*! @{ */ 1372 1373 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_L_MASK (0xFFU) 1374 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_L_SHIFT (0U) 1375 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_L_WIDTH (8U) 1376 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_28_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_28_VCANa_L_MASK) 1377 1378 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_H_MASK (0xFF00U) 1379 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_H_SHIFT (8U) 1380 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_H_WIDTH (8U) 1381 #define CANXL_FILTER_BANK_VAFLT0_28_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_28_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_28_VCANa_H_MASK) 1382 1383 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_L_MASK (0xFF0000U) 1384 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_L_SHIFT (16U) 1385 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_L_WIDTH (8U) 1386 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_28_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_28_VCANb_L_MASK) 1387 1388 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_H_MASK (0xFF000000U) 1389 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_H_SHIFT (24U) 1390 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_H_WIDTH (8U) 1391 #define CANXL_FILTER_BANK_VAFLT0_28_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_28_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_28_VCANb_H_MASK) 1392 /*! @} */ 1393 1394 /*! @name VAFLT0_30 - VCAN Acceptance Filter */ 1395 /*! @{ */ 1396 1397 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_L_MASK (0xFFU) 1398 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_L_SHIFT (0U) 1399 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_L_WIDTH (8U) 1400 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_30_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_30_VCANa_L_MASK) 1401 1402 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_H_MASK (0xFF00U) 1403 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_H_SHIFT (8U) 1404 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_H_WIDTH (8U) 1405 #define CANXL_FILTER_BANK_VAFLT0_30_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_30_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_30_VCANa_H_MASK) 1406 1407 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_L_MASK (0xFF0000U) 1408 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_L_SHIFT (16U) 1409 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_L_WIDTH (8U) 1410 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_30_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_30_VCANb_L_MASK) 1411 1412 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_H_MASK (0xFF000000U) 1413 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_H_SHIFT (24U) 1414 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_H_WIDTH (8U) 1415 #define CANXL_FILTER_BANK_VAFLT0_30_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT0_30_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT0_30_VCANb_H_MASK) 1416 /*! @} */ 1417 1418 /*! @name SAFLT0_0 - SDU Acceptance Filter */ 1419 /*! @{ */ 1420 1421 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_L_MASK (0xFFU) 1422 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_L_SHIFT (0U) 1423 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_L_WIDTH (8U) 1424 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_0_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_0_SDUa_L_MASK) 1425 1426 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_H_MASK (0xFF00U) 1427 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_H_SHIFT (8U) 1428 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_H_WIDTH (8U) 1429 #define CANXL_FILTER_BANK_SAFLT0_0_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_0_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_0_SDUa_H_MASK) 1430 1431 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_L_MASK (0xFF0000U) 1432 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_L_SHIFT (16U) 1433 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_L_WIDTH (8U) 1434 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_0_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_0_SDUb_L_MASK) 1435 1436 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_H_MASK (0xFF000000U) 1437 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_H_SHIFT (24U) 1438 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_H_WIDTH (8U) 1439 #define CANXL_FILTER_BANK_SAFLT0_0_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_0_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_0_SDUb_H_MASK) 1440 /*! @} */ 1441 1442 /*! @name SAFLT0_2 - SDU Acceptance Filter */ 1443 /*! @{ */ 1444 1445 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_L_MASK (0xFFU) 1446 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_L_SHIFT (0U) 1447 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_L_WIDTH (8U) 1448 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_2_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_2_SDUa_L_MASK) 1449 1450 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_H_MASK (0xFF00U) 1451 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_H_SHIFT (8U) 1452 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_H_WIDTH (8U) 1453 #define CANXL_FILTER_BANK_SAFLT0_2_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_2_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_2_SDUa_H_MASK) 1454 1455 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_L_MASK (0xFF0000U) 1456 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_L_SHIFT (16U) 1457 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_L_WIDTH (8U) 1458 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_2_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_2_SDUb_L_MASK) 1459 1460 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_H_MASK (0xFF000000U) 1461 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_H_SHIFT (24U) 1462 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_H_WIDTH (8U) 1463 #define CANXL_FILTER_BANK_SAFLT0_2_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_2_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_2_SDUb_H_MASK) 1464 /*! @} */ 1465 1466 /*! @name SAFLT0_4 - SDU Acceptance Filter */ 1467 /*! @{ */ 1468 1469 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_L_MASK (0xFFU) 1470 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_L_SHIFT (0U) 1471 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_L_WIDTH (8U) 1472 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_4_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_4_SDUa_L_MASK) 1473 1474 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_H_MASK (0xFF00U) 1475 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_H_SHIFT (8U) 1476 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_H_WIDTH (8U) 1477 #define CANXL_FILTER_BANK_SAFLT0_4_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_4_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_4_SDUa_H_MASK) 1478 1479 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_L_MASK (0xFF0000U) 1480 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_L_SHIFT (16U) 1481 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_L_WIDTH (8U) 1482 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_4_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_4_SDUb_L_MASK) 1483 1484 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_H_MASK (0xFF000000U) 1485 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_H_SHIFT (24U) 1486 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_H_WIDTH (8U) 1487 #define CANXL_FILTER_BANK_SAFLT0_4_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_4_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_4_SDUb_H_MASK) 1488 /*! @} */ 1489 1490 /*! @name SAFLT0_6 - SDU Acceptance Filter */ 1491 /*! @{ */ 1492 1493 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_L_MASK (0xFFU) 1494 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_L_SHIFT (0U) 1495 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_L_WIDTH (8U) 1496 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_6_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_6_SDUa_L_MASK) 1497 1498 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_H_MASK (0xFF00U) 1499 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_H_SHIFT (8U) 1500 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_H_WIDTH (8U) 1501 #define CANXL_FILTER_BANK_SAFLT0_6_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_6_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_6_SDUa_H_MASK) 1502 1503 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_L_MASK (0xFF0000U) 1504 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_L_SHIFT (16U) 1505 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_L_WIDTH (8U) 1506 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_6_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_6_SDUb_L_MASK) 1507 1508 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_H_MASK (0xFF000000U) 1509 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_H_SHIFT (24U) 1510 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_H_WIDTH (8U) 1511 #define CANXL_FILTER_BANK_SAFLT0_6_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_6_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_6_SDUb_H_MASK) 1512 /*! @} */ 1513 1514 /*! @name SAFLT0_8 - SDU Acceptance Filter */ 1515 /*! @{ */ 1516 1517 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_L_MASK (0xFFU) 1518 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_L_SHIFT (0U) 1519 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_L_WIDTH (8U) 1520 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_8_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_8_SDUa_L_MASK) 1521 1522 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_H_MASK (0xFF00U) 1523 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_H_SHIFT (8U) 1524 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_H_WIDTH (8U) 1525 #define CANXL_FILTER_BANK_SAFLT0_8_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_8_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_8_SDUa_H_MASK) 1526 1527 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_L_MASK (0xFF0000U) 1528 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_L_SHIFT (16U) 1529 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_L_WIDTH (8U) 1530 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_8_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_8_SDUb_L_MASK) 1531 1532 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_H_MASK (0xFF000000U) 1533 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_H_SHIFT (24U) 1534 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_H_WIDTH (8U) 1535 #define CANXL_FILTER_BANK_SAFLT0_8_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_8_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_8_SDUb_H_MASK) 1536 /*! @} */ 1537 1538 /*! @name SAFLT0_10 - SDU Acceptance Filter */ 1539 /*! @{ */ 1540 1541 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_L_MASK (0xFFU) 1542 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_L_SHIFT (0U) 1543 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_L_WIDTH (8U) 1544 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_10_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_10_SDUa_L_MASK) 1545 1546 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_H_MASK (0xFF00U) 1547 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_H_SHIFT (8U) 1548 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_H_WIDTH (8U) 1549 #define CANXL_FILTER_BANK_SAFLT0_10_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_10_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_10_SDUa_H_MASK) 1550 1551 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_L_MASK (0xFF0000U) 1552 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_L_SHIFT (16U) 1553 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_L_WIDTH (8U) 1554 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_10_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_10_SDUb_L_MASK) 1555 1556 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_H_MASK (0xFF000000U) 1557 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_H_SHIFT (24U) 1558 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_H_WIDTH (8U) 1559 #define CANXL_FILTER_BANK_SAFLT0_10_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_10_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_10_SDUb_H_MASK) 1560 /*! @} */ 1561 1562 /*! @name SAFLT0_12 - SDU Acceptance Filter */ 1563 /*! @{ */ 1564 1565 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_L_MASK (0xFFU) 1566 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_L_SHIFT (0U) 1567 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_L_WIDTH (8U) 1568 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_12_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_12_SDUa_L_MASK) 1569 1570 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_H_MASK (0xFF00U) 1571 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_H_SHIFT (8U) 1572 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_H_WIDTH (8U) 1573 #define CANXL_FILTER_BANK_SAFLT0_12_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_12_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_12_SDUa_H_MASK) 1574 1575 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_L_MASK (0xFF0000U) 1576 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_L_SHIFT (16U) 1577 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_L_WIDTH (8U) 1578 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_12_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_12_SDUb_L_MASK) 1579 1580 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_H_MASK (0xFF000000U) 1581 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_H_SHIFT (24U) 1582 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_H_WIDTH (8U) 1583 #define CANXL_FILTER_BANK_SAFLT0_12_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_12_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_12_SDUb_H_MASK) 1584 /*! @} */ 1585 1586 /*! @name SAFLT0_14 - SDU Acceptance Filter */ 1587 /*! @{ */ 1588 1589 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_L_MASK (0xFFU) 1590 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_L_SHIFT (0U) 1591 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_L_WIDTH (8U) 1592 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_14_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_14_SDUa_L_MASK) 1593 1594 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_H_MASK (0xFF00U) 1595 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_H_SHIFT (8U) 1596 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_H_WIDTH (8U) 1597 #define CANXL_FILTER_BANK_SAFLT0_14_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_14_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_14_SDUa_H_MASK) 1598 1599 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_L_MASK (0xFF0000U) 1600 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_L_SHIFT (16U) 1601 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_L_WIDTH (8U) 1602 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_14_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_14_SDUb_L_MASK) 1603 1604 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_H_MASK (0xFF000000U) 1605 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_H_SHIFT (24U) 1606 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_H_WIDTH (8U) 1607 #define CANXL_FILTER_BANK_SAFLT0_14_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_14_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_14_SDUb_H_MASK) 1608 /*! @} */ 1609 1610 /*! @name SAFLT0_16 - SDU Acceptance Filter */ 1611 /*! @{ */ 1612 1613 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_L_MASK (0xFFU) 1614 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_L_SHIFT (0U) 1615 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_L_WIDTH (8U) 1616 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_16_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_16_SDUa_L_MASK) 1617 1618 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_H_MASK (0xFF00U) 1619 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_H_SHIFT (8U) 1620 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_H_WIDTH (8U) 1621 #define CANXL_FILTER_BANK_SAFLT0_16_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_16_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_16_SDUa_H_MASK) 1622 1623 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_L_MASK (0xFF0000U) 1624 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_L_SHIFT (16U) 1625 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_L_WIDTH (8U) 1626 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_16_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_16_SDUb_L_MASK) 1627 1628 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_H_MASK (0xFF000000U) 1629 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_H_SHIFT (24U) 1630 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_H_WIDTH (8U) 1631 #define CANXL_FILTER_BANK_SAFLT0_16_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_16_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_16_SDUb_H_MASK) 1632 /*! @} */ 1633 1634 /*! @name SAFLT0_18 - SDU Acceptance Filter */ 1635 /*! @{ */ 1636 1637 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_L_MASK (0xFFU) 1638 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_L_SHIFT (0U) 1639 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_L_WIDTH (8U) 1640 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_18_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_18_SDUa_L_MASK) 1641 1642 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_H_MASK (0xFF00U) 1643 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_H_SHIFT (8U) 1644 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_H_WIDTH (8U) 1645 #define CANXL_FILTER_BANK_SAFLT0_18_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_18_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_18_SDUa_H_MASK) 1646 1647 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_L_MASK (0xFF0000U) 1648 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_L_SHIFT (16U) 1649 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_L_WIDTH (8U) 1650 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_18_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_18_SDUb_L_MASK) 1651 1652 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_H_MASK (0xFF000000U) 1653 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_H_SHIFT (24U) 1654 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_H_WIDTH (8U) 1655 #define CANXL_FILTER_BANK_SAFLT0_18_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_18_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_18_SDUb_H_MASK) 1656 /*! @} */ 1657 1658 /*! @name SAFLT0_20 - SDU Acceptance Filter */ 1659 /*! @{ */ 1660 1661 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_L_MASK (0xFFU) 1662 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_L_SHIFT (0U) 1663 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_L_WIDTH (8U) 1664 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_20_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_20_SDUa_L_MASK) 1665 1666 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_H_MASK (0xFF00U) 1667 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_H_SHIFT (8U) 1668 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_H_WIDTH (8U) 1669 #define CANXL_FILTER_BANK_SAFLT0_20_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_20_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_20_SDUa_H_MASK) 1670 1671 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_L_MASK (0xFF0000U) 1672 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_L_SHIFT (16U) 1673 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_L_WIDTH (8U) 1674 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_20_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_20_SDUb_L_MASK) 1675 1676 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_H_MASK (0xFF000000U) 1677 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_H_SHIFT (24U) 1678 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_H_WIDTH (8U) 1679 #define CANXL_FILTER_BANK_SAFLT0_20_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_20_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_20_SDUb_H_MASK) 1680 /*! @} */ 1681 1682 /*! @name SAFLT0_22 - SDU Acceptance Filter */ 1683 /*! @{ */ 1684 1685 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_L_MASK (0xFFU) 1686 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_L_SHIFT (0U) 1687 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_L_WIDTH (8U) 1688 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_22_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_22_SDUa_L_MASK) 1689 1690 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_H_MASK (0xFF00U) 1691 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_H_SHIFT (8U) 1692 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_H_WIDTH (8U) 1693 #define CANXL_FILTER_BANK_SAFLT0_22_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_22_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_22_SDUa_H_MASK) 1694 1695 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_L_MASK (0xFF0000U) 1696 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_L_SHIFT (16U) 1697 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_L_WIDTH (8U) 1698 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_22_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_22_SDUb_L_MASK) 1699 1700 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_H_MASK (0xFF000000U) 1701 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_H_SHIFT (24U) 1702 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_H_WIDTH (8U) 1703 #define CANXL_FILTER_BANK_SAFLT0_22_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_22_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_22_SDUb_H_MASK) 1704 /*! @} */ 1705 1706 /*! @name SAFLT0_24 - SDU Acceptance Filter */ 1707 /*! @{ */ 1708 1709 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_L_MASK (0xFFU) 1710 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_L_SHIFT (0U) 1711 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_L_WIDTH (8U) 1712 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_24_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_24_SDUa_L_MASK) 1713 1714 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_H_MASK (0xFF00U) 1715 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_H_SHIFT (8U) 1716 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_H_WIDTH (8U) 1717 #define CANXL_FILTER_BANK_SAFLT0_24_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_24_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_24_SDUa_H_MASK) 1718 1719 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_L_MASK (0xFF0000U) 1720 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_L_SHIFT (16U) 1721 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_L_WIDTH (8U) 1722 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_24_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_24_SDUb_L_MASK) 1723 1724 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_H_MASK (0xFF000000U) 1725 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_H_SHIFT (24U) 1726 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_H_WIDTH (8U) 1727 #define CANXL_FILTER_BANK_SAFLT0_24_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_24_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_24_SDUb_H_MASK) 1728 /*! @} */ 1729 1730 /*! @name SAFLT0_26 - SDU Acceptance Filter */ 1731 /*! @{ */ 1732 1733 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_L_MASK (0xFFU) 1734 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_L_SHIFT (0U) 1735 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_L_WIDTH (8U) 1736 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_26_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_26_SDUa_L_MASK) 1737 1738 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_H_MASK (0xFF00U) 1739 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_H_SHIFT (8U) 1740 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_H_WIDTH (8U) 1741 #define CANXL_FILTER_BANK_SAFLT0_26_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_26_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_26_SDUa_H_MASK) 1742 1743 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_L_MASK (0xFF0000U) 1744 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_L_SHIFT (16U) 1745 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_L_WIDTH (8U) 1746 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_26_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_26_SDUb_L_MASK) 1747 1748 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_H_MASK (0xFF000000U) 1749 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_H_SHIFT (24U) 1750 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_H_WIDTH (8U) 1751 #define CANXL_FILTER_BANK_SAFLT0_26_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_26_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_26_SDUb_H_MASK) 1752 /*! @} */ 1753 1754 /*! @name SAFLT0_28 - SDU Acceptance Filter */ 1755 /*! @{ */ 1756 1757 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_L_MASK (0xFFU) 1758 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_L_SHIFT (0U) 1759 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_L_WIDTH (8U) 1760 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_28_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_28_SDUa_L_MASK) 1761 1762 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_H_MASK (0xFF00U) 1763 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_H_SHIFT (8U) 1764 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_H_WIDTH (8U) 1765 #define CANXL_FILTER_BANK_SAFLT0_28_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_28_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_28_SDUa_H_MASK) 1766 1767 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_L_MASK (0xFF0000U) 1768 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_L_SHIFT (16U) 1769 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_L_WIDTH (8U) 1770 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_28_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_28_SDUb_L_MASK) 1771 1772 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_H_MASK (0xFF000000U) 1773 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_H_SHIFT (24U) 1774 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_H_WIDTH (8U) 1775 #define CANXL_FILTER_BANK_SAFLT0_28_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_28_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_28_SDUb_H_MASK) 1776 /*! @} */ 1777 1778 /*! @name SAFLT0_30 - SDU Acceptance Filter */ 1779 /*! @{ */ 1780 1781 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_L_MASK (0xFFU) 1782 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_L_SHIFT (0U) 1783 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_L_WIDTH (8U) 1784 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_30_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_30_SDUa_L_MASK) 1785 1786 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_H_MASK (0xFF00U) 1787 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_H_SHIFT (8U) 1788 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_H_WIDTH (8U) 1789 #define CANXL_FILTER_BANK_SAFLT0_30_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_30_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_30_SDUa_H_MASK) 1790 1791 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_L_MASK (0xFF0000U) 1792 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_L_SHIFT (16U) 1793 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_L_WIDTH (8U) 1794 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_30_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_30_SDUb_L_MASK) 1795 1796 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_H_MASK (0xFF000000U) 1797 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_H_SHIFT (24U) 1798 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_H_WIDTH (8U) 1799 #define CANXL_FILTER_BANK_SAFLT0_30_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT0_30_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT0_30_SDUb_H_MASK) 1800 /*! @} */ 1801 1802 /*! @name AAFLT0_0L - ADDR Acceptance Filter Low */ 1803 /*! @{ */ 1804 1805 #define CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L_MASK (0xFFFFFFFFU) 1806 #define CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L_SHIFT (0U) 1807 #define CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L_WIDTH (32U) 1808 #define CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_0L_ADDRn_L_MASK) 1809 /*! @} */ 1810 1811 /*! @name AAFLT0_0H - ADDR Acceptance Filter High */ 1812 /*! @{ */ 1813 1814 #define CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H_MASK (0xFFFFFFFFU) 1815 #define CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H_SHIFT (0U) 1816 #define CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H_WIDTH (32U) 1817 #define CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_0H_ADDRn_H_MASK) 1818 /*! @} */ 1819 1820 /*! @name AAFLT0_1L - ADDR Acceptance Filter Low */ 1821 /*! @{ */ 1822 1823 #define CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L_MASK (0xFFFFFFFFU) 1824 #define CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L_SHIFT (0U) 1825 #define CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L_WIDTH (32U) 1826 #define CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_1L_ADDRn_L_MASK) 1827 /*! @} */ 1828 1829 /*! @name AAFLT0_1H - ADDR Acceptance Filter High */ 1830 /*! @{ */ 1831 1832 #define CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H_MASK (0xFFFFFFFFU) 1833 #define CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H_SHIFT (0U) 1834 #define CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H_WIDTH (32U) 1835 #define CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_1H_ADDRn_H_MASK) 1836 /*! @} */ 1837 1838 /*! @name AAFLT0_2L - ADDR Acceptance Filter Low */ 1839 /*! @{ */ 1840 1841 #define CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L_MASK (0xFFFFFFFFU) 1842 #define CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L_SHIFT (0U) 1843 #define CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L_WIDTH (32U) 1844 #define CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_2L_ADDRn_L_MASK) 1845 /*! @} */ 1846 1847 /*! @name AAFLT0_2H - ADDR Acceptance Filter High */ 1848 /*! @{ */ 1849 1850 #define CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H_MASK (0xFFFFFFFFU) 1851 #define CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H_SHIFT (0U) 1852 #define CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H_WIDTH (32U) 1853 #define CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_2H_ADDRn_H_MASK) 1854 /*! @} */ 1855 1856 /*! @name AAFLT0_3L - ADDR Acceptance Filter Low */ 1857 /*! @{ */ 1858 1859 #define CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L_MASK (0xFFFFFFFFU) 1860 #define CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L_SHIFT (0U) 1861 #define CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L_WIDTH (32U) 1862 #define CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_3L_ADDRn_L_MASK) 1863 /*! @} */ 1864 1865 /*! @name AAFLT0_3H - ADDR Acceptance Filter High */ 1866 /*! @{ */ 1867 1868 #define CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H_MASK (0xFFFFFFFFU) 1869 #define CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H_SHIFT (0U) 1870 #define CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H_WIDTH (32U) 1871 #define CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_3H_ADDRn_H_MASK) 1872 /*! @} */ 1873 1874 /*! @name AAFLT0_4L - ADDR Acceptance Filter Low */ 1875 /*! @{ */ 1876 1877 #define CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L_MASK (0xFFFFFFFFU) 1878 #define CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L_SHIFT (0U) 1879 #define CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L_WIDTH (32U) 1880 #define CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_4L_ADDRn_L_MASK) 1881 /*! @} */ 1882 1883 /*! @name AAFLT0_4H - ADDR Acceptance Filter High */ 1884 /*! @{ */ 1885 1886 #define CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H_MASK (0xFFFFFFFFU) 1887 #define CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H_SHIFT (0U) 1888 #define CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H_WIDTH (32U) 1889 #define CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_4H_ADDRn_H_MASK) 1890 /*! @} */ 1891 1892 /*! @name AAFLT0_5L - ADDR Acceptance Filter Low */ 1893 /*! @{ */ 1894 1895 #define CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L_MASK (0xFFFFFFFFU) 1896 #define CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L_SHIFT (0U) 1897 #define CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L_WIDTH (32U) 1898 #define CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_5L_ADDRn_L_MASK) 1899 /*! @} */ 1900 1901 /*! @name AAFLT0_5H - ADDR Acceptance Filter High */ 1902 /*! @{ */ 1903 1904 #define CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H_MASK (0xFFFFFFFFU) 1905 #define CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H_SHIFT (0U) 1906 #define CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H_WIDTH (32U) 1907 #define CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_5H_ADDRn_H_MASK) 1908 /*! @} */ 1909 1910 /*! @name AAFLT0_6L - ADDR Acceptance Filter Low */ 1911 /*! @{ */ 1912 1913 #define CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L_MASK (0xFFFFFFFFU) 1914 #define CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L_SHIFT (0U) 1915 #define CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L_WIDTH (32U) 1916 #define CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_6L_ADDRn_L_MASK) 1917 /*! @} */ 1918 1919 /*! @name AAFLT0_6H - ADDR Acceptance Filter High */ 1920 /*! @{ */ 1921 1922 #define CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H_MASK (0xFFFFFFFFU) 1923 #define CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H_SHIFT (0U) 1924 #define CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H_WIDTH (32U) 1925 #define CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_6H_ADDRn_H_MASK) 1926 /*! @} */ 1927 1928 /*! @name AAFLT0_7L - ADDR Acceptance Filter Low */ 1929 /*! @{ */ 1930 1931 #define CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L_MASK (0xFFFFFFFFU) 1932 #define CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L_SHIFT (0U) 1933 #define CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L_WIDTH (32U) 1934 #define CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_7L_ADDRn_L_MASK) 1935 /*! @} */ 1936 1937 /*! @name AAFLT0_7H - ADDR Acceptance Filter High */ 1938 /*! @{ */ 1939 1940 #define CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H_MASK (0xFFFFFFFFU) 1941 #define CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H_SHIFT (0U) 1942 #define CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H_WIDTH (32U) 1943 #define CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_7H_ADDRn_H_MASK) 1944 /*! @} */ 1945 1946 /*! @name AAFLT0_8L - ADDR Acceptance Filter Low */ 1947 /*! @{ */ 1948 1949 #define CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L_MASK (0xFFFFFFFFU) 1950 #define CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L_SHIFT (0U) 1951 #define CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L_WIDTH (32U) 1952 #define CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_8L_ADDRn_L_MASK) 1953 /*! @} */ 1954 1955 /*! @name AAFLT0_8H - ADDR Acceptance Filter High */ 1956 /*! @{ */ 1957 1958 #define CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H_MASK (0xFFFFFFFFU) 1959 #define CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H_SHIFT (0U) 1960 #define CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H_WIDTH (32U) 1961 #define CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_8H_ADDRn_H_MASK) 1962 /*! @} */ 1963 1964 /*! @name AAFLT0_9L - ADDR Acceptance Filter Low */ 1965 /*! @{ */ 1966 1967 #define CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L_MASK (0xFFFFFFFFU) 1968 #define CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L_SHIFT (0U) 1969 #define CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L_WIDTH (32U) 1970 #define CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_9L_ADDRn_L_MASK) 1971 /*! @} */ 1972 1973 /*! @name AAFLT0_9H - ADDR Acceptance Filter High */ 1974 /*! @{ */ 1975 1976 #define CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H_MASK (0xFFFFFFFFU) 1977 #define CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H_SHIFT (0U) 1978 #define CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H_WIDTH (32U) 1979 #define CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_9H_ADDRn_H_MASK) 1980 /*! @} */ 1981 1982 /*! @name AAFLT0_10L - ADDR Acceptance Filter Low */ 1983 /*! @{ */ 1984 1985 #define CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L_MASK (0xFFFFFFFFU) 1986 #define CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L_SHIFT (0U) 1987 #define CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L_WIDTH (32U) 1988 #define CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_10L_ADDRn_L_MASK) 1989 /*! @} */ 1990 1991 /*! @name AAFLT0_10H - ADDR Acceptance Filter High */ 1992 /*! @{ */ 1993 1994 #define CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H_MASK (0xFFFFFFFFU) 1995 #define CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H_SHIFT (0U) 1996 #define CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H_WIDTH (32U) 1997 #define CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_10H_ADDRn_H_MASK) 1998 /*! @} */ 1999 2000 /*! @name AAFLT0_11L - ADDR Acceptance Filter Low */ 2001 /*! @{ */ 2002 2003 #define CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L_MASK (0xFFFFFFFFU) 2004 #define CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L_SHIFT (0U) 2005 #define CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L_WIDTH (32U) 2006 #define CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_11L_ADDRn_L_MASK) 2007 /*! @} */ 2008 2009 /*! @name AAFLT0_11H - ADDR Acceptance Filter High */ 2010 /*! @{ */ 2011 2012 #define CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H_MASK (0xFFFFFFFFU) 2013 #define CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H_SHIFT (0U) 2014 #define CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H_WIDTH (32U) 2015 #define CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_11H_ADDRn_H_MASK) 2016 /*! @} */ 2017 2018 /*! @name AAFLT0_12L - ADDR Acceptance Filter Low */ 2019 /*! @{ */ 2020 2021 #define CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L_MASK (0xFFFFFFFFU) 2022 #define CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L_SHIFT (0U) 2023 #define CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L_WIDTH (32U) 2024 #define CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_12L_ADDRn_L_MASK) 2025 /*! @} */ 2026 2027 /*! @name AAFLT0_12H - ADDR Acceptance Filter High */ 2028 /*! @{ */ 2029 2030 #define CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H_MASK (0xFFFFFFFFU) 2031 #define CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H_SHIFT (0U) 2032 #define CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H_WIDTH (32U) 2033 #define CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_12H_ADDRn_H_MASK) 2034 /*! @} */ 2035 2036 /*! @name AAFLT0_13L - ADDR Acceptance Filter Low */ 2037 /*! @{ */ 2038 2039 #define CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L_MASK (0xFFFFFFFFU) 2040 #define CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L_SHIFT (0U) 2041 #define CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L_WIDTH (32U) 2042 #define CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_13L_ADDRn_L_MASK) 2043 /*! @} */ 2044 2045 /*! @name AAFLT0_13H - ADDR Acceptance Filter High */ 2046 /*! @{ */ 2047 2048 #define CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H_MASK (0xFFFFFFFFU) 2049 #define CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H_SHIFT (0U) 2050 #define CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H_WIDTH (32U) 2051 #define CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_13H_ADDRn_H_MASK) 2052 /*! @} */ 2053 2054 /*! @name AAFLT0_14L - ADDR Acceptance Filter Low */ 2055 /*! @{ */ 2056 2057 #define CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L_MASK (0xFFFFFFFFU) 2058 #define CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L_SHIFT (0U) 2059 #define CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L_WIDTH (32U) 2060 #define CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_14L_ADDRn_L_MASK) 2061 /*! @} */ 2062 2063 /*! @name AAFLT0_14H - ADDR Acceptance Filter High */ 2064 /*! @{ */ 2065 2066 #define CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H_MASK (0xFFFFFFFFU) 2067 #define CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H_SHIFT (0U) 2068 #define CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H_WIDTH (32U) 2069 #define CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_14H_ADDRn_H_MASK) 2070 /*! @} */ 2071 2072 /*! @name AAFLT0_15L - ADDR Acceptance Filter Low */ 2073 /*! @{ */ 2074 2075 #define CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L_MASK (0xFFFFFFFFU) 2076 #define CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L_SHIFT (0U) 2077 #define CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L_WIDTH (32U) 2078 #define CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_15L_ADDRn_L_MASK) 2079 /*! @} */ 2080 2081 /*! @name AAFLT0_15H - ADDR Acceptance Filter High */ 2082 /*! @{ */ 2083 2084 #define CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H_MASK (0xFFFFFFFFU) 2085 #define CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H_SHIFT (0U) 2086 #define CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H_WIDTH (32U) 2087 #define CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_15H_ADDRn_H_MASK) 2088 /*! @} */ 2089 2090 /*! @name AAFLT0_16L - ADDR Acceptance Filter Low */ 2091 /*! @{ */ 2092 2093 #define CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L_MASK (0xFFFFFFFFU) 2094 #define CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L_SHIFT (0U) 2095 #define CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L_WIDTH (32U) 2096 #define CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_16L_ADDRn_L_MASK) 2097 /*! @} */ 2098 2099 /*! @name AAFLT0_16H - ADDR Acceptance Filter High */ 2100 /*! @{ */ 2101 2102 #define CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H_MASK (0xFFFFFFFFU) 2103 #define CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H_SHIFT (0U) 2104 #define CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H_WIDTH (32U) 2105 #define CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_16H_ADDRn_H_MASK) 2106 /*! @} */ 2107 2108 /*! @name AAFLT0_17L - ADDR Acceptance Filter Low */ 2109 /*! @{ */ 2110 2111 #define CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L_MASK (0xFFFFFFFFU) 2112 #define CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L_SHIFT (0U) 2113 #define CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L_WIDTH (32U) 2114 #define CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_17L_ADDRn_L_MASK) 2115 /*! @} */ 2116 2117 /*! @name AAFLT0_17H - ADDR Acceptance Filter High */ 2118 /*! @{ */ 2119 2120 #define CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H_MASK (0xFFFFFFFFU) 2121 #define CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H_SHIFT (0U) 2122 #define CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H_WIDTH (32U) 2123 #define CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_17H_ADDRn_H_MASK) 2124 /*! @} */ 2125 2126 /*! @name AAFLT0_18L - ADDR Acceptance Filter Low */ 2127 /*! @{ */ 2128 2129 #define CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L_MASK (0xFFFFFFFFU) 2130 #define CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L_SHIFT (0U) 2131 #define CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L_WIDTH (32U) 2132 #define CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_18L_ADDRn_L_MASK) 2133 /*! @} */ 2134 2135 /*! @name AAFLT0_18H - ADDR Acceptance Filter High */ 2136 /*! @{ */ 2137 2138 #define CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H_MASK (0xFFFFFFFFU) 2139 #define CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H_SHIFT (0U) 2140 #define CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H_WIDTH (32U) 2141 #define CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_18H_ADDRn_H_MASK) 2142 /*! @} */ 2143 2144 /*! @name AAFLT0_19L - ADDR Acceptance Filter Low */ 2145 /*! @{ */ 2146 2147 #define CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L_MASK (0xFFFFFFFFU) 2148 #define CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L_SHIFT (0U) 2149 #define CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L_WIDTH (32U) 2150 #define CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_19L_ADDRn_L_MASK) 2151 /*! @} */ 2152 2153 /*! @name AAFLT0_19H - ADDR Acceptance Filter High */ 2154 /*! @{ */ 2155 2156 #define CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H_MASK (0xFFFFFFFFU) 2157 #define CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H_SHIFT (0U) 2158 #define CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H_WIDTH (32U) 2159 #define CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_19H_ADDRn_H_MASK) 2160 /*! @} */ 2161 2162 /*! @name AAFLT0_20L - ADDR Acceptance Filter Low */ 2163 /*! @{ */ 2164 2165 #define CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L_MASK (0xFFFFFFFFU) 2166 #define CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L_SHIFT (0U) 2167 #define CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L_WIDTH (32U) 2168 #define CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_20L_ADDRn_L_MASK) 2169 /*! @} */ 2170 2171 /*! @name AAFLT0_20H - ADDR Acceptance Filter High */ 2172 /*! @{ */ 2173 2174 #define CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H_MASK (0xFFFFFFFFU) 2175 #define CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H_SHIFT (0U) 2176 #define CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H_WIDTH (32U) 2177 #define CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_20H_ADDRn_H_MASK) 2178 /*! @} */ 2179 2180 /*! @name AAFLT0_21L - ADDR Acceptance Filter Low */ 2181 /*! @{ */ 2182 2183 #define CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L_MASK (0xFFFFFFFFU) 2184 #define CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L_SHIFT (0U) 2185 #define CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L_WIDTH (32U) 2186 #define CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_21L_ADDRn_L_MASK) 2187 /*! @} */ 2188 2189 /*! @name AAFLT0_21H - ADDR Acceptance Filter High */ 2190 /*! @{ */ 2191 2192 #define CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H_MASK (0xFFFFFFFFU) 2193 #define CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H_SHIFT (0U) 2194 #define CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H_WIDTH (32U) 2195 #define CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_21H_ADDRn_H_MASK) 2196 /*! @} */ 2197 2198 /*! @name AAFLT0_22L - ADDR Acceptance Filter Low */ 2199 /*! @{ */ 2200 2201 #define CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L_MASK (0xFFFFFFFFU) 2202 #define CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L_SHIFT (0U) 2203 #define CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L_WIDTH (32U) 2204 #define CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_22L_ADDRn_L_MASK) 2205 /*! @} */ 2206 2207 /*! @name AAFLT0_22H - ADDR Acceptance Filter High */ 2208 /*! @{ */ 2209 2210 #define CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H_MASK (0xFFFFFFFFU) 2211 #define CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H_SHIFT (0U) 2212 #define CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H_WIDTH (32U) 2213 #define CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_22H_ADDRn_H_MASK) 2214 /*! @} */ 2215 2216 /*! @name AAFLT0_23L - ADDR Acceptance Filter Low */ 2217 /*! @{ */ 2218 2219 #define CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L_MASK (0xFFFFFFFFU) 2220 #define CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L_SHIFT (0U) 2221 #define CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L_WIDTH (32U) 2222 #define CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_23L_ADDRn_L_MASK) 2223 /*! @} */ 2224 2225 /*! @name AAFLT0_23H - ADDR Acceptance Filter High */ 2226 /*! @{ */ 2227 2228 #define CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H_MASK (0xFFFFFFFFU) 2229 #define CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H_SHIFT (0U) 2230 #define CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H_WIDTH (32U) 2231 #define CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_23H_ADDRn_H_MASK) 2232 /*! @} */ 2233 2234 /*! @name AAFLT0_24L - ADDR Acceptance Filter Low */ 2235 /*! @{ */ 2236 2237 #define CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L_MASK (0xFFFFFFFFU) 2238 #define CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L_SHIFT (0U) 2239 #define CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L_WIDTH (32U) 2240 #define CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_24L_ADDRn_L_MASK) 2241 /*! @} */ 2242 2243 /*! @name AAFLT0_24H - ADDR Acceptance Filter High */ 2244 /*! @{ */ 2245 2246 #define CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H_MASK (0xFFFFFFFFU) 2247 #define CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H_SHIFT (0U) 2248 #define CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H_WIDTH (32U) 2249 #define CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_24H_ADDRn_H_MASK) 2250 /*! @} */ 2251 2252 /*! @name AAFLT0_25L - ADDR Acceptance Filter Low */ 2253 /*! @{ */ 2254 2255 #define CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L_MASK (0xFFFFFFFFU) 2256 #define CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L_SHIFT (0U) 2257 #define CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L_WIDTH (32U) 2258 #define CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_25L_ADDRn_L_MASK) 2259 /*! @} */ 2260 2261 /*! @name AAFLT0_25H - ADDR Acceptance Filter High */ 2262 /*! @{ */ 2263 2264 #define CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H_MASK (0xFFFFFFFFU) 2265 #define CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H_SHIFT (0U) 2266 #define CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H_WIDTH (32U) 2267 #define CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_25H_ADDRn_H_MASK) 2268 /*! @} */ 2269 2270 /*! @name AAFLT0_26L - ADDR Acceptance Filter Low */ 2271 /*! @{ */ 2272 2273 #define CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L_MASK (0xFFFFFFFFU) 2274 #define CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L_SHIFT (0U) 2275 #define CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L_WIDTH (32U) 2276 #define CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_26L_ADDRn_L_MASK) 2277 /*! @} */ 2278 2279 /*! @name AAFLT0_26H - ADDR Acceptance Filter High */ 2280 /*! @{ */ 2281 2282 #define CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H_MASK (0xFFFFFFFFU) 2283 #define CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H_SHIFT (0U) 2284 #define CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H_WIDTH (32U) 2285 #define CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_26H_ADDRn_H_MASK) 2286 /*! @} */ 2287 2288 /*! @name AAFLT0_27L - ADDR Acceptance Filter Low */ 2289 /*! @{ */ 2290 2291 #define CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L_MASK (0xFFFFFFFFU) 2292 #define CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L_SHIFT (0U) 2293 #define CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L_WIDTH (32U) 2294 #define CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_27L_ADDRn_L_MASK) 2295 /*! @} */ 2296 2297 /*! @name AAFLT0_27H - ADDR Acceptance Filter High */ 2298 /*! @{ */ 2299 2300 #define CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H_MASK (0xFFFFFFFFU) 2301 #define CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H_SHIFT (0U) 2302 #define CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H_WIDTH (32U) 2303 #define CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_27H_ADDRn_H_MASK) 2304 /*! @} */ 2305 2306 /*! @name AAFLT0_28L - ADDR Acceptance Filter Low */ 2307 /*! @{ */ 2308 2309 #define CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L_MASK (0xFFFFFFFFU) 2310 #define CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L_SHIFT (0U) 2311 #define CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L_WIDTH (32U) 2312 #define CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_28L_ADDRn_L_MASK) 2313 /*! @} */ 2314 2315 /*! @name AAFLT0_28H - ADDR Acceptance Filter High */ 2316 /*! @{ */ 2317 2318 #define CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H_MASK (0xFFFFFFFFU) 2319 #define CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H_SHIFT (0U) 2320 #define CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H_WIDTH (32U) 2321 #define CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_28H_ADDRn_H_MASK) 2322 /*! @} */ 2323 2324 /*! @name AAFLT0_29L - ADDR Acceptance Filter Low */ 2325 /*! @{ */ 2326 2327 #define CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L_MASK (0xFFFFFFFFU) 2328 #define CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L_SHIFT (0U) 2329 #define CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L_WIDTH (32U) 2330 #define CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_29L_ADDRn_L_MASK) 2331 /*! @} */ 2332 2333 /*! @name AAFLT0_29H - ADDR Acceptance Filter High */ 2334 /*! @{ */ 2335 2336 #define CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H_MASK (0xFFFFFFFFU) 2337 #define CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H_SHIFT (0U) 2338 #define CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H_WIDTH (32U) 2339 #define CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_29H_ADDRn_H_MASK) 2340 /*! @} */ 2341 2342 /*! @name AAFLT0_30L - ADDR Acceptance Filter Low */ 2343 /*! @{ */ 2344 2345 #define CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L_MASK (0xFFFFFFFFU) 2346 #define CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L_SHIFT (0U) 2347 #define CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L_WIDTH (32U) 2348 #define CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_30L_ADDRn_L_MASK) 2349 /*! @} */ 2350 2351 /*! @name AAFLT0_30H - ADDR Acceptance Filter High */ 2352 /*! @{ */ 2353 2354 #define CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H_MASK (0xFFFFFFFFU) 2355 #define CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H_SHIFT (0U) 2356 #define CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H_WIDTH (32U) 2357 #define CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_30H_ADDRn_H_MASK) 2358 /*! @} */ 2359 2360 /*! @name AAFLT0_31L - ADDR Acceptance Filter Low */ 2361 /*! @{ */ 2362 2363 #define CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L_MASK (0xFFFFFFFFU) 2364 #define CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L_SHIFT (0U) 2365 #define CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L_WIDTH (32U) 2366 #define CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_31L_ADDRn_L_MASK) 2367 /*! @} */ 2368 2369 /*! @name AAFLT0_31H - ADDR Acceptance Filter High */ 2370 /*! @{ */ 2371 2372 #define CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H_MASK (0xFFFFFFFFU) 2373 #define CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H_SHIFT (0U) 2374 #define CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H_WIDTH (32U) 2375 #define CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT0_31H_ADDRn_H_MASK) 2376 /*! @} */ 2377 2378 /*! @name RFCFG0 - Rejection Filter Configuration */ 2379 /*! @{ */ 2380 2381 #define CANXL_FILTER_BANK_RFCFG0_REJVCAN_MASK (0x1FU) 2382 #define CANXL_FILTER_BANK_RFCFG0_REJVCAN_SHIFT (0U) 2383 #define CANXL_FILTER_BANK_RFCFG0_REJVCAN_WIDTH (5U) 2384 #define CANXL_FILTER_BANK_RFCFG0_REJVCAN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_REJVCAN_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_REJVCAN_MASK) 2385 2386 #define CANXL_FILTER_BANK_RFCFG0_RVCANEN_MASK (0x80U) 2387 #define CANXL_FILTER_BANK_RFCFG0_RVCANEN_SHIFT (7U) 2388 #define CANXL_FILTER_BANK_RFCFG0_RVCANEN_WIDTH (1U) 2389 #define CANXL_FILTER_BANK_RFCFG0_RVCANEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_RVCANEN_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_RVCANEN_MASK) 2390 2391 #define CANXL_FILTER_BANK_RFCFG0_REJSDU_MASK (0x1F00U) 2392 #define CANXL_FILTER_BANK_RFCFG0_REJSDU_SHIFT (8U) 2393 #define CANXL_FILTER_BANK_RFCFG0_REJSDU_WIDTH (5U) 2394 #define CANXL_FILTER_BANK_RFCFG0_REJSDU(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_REJSDU_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_REJSDU_MASK) 2395 2396 #define CANXL_FILTER_BANK_RFCFG0_RSDUEN_MASK (0x8000U) 2397 #define CANXL_FILTER_BANK_RFCFG0_RSDUEN_SHIFT (15U) 2398 #define CANXL_FILTER_BANK_RFCFG0_RSDUEN_WIDTH (1U) 2399 #define CANXL_FILTER_BANK_RFCFG0_RSDUEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_RSDUEN_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_RSDUEN_MASK) 2400 2401 #define CANXL_FILTER_BANK_RFCFG0_REJADDR_MASK (0x1F0000U) 2402 #define CANXL_FILTER_BANK_RFCFG0_REJADDR_SHIFT (16U) 2403 #define CANXL_FILTER_BANK_RFCFG0_REJADDR_WIDTH (5U) 2404 #define CANXL_FILTER_BANK_RFCFG0_REJADDR(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_REJADDR_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_REJADDR_MASK) 2405 2406 #define CANXL_FILTER_BANK_RFCFG0_RADDREN_MASK (0x800000U) 2407 #define CANXL_FILTER_BANK_RFCFG0_RADDREN_SHIFT (23U) 2408 #define CANXL_FILTER_BANK_RFCFG0_RADDREN_WIDTH (1U) 2409 #define CANXL_FILTER_BANK_RFCFG0_RADDREN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG0_RADDREN_SHIFT)) & CANXL_FILTER_BANK_RFCFG0_RADDREN_MASK) 2410 /*! @} */ 2411 2412 /*! @name VRMRCFG0 - VCAN Rejection Mask or Range Configuration */ 2413 /*! @{ */ 2414 2415 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0_MASK (0x1U) 2416 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0_SHIFT (0U) 2417 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0_WIDTH (1U) 2418 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R0_MASK) 2419 2420 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1_MASK (0x2U) 2421 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1_SHIFT (1U) 2422 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1_WIDTH (1U) 2423 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R1_MASK) 2424 2425 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2_MASK (0x4U) 2426 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2_SHIFT (2U) 2427 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2_WIDTH (1U) 2428 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R2_MASK) 2429 2430 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3_MASK (0x8U) 2431 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3_SHIFT (3U) 2432 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3_WIDTH (1U) 2433 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R3_MASK) 2434 2435 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4_MASK (0x10U) 2436 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4_SHIFT (4U) 2437 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4_WIDTH (1U) 2438 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R4_MASK) 2439 2440 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5_MASK (0x20U) 2441 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5_SHIFT (5U) 2442 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5_WIDTH (1U) 2443 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R5_MASK) 2444 2445 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6_MASK (0x40U) 2446 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6_SHIFT (6U) 2447 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6_WIDTH (1U) 2448 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R6_MASK) 2449 2450 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7_MASK (0x80U) 2451 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7_SHIFT (7U) 2452 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7_WIDTH (1U) 2453 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R7_MASK) 2454 2455 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8_MASK (0x100U) 2456 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8_SHIFT (8U) 2457 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8_WIDTH (1U) 2458 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R8_MASK) 2459 2460 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9_MASK (0x200U) 2461 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9_SHIFT (9U) 2462 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9_WIDTH (1U) 2463 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R9_MASK) 2464 2465 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10_MASK (0x400U) 2466 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10_SHIFT (10U) 2467 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10_WIDTH (1U) 2468 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R10_MASK) 2469 2470 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11_MASK (0x800U) 2471 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11_SHIFT (11U) 2472 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11_WIDTH (1U) 2473 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R11_MASK) 2474 2475 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12_MASK (0x1000U) 2476 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12_SHIFT (12U) 2477 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12_WIDTH (1U) 2478 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R12_MASK) 2479 2480 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13_MASK (0x2000U) 2481 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13_SHIFT (13U) 2482 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13_WIDTH (1U) 2483 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R13_MASK) 2484 2485 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14_MASK (0x4000U) 2486 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14_SHIFT (14U) 2487 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14_WIDTH (1U) 2488 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R14_MASK) 2489 2490 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15_MASK (0x8000U) 2491 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15_SHIFT (15U) 2492 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15_WIDTH (1U) 2493 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R15_MASK) 2494 2495 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16_MASK (0x10000U) 2496 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16_SHIFT (16U) 2497 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16_WIDTH (1U) 2498 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R16_MASK) 2499 2500 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17_MASK (0x20000U) 2501 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17_SHIFT (17U) 2502 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17_WIDTH (1U) 2503 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R17_MASK) 2504 2505 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18_MASK (0x40000U) 2506 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18_SHIFT (18U) 2507 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18_WIDTH (1U) 2508 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R18_MASK) 2509 2510 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19_MASK (0x80000U) 2511 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19_SHIFT (19U) 2512 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19_WIDTH (1U) 2513 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R19_MASK) 2514 2515 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20_MASK (0x100000U) 2516 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20_SHIFT (20U) 2517 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20_WIDTH (1U) 2518 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R20_MASK) 2519 2520 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21_MASK (0x200000U) 2521 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21_SHIFT (21U) 2522 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21_WIDTH (1U) 2523 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R21_MASK) 2524 2525 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22_MASK (0x400000U) 2526 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22_SHIFT (22U) 2527 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22_WIDTH (1U) 2528 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R22_MASK) 2529 2530 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23_MASK (0x800000U) 2531 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23_SHIFT (23U) 2532 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23_WIDTH (1U) 2533 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R23_MASK) 2534 2535 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24_MASK (0x1000000U) 2536 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24_SHIFT (24U) 2537 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24_WIDTH (1U) 2538 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R24_MASK) 2539 2540 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25_MASK (0x2000000U) 2541 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25_SHIFT (25U) 2542 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25_WIDTH (1U) 2543 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R25_MASK) 2544 2545 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26_MASK (0x4000000U) 2546 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26_SHIFT (26U) 2547 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26_WIDTH (1U) 2548 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R26_MASK) 2549 2550 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27_MASK (0x8000000U) 2551 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27_SHIFT (27U) 2552 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27_WIDTH (1U) 2553 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R27_MASK) 2554 2555 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28_MASK (0x10000000U) 2556 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28_SHIFT (28U) 2557 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28_WIDTH (1U) 2558 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R28_MASK) 2559 2560 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29_MASK (0x20000000U) 2561 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29_SHIFT (29U) 2562 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29_WIDTH (1U) 2563 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R29_MASK) 2564 2565 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30_MASK (0x40000000U) 2566 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30_SHIFT (30U) 2567 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30_WIDTH (1U) 2568 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R30_MASK) 2569 2570 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31_MASK (0x80000000U) 2571 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31_SHIFT (31U) 2572 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31_WIDTH (1U) 2573 #define CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG0_VMSK0R31_MASK) 2574 /*! @} */ 2575 2576 /*! @name SRMRCFG0 - SDU Rejection Mask or Range Configuration */ 2577 /*! @{ */ 2578 2579 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0_MASK (0x1U) 2580 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0_SHIFT (0U) 2581 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0_WIDTH (1U) 2582 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R0_MASK) 2583 2584 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1_MASK (0x2U) 2585 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1_SHIFT (1U) 2586 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1_WIDTH (1U) 2587 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R1_MASK) 2588 2589 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2_MASK (0x4U) 2590 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2_SHIFT (2U) 2591 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2_WIDTH (1U) 2592 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R2_MASK) 2593 2594 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3_MASK (0x8U) 2595 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3_SHIFT (3U) 2596 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3_WIDTH (1U) 2597 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R3_MASK) 2598 2599 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4_MASK (0x10U) 2600 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4_SHIFT (4U) 2601 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4_WIDTH (1U) 2602 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R4_MASK) 2603 2604 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5_MASK (0x20U) 2605 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5_SHIFT (5U) 2606 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5_WIDTH (1U) 2607 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R5_MASK) 2608 2609 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6_MASK (0x40U) 2610 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6_SHIFT (6U) 2611 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6_WIDTH (1U) 2612 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R6_MASK) 2613 2614 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7_MASK (0x80U) 2615 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7_SHIFT (7U) 2616 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7_WIDTH (1U) 2617 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R7_MASK) 2618 2619 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8_MASK (0x100U) 2620 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8_SHIFT (8U) 2621 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8_WIDTH (1U) 2622 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R8_MASK) 2623 2624 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9_MASK (0x200U) 2625 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9_SHIFT (9U) 2626 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9_WIDTH (1U) 2627 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R9_MASK) 2628 2629 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10_MASK (0x400U) 2630 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10_SHIFT (10U) 2631 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10_WIDTH (1U) 2632 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R10_MASK) 2633 2634 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11_MASK (0x800U) 2635 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11_SHIFT (11U) 2636 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11_WIDTH (1U) 2637 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R11_MASK) 2638 2639 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12_MASK (0x1000U) 2640 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12_SHIFT (12U) 2641 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12_WIDTH (1U) 2642 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R12_MASK) 2643 2644 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13_MASK (0x2000U) 2645 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13_SHIFT (13U) 2646 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13_WIDTH (1U) 2647 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R13_MASK) 2648 2649 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14_MASK (0x4000U) 2650 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14_SHIFT (14U) 2651 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14_WIDTH (1U) 2652 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R14_MASK) 2653 2654 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15_MASK (0x8000U) 2655 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15_SHIFT (15U) 2656 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15_WIDTH (1U) 2657 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R15_MASK) 2658 2659 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16_MASK (0x10000U) 2660 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16_SHIFT (16U) 2661 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16_WIDTH (1U) 2662 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R16_MASK) 2663 2664 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17_MASK (0x20000U) 2665 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17_SHIFT (17U) 2666 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17_WIDTH (1U) 2667 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R17_MASK) 2668 2669 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18_MASK (0x40000U) 2670 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18_SHIFT (18U) 2671 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18_WIDTH (1U) 2672 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R18_MASK) 2673 2674 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19_MASK (0x80000U) 2675 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19_SHIFT (19U) 2676 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19_WIDTH (1U) 2677 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R19_MASK) 2678 2679 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20_MASK (0x100000U) 2680 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20_SHIFT (20U) 2681 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20_WIDTH (1U) 2682 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R20_MASK) 2683 2684 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21_MASK (0x200000U) 2685 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21_SHIFT (21U) 2686 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21_WIDTH (1U) 2687 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R21_MASK) 2688 2689 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22_MASK (0x400000U) 2690 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22_SHIFT (22U) 2691 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22_WIDTH (1U) 2692 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R22_MASK) 2693 2694 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23_MASK (0x800000U) 2695 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23_SHIFT (23U) 2696 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23_WIDTH (1U) 2697 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R23_MASK) 2698 2699 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24_MASK (0x1000000U) 2700 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24_SHIFT (24U) 2701 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24_WIDTH (1U) 2702 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R24_MASK) 2703 2704 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25_MASK (0x2000000U) 2705 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25_SHIFT (25U) 2706 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25_WIDTH (1U) 2707 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R25_MASK) 2708 2709 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26_MASK (0x4000000U) 2710 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26_SHIFT (26U) 2711 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26_WIDTH (1U) 2712 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R26_MASK) 2713 2714 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27_MASK (0x8000000U) 2715 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27_SHIFT (27U) 2716 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27_WIDTH (1U) 2717 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R27_MASK) 2718 2719 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28_MASK (0x10000000U) 2720 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28_SHIFT (28U) 2721 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28_WIDTH (1U) 2722 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R28_MASK) 2723 2724 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29_MASK (0x20000000U) 2725 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29_SHIFT (29U) 2726 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29_WIDTH (1U) 2727 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R29_MASK) 2728 2729 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30_MASK (0x40000000U) 2730 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30_SHIFT (30U) 2731 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30_WIDTH (1U) 2732 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R30_MASK) 2733 2734 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31_MASK (0x80000000U) 2735 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31_SHIFT (31U) 2736 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31_WIDTH (1U) 2737 #define CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG0_SMSK0R31_MASK) 2738 /*! @} */ 2739 2740 /*! @name ARMRCFG0 - ADDR Rejection Mask or Range Configuration */ 2741 /*! @{ */ 2742 2743 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0_MASK (0x1U) 2744 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0_SHIFT (0U) 2745 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0_WIDTH (1U) 2746 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R0_MASK) 2747 2748 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1_MASK (0x2U) 2749 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1_SHIFT (1U) 2750 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1_WIDTH (1U) 2751 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R1_MASK) 2752 2753 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2_MASK (0x4U) 2754 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2_SHIFT (2U) 2755 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2_WIDTH (1U) 2756 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R2_MASK) 2757 2758 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3_MASK (0x8U) 2759 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3_SHIFT (3U) 2760 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3_WIDTH (1U) 2761 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R3_MASK) 2762 2763 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4_MASK (0x10U) 2764 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4_SHIFT (4U) 2765 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4_WIDTH (1U) 2766 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R4_MASK) 2767 2768 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5_MASK (0x20U) 2769 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5_SHIFT (5U) 2770 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5_WIDTH (1U) 2771 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R5_MASK) 2772 2773 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6_MASK (0x40U) 2774 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6_SHIFT (6U) 2775 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6_WIDTH (1U) 2776 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R6_MASK) 2777 2778 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7_MASK (0x80U) 2779 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7_SHIFT (7U) 2780 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7_WIDTH (1U) 2781 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R7_MASK) 2782 2783 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8_MASK (0x100U) 2784 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8_SHIFT (8U) 2785 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8_WIDTH (1U) 2786 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R8_MASK) 2787 2788 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9_MASK (0x200U) 2789 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9_SHIFT (9U) 2790 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9_WIDTH (1U) 2791 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R9_MASK) 2792 2793 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10_MASK (0x400U) 2794 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10_SHIFT (10U) 2795 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10_WIDTH (1U) 2796 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R10_MASK) 2797 2798 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11_MASK (0x800U) 2799 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11_SHIFT (11U) 2800 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11_WIDTH (1U) 2801 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R11_MASK) 2802 2803 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12_MASK (0x1000U) 2804 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12_SHIFT (12U) 2805 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12_WIDTH (1U) 2806 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R12_MASK) 2807 2808 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13_MASK (0x2000U) 2809 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13_SHIFT (13U) 2810 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13_WIDTH (1U) 2811 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R13_MASK) 2812 2813 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14_MASK (0x4000U) 2814 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14_SHIFT (14U) 2815 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14_WIDTH (1U) 2816 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R14_MASK) 2817 2818 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15_MASK (0x8000U) 2819 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15_SHIFT (15U) 2820 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15_WIDTH (1U) 2821 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R15_MASK) 2822 2823 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16_MASK (0x10000U) 2824 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16_SHIFT (16U) 2825 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16_WIDTH (1U) 2826 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R16_MASK) 2827 2828 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17_MASK (0x20000U) 2829 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17_SHIFT (17U) 2830 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17_WIDTH (1U) 2831 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R17_MASK) 2832 2833 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18_MASK (0x40000U) 2834 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18_SHIFT (18U) 2835 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18_WIDTH (1U) 2836 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R18_MASK) 2837 2838 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19_MASK (0x80000U) 2839 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19_SHIFT (19U) 2840 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19_WIDTH (1U) 2841 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R19_MASK) 2842 2843 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20_MASK (0x100000U) 2844 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20_SHIFT (20U) 2845 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20_WIDTH (1U) 2846 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R20_MASK) 2847 2848 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21_MASK (0x200000U) 2849 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21_SHIFT (21U) 2850 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21_WIDTH (1U) 2851 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R21_MASK) 2852 2853 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22_MASK (0x400000U) 2854 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22_SHIFT (22U) 2855 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22_WIDTH (1U) 2856 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R22_MASK) 2857 2858 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23_MASK (0x800000U) 2859 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23_SHIFT (23U) 2860 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23_WIDTH (1U) 2861 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R23_MASK) 2862 2863 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24_MASK (0x1000000U) 2864 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24_SHIFT (24U) 2865 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24_WIDTH (1U) 2866 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R24_MASK) 2867 2868 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25_MASK (0x2000000U) 2869 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25_SHIFT (25U) 2870 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25_WIDTH (1U) 2871 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R25_MASK) 2872 2873 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26_MASK (0x4000000U) 2874 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26_SHIFT (26U) 2875 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26_WIDTH (1U) 2876 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R26_MASK) 2877 2878 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27_MASK (0x8000000U) 2879 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27_SHIFT (27U) 2880 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27_WIDTH (1U) 2881 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R27_MASK) 2882 2883 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28_MASK (0x10000000U) 2884 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28_SHIFT (28U) 2885 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28_WIDTH (1U) 2886 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R28_MASK) 2887 2888 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29_MASK (0x20000000U) 2889 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29_SHIFT (29U) 2890 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29_WIDTH (1U) 2891 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R29_MASK) 2892 2893 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30_MASK (0x40000000U) 2894 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30_SHIFT (30U) 2895 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30_WIDTH (1U) 2896 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R30_MASK) 2897 2898 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31_MASK (0x80000000U) 2899 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31_SHIFT (31U) 2900 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31_WIDTH (1U) 2901 #define CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG0_AMSK0R31_MASK) 2902 /*! @} */ 2903 2904 /*! @name VRFLT0_0 - VCAN Rejection Filter */ 2905 /*! @{ */ 2906 2907 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_L_MASK (0xFFU) 2908 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_L_SHIFT (0U) 2909 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_L_WIDTH (8U) 2910 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_0_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_0_VCANa_L_MASK) 2911 2912 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_H_MASK (0xFF00U) 2913 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_H_SHIFT (8U) 2914 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_H_WIDTH (8U) 2915 #define CANXL_FILTER_BANK_VRFLT0_0_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_0_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_0_VCANa_H_MASK) 2916 2917 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_L_MASK (0xFF0000U) 2918 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_L_SHIFT (16U) 2919 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_L_WIDTH (8U) 2920 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_0_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_0_VCANb_L_MASK) 2921 2922 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_H_MASK (0xFF000000U) 2923 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_H_SHIFT (24U) 2924 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_H_WIDTH (8U) 2925 #define CANXL_FILTER_BANK_VRFLT0_0_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_0_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_0_VCANb_H_MASK) 2926 /*! @} */ 2927 2928 /*! @name VRFLT0_2 - VCAN Rejection Filter */ 2929 /*! @{ */ 2930 2931 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_L_MASK (0xFFU) 2932 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_L_SHIFT (0U) 2933 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_L_WIDTH (8U) 2934 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_2_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_2_VCANa_L_MASK) 2935 2936 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_H_MASK (0xFF00U) 2937 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_H_SHIFT (8U) 2938 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_H_WIDTH (8U) 2939 #define CANXL_FILTER_BANK_VRFLT0_2_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_2_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_2_VCANa_H_MASK) 2940 2941 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_L_MASK (0xFF0000U) 2942 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_L_SHIFT (16U) 2943 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_L_WIDTH (8U) 2944 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_2_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_2_VCANb_L_MASK) 2945 2946 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_H_MASK (0xFF000000U) 2947 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_H_SHIFT (24U) 2948 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_H_WIDTH (8U) 2949 #define CANXL_FILTER_BANK_VRFLT0_2_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_2_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_2_VCANb_H_MASK) 2950 /*! @} */ 2951 2952 /*! @name VRFLT0_4 - VCAN Rejection Filter */ 2953 /*! @{ */ 2954 2955 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_L_MASK (0xFFU) 2956 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_L_SHIFT (0U) 2957 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_L_WIDTH (8U) 2958 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_4_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_4_VCANa_L_MASK) 2959 2960 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_H_MASK (0xFF00U) 2961 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_H_SHIFT (8U) 2962 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_H_WIDTH (8U) 2963 #define CANXL_FILTER_BANK_VRFLT0_4_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_4_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_4_VCANa_H_MASK) 2964 2965 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_L_MASK (0xFF0000U) 2966 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_L_SHIFT (16U) 2967 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_L_WIDTH (8U) 2968 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_4_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_4_VCANb_L_MASK) 2969 2970 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_H_MASK (0xFF000000U) 2971 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_H_SHIFT (24U) 2972 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_H_WIDTH (8U) 2973 #define CANXL_FILTER_BANK_VRFLT0_4_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_4_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_4_VCANb_H_MASK) 2974 /*! @} */ 2975 2976 /*! @name VRFLT0_6 - VCAN Rejection Filter */ 2977 /*! @{ */ 2978 2979 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_L_MASK (0xFFU) 2980 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_L_SHIFT (0U) 2981 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_L_WIDTH (8U) 2982 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_6_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_6_VCANa_L_MASK) 2983 2984 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_H_MASK (0xFF00U) 2985 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_H_SHIFT (8U) 2986 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_H_WIDTH (8U) 2987 #define CANXL_FILTER_BANK_VRFLT0_6_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_6_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_6_VCANa_H_MASK) 2988 2989 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_L_MASK (0xFF0000U) 2990 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_L_SHIFT (16U) 2991 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_L_WIDTH (8U) 2992 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_6_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_6_VCANb_L_MASK) 2993 2994 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_H_MASK (0xFF000000U) 2995 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_H_SHIFT (24U) 2996 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_H_WIDTH (8U) 2997 #define CANXL_FILTER_BANK_VRFLT0_6_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_6_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_6_VCANb_H_MASK) 2998 /*! @} */ 2999 3000 /*! @name VRFLT0_8 - VCAN Rejection Filter */ 3001 /*! @{ */ 3002 3003 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_L_MASK (0xFFU) 3004 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_L_SHIFT (0U) 3005 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_L_WIDTH (8U) 3006 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_8_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_8_VCANa_L_MASK) 3007 3008 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_H_MASK (0xFF00U) 3009 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_H_SHIFT (8U) 3010 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_H_WIDTH (8U) 3011 #define CANXL_FILTER_BANK_VRFLT0_8_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_8_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_8_VCANa_H_MASK) 3012 3013 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_L_MASK (0xFF0000U) 3014 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_L_SHIFT (16U) 3015 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_L_WIDTH (8U) 3016 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_8_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_8_VCANb_L_MASK) 3017 3018 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_H_MASK (0xFF000000U) 3019 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_H_SHIFT (24U) 3020 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_H_WIDTH (8U) 3021 #define CANXL_FILTER_BANK_VRFLT0_8_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_8_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_8_VCANb_H_MASK) 3022 /*! @} */ 3023 3024 /*! @name VRFLT0_10 - VCAN Rejection Filter */ 3025 /*! @{ */ 3026 3027 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_L_MASK (0xFFU) 3028 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_L_SHIFT (0U) 3029 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_L_WIDTH (8U) 3030 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_10_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_10_VCANa_L_MASK) 3031 3032 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_H_MASK (0xFF00U) 3033 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_H_SHIFT (8U) 3034 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_H_WIDTH (8U) 3035 #define CANXL_FILTER_BANK_VRFLT0_10_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_10_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_10_VCANa_H_MASK) 3036 3037 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_L_MASK (0xFF0000U) 3038 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_L_SHIFT (16U) 3039 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_L_WIDTH (8U) 3040 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_10_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_10_VCANb_L_MASK) 3041 3042 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_H_MASK (0xFF000000U) 3043 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_H_SHIFT (24U) 3044 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_H_WIDTH (8U) 3045 #define CANXL_FILTER_BANK_VRFLT0_10_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_10_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_10_VCANb_H_MASK) 3046 /*! @} */ 3047 3048 /*! @name VRFLT0_12 - VCAN Rejection Filter */ 3049 /*! @{ */ 3050 3051 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_L_MASK (0xFFU) 3052 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_L_SHIFT (0U) 3053 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_L_WIDTH (8U) 3054 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_12_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_12_VCANa_L_MASK) 3055 3056 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_H_MASK (0xFF00U) 3057 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_H_SHIFT (8U) 3058 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_H_WIDTH (8U) 3059 #define CANXL_FILTER_BANK_VRFLT0_12_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_12_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_12_VCANa_H_MASK) 3060 3061 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_L_MASK (0xFF0000U) 3062 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_L_SHIFT (16U) 3063 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_L_WIDTH (8U) 3064 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_12_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_12_VCANb_L_MASK) 3065 3066 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_H_MASK (0xFF000000U) 3067 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_H_SHIFT (24U) 3068 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_H_WIDTH (8U) 3069 #define CANXL_FILTER_BANK_VRFLT0_12_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_12_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_12_VCANb_H_MASK) 3070 /*! @} */ 3071 3072 /*! @name VRFLT0_14 - VCAN Rejection Filter */ 3073 /*! @{ */ 3074 3075 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_L_MASK (0xFFU) 3076 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_L_SHIFT (0U) 3077 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_L_WIDTH (8U) 3078 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_14_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_14_VCANa_L_MASK) 3079 3080 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_H_MASK (0xFF00U) 3081 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_H_SHIFT (8U) 3082 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_H_WIDTH (8U) 3083 #define CANXL_FILTER_BANK_VRFLT0_14_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_14_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_14_VCANa_H_MASK) 3084 3085 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_L_MASK (0xFF0000U) 3086 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_L_SHIFT (16U) 3087 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_L_WIDTH (8U) 3088 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_14_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_14_VCANb_L_MASK) 3089 3090 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_H_MASK (0xFF000000U) 3091 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_H_SHIFT (24U) 3092 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_H_WIDTH (8U) 3093 #define CANXL_FILTER_BANK_VRFLT0_14_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_14_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_14_VCANb_H_MASK) 3094 /*! @} */ 3095 3096 /*! @name VRFLT0_16 - VCAN Rejection Filter */ 3097 /*! @{ */ 3098 3099 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_L_MASK (0xFFU) 3100 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_L_SHIFT (0U) 3101 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_L_WIDTH (8U) 3102 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_16_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_16_VCANa_L_MASK) 3103 3104 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_H_MASK (0xFF00U) 3105 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_H_SHIFT (8U) 3106 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_H_WIDTH (8U) 3107 #define CANXL_FILTER_BANK_VRFLT0_16_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_16_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_16_VCANa_H_MASK) 3108 3109 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_L_MASK (0xFF0000U) 3110 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_L_SHIFT (16U) 3111 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_L_WIDTH (8U) 3112 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_16_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_16_VCANb_L_MASK) 3113 3114 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_H_MASK (0xFF000000U) 3115 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_H_SHIFT (24U) 3116 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_H_WIDTH (8U) 3117 #define CANXL_FILTER_BANK_VRFLT0_16_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_16_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_16_VCANb_H_MASK) 3118 /*! @} */ 3119 3120 /*! @name VRFLT0_18 - VCAN Rejection Filter */ 3121 /*! @{ */ 3122 3123 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_L_MASK (0xFFU) 3124 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_L_SHIFT (0U) 3125 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_L_WIDTH (8U) 3126 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_18_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_18_VCANa_L_MASK) 3127 3128 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_H_MASK (0xFF00U) 3129 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_H_SHIFT (8U) 3130 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_H_WIDTH (8U) 3131 #define CANXL_FILTER_BANK_VRFLT0_18_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_18_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_18_VCANa_H_MASK) 3132 3133 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_L_MASK (0xFF0000U) 3134 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_L_SHIFT (16U) 3135 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_L_WIDTH (8U) 3136 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_18_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_18_VCANb_L_MASK) 3137 3138 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_H_MASK (0xFF000000U) 3139 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_H_SHIFT (24U) 3140 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_H_WIDTH (8U) 3141 #define CANXL_FILTER_BANK_VRFLT0_18_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_18_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_18_VCANb_H_MASK) 3142 /*! @} */ 3143 3144 /*! @name VRFLT0_20 - VCAN Rejection Filter */ 3145 /*! @{ */ 3146 3147 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_L_MASK (0xFFU) 3148 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_L_SHIFT (0U) 3149 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_L_WIDTH (8U) 3150 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_20_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_20_VCANa_L_MASK) 3151 3152 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_H_MASK (0xFF00U) 3153 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_H_SHIFT (8U) 3154 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_H_WIDTH (8U) 3155 #define CANXL_FILTER_BANK_VRFLT0_20_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_20_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_20_VCANa_H_MASK) 3156 3157 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_L_MASK (0xFF0000U) 3158 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_L_SHIFT (16U) 3159 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_L_WIDTH (8U) 3160 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_20_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_20_VCANb_L_MASK) 3161 3162 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_H_MASK (0xFF000000U) 3163 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_H_SHIFT (24U) 3164 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_H_WIDTH (8U) 3165 #define CANXL_FILTER_BANK_VRFLT0_20_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_20_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_20_VCANb_H_MASK) 3166 /*! @} */ 3167 3168 /*! @name VRFLT0_22 - VCAN Rejection Filter */ 3169 /*! @{ */ 3170 3171 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_L_MASK (0xFFU) 3172 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_L_SHIFT (0U) 3173 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_L_WIDTH (8U) 3174 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_22_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_22_VCANa_L_MASK) 3175 3176 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_H_MASK (0xFF00U) 3177 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_H_SHIFT (8U) 3178 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_H_WIDTH (8U) 3179 #define CANXL_FILTER_BANK_VRFLT0_22_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_22_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_22_VCANa_H_MASK) 3180 3181 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_L_MASK (0xFF0000U) 3182 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_L_SHIFT (16U) 3183 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_L_WIDTH (8U) 3184 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_22_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_22_VCANb_L_MASK) 3185 3186 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_H_MASK (0xFF000000U) 3187 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_H_SHIFT (24U) 3188 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_H_WIDTH (8U) 3189 #define CANXL_FILTER_BANK_VRFLT0_22_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_22_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_22_VCANb_H_MASK) 3190 /*! @} */ 3191 3192 /*! @name VRFLT0_24 - VCAN Rejection Filter */ 3193 /*! @{ */ 3194 3195 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_L_MASK (0xFFU) 3196 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_L_SHIFT (0U) 3197 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_L_WIDTH (8U) 3198 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_24_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_24_VCANa_L_MASK) 3199 3200 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_H_MASK (0xFF00U) 3201 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_H_SHIFT (8U) 3202 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_H_WIDTH (8U) 3203 #define CANXL_FILTER_BANK_VRFLT0_24_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_24_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_24_VCANa_H_MASK) 3204 3205 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_L_MASK (0xFF0000U) 3206 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_L_SHIFT (16U) 3207 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_L_WIDTH (8U) 3208 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_24_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_24_VCANb_L_MASK) 3209 3210 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_H_MASK (0xFF000000U) 3211 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_H_SHIFT (24U) 3212 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_H_WIDTH (8U) 3213 #define CANXL_FILTER_BANK_VRFLT0_24_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_24_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_24_VCANb_H_MASK) 3214 /*! @} */ 3215 3216 /*! @name VRFLT0_26 - VCAN Rejection Filter */ 3217 /*! @{ */ 3218 3219 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_L_MASK (0xFFU) 3220 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_L_SHIFT (0U) 3221 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_L_WIDTH (8U) 3222 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_26_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_26_VCANa_L_MASK) 3223 3224 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_H_MASK (0xFF00U) 3225 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_H_SHIFT (8U) 3226 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_H_WIDTH (8U) 3227 #define CANXL_FILTER_BANK_VRFLT0_26_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_26_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_26_VCANa_H_MASK) 3228 3229 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_L_MASK (0xFF0000U) 3230 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_L_SHIFT (16U) 3231 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_L_WIDTH (8U) 3232 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_26_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_26_VCANb_L_MASK) 3233 3234 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_H_MASK (0xFF000000U) 3235 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_H_SHIFT (24U) 3236 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_H_WIDTH (8U) 3237 #define CANXL_FILTER_BANK_VRFLT0_26_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_26_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_26_VCANb_H_MASK) 3238 /*! @} */ 3239 3240 /*! @name VRFLT0_28 - VCAN Rejection Filter */ 3241 /*! @{ */ 3242 3243 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_L_MASK (0xFFU) 3244 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_L_SHIFT (0U) 3245 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_L_WIDTH (8U) 3246 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_28_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_28_VCANa_L_MASK) 3247 3248 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_H_MASK (0xFF00U) 3249 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_H_SHIFT (8U) 3250 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_H_WIDTH (8U) 3251 #define CANXL_FILTER_BANK_VRFLT0_28_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_28_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_28_VCANa_H_MASK) 3252 3253 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_L_MASK (0xFF0000U) 3254 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_L_SHIFT (16U) 3255 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_L_WIDTH (8U) 3256 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_28_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_28_VCANb_L_MASK) 3257 3258 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_H_MASK (0xFF000000U) 3259 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_H_SHIFT (24U) 3260 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_H_WIDTH (8U) 3261 #define CANXL_FILTER_BANK_VRFLT0_28_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_28_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_28_VCANb_H_MASK) 3262 /*! @} */ 3263 3264 /*! @name VRFLT0_30 - VCAN Rejection Filter */ 3265 /*! @{ */ 3266 3267 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_L_MASK (0xFFU) 3268 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_L_SHIFT (0U) 3269 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_L_WIDTH (8U) 3270 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_30_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_30_VCANa_L_MASK) 3271 3272 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_H_MASK (0xFF00U) 3273 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_H_SHIFT (8U) 3274 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_H_WIDTH (8U) 3275 #define CANXL_FILTER_BANK_VRFLT0_30_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_30_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_30_VCANa_H_MASK) 3276 3277 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_L_MASK (0xFF0000U) 3278 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_L_SHIFT (16U) 3279 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_L_WIDTH (8U) 3280 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_30_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_30_VCANb_L_MASK) 3281 3282 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_H_MASK (0xFF000000U) 3283 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_H_SHIFT (24U) 3284 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_H_WIDTH (8U) 3285 #define CANXL_FILTER_BANK_VRFLT0_30_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT0_30_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT0_30_VCANb_H_MASK) 3286 /*! @} */ 3287 3288 /*! @name SRFLT0_0 - SDU Rejection Filter */ 3289 /*! @{ */ 3290 3291 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_L_MASK (0xFFU) 3292 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_L_SHIFT (0U) 3293 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_L_WIDTH (8U) 3294 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_0_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_0_SDUa_L_MASK) 3295 3296 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_H_MASK (0xFF00U) 3297 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_H_SHIFT (8U) 3298 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_H_WIDTH (8U) 3299 #define CANXL_FILTER_BANK_SRFLT0_0_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_0_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_0_SDUa_H_MASK) 3300 3301 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_L_MASK (0xFF0000U) 3302 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_L_SHIFT (16U) 3303 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_L_WIDTH (8U) 3304 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_0_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_0_SDUb_L_MASK) 3305 3306 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_H_MASK (0xFF000000U) 3307 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_H_SHIFT (24U) 3308 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_H_WIDTH (8U) 3309 #define CANXL_FILTER_BANK_SRFLT0_0_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_0_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_0_SDUb_H_MASK) 3310 /*! @} */ 3311 3312 /*! @name SRFLT0_2 - SDU Rejection Filter */ 3313 /*! @{ */ 3314 3315 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_L_MASK (0xFFU) 3316 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_L_SHIFT (0U) 3317 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_L_WIDTH (8U) 3318 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_2_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_2_SDUa_L_MASK) 3319 3320 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_H_MASK (0xFF00U) 3321 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_H_SHIFT (8U) 3322 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_H_WIDTH (8U) 3323 #define CANXL_FILTER_BANK_SRFLT0_2_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_2_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_2_SDUa_H_MASK) 3324 3325 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_L_MASK (0xFF0000U) 3326 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_L_SHIFT (16U) 3327 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_L_WIDTH (8U) 3328 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_2_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_2_SDUb_L_MASK) 3329 3330 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_H_MASK (0xFF000000U) 3331 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_H_SHIFT (24U) 3332 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_H_WIDTH (8U) 3333 #define CANXL_FILTER_BANK_SRFLT0_2_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_2_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_2_SDUb_H_MASK) 3334 /*! @} */ 3335 3336 /*! @name SRFLT0_4 - SDU Rejection Filter */ 3337 /*! @{ */ 3338 3339 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_L_MASK (0xFFU) 3340 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_L_SHIFT (0U) 3341 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_L_WIDTH (8U) 3342 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_4_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_4_SDUa_L_MASK) 3343 3344 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_H_MASK (0xFF00U) 3345 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_H_SHIFT (8U) 3346 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_H_WIDTH (8U) 3347 #define CANXL_FILTER_BANK_SRFLT0_4_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_4_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_4_SDUa_H_MASK) 3348 3349 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_L_MASK (0xFF0000U) 3350 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_L_SHIFT (16U) 3351 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_L_WIDTH (8U) 3352 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_4_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_4_SDUb_L_MASK) 3353 3354 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_H_MASK (0xFF000000U) 3355 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_H_SHIFT (24U) 3356 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_H_WIDTH (8U) 3357 #define CANXL_FILTER_BANK_SRFLT0_4_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_4_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_4_SDUb_H_MASK) 3358 /*! @} */ 3359 3360 /*! @name SRFLT0_6 - SDU Rejection Filter */ 3361 /*! @{ */ 3362 3363 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_L_MASK (0xFFU) 3364 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_L_SHIFT (0U) 3365 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_L_WIDTH (8U) 3366 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_6_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_6_SDUa_L_MASK) 3367 3368 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_H_MASK (0xFF00U) 3369 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_H_SHIFT (8U) 3370 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_H_WIDTH (8U) 3371 #define CANXL_FILTER_BANK_SRFLT0_6_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_6_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_6_SDUa_H_MASK) 3372 3373 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_L_MASK (0xFF0000U) 3374 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_L_SHIFT (16U) 3375 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_L_WIDTH (8U) 3376 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_6_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_6_SDUb_L_MASK) 3377 3378 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_H_MASK (0xFF000000U) 3379 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_H_SHIFT (24U) 3380 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_H_WIDTH (8U) 3381 #define CANXL_FILTER_BANK_SRFLT0_6_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_6_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_6_SDUb_H_MASK) 3382 /*! @} */ 3383 3384 /*! @name SRFLT0_8 - SDU Rejection Filter */ 3385 /*! @{ */ 3386 3387 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_L_MASK (0xFFU) 3388 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_L_SHIFT (0U) 3389 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_L_WIDTH (8U) 3390 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_8_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_8_SDUa_L_MASK) 3391 3392 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_H_MASK (0xFF00U) 3393 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_H_SHIFT (8U) 3394 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_H_WIDTH (8U) 3395 #define CANXL_FILTER_BANK_SRFLT0_8_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_8_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_8_SDUa_H_MASK) 3396 3397 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_L_MASK (0xFF0000U) 3398 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_L_SHIFT (16U) 3399 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_L_WIDTH (8U) 3400 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_8_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_8_SDUb_L_MASK) 3401 3402 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_H_MASK (0xFF000000U) 3403 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_H_SHIFT (24U) 3404 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_H_WIDTH (8U) 3405 #define CANXL_FILTER_BANK_SRFLT0_8_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_8_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_8_SDUb_H_MASK) 3406 /*! @} */ 3407 3408 /*! @name SRFLT0_10 - SDU Rejection Filter */ 3409 /*! @{ */ 3410 3411 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_L_MASK (0xFFU) 3412 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_L_SHIFT (0U) 3413 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_L_WIDTH (8U) 3414 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_10_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_10_SDUa_L_MASK) 3415 3416 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_H_MASK (0xFF00U) 3417 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_H_SHIFT (8U) 3418 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_H_WIDTH (8U) 3419 #define CANXL_FILTER_BANK_SRFLT0_10_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_10_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_10_SDUa_H_MASK) 3420 3421 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_L_MASK (0xFF0000U) 3422 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_L_SHIFT (16U) 3423 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_L_WIDTH (8U) 3424 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_10_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_10_SDUb_L_MASK) 3425 3426 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_H_MASK (0xFF000000U) 3427 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_H_SHIFT (24U) 3428 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_H_WIDTH (8U) 3429 #define CANXL_FILTER_BANK_SRFLT0_10_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_10_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_10_SDUb_H_MASK) 3430 /*! @} */ 3431 3432 /*! @name SRFLT0_12 - SDU Rejection Filter */ 3433 /*! @{ */ 3434 3435 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_L_MASK (0xFFU) 3436 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_L_SHIFT (0U) 3437 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_L_WIDTH (8U) 3438 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_12_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_12_SDUa_L_MASK) 3439 3440 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_H_MASK (0xFF00U) 3441 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_H_SHIFT (8U) 3442 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_H_WIDTH (8U) 3443 #define CANXL_FILTER_BANK_SRFLT0_12_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_12_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_12_SDUa_H_MASK) 3444 3445 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_L_MASK (0xFF0000U) 3446 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_L_SHIFT (16U) 3447 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_L_WIDTH (8U) 3448 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_12_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_12_SDUb_L_MASK) 3449 3450 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_H_MASK (0xFF000000U) 3451 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_H_SHIFT (24U) 3452 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_H_WIDTH (8U) 3453 #define CANXL_FILTER_BANK_SRFLT0_12_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_12_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_12_SDUb_H_MASK) 3454 /*! @} */ 3455 3456 /*! @name SRFLT0_14 - SDU Rejection Filter */ 3457 /*! @{ */ 3458 3459 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_L_MASK (0xFFU) 3460 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_L_SHIFT (0U) 3461 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_L_WIDTH (8U) 3462 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_14_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_14_SDUa_L_MASK) 3463 3464 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_H_MASK (0xFF00U) 3465 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_H_SHIFT (8U) 3466 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_H_WIDTH (8U) 3467 #define CANXL_FILTER_BANK_SRFLT0_14_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_14_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_14_SDUa_H_MASK) 3468 3469 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_L_MASK (0xFF0000U) 3470 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_L_SHIFT (16U) 3471 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_L_WIDTH (8U) 3472 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_14_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_14_SDUb_L_MASK) 3473 3474 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_H_MASK (0xFF000000U) 3475 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_H_SHIFT (24U) 3476 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_H_WIDTH (8U) 3477 #define CANXL_FILTER_BANK_SRFLT0_14_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_14_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_14_SDUb_H_MASK) 3478 /*! @} */ 3479 3480 /*! @name SRFLT0_16 - SDU Rejection Filter */ 3481 /*! @{ */ 3482 3483 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_L_MASK (0xFFU) 3484 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_L_SHIFT (0U) 3485 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_L_WIDTH (8U) 3486 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_16_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_16_SDUa_L_MASK) 3487 3488 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_H_MASK (0xFF00U) 3489 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_H_SHIFT (8U) 3490 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_H_WIDTH (8U) 3491 #define CANXL_FILTER_BANK_SRFLT0_16_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_16_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_16_SDUa_H_MASK) 3492 3493 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_L_MASK (0xFF0000U) 3494 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_L_SHIFT (16U) 3495 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_L_WIDTH (8U) 3496 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_16_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_16_SDUb_L_MASK) 3497 3498 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_H_MASK (0xFF000000U) 3499 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_H_SHIFT (24U) 3500 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_H_WIDTH (8U) 3501 #define CANXL_FILTER_BANK_SRFLT0_16_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_16_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_16_SDUb_H_MASK) 3502 /*! @} */ 3503 3504 /*! @name SRFLT0_18 - SDU Rejection Filter */ 3505 /*! @{ */ 3506 3507 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_L_MASK (0xFFU) 3508 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_L_SHIFT (0U) 3509 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_L_WIDTH (8U) 3510 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_18_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_18_SDUa_L_MASK) 3511 3512 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_H_MASK (0xFF00U) 3513 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_H_SHIFT (8U) 3514 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_H_WIDTH (8U) 3515 #define CANXL_FILTER_BANK_SRFLT0_18_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_18_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_18_SDUa_H_MASK) 3516 3517 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_L_MASK (0xFF0000U) 3518 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_L_SHIFT (16U) 3519 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_L_WIDTH (8U) 3520 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_18_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_18_SDUb_L_MASK) 3521 3522 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_H_MASK (0xFF000000U) 3523 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_H_SHIFT (24U) 3524 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_H_WIDTH (8U) 3525 #define CANXL_FILTER_BANK_SRFLT0_18_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_18_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_18_SDUb_H_MASK) 3526 /*! @} */ 3527 3528 /*! @name SRFLT0_20 - SDU Rejection Filter */ 3529 /*! @{ */ 3530 3531 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_L_MASK (0xFFU) 3532 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_L_SHIFT (0U) 3533 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_L_WIDTH (8U) 3534 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_20_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_20_SDUa_L_MASK) 3535 3536 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_H_MASK (0xFF00U) 3537 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_H_SHIFT (8U) 3538 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_H_WIDTH (8U) 3539 #define CANXL_FILTER_BANK_SRFLT0_20_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_20_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_20_SDUa_H_MASK) 3540 3541 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_L_MASK (0xFF0000U) 3542 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_L_SHIFT (16U) 3543 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_L_WIDTH (8U) 3544 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_20_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_20_SDUb_L_MASK) 3545 3546 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_H_MASK (0xFF000000U) 3547 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_H_SHIFT (24U) 3548 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_H_WIDTH (8U) 3549 #define CANXL_FILTER_BANK_SRFLT0_20_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_20_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_20_SDUb_H_MASK) 3550 /*! @} */ 3551 3552 /*! @name SRFLT0_22 - SDU Rejection Filter */ 3553 /*! @{ */ 3554 3555 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_L_MASK (0xFFU) 3556 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_L_SHIFT (0U) 3557 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_L_WIDTH (8U) 3558 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_22_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_22_SDUa_L_MASK) 3559 3560 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_H_MASK (0xFF00U) 3561 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_H_SHIFT (8U) 3562 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_H_WIDTH (8U) 3563 #define CANXL_FILTER_BANK_SRFLT0_22_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_22_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_22_SDUa_H_MASK) 3564 3565 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_L_MASK (0xFF0000U) 3566 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_L_SHIFT (16U) 3567 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_L_WIDTH (8U) 3568 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_22_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_22_SDUb_L_MASK) 3569 3570 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_H_MASK (0xFF000000U) 3571 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_H_SHIFT (24U) 3572 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_H_WIDTH (8U) 3573 #define CANXL_FILTER_BANK_SRFLT0_22_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_22_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_22_SDUb_H_MASK) 3574 /*! @} */ 3575 3576 /*! @name SRFLT0_24 - SDU Rejection Filter */ 3577 /*! @{ */ 3578 3579 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_L_MASK (0xFFU) 3580 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_L_SHIFT (0U) 3581 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_L_WIDTH (8U) 3582 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_24_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_24_SDUa_L_MASK) 3583 3584 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_H_MASK (0xFF00U) 3585 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_H_SHIFT (8U) 3586 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_H_WIDTH (8U) 3587 #define CANXL_FILTER_BANK_SRFLT0_24_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_24_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_24_SDUa_H_MASK) 3588 3589 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_L_MASK (0xFF0000U) 3590 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_L_SHIFT (16U) 3591 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_L_WIDTH (8U) 3592 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_24_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_24_SDUb_L_MASK) 3593 3594 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_H_MASK (0xFF000000U) 3595 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_H_SHIFT (24U) 3596 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_H_WIDTH (8U) 3597 #define CANXL_FILTER_BANK_SRFLT0_24_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_24_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_24_SDUb_H_MASK) 3598 /*! @} */ 3599 3600 /*! @name SRFLT0_26 - SDU Rejection Filter */ 3601 /*! @{ */ 3602 3603 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_L_MASK (0xFFU) 3604 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_L_SHIFT (0U) 3605 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_L_WIDTH (8U) 3606 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_26_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_26_SDUa_L_MASK) 3607 3608 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_H_MASK (0xFF00U) 3609 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_H_SHIFT (8U) 3610 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_H_WIDTH (8U) 3611 #define CANXL_FILTER_BANK_SRFLT0_26_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_26_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_26_SDUa_H_MASK) 3612 3613 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_L_MASK (0xFF0000U) 3614 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_L_SHIFT (16U) 3615 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_L_WIDTH (8U) 3616 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_26_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_26_SDUb_L_MASK) 3617 3618 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_H_MASK (0xFF000000U) 3619 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_H_SHIFT (24U) 3620 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_H_WIDTH (8U) 3621 #define CANXL_FILTER_BANK_SRFLT0_26_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_26_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_26_SDUb_H_MASK) 3622 /*! @} */ 3623 3624 /*! @name SRFLT0_28 - SDU Rejection Filter */ 3625 /*! @{ */ 3626 3627 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_L_MASK (0xFFU) 3628 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_L_SHIFT (0U) 3629 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_L_WIDTH (8U) 3630 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_28_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_28_SDUa_L_MASK) 3631 3632 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_H_MASK (0xFF00U) 3633 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_H_SHIFT (8U) 3634 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_H_WIDTH (8U) 3635 #define CANXL_FILTER_BANK_SRFLT0_28_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_28_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_28_SDUa_H_MASK) 3636 3637 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_L_MASK (0xFF0000U) 3638 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_L_SHIFT (16U) 3639 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_L_WIDTH (8U) 3640 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_28_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_28_SDUb_L_MASK) 3641 3642 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_H_MASK (0xFF000000U) 3643 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_H_SHIFT (24U) 3644 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_H_WIDTH (8U) 3645 #define CANXL_FILTER_BANK_SRFLT0_28_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_28_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_28_SDUb_H_MASK) 3646 /*! @} */ 3647 3648 /*! @name SRFLT0_30 - SDU Rejection Filter */ 3649 /*! @{ */ 3650 3651 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_L_MASK (0xFFU) 3652 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_L_SHIFT (0U) 3653 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_L_WIDTH (8U) 3654 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_30_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_30_SDUa_L_MASK) 3655 3656 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_H_MASK (0xFF00U) 3657 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_H_SHIFT (8U) 3658 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_H_WIDTH (8U) 3659 #define CANXL_FILTER_BANK_SRFLT0_30_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_30_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_30_SDUa_H_MASK) 3660 3661 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_L_MASK (0xFF0000U) 3662 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_L_SHIFT (16U) 3663 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_L_WIDTH (8U) 3664 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_30_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_30_SDUb_L_MASK) 3665 3666 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_H_MASK (0xFF000000U) 3667 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_H_SHIFT (24U) 3668 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_H_WIDTH (8U) 3669 #define CANXL_FILTER_BANK_SRFLT0_30_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT0_30_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT0_30_SDUb_H_MASK) 3670 /*! @} */ 3671 3672 /*! @name ARFLT0_0L - ADDR Rejection Filter Low */ 3673 /*! @{ */ 3674 3675 #define CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L_MASK (0xFFFFFFFFU) 3676 #define CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L_SHIFT (0U) 3677 #define CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L_WIDTH (32U) 3678 #define CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_0L_ADDRn_L_MASK) 3679 /*! @} */ 3680 3681 /*! @name ARFLT0_0H - ADDR Rejection Filter High */ 3682 /*! @{ */ 3683 3684 #define CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H_MASK (0xFFFFFFFFU) 3685 #define CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H_SHIFT (0U) 3686 #define CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H_WIDTH (32U) 3687 #define CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_0H_ADDRn_H_MASK) 3688 /*! @} */ 3689 3690 /*! @name ARFLT0_1L - ADDR Rejection Filter Low */ 3691 /*! @{ */ 3692 3693 #define CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L_MASK (0xFFFFFFFFU) 3694 #define CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L_SHIFT (0U) 3695 #define CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L_WIDTH (32U) 3696 #define CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_1L_ADDRn_L_MASK) 3697 /*! @} */ 3698 3699 /*! @name ARFLT0_1H - ADDR Rejection Filter High */ 3700 /*! @{ */ 3701 3702 #define CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H_MASK (0xFFFFFFFFU) 3703 #define CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H_SHIFT (0U) 3704 #define CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H_WIDTH (32U) 3705 #define CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_1H_ADDRn_H_MASK) 3706 /*! @} */ 3707 3708 /*! @name ARFLT0_2L - ADDR Rejection Filter Low */ 3709 /*! @{ */ 3710 3711 #define CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L_MASK (0xFFFFFFFFU) 3712 #define CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L_SHIFT (0U) 3713 #define CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L_WIDTH (32U) 3714 #define CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_2L_ADDRn_L_MASK) 3715 /*! @} */ 3716 3717 /*! @name ARFLT0_2H - ADDR Rejection Filter High */ 3718 /*! @{ */ 3719 3720 #define CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H_MASK (0xFFFFFFFFU) 3721 #define CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H_SHIFT (0U) 3722 #define CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H_WIDTH (32U) 3723 #define CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_2H_ADDRn_H_MASK) 3724 /*! @} */ 3725 3726 /*! @name ARFLT0_3L - ADDR Rejection Filter Low */ 3727 /*! @{ */ 3728 3729 #define CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L_MASK (0xFFFFFFFFU) 3730 #define CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L_SHIFT (0U) 3731 #define CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L_WIDTH (32U) 3732 #define CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_3L_ADDRn_L_MASK) 3733 /*! @} */ 3734 3735 /*! @name ARFLT0_3H - ADDR Rejection Filter High */ 3736 /*! @{ */ 3737 3738 #define CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H_MASK (0xFFFFFFFFU) 3739 #define CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H_SHIFT (0U) 3740 #define CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H_WIDTH (32U) 3741 #define CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_3H_ADDRn_H_MASK) 3742 /*! @} */ 3743 3744 /*! @name ARFLT0_4L - ADDR Rejection Filter Low */ 3745 /*! @{ */ 3746 3747 #define CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L_MASK (0xFFFFFFFFU) 3748 #define CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L_SHIFT (0U) 3749 #define CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L_WIDTH (32U) 3750 #define CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_4L_ADDRn_L_MASK) 3751 /*! @} */ 3752 3753 /*! @name ARFLT0_4H - ADDR Rejection Filter High */ 3754 /*! @{ */ 3755 3756 #define CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H_MASK (0xFFFFFFFFU) 3757 #define CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H_SHIFT (0U) 3758 #define CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H_WIDTH (32U) 3759 #define CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_4H_ADDRn_H_MASK) 3760 /*! @} */ 3761 3762 /*! @name ARFLT0_5L - ADDR Rejection Filter Low */ 3763 /*! @{ */ 3764 3765 #define CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L_MASK (0xFFFFFFFFU) 3766 #define CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L_SHIFT (0U) 3767 #define CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L_WIDTH (32U) 3768 #define CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_5L_ADDRn_L_MASK) 3769 /*! @} */ 3770 3771 /*! @name ARFLT0_5H - ADDR Rejection Filter High */ 3772 /*! @{ */ 3773 3774 #define CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H_MASK (0xFFFFFFFFU) 3775 #define CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H_SHIFT (0U) 3776 #define CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H_WIDTH (32U) 3777 #define CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_5H_ADDRn_H_MASK) 3778 /*! @} */ 3779 3780 /*! @name ARFLT0_6L - ADDR Rejection Filter Low */ 3781 /*! @{ */ 3782 3783 #define CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L_MASK (0xFFFFFFFFU) 3784 #define CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L_SHIFT (0U) 3785 #define CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L_WIDTH (32U) 3786 #define CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_6L_ADDRn_L_MASK) 3787 /*! @} */ 3788 3789 /*! @name ARFLT0_6H - ADDR Rejection Filter High */ 3790 /*! @{ */ 3791 3792 #define CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H_MASK (0xFFFFFFFFU) 3793 #define CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H_SHIFT (0U) 3794 #define CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H_WIDTH (32U) 3795 #define CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_6H_ADDRn_H_MASK) 3796 /*! @} */ 3797 3798 /*! @name ARFLT0_7L - ADDR Rejection Filter Low */ 3799 /*! @{ */ 3800 3801 #define CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L_MASK (0xFFFFFFFFU) 3802 #define CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L_SHIFT (0U) 3803 #define CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L_WIDTH (32U) 3804 #define CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_7L_ADDRn_L_MASK) 3805 /*! @} */ 3806 3807 /*! @name ARFLT0_7H - ADDR Rejection Filter High */ 3808 /*! @{ */ 3809 3810 #define CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H_MASK (0xFFFFFFFFU) 3811 #define CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H_SHIFT (0U) 3812 #define CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H_WIDTH (32U) 3813 #define CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_7H_ADDRn_H_MASK) 3814 /*! @} */ 3815 3816 /*! @name ARFLT0_8L - ADDR Rejection Filter Low */ 3817 /*! @{ */ 3818 3819 #define CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L_MASK (0xFFFFFFFFU) 3820 #define CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L_SHIFT (0U) 3821 #define CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L_WIDTH (32U) 3822 #define CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_8L_ADDRn_L_MASK) 3823 /*! @} */ 3824 3825 /*! @name ARFLT0_8H - ADDR Rejection Filter High */ 3826 /*! @{ */ 3827 3828 #define CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H_MASK (0xFFFFFFFFU) 3829 #define CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H_SHIFT (0U) 3830 #define CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H_WIDTH (32U) 3831 #define CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_8H_ADDRn_H_MASK) 3832 /*! @} */ 3833 3834 /*! @name ARFLT0_9L - ADDR Rejection Filter Low */ 3835 /*! @{ */ 3836 3837 #define CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L_MASK (0xFFFFFFFFU) 3838 #define CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L_SHIFT (0U) 3839 #define CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L_WIDTH (32U) 3840 #define CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_9L_ADDRn_L_MASK) 3841 /*! @} */ 3842 3843 /*! @name ARFLT0_9H - ADDR Rejection Filter High */ 3844 /*! @{ */ 3845 3846 #define CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H_MASK (0xFFFFFFFFU) 3847 #define CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H_SHIFT (0U) 3848 #define CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H_WIDTH (32U) 3849 #define CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_9H_ADDRn_H_MASK) 3850 /*! @} */ 3851 3852 /*! @name ARFLT0_10L - ADDR Rejection Filter Low */ 3853 /*! @{ */ 3854 3855 #define CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L_MASK (0xFFFFFFFFU) 3856 #define CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L_SHIFT (0U) 3857 #define CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L_WIDTH (32U) 3858 #define CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_10L_ADDRn_L_MASK) 3859 /*! @} */ 3860 3861 /*! @name ARFLT0_10H - ADDR Rejection Filter High */ 3862 /*! @{ */ 3863 3864 #define CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H_MASK (0xFFFFFFFFU) 3865 #define CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H_SHIFT (0U) 3866 #define CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H_WIDTH (32U) 3867 #define CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_10H_ADDRn_H_MASK) 3868 /*! @} */ 3869 3870 /*! @name ARFLT0_11L - ADDR Rejection Filter Low */ 3871 /*! @{ */ 3872 3873 #define CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L_MASK (0xFFFFFFFFU) 3874 #define CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L_SHIFT (0U) 3875 #define CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L_WIDTH (32U) 3876 #define CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_11L_ADDRn_L_MASK) 3877 /*! @} */ 3878 3879 /*! @name ARFLT0_11H - ADDR Rejection Filter High */ 3880 /*! @{ */ 3881 3882 #define CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H_MASK (0xFFFFFFFFU) 3883 #define CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H_SHIFT (0U) 3884 #define CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H_WIDTH (32U) 3885 #define CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_11H_ADDRn_H_MASK) 3886 /*! @} */ 3887 3888 /*! @name ARFLT0_12L - ADDR Rejection Filter Low */ 3889 /*! @{ */ 3890 3891 #define CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L_MASK (0xFFFFFFFFU) 3892 #define CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L_SHIFT (0U) 3893 #define CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L_WIDTH (32U) 3894 #define CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_12L_ADDRn_L_MASK) 3895 /*! @} */ 3896 3897 /*! @name ARFLT0_12H - ADDR Rejection Filter High */ 3898 /*! @{ */ 3899 3900 #define CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H_MASK (0xFFFFFFFFU) 3901 #define CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H_SHIFT (0U) 3902 #define CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H_WIDTH (32U) 3903 #define CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_12H_ADDRn_H_MASK) 3904 /*! @} */ 3905 3906 /*! @name ARFLT0_13L - ADDR Rejection Filter Low */ 3907 /*! @{ */ 3908 3909 #define CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L_MASK (0xFFFFFFFFU) 3910 #define CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L_SHIFT (0U) 3911 #define CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L_WIDTH (32U) 3912 #define CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_13L_ADDRn_L_MASK) 3913 /*! @} */ 3914 3915 /*! @name ARFLT0_13H - ADDR Rejection Filter High */ 3916 /*! @{ */ 3917 3918 #define CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H_MASK (0xFFFFFFFFU) 3919 #define CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H_SHIFT (0U) 3920 #define CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H_WIDTH (32U) 3921 #define CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_13H_ADDRn_H_MASK) 3922 /*! @} */ 3923 3924 /*! @name ARFLT0_14L - ADDR Rejection Filter Low */ 3925 /*! @{ */ 3926 3927 #define CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L_MASK (0xFFFFFFFFU) 3928 #define CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L_SHIFT (0U) 3929 #define CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L_WIDTH (32U) 3930 #define CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_14L_ADDRn_L_MASK) 3931 /*! @} */ 3932 3933 /*! @name ARFLT0_14H - ADDR Rejection Filter High */ 3934 /*! @{ */ 3935 3936 #define CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H_MASK (0xFFFFFFFFU) 3937 #define CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H_SHIFT (0U) 3938 #define CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H_WIDTH (32U) 3939 #define CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_14H_ADDRn_H_MASK) 3940 /*! @} */ 3941 3942 /*! @name ARFLT0_15L - ADDR Rejection Filter Low */ 3943 /*! @{ */ 3944 3945 #define CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L_MASK (0xFFFFFFFFU) 3946 #define CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L_SHIFT (0U) 3947 #define CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L_WIDTH (32U) 3948 #define CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_15L_ADDRn_L_MASK) 3949 /*! @} */ 3950 3951 /*! @name ARFLT0_15H - ADDR Rejection Filter High */ 3952 /*! @{ */ 3953 3954 #define CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H_MASK (0xFFFFFFFFU) 3955 #define CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H_SHIFT (0U) 3956 #define CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H_WIDTH (32U) 3957 #define CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_15H_ADDRn_H_MASK) 3958 /*! @} */ 3959 3960 /*! @name ARFLT0_16L - ADDR Rejection Filter Low */ 3961 /*! @{ */ 3962 3963 #define CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L_MASK (0xFFFFFFFFU) 3964 #define CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L_SHIFT (0U) 3965 #define CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L_WIDTH (32U) 3966 #define CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_16L_ADDRn_L_MASK) 3967 /*! @} */ 3968 3969 /*! @name ARFLT0_16H - ADDR Rejection Filter High */ 3970 /*! @{ */ 3971 3972 #define CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H_MASK (0xFFFFFFFFU) 3973 #define CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H_SHIFT (0U) 3974 #define CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H_WIDTH (32U) 3975 #define CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_16H_ADDRn_H_MASK) 3976 /*! @} */ 3977 3978 /*! @name ARFLT0_17L - ADDR Rejection Filter Low */ 3979 /*! @{ */ 3980 3981 #define CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L_MASK (0xFFFFFFFFU) 3982 #define CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L_SHIFT (0U) 3983 #define CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L_WIDTH (32U) 3984 #define CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_17L_ADDRn_L_MASK) 3985 /*! @} */ 3986 3987 /*! @name ARFLT0_17H - ADDR Rejection Filter High */ 3988 /*! @{ */ 3989 3990 #define CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H_MASK (0xFFFFFFFFU) 3991 #define CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H_SHIFT (0U) 3992 #define CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H_WIDTH (32U) 3993 #define CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_17H_ADDRn_H_MASK) 3994 /*! @} */ 3995 3996 /*! @name ARFLT0_18L - ADDR Rejection Filter Low */ 3997 /*! @{ */ 3998 3999 #define CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L_MASK (0xFFFFFFFFU) 4000 #define CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L_SHIFT (0U) 4001 #define CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L_WIDTH (32U) 4002 #define CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_18L_ADDRn_L_MASK) 4003 /*! @} */ 4004 4005 /*! @name ARFLT0_18H - ADDR Rejection Filter High */ 4006 /*! @{ */ 4007 4008 #define CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H_MASK (0xFFFFFFFFU) 4009 #define CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H_SHIFT (0U) 4010 #define CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H_WIDTH (32U) 4011 #define CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_18H_ADDRn_H_MASK) 4012 /*! @} */ 4013 4014 /*! @name ARFLT0_19L - ADDR Rejection Filter Low */ 4015 /*! @{ */ 4016 4017 #define CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L_MASK (0xFFFFFFFFU) 4018 #define CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L_SHIFT (0U) 4019 #define CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L_WIDTH (32U) 4020 #define CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_19L_ADDRn_L_MASK) 4021 /*! @} */ 4022 4023 /*! @name ARFLT0_19H - ADDR Rejection Filter High */ 4024 /*! @{ */ 4025 4026 #define CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H_MASK (0xFFFFFFFFU) 4027 #define CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H_SHIFT (0U) 4028 #define CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H_WIDTH (32U) 4029 #define CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_19H_ADDRn_H_MASK) 4030 /*! @} */ 4031 4032 /*! @name ARFLT0_20L - ADDR Rejection Filter Low */ 4033 /*! @{ */ 4034 4035 #define CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L_MASK (0xFFFFFFFFU) 4036 #define CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L_SHIFT (0U) 4037 #define CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L_WIDTH (32U) 4038 #define CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_20L_ADDRn_L_MASK) 4039 /*! @} */ 4040 4041 /*! @name ARFLT0_20H - ADDR Rejection Filter High */ 4042 /*! @{ */ 4043 4044 #define CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H_MASK (0xFFFFFFFFU) 4045 #define CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H_SHIFT (0U) 4046 #define CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H_WIDTH (32U) 4047 #define CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_20H_ADDRn_H_MASK) 4048 /*! @} */ 4049 4050 /*! @name ARFLT0_21L - ADDR Rejection Filter Low */ 4051 /*! @{ */ 4052 4053 #define CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L_MASK (0xFFFFFFFFU) 4054 #define CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L_SHIFT (0U) 4055 #define CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L_WIDTH (32U) 4056 #define CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_21L_ADDRn_L_MASK) 4057 /*! @} */ 4058 4059 /*! @name ARFLT0_21H - ADDR Rejection Filter High */ 4060 /*! @{ */ 4061 4062 #define CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H_MASK (0xFFFFFFFFU) 4063 #define CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H_SHIFT (0U) 4064 #define CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H_WIDTH (32U) 4065 #define CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_21H_ADDRn_H_MASK) 4066 /*! @} */ 4067 4068 /*! @name ARFLT0_22L - ADDR Rejection Filter Low */ 4069 /*! @{ */ 4070 4071 #define CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L_MASK (0xFFFFFFFFU) 4072 #define CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L_SHIFT (0U) 4073 #define CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L_WIDTH (32U) 4074 #define CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_22L_ADDRn_L_MASK) 4075 /*! @} */ 4076 4077 /*! @name ARFLT0_22H - ADDR Rejection Filter High */ 4078 /*! @{ */ 4079 4080 #define CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H_MASK (0xFFFFFFFFU) 4081 #define CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H_SHIFT (0U) 4082 #define CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H_WIDTH (32U) 4083 #define CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_22H_ADDRn_H_MASK) 4084 /*! @} */ 4085 4086 /*! @name ARFLT0_23L - ADDR Rejection Filter Low */ 4087 /*! @{ */ 4088 4089 #define CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L_MASK (0xFFFFFFFFU) 4090 #define CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L_SHIFT (0U) 4091 #define CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L_WIDTH (32U) 4092 #define CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_23L_ADDRn_L_MASK) 4093 /*! @} */ 4094 4095 /*! @name ARFLT0_23H - ADDR Rejection Filter High */ 4096 /*! @{ */ 4097 4098 #define CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H_MASK (0xFFFFFFFFU) 4099 #define CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H_SHIFT (0U) 4100 #define CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H_WIDTH (32U) 4101 #define CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_23H_ADDRn_H_MASK) 4102 /*! @} */ 4103 4104 /*! @name ARFLT0_24L - ADDR Rejection Filter Low */ 4105 /*! @{ */ 4106 4107 #define CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L_MASK (0xFFFFFFFFU) 4108 #define CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L_SHIFT (0U) 4109 #define CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L_WIDTH (32U) 4110 #define CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_24L_ADDRn_L_MASK) 4111 /*! @} */ 4112 4113 /*! @name ARFLT0_24H - ADDR Rejection Filter High */ 4114 /*! @{ */ 4115 4116 #define CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H_MASK (0xFFFFFFFFU) 4117 #define CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H_SHIFT (0U) 4118 #define CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H_WIDTH (32U) 4119 #define CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_24H_ADDRn_H_MASK) 4120 /*! @} */ 4121 4122 /*! @name ARFLT0_25L - ADDR Rejection Filter Low */ 4123 /*! @{ */ 4124 4125 #define CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L_MASK (0xFFFFFFFFU) 4126 #define CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L_SHIFT (0U) 4127 #define CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L_WIDTH (32U) 4128 #define CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_25L_ADDRn_L_MASK) 4129 /*! @} */ 4130 4131 /*! @name ARFLT0_25H - ADDR Rejection Filter High */ 4132 /*! @{ */ 4133 4134 #define CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H_MASK (0xFFFFFFFFU) 4135 #define CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H_SHIFT (0U) 4136 #define CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H_WIDTH (32U) 4137 #define CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_25H_ADDRn_H_MASK) 4138 /*! @} */ 4139 4140 /*! @name ARFLT0_26L - ADDR Rejection Filter Low */ 4141 /*! @{ */ 4142 4143 #define CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L_MASK (0xFFFFFFFFU) 4144 #define CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L_SHIFT (0U) 4145 #define CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L_WIDTH (32U) 4146 #define CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_26L_ADDRn_L_MASK) 4147 /*! @} */ 4148 4149 /*! @name ARFLT0_26H - ADDR Rejection Filter High */ 4150 /*! @{ */ 4151 4152 #define CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H_MASK (0xFFFFFFFFU) 4153 #define CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H_SHIFT (0U) 4154 #define CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H_WIDTH (32U) 4155 #define CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_26H_ADDRn_H_MASK) 4156 /*! @} */ 4157 4158 /*! @name ARFLT0_27L - ADDR Rejection Filter Low */ 4159 /*! @{ */ 4160 4161 #define CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L_MASK (0xFFFFFFFFU) 4162 #define CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L_SHIFT (0U) 4163 #define CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L_WIDTH (32U) 4164 #define CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_27L_ADDRn_L_MASK) 4165 /*! @} */ 4166 4167 /*! @name ARFLT0_27H - ADDR Rejection Filter High */ 4168 /*! @{ */ 4169 4170 #define CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H_MASK (0xFFFFFFFFU) 4171 #define CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H_SHIFT (0U) 4172 #define CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H_WIDTH (32U) 4173 #define CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_27H_ADDRn_H_MASK) 4174 /*! @} */ 4175 4176 /*! @name ARFLT0_28L - ADDR Rejection Filter Low */ 4177 /*! @{ */ 4178 4179 #define CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L_MASK (0xFFFFFFFFU) 4180 #define CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L_SHIFT (0U) 4181 #define CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L_WIDTH (32U) 4182 #define CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_28L_ADDRn_L_MASK) 4183 /*! @} */ 4184 4185 /*! @name ARFLT0_28H - ADDR Rejection Filter High */ 4186 /*! @{ */ 4187 4188 #define CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H_MASK (0xFFFFFFFFU) 4189 #define CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H_SHIFT (0U) 4190 #define CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H_WIDTH (32U) 4191 #define CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_28H_ADDRn_H_MASK) 4192 /*! @} */ 4193 4194 /*! @name ARFLT0_29L - ADDR Rejection Filter Low */ 4195 /*! @{ */ 4196 4197 #define CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L_MASK (0xFFFFFFFFU) 4198 #define CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L_SHIFT (0U) 4199 #define CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L_WIDTH (32U) 4200 #define CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_29L_ADDRn_L_MASK) 4201 /*! @} */ 4202 4203 /*! @name ARFLT0_29H - ADDR Rejection Filter High */ 4204 /*! @{ */ 4205 4206 #define CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H_MASK (0xFFFFFFFFU) 4207 #define CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H_SHIFT (0U) 4208 #define CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H_WIDTH (32U) 4209 #define CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_29H_ADDRn_H_MASK) 4210 /*! @} */ 4211 4212 /*! @name ARFLT0_30L - ADDR Rejection Filter Low */ 4213 /*! @{ */ 4214 4215 #define CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L_MASK (0xFFFFFFFFU) 4216 #define CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L_SHIFT (0U) 4217 #define CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L_WIDTH (32U) 4218 #define CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_30L_ADDRn_L_MASK) 4219 /*! @} */ 4220 4221 /*! @name ARFLT0_30H - ADDR Rejection Filter High */ 4222 /*! @{ */ 4223 4224 #define CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H_MASK (0xFFFFFFFFU) 4225 #define CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H_SHIFT (0U) 4226 #define CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H_WIDTH (32U) 4227 #define CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_30H_ADDRn_H_MASK) 4228 /*! @} */ 4229 4230 /*! @name ARFLT0_31L - ADDR Rejection Filter Low */ 4231 /*! @{ */ 4232 4233 #define CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L_MASK (0xFFFFFFFFU) 4234 #define CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L_SHIFT (0U) 4235 #define CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L_WIDTH (32U) 4236 #define CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_31L_ADDRn_L_MASK) 4237 /*! @} */ 4238 4239 /*! @name ARFLT0_31H - ADDR Rejection Filter High */ 4240 /*! @{ */ 4241 4242 #define CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H_MASK (0xFFFFFFFFU) 4243 #define CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H_SHIFT (0U) 4244 #define CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H_WIDTH (32U) 4245 #define CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT0_31H_ADDRn_H_MASK) 4246 /*! @} */ 4247 4248 /*! @name AFCFG1 - Acceptance Filter Configuration */ 4249 /*! @{ */ 4250 4251 #define CANXL_FILTER_BANK_AFCFG1_ACPTVCAN_MASK (0x1FU) 4252 #define CANXL_FILTER_BANK_AFCFG1_ACPTVCAN_SHIFT (0U) 4253 #define CANXL_FILTER_BANK_AFCFG1_ACPTVCAN_WIDTH (5U) 4254 #define CANXL_FILTER_BANK_AFCFG1_ACPTVCAN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_ACPTVCAN_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_ACPTVCAN_MASK) 4255 4256 #define CANXL_FILTER_BANK_AFCFG1_AVCANEN_MASK (0x80U) 4257 #define CANXL_FILTER_BANK_AFCFG1_AVCANEN_SHIFT (7U) 4258 #define CANXL_FILTER_BANK_AFCFG1_AVCANEN_WIDTH (1U) 4259 #define CANXL_FILTER_BANK_AFCFG1_AVCANEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_AVCANEN_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_AVCANEN_MASK) 4260 4261 #define CANXL_FILTER_BANK_AFCFG1_ACPTSDU_MASK (0x1F00U) 4262 #define CANXL_FILTER_BANK_AFCFG1_ACPTSDU_SHIFT (8U) 4263 #define CANXL_FILTER_BANK_AFCFG1_ACPTSDU_WIDTH (5U) 4264 #define CANXL_FILTER_BANK_AFCFG1_ACPTSDU(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_ACPTSDU_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_ACPTSDU_MASK) 4265 4266 #define CANXL_FILTER_BANK_AFCFG1_ASDUEN_MASK (0x8000U) 4267 #define CANXL_FILTER_BANK_AFCFG1_ASDUEN_SHIFT (15U) 4268 #define CANXL_FILTER_BANK_AFCFG1_ASDUEN_WIDTH (1U) 4269 #define CANXL_FILTER_BANK_AFCFG1_ASDUEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_ASDUEN_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_ASDUEN_MASK) 4270 4271 #define CANXL_FILTER_BANK_AFCFG1_ACPTADDR_MASK (0x1F0000U) 4272 #define CANXL_FILTER_BANK_AFCFG1_ACPTADDR_SHIFT (16U) 4273 #define CANXL_FILTER_BANK_AFCFG1_ACPTADDR_WIDTH (5U) 4274 #define CANXL_FILTER_BANK_AFCFG1_ACPTADDR(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_ACPTADDR_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_ACPTADDR_MASK) 4275 4276 #define CANXL_FILTER_BANK_AFCFG1_AADDREN_MASK (0x800000U) 4277 #define CANXL_FILTER_BANK_AFCFG1_AADDREN_SHIFT (23U) 4278 #define CANXL_FILTER_BANK_AFCFG1_AADDREN_WIDTH (1U) 4279 #define CANXL_FILTER_BANK_AFCFG1_AADDREN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AFCFG1_AADDREN_SHIFT)) & CANXL_FILTER_BANK_AFCFG1_AADDREN_MASK) 4280 /*! @} */ 4281 4282 /*! @name VAMRCFG1 - VCAN Acceptance Mask or Range Configuration */ 4283 /*! @{ */ 4284 4285 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0_MASK (0x1U) 4286 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0_SHIFT (0U) 4287 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0_WIDTH (1U) 4288 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R0_MASK) 4289 4290 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1_MASK (0x2U) 4291 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1_SHIFT (1U) 4292 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1_WIDTH (1U) 4293 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R1_MASK) 4294 4295 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2_MASK (0x4U) 4296 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2_SHIFT (2U) 4297 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2_WIDTH (1U) 4298 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R2_MASK) 4299 4300 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3_MASK (0x8U) 4301 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3_SHIFT (3U) 4302 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3_WIDTH (1U) 4303 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R3_MASK) 4304 4305 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4_MASK (0x10U) 4306 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4_SHIFT (4U) 4307 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4_WIDTH (1U) 4308 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R4_MASK) 4309 4310 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5_MASK (0x20U) 4311 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5_SHIFT (5U) 4312 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5_WIDTH (1U) 4313 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R5_MASK) 4314 4315 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6_MASK (0x40U) 4316 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6_SHIFT (6U) 4317 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6_WIDTH (1U) 4318 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R6_MASK) 4319 4320 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7_MASK (0x80U) 4321 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7_SHIFT (7U) 4322 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7_WIDTH (1U) 4323 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R7_MASK) 4324 4325 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8_MASK (0x100U) 4326 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8_SHIFT (8U) 4327 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8_WIDTH (1U) 4328 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R8_MASK) 4329 4330 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9_MASK (0x200U) 4331 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9_SHIFT (9U) 4332 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9_WIDTH (1U) 4333 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R9_MASK) 4334 4335 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10_MASK (0x400U) 4336 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10_SHIFT (10U) 4337 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10_WIDTH (1U) 4338 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R10_MASK) 4339 4340 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11_MASK (0x800U) 4341 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11_SHIFT (11U) 4342 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11_WIDTH (1U) 4343 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R11_MASK) 4344 4345 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12_MASK (0x1000U) 4346 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12_SHIFT (12U) 4347 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12_WIDTH (1U) 4348 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R12_MASK) 4349 4350 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13_MASK (0x2000U) 4351 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13_SHIFT (13U) 4352 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13_WIDTH (1U) 4353 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R13_MASK) 4354 4355 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14_MASK (0x4000U) 4356 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14_SHIFT (14U) 4357 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14_WIDTH (1U) 4358 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R14_MASK) 4359 4360 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15_MASK (0x8000U) 4361 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15_SHIFT (15U) 4362 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15_WIDTH (1U) 4363 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R15_MASK) 4364 4365 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16_MASK (0x10000U) 4366 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16_SHIFT (16U) 4367 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16_WIDTH (1U) 4368 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R16_MASK) 4369 4370 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17_MASK (0x20000U) 4371 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17_SHIFT (17U) 4372 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17_WIDTH (1U) 4373 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R17_MASK) 4374 4375 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18_MASK (0x40000U) 4376 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18_SHIFT (18U) 4377 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18_WIDTH (1U) 4378 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R18_MASK) 4379 4380 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19_MASK (0x80000U) 4381 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19_SHIFT (19U) 4382 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19_WIDTH (1U) 4383 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R19_MASK) 4384 4385 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20_MASK (0x100000U) 4386 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20_SHIFT (20U) 4387 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20_WIDTH (1U) 4388 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R20_MASK) 4389 4390 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21_MASK (0x200000U) 4391 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21_SHIFT (21U) 4392 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21_WIDTH (1U) 4393 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R21_MASK) 4394 4395 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22_MASK (0x400000U) 4396 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22_SHIFT (22U) 4397 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22_WIDTH (1U) 4398 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R22_MASK) 4399 4400 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23_MASK (0x800000U) 4401 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23_SHIFT (23U) 4402 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23_WIDTH (1U) 4403 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R23_MASK) 4404 4405 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24_MASK (0x1000000U) 4406 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24_SHIFT (24U) 4407 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24_WIDTH (1U) 4408 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R24_MASK) 4409 4410 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25_MASK (0x2000000U) 4411 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25_SHIFT (25U) 4412 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25_WIDTH (1U) 4413 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R25_MASK) 4414 4415 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26_MASK (0x4000000U) 4416 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26_SHIFT (26U) 4417 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26_WIDTH (1U) 4418 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R26_MASK) 4419 4420 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27_MASK (0x8000000U) 4421 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27_SHIFT (27U) 4422 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27_WIDTH (1U) 4423 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R27_MASK) 4424 4425 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28_MASK (0x10000000U) 4426 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28_SHIFT (28U) 4427 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28_WIDTH (1U) 4428 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R28_MASK) 4429 4430 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29_MASK (0x20000000U) 4431 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29_SHIFT (29U) 4432 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29_WIDTH (1U) 4433 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R29_MASK) 4434 4435 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30_MASK (0x40000000U) 4436 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30_SHIFT (30U) 4437 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30_WIDTH (1U) 4438 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R30_MASK) 4439 4440 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31_MASK (0x80000000U) 4441 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31_SHIFT (31U) 4442 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31_WIDTH (1U) 4443 #define CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31_SHIFT)) & CANXL_FILTER_BANK_VAMRCFG1_VMSK0R31_MASK) 4444 /*! @} */ 4445 4446 /*! @name SAMRCFG1 - SDU Acceptance Mask or Range Configuration */ 4447 /*! @{ */ 4448 4449 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0_MASK (0x1U) 4450 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0_SHIFT (0U) 4451 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0_WIDTH (1U) 4452 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R0_MASK) 4453 4454 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1_MASK (0x2U) 4455 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1_SHIFT (1U) 4456 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1_WIDTH (1U) 4457 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R1_MASK) 4458 4459 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2_MASK (0x4U) 4460 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2_SHIFT (2U) 4461 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2_WIDTH (1U) 4462 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R2_MASK) 4463 4464 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3_MASK (0x8U) 4465 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3_SHIFT (3U) 4466 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3_WIDTH (1U) 4467 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R3_MASK) 4468 4469 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4_MASK (0x10U) 4470 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4_SHIFT (4U) 4471 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4_WIDTH (1U) 4472 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R4_MASK) 4473 4474 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5_MASK (0x20U) 4475 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5_SHIFT (5U) 4476 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5_WIDTH (1U) 4477 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R5_MASK) 4478 4479 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6_MASK (0x40U) 4480 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6_SHIFT (6U) 4481 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6_WIDTH (1U) 4482 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R6_MASK) 4483 4484 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7_MASK (0x80U) 4485 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7_SHIFT (7U) 4486 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7_WIDTH (1U) 4487 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R7_MASK) 4488 4489 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8_MASK (0x100U) 4490 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8_SHIFT (8U) 4491 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8_WIDTH (1U) 4492 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R8_MASK) 4493 4494 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9_MASK (0x200U) 4495 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9_SHIFT (9U) 4496 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9_WIDTH (1U) 4497 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R9_MASK) 4498 4499 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10_MASK (0x400U) 4500 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10_SHIFT (10U) 4501 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10_WIDTH (1U) 4502 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R10_MASK) 4503 4504 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11_MASK (0x800U) 4505 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11_SHIFT (11U) 4506 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11_WIDTH (1U) 4507 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R11_MASK) 4508 4509 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12_MASK (0x1000U) 4510 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12_SHIFT (12U) 4511 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12_WIDTH (1U) 4512 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R12_MASK) 4513 4514 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13_MASK (0x2000U) 4515 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13_SHIFT (13U) 4516 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13_WIDTH (1U) 4517 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R13_MASK) 4518 4519 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14_MASK (0x4000U) 4520 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14_SHIFT (14U) 4521 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14_WIDTH (1U) 4522 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R14_MASK) 4523 4524 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15_MASK (0x8000U) 4525 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15_SHIFT (15U) 4526 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15_WIDTH (1U) 4527 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R15_MASK) 4528 4529 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16_MASK (0x10000U) 4530 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16_SHIFT (16U) 4531 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16_WIDTH (1U) 4532 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R16_MASK) 4533 4534 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17_MASK (0x20000U) 4535 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17_SHIFT (17U) 4536 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17_WIDTH (1U) 4537 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R17_MASK) 4538 4539 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18_MASK (0x40000U) 4540 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18_SHIFT (18U) 4541 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18_WIDTH (1U) 4542 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R18_MASK) 4543 4544 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19_MASK (0x80000U) 4545 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19_SHIFT (19U) 4546 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19_WIDTH (1U) 4547 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R19_MASK) 4548 4549 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20_MASK (0x100000U) 4550 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20_SHIFT (20U) 4551 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20_WIDTH (1U) 4552 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R20_MASK) 4553 4554 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21_MASK (0x200000U) 4555 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21_SHIFT (21U) 4556 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21_WIDTH (1U) 4557 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R21_MASK) 4558 4559 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22_MASK (0x400000U) 4560 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22_SHIFT (22U) 4561 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22_WIDTH (1U) 4562 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R22_MASK) 4563 4564 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23_MASK (0x800000U) 4565 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23_SHIFT (23U) 4566 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23_WIDTH (1U) 4567 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R23_MASK) 4568 4569 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24_MASK (0x1000000U) 4570 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24_SHIFT (24U) 4571 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24_WIDTH (1U) 4572 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R24_MASK) 4573 4574 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25_MASK (0x2000000U) 4575 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25_SHIFT (25U) 4576 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25_WIDTH (1U) 4577 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R25_MASK) 4578 4579 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26_MASK (0x4000000U) 4580 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26_SHIFT (26U) 4581 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26_WIDTH (1U) 4582 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R26_MASK) 4583 4584 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27_MASK (0x8000000U) 4585 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27_SHIFT (27U) 4586 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27_WIDTH (1U) 4587 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R27_MASK) 4588 4589 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28_MASK (0x10000000U) 4590 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28_SHIFT (28U) 4591 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28_WIDTH (1U) 4592 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R28_MASK) 4593 4594 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29_MASK (0x20000000U) 4595 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29_SHIFT (29U) 4596 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29_WIDTH (1U) 4597 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R29_MASK) 4598 4599 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30_MASK (0x40000000U) 4600 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30_SHIFT (30U) 4601 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30_WIDTH (1U) 4602 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R30_MASK) 4603 4604 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31_MASK (0x80000000U) 4605 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31_SHIFT (31U) 4606 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31_WIDTH (1U) 4607 #define CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31_SHIFT)) & CANXL_FILTER_BANK_SAMRCFG1_SMSK0R31_MASK) 4608 /*! @} */ 4609 4610 /*! @name AAMRCFG1 - ADDR Acceptance Mask or Range Configuration */ 4611 /*! @{ */ 4612 4613 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0_MASK (0x1U) 4614 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0_SHIFT (0U) 4615 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0_WIDTH (1U) 4616 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R0_MASK) 4617 4618 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1_MASK (0x2U) 4619 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1_SHIFT (1U) 4620 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1_WIDTH (1U) 4621 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R1_MASK) 4622 4623 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2_MASK (0x4U) 4624 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2_SHIFT (2U) 4625 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2_WIDTH (1U) 4626 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R2_MASK) 4627 4628 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3_MASK (0x8U) 4629 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3_SHIFT (3U) 4630 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3_WIDTH (1U) 4631 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R3_MASK) 4632 4633 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4_MASK (0x10U) 4634 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4_SHIFT (4U) 4635 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4_WIDTH (1U) 4636 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R4_MASK) 4637 4638 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5_MASK (0x20U) 4639 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5_SHIFT (5U) 4640 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5_WIDTH (1U) 4641 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R5_MASK) 4642 4643 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6_MASK (0x40U) 4644 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6_SHIFT (6U) 4645 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6_WIDTH (1U) 4646 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R6_MASK) 4647 4648 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7_MASK (0x80U) 4649 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7_SHIFT (7U) 4650 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7_WIDTH (1U) 4651 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R7_MASK) 4652 4653 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8_MASK (0x100U) 4654 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8_SHIFT (8U) 4655 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8_WIDTH (1U) 4656 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R8_MASK) 4657 4658 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9_MASK (0x200U) 4659 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9_SHIFT (9U) 4660 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9_WIDTH (1U) 4661 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R9_MASK) 4662 4663 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10_MASK (0x400U) 4664 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10_SHIFT (10U) 4665 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10_WIDTH (1U) 4666 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R10_MASK) 4667 4668 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11_MASK (0x800U) 4669 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11_SHIFT (11U) 4670 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11_WIDTH (1U) 4671 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R11_MASK) 4672 4673 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12_MASK (0x1000U) 4674 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12_SHIFT (12U) 4675 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12_WIDTH (1U) 4676 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R12_MASK) 4677 4678 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13_MASK (0x2000U) 4679 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13_SHIFT (13U) 4680 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13_WIDTH (1U) 4681 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R13_MASK) 4682 4683 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14_MASK (0x4000U) 4684 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14_SHIFT (14U) 4685 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14_WIDTH (1U) 4686 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R14_MASK) 4687 4688 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15_MASK (0x8000U) 4689 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15_SHIFT (15U) 4690 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15_WIDTH (1U) 4691 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R15_MASK) 4692 4693 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16_MASK (0x10000U) 4694 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16_SHIFT (16U) 4695 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16_WIDTH (1U) 4696 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R16_MASK) 4697 4698 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17_MASK (0x20000U) 4699 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17_SHIFT (17U) 4700 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17_WIDTH (1U) 4701 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R17_MASK) 4702 4703 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18_MASK (0x40000U) 4704 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18_SHIFT (18U) 4705 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18_WIDTH (1U) 4706 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R18_MASK) 4707 4708 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19_MASK (0x80000U) 4709 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19_SHIFT (19U) 4710 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19_WIDTH (1U) 4711 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R19_MASK) 4712 4713 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20_MASK (0x100000U) 4714 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20_SHIFT (20U) 4715 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20_WIDTH (1U) 4716 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R20_MASK) 4717 4718 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21_MASK (0x200000U) 4719 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21_SHIFT (21U) 4720 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21_WIDTH (1U) 4721 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R21_MASK) 4722 4723 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22_MASK (0x400000U) 4724 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22_SHIFT (22U) 4725 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22_WIDTH (1U) 4726 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R22_MASK) 4727 4728 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23_MASK (0x800000U) 4729 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23_SHIFT (23U) 4730 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23_WIDTH (1U) 4731 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R23_MASK) 4732 4733 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24_MASK (0x1000000U) 4734 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24_SHIFT (24U) 4735 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24_WIDTH (1U) 4736 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R24_MASK) 4737 4738 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25_MASK (0x2000000U) 4739 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25_SHIFT (25U) 4740 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25_WIDTH (1U) 4741 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R25_MASK) 4742 4743 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26_MASK (0x4000000U) 4744 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26_SHIFT (26U) 4745 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26_WIDTH (1U) 4746 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R26_MASK) 4747 4748 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27_MASK (0x8000000U) 4749 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27_SHIFT (27U) 4750 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27_WIDTH (1U) 4751 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R27_MASK) 4752 4753 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28_MASK (0x10000000U) 4754 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28_SHIFT (28U) 4755 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28_WIDTH (1U) 4756 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R28_MASK) 4757 4758 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29_MASK (0x20000000U) 4759 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29_SHIFT (29U) 4760 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29_WIDTH (1U) 4761 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R29_MASK) 4762 4763 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30_MASK (0x40000000U) 4764 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30_SHIFT (30U) 4765 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30_WIDTH (1U) 4766 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R30_MASK) 4767 4768 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31_MASK (0x80000000U) 4769 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31_SHIFT (31U) 4770 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31_WIDTH (1U) 4771 #define CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31_SHIFT)) & CANXL_FILTER_BANK_AAMRCFG1_AMSK0R31_MASK) 4772 /*! @} */ 4773 4774 /*! @name VAFLT1_0 - VCAN Acceptance Filter */ 4775 /*! @{ */ 4776 4777 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_L_MASK (0xFFU) 4778 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_L_SHIFT (0U) 4779 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_L_WIDTH (8U) 4780 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_0_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_0_VCANa_L_MASK) 4781 4782 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_H_MASK (0xFF00U) 4783 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_H_SHIFT (8U) 4784 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_H_WIDTH (8U) 4785 #define CANXL_FILTER_BANK_VAFLT1_0_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_0_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_0_VCANa_H_MASK) 4786 4787 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_L_MASK (0xFF0000U) 4788 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_L_SHIFT (16U) 4789 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_L_WIDTH (8U) 4790 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_0_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_0_VCANb_L_MASK) 4791 4792 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_H_MASK (0xFF000000U) 4793 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_H_SHIFT (24U) 4794 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_H_WIDTH (8U) 4795 #define CANXL_FILTER_BANK_VAFLT1_0_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_0_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_0_VCANb_H_MASK) 4796 /*! @} */ 4797 4798 /*! @name VAFLT1_2 - VCAN Acceptance Filter */ 4799 /*! @{ */ 4800 4801 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_L_MASK (0xFFU) 4802 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_L_SHIFT (0U) 4803 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_L_WIDTH (8U) 4804 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_2_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_2_VCANa_L_MASK) 4805 4806 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_H_MASK (0xFF00U) 4807 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_H_SHIFT (8U) 4808 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_H_WIDTH (8U) 4809 #define CANXL_FILTER_BANK_VAFLT1_2_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_2_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_2_VCANa_H_MASK) 4810 4811 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_L_MASK (0xFF0000U) 4812 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_L_SHIFT (16U) 4813 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_L_WIDTH (8U) 4814 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_2_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_2_VCANb_L_MASK) 4815 4816 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_H_MASK (0xFF000000U) 4817 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_H_SHIFT (24U) 4818 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_H_WIDTH (8U) 4819 #define CANXL_FILTER_BANK_VAFLT1_2_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_2_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_2_VCANb_H_MASK) 4820 /*! @} */ 4821 4822 /*! @name VAFLT1_4 - VCAN Acceptance Filter */ 4823 /*! @{ */ 4824 4825 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_L_MASK (0xFFU) 4826 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_L_SHIFT (0U) 4827 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_L_WIDTH (8U) 4828 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_4_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_4_VCANa_L_MASK) 4829 4830 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_H_MASK (0xFF00U) 4831 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_H_SHIFT (8U) 4832 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_H_WIDTH (8U) 4833 #define CANXL_FILTER_BANK_VAFLT1_4_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_4_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_4_VCANa_H_MASK) 4834 4835 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_L_MASK (0xFF0000U) 4836 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_L_SHIFT (16U) 4837 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_L_WIDTH (8U) 4838 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_4_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_4_VCANb_L_MASK) 4839 4840 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_H_MASK (0xFF000000U) 4841 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_H_SHIFT (24U) 4842 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_H_WIDTH (8U) 4843 #define CANXL_FILTER_BANK_VAFLT1_4_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_4_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_4_VCANb_H_MASK) 4844 /*! @} */ 4845 4846 /*! @name VAFLT1_6 - VCAN Acceptance Filter */ 4847 /*! @{ */ 4848 4849 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_L_MASK (0xFFU) 4850 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_L_SHIFT (0U) 4851 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_L_WIDTH (8U) 4852 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_6_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_6_VCANa_L_MASK) 4853 4854 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_H_MASK (0xFF00U) 4855 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_H_SHIFT (8U) 4856 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_H_WIDTH (8U) 4857 #define CANXL_FILTER_BANK_VAFLT1_6_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_6_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_6_VCANa_H_MASK) 4858 4859 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_L_MASK (0xFF0000U) 4860 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_L_SHIFT (16U) 4861 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_L_WIDTH (8U) 4862 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_6_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_6_VCANb_L_MASK) 4863 4864 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_H_MASK (0xFF000000U) 4865 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_H_SHIFT (24U) 4866 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_H_WIDTH (8U) 4867 #define CANXL_FILTER_BANK_VAFLT1_6_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_6_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_6_VCANb_H_MASK) 4868 /*! @} */ 4869 4870 /*! @name VAFLT1_8 - VCAN Acceptance Filter */ 4871 /*! @{ */ 4872 4873 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_L_MASK (0xFFU) 4874 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_L_SHIFT (0U) 4875 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_L_WIDTH (8U) 4876 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_8_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_8_VCANa_L_MASK) 4877 4878 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_H_MASK (0xFF00U) 4879 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_H_SHIFT (8U) 4880 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_H_WIDTH (8U) 4881 #define CANXL_FILTER_BANK_VAFLT1_8_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_8_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_8_VCANa_H_MASK) 4882 4883 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_L_MASK (0xFF0000U) 4884 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_L_SHIFT (16U) 4885 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_L_WIDTH (8U) 4886 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_8_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_8_VCANb_L_MASK) 4887 4888 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_H_MASK (0xFF000000U) 4889 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_H_SHIFT (24U) 4890 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_H_WIDTH (8U) 4891 #define CANXL_FILTER_BANK_VAFLT1_8_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_8_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_8_VCANb_H_MASK) 4892 /*! @} */ 4893 4894 /*! @name VAFLT1_10 - VCAN Acceptance Filter */ 4895 /*! @{ */ 4896 4897 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_L_MASK (0xFFU) 4898 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_L_SHIFT (0U) 4899 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_L_WIDTH (8U) 4900 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_10_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_10_VCANa_L_MASK) 4901 4902 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_H_MASK (0xFF00U) 4903 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_H_SHIFT (8U) 4904 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_H_WIDTH (8U) 4905 #define CANXL_FILTER_BANK_VAFLT1_10_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_10_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_10_VCANa_H_MASK) 4906 4907 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_L_MASK (0xFF0000U) 4908 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_L_SHIFT (16U) 4909 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_L_WIDTH (8U) 4910 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_10_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_10_VCANb_L_MASK) 4911 4912 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_H_MASK (0xFF000000U) 4913 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_H_SHIFT (24U) 4914 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_H_WIDTH (8U) 4915 #define CANXL_FILTER_BANK_VAFLT1_10_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_10_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_10_VCANb_H_MASK) 4916 /*! @} */ 4917 4918 /*! @name VAFLT1_12 - VCAN Acceptance Filter */ 4919 /*! @{ */ 4920 4921 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_L_MASK (0xFFU) 4922 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_L_SHIFT (0U) 4923 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_L_WIDTH (8U) 4924 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_12_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_12_VCANa_L_MASK) 4925 4926 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_H_MASK (0xFF00U) 4927 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_H_SHIFT (8U) 4928 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_H_WIDTH (8U) 4929 #define CANXL_FILTER_BANK_VAFLT1_12_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_12_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_12_VCANa_H_MASK) 4930 4931 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_L_MASK (0xFF0000U) 4932 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_L_SHIFT (16U) 4933 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_L_WIDTH (8U) 4934 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_12_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_12_VCANb_L_MASK) 4935 4936 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_H_MASK (0xFF000000U) 4937 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_H_SHIFT (24U) 4938 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_H_WIDTH (8U) 4939 #define CANXL_FILTER_BANK_VAFLT1_12_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_12_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_12_VCANb_H_MASK) 4940 /*! @} */ 4941 4942 /*! @name VAFLT1_14 - VCAN Acceptance Filter */ 4943 /*! @{ */ 4944 4945 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_L_MASK (0xFFU) 4946 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_L_SHIFT (0U) 4947 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_L_WIDTH (8U) 4948 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_14_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_14_VCANa_L_MASK) 4949 4950 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_H_MASK (0xFF00U) 4951 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_H_SHIFT (8U) 4952 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_H_WIDTH (8U) 4953 #define CANXL_FILTER_BANK_VAFLT1_14_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_14_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_14_VCANa_H_MASK) 4954 4955 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_L_MASK (0xFF0000U) 4956 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_L_SHIFT (16U) 4957 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_L_WIDTH (8U) 4958 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_14_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_14_VCANb_L_MASK) 4959 4960 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_H_MASK (0xFF000000U) 4961 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_H_SHIFT (24U) 4962 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_H_WIDTH (8U) 4963 #define CANXL_FILTER_BANK_VAFLT1_14_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_14_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_14_VCANb_H_MASK) 4964 /*! @} */ 4965 4966 /*! @name VAFLT1_16 - VCAN Acceptance Filter */ 4967 /*! @{ */ 4968 4969 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_L_MASK (0xFFU) 4970 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_L_SHIFT (0U) 4971 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_L_WIDTH (8U) 4972 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_16_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_16_VCANa_L_MASK) 4973 4974 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_H_MASK (0xFF00U) 4975 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_H_SHIFT (8U) 4976 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_H_WIDTH (8U) 4977 #define CANXL_FILTER_BANK_VAFLT1_16_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_16_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_16_VCANa_H_MASK) 4978 4979 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_L_MASK (0xFF0000U) 4980 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_L_SHIFT (16U) 4981 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_L_WIDTH (8U) 4982 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_16_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_16_VCANb_L_MASK) 4983 4984 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_H_MASK (0xFF000000U) 4985 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_H_SHIFT (24U) 4986 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_H_WIDTH (8U) 4987 #define CANXL_FILTER_BANK_VAFLT1_16_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_16_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_16_VCANb_H_MASK) 4988 /*! @} */ 4989 4990 /*! @name VAFLT1_18 - VCAN Acceptance Filter */ 4991 /*! @{ */ 4992 4993 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_L_MASK (0xFFU) 4994 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_L_SHIFT (0U) 4995 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_L_WIDTH (8U) 4996 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_18_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_18_VCANa_L_MASK) 4997 4998 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_H_MASK (0xFF00U) 4999 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_H_SHIFT (8U) 5000 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_H_WIDTH (8U) 5001 #define CANXL_FILTER_BANK_VAFLT1_18_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_18_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_18_VCANa_H_MASK) 5002 5003 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_L_MASK (0xFF0000U) 5004 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_L_SHIFT (16U) 5005 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_L_WIDTH (8U) 5006 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_18_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_18_VCANb_L_MASK) 5007 5008 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_H_MASK (0xFF000000U) 5009 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_H_SHIFT (24U) 5010 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_H_WIDTH (8U) 5011 #define CANXL_FILTER_BANK_VAFLT1_18_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_18_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_18_VCANb_H_MASK) 5012 /*! @} */ 5013 5014 /*! @name VAFLT1_20 - VCAN Acceptance Filter */ 5015 /*! @{ */ 5016 5017 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_L_MASK (0xFFU) 5018 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_L_SHIFT (0U) 5019 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_L_WIDTH (8U) 5020 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_20_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_20_VCANa_L_MASK) 5021 5022 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_H_MASK (0xFF00U) 5023 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_H_SHIFT (8U) 5024 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_H_WIDTH (8U) 5025 #define CANXL_FILTER_BANK_VAFLT1_20_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_20_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_20_VCANa_H_MASK) 5026 5027 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_L_MASK (0xFF0000U) 5028 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_L_SHIFT (16U) 5029 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_L_WIDTH (8U) 5030 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_20_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_20_VCANb_L_MASK) 5031 5032 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_H_MASK (0xFF000000U) 5033 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_H_SHIFT (24U) 5034 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_H_WIDTH (8U) 5035 #define CANXL_FILTER_BANK_VAFLT1_20_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_20_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_20_VCANb_H_MASK) 5036 /*! @} */ 5037 5038 /*! @name VAFLT1_22 - VCAN Acceptance Filter */ 5039 /*! @{ */ 5040 5041 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_L_MASK (0xFFU) 5042 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_L_SHIFT (0U) 5043 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_L_WIDTH (8U) 5044 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_22_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_22_VCANa_L_MASK) 5045 5046 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_H_MASK (0xFF00U) 5047 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_H_SHIFT (8U) 5048 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_H_WIDTH (8U) 5049 #define CANXL_FILTER_BANK_VAFLT1_22_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_22_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_22_VCANa_H_MASK) 5050 5051 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_L_MASK (0xFF0000U) 5052 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_L_SHIFT (16U) 5053 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_L_WIDTH (8U) 5054 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_22_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_22_VCANb_L_MASK) 5055 5056 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_H_MASK (0xFF000000U) 5057 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_H_SHIFT (24U) 5058 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_H_WIDTH (8U) 5059 #define CANXL_FILTER_BANK_VAFLT1_22_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_22_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_22_VCANb_H_MASK) 5060 /*! @} */ 5061 5062 /*! @name VAFLT1_24 - VCAN Acceptance Filter */ 5063 /*! @{ */ 5064 5065 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_L_MASK (0xFFU) 5066 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_L_SHIFT (0U) 5067 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_L_WIDTH (8U) 5068 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_24_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_24_VCANa_L_MASK) 5069 5070 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_H_MASK (0xFF00U) 5071 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_H_SHIFT (8U) 5072 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_H_WIDTH (8U) 5073 #define CANXL_FILTER_BANK_VAFLT1_24_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_24_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_24_VCANa_H_MASK) 5074 5075 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_L_MASK (0xFF0000U) 5076 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_L_SHIFT (16U) 5077 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_L_WIDTH (8U) 5078 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_24_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_24_VCANb_L_MASK) 5079 5080 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_H_MASK (0xFF000000U) 5081 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_H_SHIFT (24U) 5082 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_H_WIDTH (8U) 5083 #define CANXL_FILTER_BANK_VAFLT1_24_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_24_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_24_VCANb_H_MASK) 5084 /*! @} */ 5085 5086 /*! @name VAFLT1_26 - VCAN Acceptance Filter */ 5087 /*! @{ */ 5088 5089 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_L_MASK (0xFFU) 5090 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_L_SHIFT (0U) 5091 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_L_WIDTH (8U) 5092 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_26_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_26_VCANa_L_MASK) 5093 5094 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_H_MASK (0xFF00U) 5095 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_H_SHIFT (8U) 5096 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_H_WIDTH (8U) 5097 #define CANXL_FILTER_BANK_VAFLT1_26_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_26_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_26_VCANa_H_MASK) 5098 5099 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_L_MASK (0xFF0000U) 5100 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_L_SHIFT (16U) 5101 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_L_WIDTH (8U) 5102 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_26_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_26_VCANb_L_MASK) 5103 5104 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_H_MASK (0xFF000000U) 5105 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_H_SHIFT (24U) 5106 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_H_WIDTH (8U) 5107 #define CANXL_FILTER_BANK_VAFLT1_26_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_26_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_26_VCANb_H_MASK) 5108 /*! @} */ 5109 5110 /*! @name VAFLT1_28 - VCAN Acceptance Filter */ 5111 /*! @{ */ 5112 5113 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_L_MASK (0xFFU) 5114 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_L_SHIFT (0U) 5115 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_L_WIDTH (8U) 5116 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_28_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_28_VCANa_L_MASK) 5117 5118 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_H_MASK (0xFF00U) 5119 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_H_SHIFT (8U) 5120 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_H_WIDTH (8U) 5121 #define CANXL_FILTER_BANK_VAFLT1_28_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_28_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_28_VCANa_H_MASK) 5122 5123 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_L_MASK (0xFF0000U) 5124 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_L_SHIFT (16U) 5125 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_L_WIDTH (8U) 5126 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_28_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_28_VCANb_L_MASK) 5127 5128 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_H_MASK (0xFF000000U) 5129 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_H_SHIFT (24U) 5130 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_H_WIDTH (8U) 5131 #define CANXL_FILTER_BANK_VAFLT1_28_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_28_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_28_VCANb_H_MASK) 5132 /*! @} */ 5133 5134 /*! @name VAFLT1_30 - VCAN Acceptance Filter */ 5135 /*! @{ */ 5136 5137 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_L_MASK (0xFFU) 5138 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_L_SHIFT (0U) 5139 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_L_WIDTH (8U) 5140 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_30_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_30_VCANa_L_MASK) 5141 5142 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_H_MASK (0xFF00U) 5143 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_H_SHIFT (8U) 5144 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_H_WIDTH (8U) 5145 #define CANXL_FILTER_BANK_VAFLT1_30_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_30_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_30_VCANa_H_MASK) 5146 5147 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_L_MASK (0xFF0000U) 5148 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_L_SHIFT (16U) 5149 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_L_WIDTH (8U) 5150 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_30_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_30_VCANb_L_MASK) 5151 5152 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_H_MASK (0xFF000000U) 5153 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_H_SHIFT (24U) 5154 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_H_WIDTH (8U) 5155 #define CANXL_FILTER_BANK_VAFLT1_30_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VAFLT1_30_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VAFLT1_30_VCANb_H_MASK) 5156 /*! @} */ 5157 5158 /*! @name SAFLT1_0 - SDU Acceptance Filter */ 5159 /*! @{ */ 5160 5161 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_L_MASK (0xFFU) 5162 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_L_SHIFT (0U) 5163 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_L_WIDTH (8U) 5164 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_0_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_0_SDUa_L_MASK) 5165 5166 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_H_MASK (0xFF00U) 5167 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_H_SHIFT (8U) 5168 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_H_WIDTH (8U) 5169 #define CANXL_FILTER_BANK_SAFLT1_0_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_0_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_0_SDUa_H_MASK) 5170 5171 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_L_MASK (0xFF0000U) 5172 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_L_SHIFT (16U) 5173 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_L_WIDTH (8U) 5174 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_0_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_0_SDUb_L_MASK) 5175 5176 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_H_MASK (0xFF000000U) 5177 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_H_SHIFT (24U) 5178 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_H_WIDTH (8U) 5179 #define CANXL_FILTER_BANK_SAFLT1_0_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_0_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_0_SDUb_H_MASK) 5180 /*! @} */ 5181 5182 /*! @name SAFLT1_2 - SDU Acceptance Filter */ 5183 /*! @{ */ 5184 5185 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_L_MASK (0xFFU) 5186 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_L_SHIFT (0U) 5187 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_L_WIDTH (8U) 5188 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_2_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_2_SDUa_L_MASK) 5189 5190 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_H_MASK (0xFF00U) 5191 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_H_SHIFT (8U) 5192 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_H_WIDTH (8U) 5193 #define CANXL_FILTER_BANK_SAFLT1_2_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_2_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_2_SDUa_H_MASK) 5194 5195 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_L_MASK (0xFF0000U) 5196 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_L_SHIFT (16U) 5197 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_L_WIDTH (8U) 5198 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_2_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_2_SDUb_L_MASK) 5199 5200 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_H_MASK (0xFF000000U) 5201 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_H_SHIFT (24U) 5202 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_H_WIDTH (8U) 5203 #define CANXL_FILTER_BANK_SAFLT1_2_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_2_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_2_SDUb_H_MASK) 5204 /*! @} */ 5205 5206 /*! @name SAFLT1_4 - SDU Acceptance Filter */ 5207 /*! @{ */ 5208 5209 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_L_MASK (0xFFU) 5210 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_L_SHIFT (0U) 5211 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_L_WIDTH (8U) 5212 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_4_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_4_SDUa_L_MASK) 5213 5214 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_H_MASK (0xFF00U) 5215 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_H_SHIFT (8U) 5216 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_H_WIDTH (8U) 5217 #define CANXL_FILTER_BANK_SAFLT1_4_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_4_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_4_SDUa_H_MASK) 5218 5219 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_L_MASK (0xFF0000U) 5220 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_L_SHIFT (16U) 5221 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_L_WIDTH (8U) 5222 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_4_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_4_SDUb_L_MASK) 5223 5224 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_H_MASK (0xFF000000U) 5225 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_H_SHIFT (24U) 5226 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_H_WIDTH (8U) 5227 #define CANXL_FILTER_BANK_SAFLT1_4_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_4_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_4_SDUb_H_MASK) 5228 /*! @} */ 5229 5230 /*! @name SAFLT1_6 - SDU Acceptance Filter */ 5231 /*! @{ */ 5232 5233 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_L_MASK (0xFFU) 5234 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_L_SHIFT (0U) 5235 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_L_WIDTH (8U) 5236 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_6_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_6_SDUa_L_MASK) 5237 5238 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_H_MASK (0xFF00U) 5239 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_H_SHIFT (8U) 5240 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_H_WIDTH (8U) 5241 #define CANXL_FILTER_BANK_SAFLT1_6_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_6_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_6_SDUa_H_MASK) 5242 5243 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_L_MASK (0xFF0000U) 5244 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_L_SHIFT (16U) 5245 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_L_WIDTH (8U) 5246 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_6_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_6_SDUb_L_MASK) 5247 5248 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_H_MASK (0xFF000000U) 5249 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_H_SHIFT (24U) 5250 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_H_WIDTH (8U) 5251 #define CANXL_FILTER_BANK_SAFLT1_6_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_6_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_6_SDUb_H_MASK) 5252 /*! @} */ 5253 5254 /*! @name SAFLT1_8 - SDU Acceptance Filter */ 5255 /*! @{ */ 5256 5257 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_L_MASK (0xFFU) 5258 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_L_SHIFT (0U) 5259 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_L_WIDTH (8U) 5260 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_8_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_8_SDUa_L_MASK) 5261 5262 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_H_MASK (0xFF00U) 5263 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_H_SHIFT (8U) 5264 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_H_WIDTH (8U) 5265 #define CANXL_FILTER_BANK_SAFLT1_8_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_8_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_8_SDUa_H_MASK) 5266 5267 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_L_MASK (0xFF0000U) 5268 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_L_SHIFT (16U) 5269 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_L_WIDTH (8U) 5270 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_8_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_8_SDUb_L_MASK) 5271 5272 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_H_MASK (0xFF000000U) 5273 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_H_SHIFT (24U) 5274 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_H_WIDTH (8U) 5275 #define CANXL_FILTER_BANK_SAFLT1_8_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_8_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_8_SDUb_H_MASK) 5276 /*! @} */ 5277 5278 /*! @name SAFLT1_10 - SDU Acceptance Filter */ 5279 /*! @{ */ 5280 5281 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_L_MASK (0xFFU) 5282 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_L_SHIFT (0U) 5283 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_L_WIDTH (8U) 5284 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_10_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_10_SDUa_L_MASK) 5285 5286 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_H_MASK (0xFF00U) 5287 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_H_SHIFT (8U) 5288 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_H_WIDTH (8U) 5289 #define CANXL_FILTER_BANK_SAFLT1_10_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_10_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_10_SDUa_H_MASK) 5290 5291 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_L_MASK (0xFF0000U) 5292 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_L_SHIFT (16U) 5293 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_L_WIDTH (8U) 5294 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_10_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_10_SDUb_L_MASK) 5295 5296 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_H_MASK (0xFF000000U) 5297 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_H_SHIFT (24U) 5298 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_H_WIDTH (8U) 5299 #define CANXL_FILTER_BANK_SAFLT1_10_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_10_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_10_SDUb_H_MASK) 5300 /*! @} */ 5301 5302 /*! @name SAFLT1_12 - SDU Acceptance Filter */ 5303 /*! @{ */ 5304 5305 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_L_MASK (0xFFU) 5306 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_L_SHIFT (0U) 5307 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_L_WIDTH (8U) 5308 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_12_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_12_SDUa_L_MASK) 5309 5310 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_H_MASK (0xFF00U) 5311 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_H_SHIFT (8U) 5312 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_H_WIDTH (8U) 5313 #define CANXL_FILTER_BANK_SAFLT1_12_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_12_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_12_SDUa_H_MASK) 5314 5315 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_L_MASK (0xFF0000U) 5316 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_L_SHIFT (16U) 5317 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_L_WIDTH (8U) 5318 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_12_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_12_SDUb_L_MASK) 5319 5320 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_H_MASK (0xFF000000U) 5321 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_H_SHIFT (24U) 5322 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_H_WIDTH (8U) 5323 #define CANXL_FILTER_BANK_SAFLT1_12_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_12_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_12_SDUb_H_MASK) 5324 /*! @} */ 5325 5326 /*! @name SAFLT1_14 - SDU Acceptance Filter */ 5327 /*! @{ */ 5328 5329 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_L_MASK (0xFFU) 5330 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_L_SHIFT (0U) 5331 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_L_WIDTH (8U) 5332 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_14_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_14_SDUa_L_MASK) 5333 5334 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_H_MASK (0xFF00U) 5335 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_H_SHIFT (8U) 5336 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_H_WIDTH (8U) 5337 #define CANXL_FILTER_BANK_SAFLT1_14_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_14_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_14_SDUa_H_MASK) 5338 5339 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_L_MASK (0xFF0000U) 5340 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_L_SHIFT (16U) 5341 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_L_WIDTH (8U) 5342 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_14_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_14_SDUb_L_MASK) 5343 5344 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_H_MASK (0xFF000000U) 5345 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_H_SHIFT (24U) 5346 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_H_WIDTH (8U) 5347 #define CANXL_FILTER_BANK_SAFLT1_14_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_14_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_14_SDUb_H_MASK) 5348 /*! @} */ 5349 5350 /*! @name SAFLT1_16 - SDU Acceptance Filter */ 5351 /*! @{ */ 5352 5353 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_L_MASK (0xFFU) 5354 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_L_SHIFT (0U) 5355 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_L_WIDTH (8U) 5356 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_16_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_16_SDUa_L_MASK) 5357 5358 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_H_MASK (0xFF00U) 5359 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_H_SHIFT (8U) 5360 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_H_WIDTH (8U) 5361 #define CANXL_FILTER_BANK_SAFLT1_16_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_16_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_16_SDUa_H_MASK) 5362 5363 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_L_MASK (0xFF0000U) 5364 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_L_SHIFT (16U) 5365 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_L_WIDTH (8U) 5366 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_16_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_16_SDUb_L_MASK) 5367 5368 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_H_MASK (0xFF000000U) 5369 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_H_SHIFT (24U) 5370 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_H_WIDTH (8U) 5371 #define CANXL_FILTER_BANK_SAFLT1_16_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_16_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_16_SDUb_H_MASK) 5372 /*! @} */ 5373 5374 /*! @name SAFLT1_18 - SDU Acceptance Filter */ 5375 /*! @{ */ 5376 5377 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_L_MASK (0xFFU) 5378 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_L_SHIFT (0U) 5379 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_L_WIDTH (8U) 5380 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_18_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_18_SDUa_L_MASK) 5381 5382 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_H_MASK (0xFF00U) 5383 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_H_SHIFT (8U) 5384 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_H_WIDTH (8U) 5385 #define CANXL_FILTER_BANK_SAFLT1_18_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_18_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_18_SDUa_H_MASK) 5386 5387 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_L_MASK (0xFF0000U) 5388 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_L_SHIFT (16U) 5389 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_L_WIDTH (8U) 5390 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_18_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_18_SDUb_L_MASK) 5391 5392 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_H_MASK (0xFF000000U) 5393 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_H_SHIFT (24U) 5394 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_H_WIDTH (8U) 5395 #define CANXL_FILTER_BANK_SAFLT1_18_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_18_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_18_SDUb_H_MASK) 5396 /*! @} */ 5397 5398 /*! @name SAFLT1_20 - SDU Acceptance Filter */ 5399 /*! @{ */ 5400 5401 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_L_MASK (0xFFU) 5402 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_L_SHIFT (0U) 5403 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_L_WIDTH (8U) 5404 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_20_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_20_SDUa_L_MASK) 5405 5406 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_H_MASK (0xFF00U) 5407 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_H_SHIFT (8U) 5408 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_H_WIDTH (8U) 5409 #define CANXL_FILTER_BANK_SAFLT1_20_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_20_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_20_SDUa_H_MASK) 5410 5411 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_L_MASK (0xFF0000U) 5412 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_L_SHIFT (16U) 5413 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_L_WIDTH (8U) 5414 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_20_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_20_SDUb_L_MASK) 5415 5416 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_H_MASK (0xFF000000U) 5417 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_H_SHIFT (24U) 5418 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_H_WIDTH (8U) 5419 #define CANXL_FILTER_BANK_SAFLT1_20_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_20_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_20_SDUb_H_MASK) 5420 /*! @} */ 5421 5422 /*! @name SAFLT1_22 - SDU Acceptance Filter */ 5423 /*! @{ */ 5424 5425 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_L_MASK (0xFFU) 5426 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_L_SHIFT (0U) 5427 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_L_WIDTH (8U) 5428 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_22_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_22_SDUa_L_MASK) 5429 5430 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_H_MASK (0xFF00U) 5431 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_H_SHIFT (8U) 5432 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_H_WIDTH (8U) 5433 #define CANXL_FILTER_BANK_SAFLT1_22_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_22_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_22_SDUa_H_MASK) 5434 5435 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_L_MASK (0xFF0000U) 5436 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_L_SHIFT (16U) 5437 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_L_WIDTH (8U) 5438 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_22_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_22_SDUb_L_MASK) 5439 5440 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_H_MASK (0xFF000000U) 5441 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_H_SHIFT (24U) 5442 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_H_WIDTH (8U) 5443 #define CANXL_FILTER_BANK_SAFLT1_22_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_22_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_22_SDUb_H_MASK) 5444 /*! @} */ 5445 5446 /*! @name SAFLT1_24 - SDU Acceptance Filter */ 5447 /*! @{ */ 5448 5449 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_L_MASK (0xFFU) 5450 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_L_SHIFT (0U) 5451 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_L_WIDTH (8U) 5452 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_24_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_24_SDUa_L_MASK) 5453 5454 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_H_MASK (0xFF00U) 5455 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_H_SHIFT (8U) 5456 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_H_WIDTH (8U) 5457 #define CANXL_FILTER_BANK_SAFLT1_24_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_24_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_24_SDUa_H_MASK) 5458 5459 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_L_MASK (0xFF0000U) 5460 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_L_SHIFT (16U) 5461 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_L_WIDTH (8U) 5462 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_24_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_24_SDUb_L_MASK) 5463 5464 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_H_MASK (0xFF000000U) 5465 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_H_SHIFT (24U) 5466 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_H_WIDTH (8U) 5467 #define CANXL_FILTER_BANK_SAFLT1_24_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_24_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_24_SDUb_H_MASK) 5468 /*! @} */ 5469 5470 /*! @name SAFLT1_26 - SDU Acceptance Filter */ 5471 /*! @{ */ 5472 5473 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_L_MASK (0xFFU) 5474 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_L_SHIFT (0U) 5475 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_L_WIDTH (8U) 5476 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_26_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_26_SDUa_L_MASK) 5477 5478 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_H_MASK (0xFF00U) 5479 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_H_SHIFT (8U) 5480 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_H_WIDTH (8U) 5481 #define CANXL_FILTER_BANK_SAFLT1_26_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_26_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_26_SDUa_H_MASK) 5482 5483 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_L_MASK (0xFF0000U) 5484 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_L_SHIFT (16U) 5485 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_L_WIDTH (8U) 5486 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_26_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_26_SDUb_L_MASK) 5487 5488 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_H_MASK (0xFF000000U) 5489 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_H_SHIFT (24U) 5490 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_H_WIDTH (8U) 5491 #define CANXL_FILTER_BANK_SAFLT1_26_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_26_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_26_SDUb_H_MASK) 5492 /*! @} */ 5493 5494 /*! @name SAFLT1_28 - SDU Acceptance Filter */ 5495 /*! @{ */ 5496 5497 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_L_MASK (0xFFU) 5498 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_L_SHIFT (0U) 5499 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_L_WIDTH (8U) 5500 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_28_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_28_SDUa_L_MASK) 5501 5502 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_H_MASK (0xFF00U) 5503 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_H_SHIFT (8U) 5504 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_H_WIDTH (8U) 5505 #define CANXL_FILTER_BANK_SAFLT1_28_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_28_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_28_SDUa_H_MASK) 5506 5507 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_L_MASK (0xFF0000U) 5508 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_L_SHIFT (16U) 5509 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_L_WIDTH (8U) 5510 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_28_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_28_SDUb_L_MASK) 5511 5512 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_H_MASK (0xFF000000U) 5513 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_H_SHIFT (24U) 5514 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_H_WIDTH (8U) 5515 #define CANXL_FILTER_BANK_SAFLT1_28_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_28_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_28_SDUb_H_MASK) 5516 /*! @} */ 5517 5518 /*! @name SAFLT1_30 - SDU Acceptance Filter */ 5519 /*! @{ */ 5520 5521 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_L_MASK (0xFFU) 5522 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_L_SHIFT (0U) 5523 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_L_WIDTH (8U) 5524 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_30_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_30_SDUa_L_MASK) 5525 5526 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_H_MASK (0xFF00U) 5527 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_H_SHIFT (8U) 5528 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_H_WIDTH (8U) 5529 #define CANXL_FILTER_BANK_SAFLT1_30_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_30_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_30_SDUa_H_MASK) 5530 5531 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_L_MASK (0xFF0000U) 5532 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_L_SHIFT (16U) 5533 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_L_WIDTH (8U) 5534 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_30_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_30_SDUb_L_MASK) 5535 5536 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_H_MASK (0xFF000000U) 5537 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_H_SHIFT (24U) 5538 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_H_WIDTH (8U) 5539 #define CANXL_FILTER_BANK_SAFLT1_30_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SAFLT1_30_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SAFLT1_30_SDUb_H_MASK) 5540 /*! @} */ 5541 5542 /*! @name AAFLT1_0L - ADDR Acceptance Filter Low */ 5543 /*! @{ */ 5544 5545 #define CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L_MASK (0xFFFFFFFFU) 5546 #define CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L_SHIFT (0U) 5547 #define CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L_WIDTH (32U) 5548 #define CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_0L_ADDRn_L_MASK) 5549 /*! @} */ 5550 5551 /*! @name AAFLT1_0H - ADDR Acceptance Filter High */ 5552 /*! @{ */ 5553 5554 #define CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H_MASK (0xFFFFFFFFU) 5555 #define CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H_SHIFT (0U) 5556 #define CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H_WIDTH (32U) 5557 #define CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_0H_ADDRn_H_MASK) 5558 /*! @} */ 5559 5560 /*! @name AAFLT1_1L - ADDR Acceptance Filter Low */ 5561 /*! @{ */ 5562 5563 #define CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L_MASK (0xFFFFFFFFU) 5564 #define CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L_SHIFT (0U) 5565 #define CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L_WIDTH (32U) 5566 #define CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_1L_ADDRn_L_MASK) 5567 /*! @} */ 5568 5569 /*! @name AAFLT1_1H - ADDR Acceptance Filter High */ 5570 /*! @{ */ 5571 5572 #define CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H_MASK (0xFFFFFFFFU) 5573 #define CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H_SHIFT (0U) 5574 #define CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H_WIDTH (32U) 5575 #define CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_1H_ADDRn_H_MASK) 5576 /*! @} */ 5577 5578 /*! @name AAFLT1_2L - ADDR Acceptance Filter Low */ 5579 /*! @{ */ 5580 5581 #define CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L_MASK (0xFFFFFFFFU) 5582 #define CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L_SHIFT (0U) 5583 #define CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L_WIDTH (32U) 5584 #define CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_2L_ADDRn_L_MASK) 5585 /*! @} */ 5586 5587 /*! @name AAFLT1_2H - ADDR Acceptance Filter High */ 5588 /*! @{ */ 5589 5590 #define CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H_MASK (0xFFFFFFFFU) 5591 #define CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H_SHIFT (0U) 5592 #define CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H_WIDTH (32U) 5593 #define CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_2H_ADDRn_H_MASK) 5594 /*! @} */ 5595 5596 /*! @name AAFLT1_3L - ADDR Acceptance Filter Low */ 5597 /*! @{ */ 5598 5599 #define CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L_MASK (0xFFFFFFFFU) 5600 #define CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L_SHIFT (0U) 5601 #define CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L_WIDTH (32U) 5602 #define CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_3L_ADDRn_L_MASK) 5603 /*! @} */ 5604 5605 /*! @name AAFLT1_3H - ADDR Acceptance Filter High */ 5606 /*! @{ */ 5607 5608 #define CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H_MASK (0xFFFFFFFFU) 5609 #define CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H_SHIFT (0U) 5610 #define CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H_WIDTH (32U) 5611 #define CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_3H_ADDRn_H_MASK) 5612 /*! @} */ 5613 5614 /*! @name AAFLT1_4L - ADDR Acceptance Filter Low */ 5615 /*! @{ */ 5616 5617 #define CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L_MASK (0xFFFFFFFFU) 5618 #define CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L_SHIFT (0U) 5619 #define CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L_WIDTH (32U) 5620 #define CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_4L_ADDRn_L_MASK) 5621 /*! @} */ 5622 5623 /*! @name AAFLT1_4H - ADDR Acceptance Filter High */ 5624 /*! @{ */ 5625 5626 #define CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H_MASK (0xFFFFFFFFU) 5627 #define CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H_SHIFT (0U) 5628 #define CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H_WIDTH (32U) 5629 #define CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_4H_ADDRn_H_MASK) 5630 /*! @} */ 5631 5632 /*! @name AAFLT1_5L - ADDR Acceptance Filter Low */ 5633 /*! @{ */ 5634 5635 #define CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L_MASK (0xFFFFFFFFU) 5636 #define CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L_SHIFT (0U) 5637 #define CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L_WIDTH (32U) 5638 #define CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_5L_ADDRn_L_MASK) 5639 /*! @} */ 5640 5641 /*! @name AAFLT1_5H - ADDR Acceptance Filter High */ 5642 /*! @{ */ 5643 5644 #define CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H_MASK (0xFFFFFFFFU) 5645 #define CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H_SHIFT (0U) 5646 #define CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H_WIDTH (32U) 5647 #define CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_5H_ADDRn_H_MASK) 5648 /*! @} */ 5649 5650 /*! @name AAFLT1_6L - ADDR Acceptance Filter Low */ 5651 /*! @{ */ 5652 5653 #define CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L_MASK (0xFFFFFFFFU) 5654 #define CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L_SHIFT (0U) 5655 #define CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L_WIDTH (32U) 5656 #define CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_6L_ADDRn_L_MASK) 5657 /*! @} */ 5658 5659 /*! @name AAFLT1_6H - ADDR Acceptance Filter High */ 5660 /*! @{ */ 5661 5662 #define CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H_MASK (0xFFFFFFFFU) 5663 #define CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H_SHIFT (0U) 5664 #define CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H_WIDTH (32U) 5665 #define CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_6H_ADDRn_H_MASK) 5666 /*! @} */ 5667 5668 /*! @name AAFLT1_7L - ADDR Acceptance Filter Low */ 5669 /*! @{ */ 5670 5671 #define CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L_MASK (0xFFFFFFFFU) 5672 #define CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L_SHIFT (0U) 5673 #define CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L_WIDTH (32U) 5674 #define CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_7L_ADDRn_L_MASK) 5675 /*! @} */ 5676 5677 /*! @name AAFLT1_7H - ADDR Acceptance Filter High */ 5678 /*! @{ */ 5679 5680 #define CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H_MASK (0xFFFFFFFFU) 5681 #define CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H_SHIFT (0U) 5682 #define CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H_WIDTH (32U) 5683 #define CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_7H_ADDRn_H_MASK) 5684 /*! @} */ 5685 5686 /*! @name AAFLT1_8L - ADDR Acceptance Filter Low */ 5687 /*! @{ */ 5688 5689 #define CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L_MASK (0xFFFFFFFFU) 5690 #define CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L_SHIFT (0U) 5691 #define CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L_WIDTH (32U) 5692 #define CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_8L_ADDRn_L_MASK) 5693 /*! @} */ 5694 5695 /*! @name AAFLT1_8H - ADDR Acceptance Filter High */ 5696 /*! @{ */ 5697 5698 #define CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H_MASK (0xFFFFFFFFU) 5699 #define CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H_SHIFT (0U) 5700 #define CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H_WIDTH (32U) 5701 #define CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_8H_ADDRn_H_MASK) 5702 /*! @} */ 5703 5704 /*! @name AAFLT1_9L - ADDR Acceptance Filter Low */ 5705 /*! @{ */ 5706 5707 #define CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L_MASK (0xFFFFFFFFU) 5708 #define CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L_SHIFT (0U) 5709 #define CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L_WIDTH (32U) 5710 #define CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_9L_ADDRn_L_MASK) 5711 /*! @} */ 5712 5713 /*! @name AAFLT1_9H - ADDR Acceptance Filter High */ 5714 /*! @{ */ 5715 5716 #define CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H_MASK (0xFFFFFFFFU) 5717 #define CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H_SHIFT (0U) 5718 #define CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H_WIDTH (32U) 5719 #define CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_9H_ADDRn_H_MASK) 5720 /*! @} */ 5721 5722 /*! @name AAFLT1_10L - ADDR Acceptance Filter Low */ 5723 /*! @{ */ 5724 5725 #define CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L_MASK (0xFFFFFFFFU) 5726 #define CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L_SHIFT (0U) 5727 #define CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L_WIDTH (32U) 5728 #define CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_10L_ADDRn_L_MASK) 5729 /*! @} */ 5730 5731 /*! @name AAFLT1_10H - ADDR Acceptance Filter High */ 5732 /*! @{ */ 5733 5734 #define CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H_MASK (0xFFFFFFFFU) 5735 #define CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H_SHIFT (0U) 5736 #define CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H_WIDTH (32U) 5737 #define CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_10H_ADDRn_H_MASK) 5738 /*! @} */ 5739 5740 /*! @name AAFLT1_11L - ADDR Acceptance Filter Low */ 5741 /*! @{ */ 5742 5743 #define CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L_MASK (0xFFFFFFFFU) 5744 #define CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L_SHIFT (0U) 5745 #define CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L_WIDTH (32U) 5746 #define CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_11L_ADDRn_L_MASK) 5747 /*! @} */ 5748 5749 /*! @name AAFLT1_11H - ADDR Acceptance Filter High */ 5750 /*! @{ */ 5751 5752 #define CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H_MASK (0xFFFFFFFFU) 5753 #define CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H_SHIFT (0U) 5754 #define CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H_WIDTH (32U) 5755 #define CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_11H_ADDRn_H_MASK) 5756 /*! @} */ 5757 5758 /*! @name AAFLT1_12L - ADDR Acceptance Filter Low */ 5759 /*! @{ */ 5760 5761 #define CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L_MASK (0xFFFFFFFFU) 5762 #define CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L_SHIFT (0U) 5763 #define CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L_WIDTH (32U) 5764 #define CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_12L_ADDRn_L_MASK) 5765 /*! @} */ 5766 5767 /*! @name AAFLT1_12H - ADDR Acceptance Filter High */ 5768 /*! @{ */ 5769 5770 #define CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H_MASK (0xFFFFFFFFU) 5771 #define CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H_SHIFT (0U) 5772 #define CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H_WIDTH (32U) 5773 #define CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_12H_ADDRn_H_MASK) 5774 /*! @} */ 5775 5776 /*! @name AAFLT1_13L - ADDR Acceptance Filter Low */ 5777 /*! @{ */ 5778 5779 #define CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L_MASK (0xFFFFFFFFU) 5780 #define CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L_SHIFT (0U) 5781 #define CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L_WIDTH (32U) 5782 #define CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_13L_ADDRn_L_MASK) 5783 /*! @} */ 5784 5785 /*! @name AAFLT1_13H - ADDR Acceptance Filter High */ 5786 /*! @{ */ 5787 5788 #define CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H_MASK (0xFFFFFFFFU) 5789 #define CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H_SHIFT (0U) 5790 #define CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H_WIDTH (32U) 5791 #define CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_13H_ADDRn_H_MASK) 5792 /*! @} */ 5793 5794 /*! @name AAFLT1_14L - ADDR Acceptance Filter Low */ 5795 /*! @{ */ 5796 5797 #define CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L_MASK (0xFFFFFFFFU) 5798 #define CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L_SHIFT (0U) 5799 #define CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L_WIDTH (32U) 5800 #define CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_14L_ADDRn_L_MASK) 5801 /*! @} */ 5802 5803 /*! @name AAFLT1_14H - ADDR Acceptance Filter High */ 5804 /*! @{ */ 5805 5806 #define CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H_MASK (0xFFFFFFFFU) 5807 #define CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H_SHIFT (0U) 5808 #define CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H_WIDTH (32U) 5809 #define CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_14H_ADDRn_H_MASK) 5810 /*! @} */ 5811 5812 /*! @name AAFLT1_15L - ADDR Acceptance Filter Low */ 5813 /*! @{ */ 5814 5815 #define CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L_MASK (0xFFFFFFFFU) 5816 #define CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L_SHIFT (0U) 5817 #define CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L_WIDTH (32U) 5818 #define CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_15L_ADDRn_L_MASK) 5819 /*! @} */ 5820 5821 /*! @name AAFLT1_15H - ADDR Acceptance Filter High */ 5822 /*! @{ */ 5823 5824 #define CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H_MASK (0xFFFFFFFFU) 5825 #define CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H_SHIFT (0U) 5826 #define CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H_WIDTH (32U) 5827 #define CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_15H_ADDRn_H_MASK) 5828 /*! @} */ 5829 5830 /*! @name AAFLT1_16L - ADDR Acceptance Filter Low */ 5831 /*! @{ */ 5832 5833 #define CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L_MASK (0xFFFFFFFFU) 5834 #define CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L_SHIFT (0U) 5835 #define CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L_WIDTH (32U) 5836 #define CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_16L_ADDRn_L_MASK) 5837 /*! @} */ 5838 5839 /*! @name AAFLT1_16H - ADDR Acceptance Filter High */ 5840 /*! @{ */ 5841 5842 #define CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H_MASK (0xFFFFFFFFU) 5843 #define CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H_SHIFT (0U) 5844 #define CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H_WIDTH (32U) 5845 #define CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_16H_ADDRn_H_MASK) 5846 /*! @} */ 5847 5848 /*! @name AAFLT1_17L - ADDR Acceptance Filter Low */ 5849 /*! @{ */ 5850 5851 #define CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L_MASK (0xFFFFFFFFU) 5852 #define CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L_SHIFT (0U) 5853 #define CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L_WIDTH (32U) 5854 #define CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_17L_ADDRn_L_MASK) 5855 /*! @} */ 5856 5857 /*! @name AAFLT1_17H - ADDR Acceptance Filter High */ 5858 /*! @{ */ 5859 5860 #define CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H_MASK (0xFFFFFFFFU) 5861 #define CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H_SHIFT (0U) 5862 #define CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H_WIDTH (32U) 5863 #define CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_17H_ADDRn_H_MASK) 5864 /*! @} */ 5865 5866 /*! @name AAFLT1_18L - ADDR Acceptance Filter Low */ 5867 /*! @{ */ 5868 5869 #define CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L_MASK (0xFFFFFFFFU) 5870 #define CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L_SHIFT (0U) 5871 #define CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L_WIDTH (32U) 5872 #define CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_18L_ADDRn_L_MASK) 5873 /*! @} */ 5874 5875 /*! @name AAFLT1_18H - ADDR Acceptance Filter High */ 5876 /*! @{ */ 5877 5878 #define CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H_MASK (0xFFFFFFFFU) 5879 #define CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H_SHIFT (0U) 5880 #define CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H_WIDTH (32U) 5881 #define CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_18H_ADDRn_H_MASK) 5882 /*! @} */ 5883 5884 /*! @name AAFLT1_19L - ADDR Acceptance Filter Low */ 5885 /*! @{ */ 5886 5887 #define CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L_MASK (0xFFFFFFFFU) 5888 #define CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L_SHIFT (0U) 5889 #define CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L_WIDTH (32U) 5890 #define CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_19L_ADDRn_L_MASK) 5891 /*! @} */ 5892 5893 /*! @name AAFLT1_19H - ADDR Acceptance Filter High */ 5894 /*! @{ */ 5895 5896 #define CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H_MASK (0xFFFFFFFFU) 5897 #define CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H_SHIFT (0U) 5898 #define CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H_WIDTH (32U) 5899 #define CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_19H_ADDRn_H_MASK) 5900 /*! @} */ 5901 5902 /*! @name AAFLT1_20L - ADDR Acceptance Filter Low */ 5903 /*! @{ */ 5904 5905 #define CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L_MASK (0xFFFFFFFFU) 5906 #define CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L_SHIFT (0U) 5907 #define CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L_WIDTH (32U) 5908 #define CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_20L_ADDRn_L_MASK) 5909 /*! @} */ 5910 5911 /*! @name AAFLT1_20H - ADDR Acceptance Filter High */ 5912 /*! @{ */ 5913 5914 #define CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H_MASK (0xFFFFFFFFU) 5915 #define CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H_SHIFT (0U) 5916 #define CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H_WIDTH (32U) 5917 #define CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_20H_ADDRn_H_MASK) 5918 /*! @} */ 5919 5920 /*! @name AAFLT1_21L - ADDR Acceptance Filter Low */ 5921 /*! @{ */ 5922 5923 #define CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L_MASK (0xFFFFFFFFU) 5924 #define CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L_SHIFT (0U) 5925 #define CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L_WIDTH (32U) 5926 #define CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_21L_ADDRn_L_MASK) 5927 /*! @} */ 5928 5929 /*! @name AAFLT1_21H - ADDR Acceptance Filter High */ 5930 /*! @{ */ 5931 5932 #define CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H_MASK (0xFFFFFFFFU) 5933 #define CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H_SHIFT (0U) 5934 #define CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H_WIDTH (32U) 5935 #define CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_21H_ADDRn_H_MASK) 5936 /*! @} */ 5937 5938 /*! @name AAFLT1_22L - ADDR Acceptance Filter Low */ 5939 /*! @{ */ 5940 5941 #define CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L_MASK (0xFFFFFFFFU) 5942 #define CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L_SHIFT (0U) 5943 #define CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L_WIDTH (32U) 5944 #define CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_22L_ADDRn_L_MASK) 5945 /*! @} */ 5946 5947 /*! @name AAFLT1_22H - ADDR Acceptance Filter High */ 5948 /*! @{ */ 5949 5950 #define CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H_MASK (0xFFFFFFFFU) 5951 #define CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H_SHIFT (0U) 5952 #define CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H_WIDTH (32U) 5953 #define CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_22H_ADDRn_H_MASK) 5954 /*! @} */ 5955 5956 /*! @name AAFLT1_23L - ADDR Acceptance Filter Low */ 5957 /*! @{ */ 5958 5959 #define CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L_MASK (0xFFFFFFFFU) 5960 #define CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L_SHIFT (0U) 5961 #define CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L_WIDTH (32U) 5962 #define CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_23L_ADDRn_L_MASK) 5963 /*! @} */ 5964 5965 /*! @name AAFLT1_23H - ADDR Acceptance Filter High */ 5966 /*! @{ */ 5967 5968 #define CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H_MASK (0xFFFFFFFFU) 5969 #define CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H_SHIFT (0U) 5970 #define CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H_WIDTH (32U) 5971 #define CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_23H_ADDRn_H_MASK) 5972 /*! @} */ 5973 5974 /*! @name AAFLT1_24L - ADDR Acceptance Filter Low */ 5975 /*! @{ */ 5976 5977 #define CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L_MASK (0xFFFFFFFFU) 5978 #define CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L_SHIFT (0U) 5979 #define CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L_WIDTH (32U) 5980 #define CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_24L_ADDRn_L_MASK) 5981 /*! @} */ 5982 5983 /*! @name AAFLT1_24H - ADDR Acceptance Filter High */ 5984 /*! @{ */ 5985 5986 #define CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H_MASK (0xFFFFFFFFU) 5987 #define CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H_SHIFT (0U) 5988 #define CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H_WIDTH (32U) 5989 #define CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_24H_ADDRn_H_MASK) 5990 /*! @} */ 5991 5992 /*! @name AAFLT1_25L - ADDR Acceptance Filter Low */ 5993 /*! @{ */ 5994 5995 #define CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L_MASK (0xFFFFFFFFU) 5996 #define CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L_SHIFT (0U) 5997 #define CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L_WIDTH (32U) 5998 #define CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_25L_ADDRn_L_MASK) 5999 /*! @} */ 6000 6001 /*! @name AAFLT1_25H - ADDR Acceptance Filter High */ 6002 /*! @{ */ 6003 6004 #define CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H_MASK (0xFFFFFFFFU) 6005 #define CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H_SHIFT (0U) 6006 #define CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H_WIDTH (32U) 6007 #define CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_25H_ADDRn_H_MASK) 6008 /*! @} */ 6009 6010 /*! @name AAFLT1_26L - ADDR Acceptance Filter Low */ 6011 /*! @{ */ 6012 6013 #define CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L_MASK (0xFFFFFFFFU) 6014 #define CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L_SHIFT (0U) 6015 #define CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L_WIDTH (32U) 6016 #define CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_26L_ADDRn_L_MASK) 6017 /*! @} */ 6018 6019 /*! @name AAFLT1_26H - ADDR Acceptance Filter High */ 6020 /*! @{ */ 6021 6022 #define CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H_MASK (0xFFFFFFFFU) 6023 #define CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H_SHIFT (0U) 6024 #define CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H_WIDTH (32U) 6025 #define CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_26H_ADDRn_H_MASK) 6026 /*! @} */ 6027 6028 /*! @name AAFLT1_27L - ADDR Acceptance Filter Low */ 6029 /*! @{ */ 6030 6031 #define CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L_MASK (0xFFFFFFFFU) 6032 #define CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L_SHIFT (0U) 6033 #define CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L_WIDTH (32U) 6034 #define CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_27L_ADDRn_L_MASK) 6035 /*! @} */ 6036 6037 /*! @name AAFLT1_27H - ADDR Acceptance Filter High */ 6038 /*! @{ */ 6039 6040 #define CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H_MASK (0xFFFFFFFFU) 6041 #define CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H_SHIFT (0U) 6042 #define CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H_WIDTH (32U) 6043 #define CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_27H_ADDRn_H_MASK) 6044 /*! @} */ 6045 6046 /*! @name AAFLT1_28L - ADDR Acceptance Filter Low */ 6047 /*! @{ */ 6048 6049 #define CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L_MASK (0xFFFFFFFFU) 6050 #define CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L_SHIFT (0U) 6051 #define CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L_WIDTH (32U) 6052 #define CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_28L_ADDRn_L_MASK) 6053 /*! @} */ 6054 6055 /*! @name AAFLT1_28H - ADDR Acceptance Filter High */ 6056 /*! @{ */ 6057 6058 #define CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H_MASK (0xFFFFFFFFU) 6059 #define CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H_SHIFT (0U) 6060 #define CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H_WIDTH (32U) 6061 #define CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_28H_ADDRn_H_MASK) 6062 /*! @} */ 6063 6064 /*! @name AAFLT1_29L - ADDR Acceptance Filter Low */ 6065 /*! @{ */ 6066 6067 #define CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L_MASK (0xFFFFFFFFU) 6068 #define CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L_SHIFT (0U) 6069 #define CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L_WIDTH (32U) 6070 #define CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_29L_ADDRn_L_MASK) 6071 /*! @} */ 6072 6073 /*! @name AAFLT1_29H - ADDR Acceptance Filter High */ 6074 /*! @{ */ 6075 6076 #define CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H_MASK (0xFFFFFFFFU) 6077 #define CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H_SHIFT (0U) 6078 #define CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H_WIDTH (32U) 6079 #define CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_29H_ADDRn_H_MASK) 6080 /*! @} */ 6081 6082 /*! @name AAFLT1_30L - ADDR Acceptance Filter Low */ 6083 /*! @{ */ 6084 6085 #define CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L_MASK (0xFFFFFFFFU) 6086 #define CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L_SHIFT (0U) 6087 #define CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L_WIDTH (32U) 6088 #define CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_30L_ADDRn_L_MASK) 6089 /*! @} */ 6090 6091 /*! @name AAFLT1_30H - ADDR Acceptance Filter High */ 6092 /*! @{ */ 6093 6094 #define CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H_MASK (0xFFFFFFFFU) 6095 #define CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H_SHIFT (0U) 6096 #define CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H_WIDTH (32U) 6097 #define CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_30H_ADDRn_H_MASK) 6098 /*! @} */ 6099 6100 /*! @name AAFLT1_31L - ADDR Acceptance Filter Low */ 6101 /*! @{ */ 6102 6103 #define CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L_MASK (0xFFFFFFFFU) 6104 #define CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L_SHIFT (0U) 6105 #define CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L_WIDTH (32U) 6106 #define CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_31L_ADDRn_L_MASK) 6107 /*! @} */ 6108 6109 /*! @name AAFLT1_31H - ADDR Acceptance Filter High */ 6110 /*! @{ */ 6111 6112 #define CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H_MASK (0xFFFFFFFFU) 6113 #define CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H_SHIFT (0U) 6114 #define CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H_WIDTH (32U) 6115 #define CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_AAFLT1_31H_ADDRn_H_MASK) 6116 /*! @} */ 6117 6118 /*! @name RFCFG1 - Rejection Filter Configuration */ 6119 /*! @{ */ 6120 6121 #define CANXL_FILTER_BANK_RFCFG1_REJVCAN_MASK (0x1FU) 6122 #define CANXL_FILTER_BANK_RFCFG1_REJVCAN_SHIFT (0U) 6123 #define CANXL_FILTER_BANK_RFCFG1_REJVCAN_WIDTH (5U) 6124 #define CANXL_FILTER_BANK_RFCFG1_REJVCAN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_REJVCAN_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_REJVCAN_MASK) 6125 6126 #define CANXL_FILTER_BANK_RFCFG1_RVCANEN_MASK (0x80U) 6127 #define CANXL_FILTER_BANK_RFCFG1_RVCANEN_SHIFT (7U) 6128 #define CANXL_FILTER_BANK_RFCFG1_RVCANEN_WIDTH (1U) 6129 #define CANXL_FILTER_BANK_RFCFG1_RVCANEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_RVCANEN_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_RVCANEN_MASK) 6130 6131 #define CANXL_FILTER_BANK_RFCFG1_REJSDU_MASK (0x1F00U) 6132 #define CANXL_FILTER_BANK_RFCFG1_REJSDU_SHIFT (8U) 6133 #define CANXL_FILTER_BANK_RFCFG1_REJSDU_WIDTH (5U) 6134 #define CANXL_FILTER_BANK_RFCFG1_REJSDU(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_REJSDU_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_REJSDU_MASK) 6135 6136 #define CANXL_FILTER_BANK_RFCFG1_RSDUEN_MASK (0x8000U) 6137 #define CANXL_FILTER_BANK_RFCFG1_RSDUEN_SHIFT (15U) 6138 #define CANXL_FILTER_BANK_RFCFG1_RSDUEN_WIDTH (1U) 6139 #define CANXL_FILTER_BANK_RFCFG1_RSDUEN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_RSDUEN_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_RSDUEN_MASK) 6140 6141 #define CANXL_FILTER_BANK_RFCFG1_REJADDR_MASK (0x1F0000U) 6142 #define CANXL_FILTER_BANK_RFCFG1_REJADDR_SHIFT (16U) 6143 #define CANXL_FILTER_BANK_RFCFG1_REJADDR_WIDTH (5U) 6144 #define CANXL_FILTER_BANK_RFCFG1_REJADDR(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_REJADDR_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_REJADDR_MASK) 6145 6146 #define CANXL_FILTER_BANK_RFCFG1_RADDREN_MASK (0x800000U) 6147 #define CANXL_FILTER_BANK_RFCFG1_RADDREN_SHIFT (23U) 6148 #define CANXL_FILTER_BANK_RFCFG1_RADDREN_WIDTH (1U) 6149 #define CANXL_FILTER_BANK_RFCFG1_RADDREN(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_RFCFG1_RADDREN_SHIFT)) & CANXL_FILTER_BANK_RFCFG1_RADDREN_MASK) 6150 /*! @} */ 6151 6152 /*! @name VRMRCFG1 - VCAN Rejection Mask or Range Configuration */ 6153 /*! @{ */ 6154 6155 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0_MASK (0x1U) 6156 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0_SHIFT (0U) 6157 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0_WIDTH (1U) 6158 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R0_MASK) 6159 6160 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1_MASK (0x2U) 6161 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1_SHIFT (1U) 6162 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1_WIDTH (1U) 6163 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R1_MASK) 6164 6165 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2_MASK (0x4U) 6166 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2_SHIFT (2U) 6167 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2_WIDTH (1U) 6168 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R2_MASK) 6169 6170 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3_MASK (0x8U) 6171 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3_SHIFT (3U) 6172 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3_WIDTH (1U) 6173 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R3_MASK) 6174 6175 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4_MASK (0x10U) 6176 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4_SHIFT (4U) 6177 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4_WIDTH (1U) 6178 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R4_MASK) 6179 6180 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5_MASK (0x20U) 6181 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5_SHIFT (5U) 6182 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5_WIDTH (1U) 6183 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R5_MASK) 6184 6185 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6_MASK (0x40U) 6186 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6_SHIFT (6U) 6187 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6_WIDTH (1U) 6188 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R6_MASK) 6189 6190 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7_MASK (0x80U) 6191 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7_SHIFT (7U) 6192 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7_WIDTH (1U) 6193 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R7_MASK) 6194 6195 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8_MASK (0x100U) 6196 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8_SHIFT (8U) 6197 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8_WIDTH (1U) 6198 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R8_MASK) 6199 6200 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9_MASK (0x200U) 6201 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9_SHIFT (9U) 6202 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9_WIDTH (1U) 6203 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R9_MASK) 6204 6205 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10_MASK (0x400U) 6206 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10_SHIFT (10U) 6207 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10_WIDTH (1U) 6208 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R10_MASK) 6209 6210 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11_MASK (0x800U) 6211 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11_SHIFT (11U) 6212 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11_WIDTH (1U) 6213 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R11_MASK) 6214 6215 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12_MASK (0x1000U) 6216 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12_SHIFT (12U) 6217 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12_WIDTH (1U) 6218 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R12_MASK) 6219 6220 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13_MASK (0x2000U) 6221 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13_SHIFT (13U) 6222 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13_WIDTH (1U) 6223 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R13_MASK) 6224 6225 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14_MASK (0x4000U) 6226 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14_SHIFT (14U) 6227 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14_WIDTH (1U) 6228 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R14_MASK) 6229 6230 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15_MASK (0x8000U) 6231 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15_SHIFT (15U) 6232 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15_WIDTH (1U) 6233 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R15_MASK) 6234 6235 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16_MASK (0x10000U) 6236 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16_SHIFT (16U) 6237 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16_WIDTH (1U) 6238 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R16_MASK) 6239 6240 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17_MASK (0x20000U) 6241 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17_SHIFT (17U) 6242 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17_WIDTH (1U) 6243 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R17_MASK) 6244 6245 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18_MASK (0x40000U) 6246 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18_SHIFT (18U) 6247 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18_WIDTH (1U) 6248 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R18_MASK) 6249 6250 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19_MASK (0x80000U) 6251 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19_SHIFT (19U) 6252 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19_WIDTH (1U) 6253 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R19_MASK) 6254 6255 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20_MASK (0x100000U) 6256 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20_SHIFT (20U) 6257 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20_WIDTH (1U) 6258 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R20_MASK) 6259 6260 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21_MASK (0x200000U) 6261 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21_SHIFT (21U) 6262 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21_WIDTH (1U) 6263 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R21_MASK) 6264 6265 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22_MASK (0x400000U) 6266 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22_SHIFT (22U) 6267 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22_WIDTH (1U) 6268 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R22_MASK) 6269 6270 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23_MASK (0x800000U) 6271 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23_SHIFT (23U) 6272 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23_WIDTH (1U) 6273 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R23_MASK) 6274 6275 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24_MASK (0x1000000U) 6276 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24_SHIFT (24U) 6277 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24_WIDTH (1U) 6278 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R24_MASK) 6279 6280 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25_MASK (0x2000000U) 6281 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25_SHIFT (25U) 6282 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25_WIDTH (1U) 6283 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R25_MASK) 6284 6285 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26_MASK (0x4000000U) 6286 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26_SHIFT (26U) 6287 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26_WIDTH (1U) 6288 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R26_MASK) 6289 6290 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27_MASK (0x8000000U) 6291 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27_SHIFT (27U) 6292 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27_WIDTH (1U) 6293 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R27_MASK) 6294 6295 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28_MASK (0x10000000U) 6296 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28_SHIFT (28U) 6297 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28_WIDTH (1U) 6298 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R28_MASK) 6299 6300 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29_MASK (0x20000000U) 6301 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29_SHIFT (29U) 6302 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29_WIDTH (1U) 6303 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R29_MASK) 6304 6305 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30_MASK (0x40000000U) 6306 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30_SHIFT (30U) 6307 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30_WIDTH (1U) 6308 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R30_MASK) 6309 6310 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31_MASK (0x80000000U) 6311 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31_SHIFT (31U) 6312 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31_WIDTH (1U) 6313 #define CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31_SHIFT)) & CANXL_FILTER_BANK_VRMRCFG1_VMSK0R31_MASK) 6314 /*! @} */ 6315 6316 /*! @name SRMRCFG1 - SDU Rejection Mask or Range Configuration */ 6317 /*! @{ */ 6318 6319 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0_MASK (0x1U) 6320 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0_SHIFT (0U) 6321 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0_WIDTH (1U) 6322 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R0_MASK) 6323 6324 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1_MASK (0x2U) 6325 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1_SHIFT (1U) 6326 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1_WIDTH (1U) 6327 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R1_MASK) 6328 6329 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2_MASK (0x4U) 6330 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2_SHIFT (2U) 6331 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2_WIDTH (1U) 6332 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R2_MASK) 6333 6334 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3_MASK (0x8U) 6335 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3_SHIFT (3U) 6336 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3_WIDTH (1U) 6337 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R3_MASK) 6338 6339 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4_MASK (0x10U) 6340 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4_SHIFT (4U) 6341 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4_WIDTH (1U) 6342 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R4_MASK) 6343 6344 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5_MASK (0x20U) 6345 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5_SHIFT (5U) 6346 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5_WIDTH (1U) 6347 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R5_MASK) 6348 6349 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6_MASK (0x40U) 6350 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6_SHIFT (6U) 6351 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6_WIDTH (1U) 6352 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R6_MASK) 6353 6354 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7_MASK (0x80U) 6355 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7_SHIFT (7U) 6356 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7_WIDTH (1U) 6357 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R7_MASK) 6358 6359 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8_MASK (0x100U) 6360 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8_SHIFT (8U) 6361 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8_WIDTH (1U) 6362 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R8_MASK) 6363 6364 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9_MASK (0x200U) 6365 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9_SHIFT (9U) 6366 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9_WIDTH (1U) 6367 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R9_MASK) 6368 6369 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10_MASK (0x400U) 6370 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10_SHIFT (10U) 6371 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10_WIDTH (1U) 6372 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R10_MASK) 6373 6374 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11_MASK (0x800U) 6375 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11_SHIFT (11U) 6376 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11_WIDTH (1U) 6377 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R11_MASK) 6378 6379 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12_MASK (0x1000U) 6380 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12_SHIFT (12U) 6381 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12_WIDTH (1U) 6382 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R12_MASK) 6383 6384 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13_MASK (0x2000U) 6385 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13_SHIFT (13U) 6386 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13_WIDTH (1U) 6387 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R13_MASK) 6388 6389 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14_MASK (0x4000U) 6390 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14_SHIFT (14U) 6391 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14_WIDTH (1U) 6392 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R14_MASK) 6393 6394 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15_MASK (0x8000U) 6395 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15_SHIFT (15U) 6396 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15_WIDTH (1U) 6397 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R15_MASK) 6398 6399 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16_MASK (0x10000U) 6400 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16_SHIFT (16U) 6401 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16_WIDTH (1U) 6402 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R16_MASK) 6403 6404 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17_MASK (0x20000U) 6405 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17_SHIFT (17U) 6406 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17_WIDTH (1U) 6407 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R17_MASK) 6408 6409 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18_MASK (0x40000U) 6410 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18_SHIFT (18U) 6411 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18_WIDTH (1U) 6412 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R18_MASK) 6413 6414 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19_MASK (0x80000U) 6415 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19_SHIFT (19U) 6416 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19_WIDTH (1U) 6417 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R19_MASK) 6418 6419 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20_MASK (0x100000U) 6420 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20_SHIFT (20U) 6421 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20_WIDTH (1U) 6422 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R20_MASK) 6423 6424 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21_MASK (0x200000U) 6425 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21_SHIFT (21U) 6426 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21_WIDTH (1U) 6427 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R21_MASK) 6428 6429 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22_MASK (0x400000U) 6430 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22_SHIFT (22U) 6431 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22_WIDTH (1U) 6432 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R22_MASK) 6433 6434 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23_MASK (0x800000U) 6435 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23_SHIFT (23U) 6436 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23_WIDTH (1U) 6437 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R23_MASK) 6438 6439 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24_MASK (0x1000000U) 6440 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24_SHIFT (24U) 6441 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24_WIDTH (1U) 6442 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R24_MASK) 6443 6444 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25_MASK (0x2000000U) 6445 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25_SHIFT (25U) 6446 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25_WIDTH (1U) 6447 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R25_MASK) 6448 6449 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26_MASK (0x4000000U) 6450 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26_SHIFT (26U) 6451 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26_WIDTH (1U) 6452 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R26_MASK) 6453 6454 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27_MASK (0x8000000U) 6455 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27_SHIFT (27U) 6456 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27_WIDTH (1U) 6457 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R27_MASK) 6458 6459 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28_MASK (0x10000000U) 6460 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28_SHIFT (28U) 6461 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28_WIDTH (1U) 6462 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R28_MASK) 6463 6464 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29_MASK (0x20000000U) 6465 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29_SHIFT (29U) 6466 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29_WIDTH (1U) 6467 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R29_MASK) 6468 6469 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30_MASK (0x40000000U) 6470 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30_SHIFT (30U) 6471 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30_WIDTH (1U) 6472 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R30_MASK) 6473 6474 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31_MASK (0x80000000U) 6475 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31_SHIFT (31U) 6476 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31_WIDTH (1U) 6477 #define CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31_SHIFT)) & CANXL_FILTER_BANK_SRMRCFG1_SMSK0R31_MASK) 6478 /*! @} */ 6479 6480 /*! @name ARMRCFG1 - ADDR Rejection Mask or Range Configuration */ 6481 /*! @{ */ 6482 6483 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0_MASK (0x1U) 6484 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0_SHIFT (0U) 6485 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0_WIDTH (1U) 6486 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R0_MASK) 6487 6488 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1_MASK (0x2U) 6489 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1_SHIFT (1U) 6490 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1_WIDTH (1U) 6491 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R1_MASK) 6492 6493 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2_MASK (0x4U) 6494 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2_SHIFT (2U) 6495 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2_WIDTH (1U) 6496 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R2_MASK) 6497 6498 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3_MASK (0x8U) 6499 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3_SHIFT (3U) 6500 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3_WIDTH (1U) 6501 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R3_MASK) 6502 6503 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4_MASK (0x10U) 6504 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4_SHIFT (4U) 6505 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4_WIDTH (1U) 6506 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R4_MASK) 6507 6508 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5_MASK (0x20U) 6509 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5_SHIFT (5U) 6510 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5_WIDTH (1U) 6511 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R5_MASK) 6512 6513 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6_MASK (0x40U) 6514 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6_SHIFT (6U) 6515 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6_WIDTH (1U) 6516 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R6_MASK) 6517 6518 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7_MASK (0x80U) 6519 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7_SHIFT (7U) 6520 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7_WIDTH (1U) 6521 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R7_MASK) 6522 6523 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8_MASK (0x100U) 6524 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8_SHIFT (8U) 6525 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8_WIDTH (1U) 6526 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R8_MASK) 6527 6528 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9_MASK (0x200U) 6529 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9_SHIFT (9U) 6530 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9_WIDTH (1U) 6531 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R9_MASK) 6532 6533 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10_MASK (0x400U) 6534 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10_SHIFT (10U) 6535 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10_WIDTH (1U) 6536 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R10_MASK) 6537 6538 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11_MASK (0x800U) 6539 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11_SHIFT (11U) 6540 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11_WIDTH (1U) 6541 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R11_MASK) 6542 6543 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12_MASK (0x1000U) 6544 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12_SHIFT (12U) 6545 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12_WIDTH (1U) 6546 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R12_MASK) 6547 6548 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13_MASK (0x2000U) 6549 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13_SHIFT (13U) 6550 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13_WIDTH (1U) 6551 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R13_MASK) 6552 6553 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14_MASK (0x4000U) 6554 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14_SHIFT (14U) 6555 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14_WIDTH (1U) 6556 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R14_MASK) 6557 6558 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15_MASK (0x8000U) 6559 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15_SHIFT (15U) 6560 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15_WIDTH (1U) 6561 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R15_MASK) 6562 6563 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16_MASK (0x10000U) 6564 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16_SHIFT (16U) 6565 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16_WIDTH (1U) 6566 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R16_MASK) 6567 6568 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17_MASK (0x20000U) 6569 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17_SHIFT (17U) 6570 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17_WIDTH (1U) 6571 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R17_MASK) 6572 6573 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18_MASK (0x40000U) 6574 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18_SHIFT (18U) 6575 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18_WIDTH (1U) 6576 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R18_MASK) 6577 6578 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19_MASK (0x80000U) 6579 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19_SHIFT (19U) 6580 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19_WIDTH (1U) 6581 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R19_MASK) 6582 6583 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20_MASK (0x100000U) 6584 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20_SHIFT (20U) 6585 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20_WIDTH (1U) 6586 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R20_MASK) 6587 6588 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21_MASK (0x200000U) 6589 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21_SHIFT (21U) 6590 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21_WIDTH (1U) 6591 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R21_MASK) 6592 6593 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22_MASK (0x400000U) 6594 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22_SHIFT (22U) 6595 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22_WIDTH (1U) 6596 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R22_MASK) 6597 6598 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23_MASK (0x800000U) 6599 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23_SHIFT (23U) 6600 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23_WIDTH (1U) 6601 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R23_MASK) 6602 6603 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24_MASK (0x1000000U) 6604 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24_SHIFT (24U) 6605 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24_WIDTH (1U) 6606 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R24_MASK) 6607 6608 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25_MASK (0x2000000U) 6609 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25_SHIFT (25U) 6610 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25_WIDTH (1U) 6611 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R25_MASK) 6612 6613 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26_MASK (0x4000000U) 6614 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26_SHIFT (26U) 6615 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26_WIDTH (1U) 6616 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R26_MASK) 6617 6618 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27_MASK (0x8000000U) 6619 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27_SHIFT (27U) 6620 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27_WIDTH (1U) 6621 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R27_MASK) 6622 6623 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28_MASK (0x10000000U) 6624 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28_SHIFT (28U) 6625 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28_WIDTH (1U) 6626 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R28_MASK) 6627 6628 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29_MASK (0x20000000U) 6629 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29_SHIFT (29U) 6630 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29_WIDTH (1U) 6631 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R29_MASK) 6632 6633 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30_MASK (0x40000000U) 6634 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30_SHIFT (30U) 6635 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30_WIDTH (1U) 6636 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R30_MASK) 6637 6638 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31_MASK (0x80000000U) 6639 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31_SHIFT (31U) 6640 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31_WIDTH (1U) 6641 #define CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31_SHIFT)) & CANXL_FILTER_BANK_ARMRCFG1_AMSK0R31_MASK) 6642 /*! @} */ 6643 6644 /*! @name VRFLT1_0 - VCAN Rejection Filter */ 6645 /*! @{ */ 6646 6647 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_L_MASK (0xFFU) 6648 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_L_SHIFT (0U) 6649 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_L_WIDTH (8U) 6650 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_0_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_0_VCANa_L_MASK) 6651 6652 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_H_MASK (0xFF00U) 6653 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_H_SHIFT (8U) 6654 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_H_WIDTH (8U) 6655 #define CANXL_FILTER_BANK_VRFLT1_0_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_0_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_0_VCANa_H_MASK) 6656 6657 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_L_MASK (0xFF0000U) 6658 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_L_SHIFT (16U) 6659 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_L_WIDTH (8U) 6660 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_0_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_0_VCANb_L_MASK) 6661 6662 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_H_MASK (0xFF000000U) 6663 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_H_SHIFT (24U) 6664 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_H_WIDTH (8U) 6665 #define CANXL_FILTER_BANK_VRFLT1_0_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_0_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_0_VCANb_H_MASK) 6666 /*! @} */ 6667 6668 /*! @name VRFLT1_2 - VCAN Rejection Filter */ 6669 /*! @{ */ 6670 6671 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_L_MASK (0xFFU) 6672 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_L_SHIFT (0U) 6673 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_L_WIDTH (8U) 6674 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_2_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_2_VCANa_L_MASK) 6675 6676 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_H_MASK (0xFF00U) 6677 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_H_SHIFT (8U) 6678 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_H_WIDTH (8U) 6679 #define CANXL_FILTER_BANK_VRFLT1_2_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_2_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_2_VCANa_H_MASK) 6680 6681 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_L_MASK (0xFF0000U) 6682 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_L_SHIFT (16U) 6683 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_L_WIDTH (8U) 6684 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_2_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_2_VCANb_L_MASK) 6685 6686 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_H_MASK (0xFF000000U) 6687 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_H_SHIFT (24U) 6688 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_H_WIDTH (8U) 6689 #define CANXL_FILTER_BANK_VRFLT1_2_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_2_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_2_VCANb_H_MASK) 6690 /*! @} */ 6691 6692 /*! @name VRFLT1_4 - VCAN Rejection Filter */ 6693 /*! @{ */ 6694 6695 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_L_MASK (0xFFU) 6696 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_L_SHIFT (0U) 6697 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_L_WIDTH (8U) 6698 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_4_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_4_VCANa_L_MASK) 6699 6700 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_H_MASK (0xFF00U) 6701 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_H_SHIFT (8U) 6702 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_H_WIDTH (8U) 6703 #define CANXL_FILTER_BANK_VRFLT1_4_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_4_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_4_VCANa_H_MASK) 6704 6705 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_L_MASK (0xFF0000U) 6706 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_L_SHIFT (16U) 6707 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_L_WIDTH (8U) 6708 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_4_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_4_VCANb_L_MASK) 6709 6710 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_H_MASK (0xFF000000U) 6711 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_H_SHIFT (24U) 6712 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_H_WIDTH (8U) 6713 #define CANXL_FILTER_BANK_VRFLT1_4_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_4_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_4_VCANb_H_MASK) 6714 /*! @} */ 6715 6716 /*! @name VRFLT1_6 - VCAN Rejection Filter */ 6717 /*! @{ */ 6718 6719 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_L_MASK (0xFFU) 6720 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_L_SHIFT (0U) 6721 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_L_WIDTH (8U) 6722 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_6_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_6_VCANa_L_MASK) 6723 6724 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_H_MASK (0xFF00U) 6725 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_H_SHIFT (8U) 6726 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_H_WIDTH (8U) 6727 #define CANXL_FILTER_BANK_VRFLT1_6_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_6_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_6_VCANa_H_MASK) 6728 6729 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_L_MASK (0xFF0000U) 6730 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_L_SHIFT (16U) 6731 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_L_WIDTH (8U) 6732 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_6_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_6_VCANb_L_MASK) 6733 6734 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_H_MASK (0xFF000000U) 6735 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_H_SHIFT (24U) 6736 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_H_WIDTH (8U) 6737 #define CANXL_FILTER_BANK_VRFLT1_6_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_6_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_6_VCANb_H_MASK) 6738 /*! @} */ 6739 6740 /*! @name VRFLT1_8 - VCAN Rejection Filter */ 6741 /*! @{ */ 6742 6743 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_L_MASK (0xFFU) 6744 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_L_SHIFT (0U) 6745 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_L_WIDTH (8U) 6746 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_8_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_8_VCANa_L_MASK) 6747 6748 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_H_MASK (0xFF00U) 6749 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_H_SHIFT (8U) 6750 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_H_WIDTH (8U) 6751 #define CANXL_FILTER_BANK_VRFLT1_8_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_8_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_8_VCANa_H_MASK) 6752 6753 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_L_MASK (0xFF0000U) 6754 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_L_SHIFT (16U) 6755 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_L_WIDTH (8U) 6756 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_8_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_8_VCANb_L_MASK) 6757 6758 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_H_MASK (0xFF000000U) 6759 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_H_SHIFT (24U) 6760 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_H_WIDTH (8U) 6761 #define CANXL_FILTER_BANK_VRFLT1_8_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_8_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_8_VCANb_H_MASK) 6762 /*! @} */ 6763 6764 /*! @name VRFLT1_10 - VCAN Rejection Filter */ 6765 /*! @{ */ 6766 6767 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_L_MASK (0xFFU) 6768 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_L_SHIFT (0U) 6769 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_L_WIDTH (8U) 6770 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_10_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_10_VCANa_L_MASK) 6771 6772 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_H_MASK (0xFF00U) 6773 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_H_SHIFT (8U) 6774 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_H_WIDTH (8U) 6775 #define CANXL_FILTER_BANK_VRFLT1_10_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_10_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_10_VCANa_H_MASK) 6776 6777 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_L_MASK (0xFF0000U) 6778 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_L_SHIFT (16U) 6779 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_L_WIDTH (8U) 6780 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_10_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_10_VCANb_L_MASK) 6781 6782 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_H_MASK (0xFF000000U) 6783 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_H_SHIFT (24U) 6784 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_H_WIDTH (8U) 6785 #define CANXL_FILTER_BANK_VRFLT1_10_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_10_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_10_VCANb_H_MASK) 6786 /*! @} */ 6787 6788 /*! @name VRFLT1_12 - VCAN Rejection Filter */ 6789 /*! @{ */ 6790 6791 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_L_MASK (0xFFU) 6792 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_L_SHIFT (0U) 6793 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_L_WIDTH (8U) 6794 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_12_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_12_VCANa_L_MASK) 6795 6796 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_H_MASK (0xFF00U) 6797 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_H_SHIFT (8U) 6798 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_H_WIDTH (8U) 6799 #define CANXL_FILTER_BANK_VRFLT1_12_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_12_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_12_VCANa_H_MASK) 6800 6801 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_L_MASK (0xFF0000U) 6802 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_L_SHIFT (16U) 6803 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_L_WIDTH (8U) 6804 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_12_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_12_VCANb_L_MASK) 6805 6806 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_H_MASK (0xFF000000U) 6807 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_H_SHIFT (24U) 6808 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_H_WIDTH (8U) 6809 #define CANXL_FILTER_BANK_VRFLT1_12_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_12_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_12_VCANb_H_MASK) 6810 /*! @} */ 6811 6812 /*! @name VRFLT1_14 - VCAN Rejection Filter */ 6813 /*! @{ */ 6814 6815 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_L_MASK (0xFFU) 6816 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_L_SHIFT (0U) 6817 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_L_WIDTH (8U) 6818 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_14_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_14_VCANa_L_MASK) 6819 6820 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_H_MASK (0xFF00U) 6821 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_H_SHIFT (8U) 6822 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_H_WIDTH (8U) 6823 #define CANXL_FILTER_BANK_VRFLT1_14_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_14_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_14_VCANa_H_MASK) 6824 6825 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_L_MASK (0xFF0000U) 6826 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_L_SHIFT (16U) 6827 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_L_WIDTH (8U) 6828 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_14_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_14_VCANb_L_MASK) 6829 6830 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_H_MASK (0xFF000000U) 6831 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_H_SHIFT (24U) 6832 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_H_WIDTH (8U) 6833 #define CANXL_FILTER_BANK_VRFLT1_14_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_14_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_14_VCANb_H_MASK) 6834 /*! @} */ 6835 6836 /*! @name VRFLT1_16 - VCAN Rejection Filter */ 6837 /*! @{ */ 6838 6839 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_L_MASK (0xFFU) 6840 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_L_SHIFT (0U) 6841 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_L_WIDTH (8U) 6842 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_16_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_16_VCANa_L_MASK) 6843 6844 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_H_MASK (0xFF00U) 6845 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_H_SHIFT (8U) 6846 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_H_WIDTH (8U) 6847 #define CANXL_FILTER_BANK_VRFLT1_16_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_16_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_16_VCANa_H_MASK) 6848 6849 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_L_MASK (0xFF0000U) 6850 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_L_SHIFT (16U) 6851 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_L_WIDTH (8U) 6852 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_16_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_16_VCANb_L_MASK) 6853 6854 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_H_MASK (0xFF000000U) 6855 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_H_SHIFT (24U) 6856 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_H_WIDTH (8U) 6857 #define CANXL_FILTER_BANK_VRFLT1_16_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_16_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_16_VCANb_H_MASK) 6858 /*! @} */ 6859 6860 /*! @name VRFLT1_18 - VCAN Rejection Filter */ 6861 /*! @{ */ 6862 6863 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_L_MASK (0xFFU) 6864 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_L_SHIFT (0U) 6865 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_L_WIDTH (8U) 6866 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_18_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_18_VCANa_L_MASK) 6867 6868 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_H_MASK (0xFF00U) 6869 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_H_SHIFT (8U) 6870 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_H_WIDTH (8U) 6871 #define CANXL_FILTER_BANK_VRFLT1_18_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_18_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_18_VCANa_H_MASK) 6872 6873 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_L_MASK (0xFF0000U) 6874 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_L_SHIFT (16U) 6875 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_L_WIDTH (8U) 6876 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_18_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_18_VCANb_L_MASK) 6877 6878 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_H_MASK (0xFF000000U) 6879 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_H_SHIFT (24U) 6880 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_H_WIDTH (8U) 6881 #define CANXL_FILTER_BANK_VRFLT1_18_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_18_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_18_VCANb_H_MASK) 6882 /*! @} */ 6883 6884 /*! @name VRFLT1_20 - VCAN Rejection Filter */ 6885 /*! @{ */ 6886 6887 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_L_MASK (0xFFU) 6888 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_L_SHIFT (0U) 6889 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_L_WIDTH (8U) 6890 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_20_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_20_VCANa_L_MASK) 6891 6892 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_H_MASK (0xFF00U) 6893 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_H_SHIFT (8U) 6894 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_H_WIDTH (8U) 6895 #define CANXL_FILTER_BANK_VRFLT1_20_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_20_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_20_VCANa_H_MASK) 6896 6897 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_L_MASK (0xFF0000U) 6898 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_L_SHIFT (16U) 6899 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_L_WIDTH (8U) 6900 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_20_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_20_VCANb_L_MASK) 6901 6902 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_H_MASK (0xFF000000U) 6903 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_H_SHIFT (24U) 6904 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_H_WIDTH (8U) 6905 #define CANXL_FILTER_BANK_VRFLT1_20_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_20_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_20_VCANb_H_MASK) 6906 /*! @} */ 6907 6908 /*! @name VRFLT1_22 - VCAN Rejection Filter */ 6909 /*! @{ */ 6910 6911 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_L_MASK (0xFFU) 6912 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_L_SHIFT (0U) 6913 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_L_WIDTH (8U) 6914 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_22_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_22_VCANa_L_MASK) 6915 6916 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_H_MASK (0xFF00U) 6917 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_H_SHIFT (8U) 6918 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_H_WIDTH (8U) 6919 #define CANXL_FILTER_BANK_VRFLT1_22_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_22_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_22_VCANa_H_MASK) 6920 6921 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_L_MASK (0xFF0000U) 6922 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_L_SHIFT (16U) 6923 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_L_WIDTH (8U) 6924 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_22_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_22_VCANb_L_MASK) 6925 6926 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_H_MASK (0xFF000000U) 6927 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_H_SHIFT (24U) 6928 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_H_WIDTH (8U) 6929 #define CANXL_FILTER_BANK_VRFLT1_22_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_22_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_22_VCANb_H_MASK) 6930 /*! @} */ 6931 6932 /*! @name VRFLT1_24 - VCAN Rejection Filter */ 6933 /*! @{ */ 6934 6935 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_L_MASK (0xFFU) 6936 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_L_SHIFT (0U) 6937 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_L_WIDTH (8U) 6938 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_24_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_24_VCANa_L_MASK) 6939 6940 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_H_MASK (0xFF00U) 6941 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_H_SHIFT (8U) 6942 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_H_WIDTH (8U) 6943 #define CANXL_FILTER_BANK_VRFLT1_24_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_24_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_24_VCANa_H_MASK) 6944 6945 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_L_MASK (0xFF0000U) 6946 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_L_SHIFT (16U) 6947 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_L_WIDTH (8U) 6948 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_24_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_24_VCANb_L_MASK) 6949 6950 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_H_MASK (0xFF000000U) 6951 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_H_SHIFT (24U) 6952 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_H_WIDTH (8U) 6953 #define CANXL_FILTER_BANK_VRFLT1_24_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_24_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_24_VCANb_H_MASK) 6954 /*! @} */ 6955 6956 /*! @name VRFLT1_26 - VCAN Rejection Filter */ 6957 /*! @{ */ 6958 6959 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_L_MASK (0xFFU) 6960 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_L_SHIFT (0U) 6961 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_L_WIDTH (8U) 6962 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_26_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_26_VCANa_L_MASK) 6963 6964 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_H_MASK (0xFF00U) 6965 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_H_SHIFT (8U) 6966 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_H_WIDTH (8U) 6967 #define CANXL_FILTER_BANK_VRFLT1_26_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_26_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_26_VCANa_H_MASK) 6968 6969 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_L_MASK (0xFF0000U) 6970 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_L_SHIFT (16U) 6971 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_L_WIDTH (8U) 6972 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_26_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_26_VCANb_L_MASK) 6973 6974 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_H_MASK (0xFF000000U) 6975 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_H_SHIFT (24U) 6976 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_H_WIDTH (8U) 6977 #define CANXL_FILTER_BANK_VRFLT1_26_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_26_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_26_VCANb_H_MASK) 6978 /*! @} */ 6979 6980 /*! @name VRFLT1_28 - VCAN Rejection Filter */ 6981 /*! @{ */ 6982 6983 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_L_MASK (0xFFU) 6984 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_L_SHIFT (0U) 6985 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_L_WIDTH (8U) 6986 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_28_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_28_VCANa_L_MASK) 6987 6988 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_H_MASK (0xFF00U) 6989 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_H_SHIFT (8U) 6990 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_H_WIDTH (8U) 6991 #define CANXL_FILTER_BANK_VRFLT1_28_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_28_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_28_VCANa_H_MASK) 6992 6993 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_L_MASK (0xFF0000U) 6994 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_L_SHIFT (16U) 6995 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_L_WIDTH (8U) 6996 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_28_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_28_VCANb_L_MASK) 6997 6998 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_H_MASK (0xFF000000U) 6999 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_H_SHIFT (24U) 7000 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_H_WIDTH (8U) 7001 #define CANXL_FILTER_BANK_VRFLT1_28_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_28_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_28_VCANb_H_MASK) 7002 /*! @} */ 7003 7004 /*! @name VRFLT1_30 - VCAN Rejection Filter */ 7005 /*! @{ */ 7006 7007 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_L_MASK (0xFFU) 7008 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_L_SHIFT (0U) 7009 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_L_WIDTH (8U) 7010 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_30_VCANa_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_30_VCANa_L_MASK) 7011 7012 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_H_MASK (0xFF00U) 7013 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_H_SHIFT (8U) 7014 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_H_WIDTH (8U) 7015 #define CANXL_FILTER_BANK_VRFLT1_30_VCANa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_30_VCANa_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_30_VCANa_H_MASK) 7016 7017 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_L_MASK (0xFF0000U) 7018 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_L_SHIFT (16U) 7019 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_L_WIDTH (8U) 7020 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_30_VCANb_L_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_30_VCANb_L_MASK) 7021 7022 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_H_MASK (0xFF000000U) 7023 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_H_SHIFT (24U) 7024 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_H_WIDTH (8U) 7025 #define CANXL_FILTER_BANK_VRFLT1_30_VCANb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_VRFLT1_30_VCANb_H_SHIFT)) & CANXL_FILTER_BANK_VRFLT1_30_VCANb_H_MASK) 7026 /*! @} */ 7027 7028 /*! @name SRFLT1_0 - SDU Rejection Filter */ 7029 /*! @{ */ 7030 7031 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_L_MASK (0xFFU) 7032 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_L_SHIFT (0U) 7033 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_L_WIDTH (8U) 7034 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_0_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_0_SDUa_L_MASK) 7035 7036 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_H_MASK (0xFF00U) 7037 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_H_SHIFT (8U) 7038 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_H_WIDTH (8U) 7039 #define CANXL_FILTER_BANK_SRFLT1_0_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_0_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_0_SDUa_H_MASK) 7040 7041 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_L_MASK (0xFF0000U) 7042 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_L_SHIFT (16U) 7043 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_L_WIDTH (8U) 7044 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_0_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_0_SDUb_L_MASK) 7045 7046 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_H_MASK (0xFF000000U) 7047 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_H_SHIFT (24U) 7048 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_H_WIDTH (8U) 7049 #define CANXL_FILTER_BANK_SRFLT1_0_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_0_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_0_SDUb_H_MASK) 7050 /*! @} */ 7051 7052 /*! @name SRFLT1_2 - SDU Rejection Filter */ 7053 /*! @{ */ 7054 7055 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_L_MASK (0xFFU) 7056 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_L_SHIFT (0U) 7057 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_L_WIDTH (8U) 7058 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_2_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_2_SDUa_L_MASK) 7059 7060 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_H_MASK (0xFF00U) 7061 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_H_SHIFT (8U) 7062 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_H_WIDTH (8U) 7063 #define CANXL_FILTER_BANK_SRFLT1_2_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_2_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_2_SDUa_H_MASK) 7064 7065 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_L_MASK (0xFF0000U) 7066 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_L_SHIFT (16U) 7067 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_L_WIDTH (8U) 7068 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_2_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_2_SDUb_L_MASK) 7069 7070 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_H_MASK (0xFF000000U) 7071 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_H_SHIFT (24U) 7072 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_H_WIDTH (8U) 7073 #define CANXL_FILTER_BANK_SRFLT1_2_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_2_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_2_SDUb_H_MASK) 7074 /*! @} */ 7075 7076 /*! @name SRFLT1_4 - SDU Rejection Filter */ 7077 /*! @{ */ 7078 7079 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_L_MASK (0xFFU) 7080 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_L_SHIFT (0U) 7081 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_L_WIDTH (8U) 7082 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_4_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_4_SDUa_L_MASK) 7083 7084 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_H_MASK (0xFF00U) 7085 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_H_SHIFT (8U) 7086 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_H_WIDTH (8U) 7087 #define CANXL_FILTER_BANK_SRFLT1_4_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_4_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_4_SDUa_H_MASK) 7088 7089 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_L_MASK (0xFF0000U) 7090 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_L_SHIFT (16U) 7091 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_L_WIDTH (8U) 7092 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_4_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_4_SDUb_L_MASK) 7093 7094 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_H_MASK (0xFF000000U) 7095 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_H_SHIFT (24U) 7096 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_H_WIDTH (8U) 7097 #define CANXL_FILTER_BANK_SRFLT1_4_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_4_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_4_SDUb_H_MASK) 7098 /*! @} */ 7099 7100 /*! @name SRFLT1_6 - SDU Rejection Filter */ 7101 /*! @{ */ 7102 7103 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_L_MASK (0xFFU) 7104 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_L_SHIFT (0U) 7105 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_L_WIDTH (8U) 7106 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_6_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_6_SDUa_L_MASK) 7107 7108 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_H_MASK (0xFF00U) 7109 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_H_SHIFT (8U) 7110 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_H_WIDTH (8U) 7111 #define CANXL_FILTER_BANK_SRFLT1_6_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_6_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_6_SDUa_H_MASK) 7112 7113 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_L_MASK (0xFF0000U) 7114 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_L_SHIFT (16U) 7115 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_L_WIDTH (8U) 7116 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_6_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_6_SDUb_L_MASK) 7117 7118 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_H_MASK (0xFF000000U) 7119 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_H_SHIFT (24U) 7120 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_H_WIDTH (8U) 7121 #define CANXL_FILTER_BANK_SRFLT1_6_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_6_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_6_SDUb_H_MASK) 7122 /*! @} */ 7123 7124 /*! @name SRFLT1_8 - SDU Rejection Filter */ 7125 /*! @{ */ 7126 7127 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_L_MASK (0xFFU) 7128 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_L_SHIFT (0U) 7129 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_L_WIDTH (8U) 7130 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_8_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_8_SDUa_L_MASK) 7131 7132 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_H_MASK (0xFF00U) 7133 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_H_SHIFT (8U) 7134 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_H_WIDTH (8U) 7135 #define CANXL_FILTER_BANK_SRFLT1_8_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_8_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_8_SDUa_H_MASK) 7136 7137 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_L_MASK (0xFF0000U) 7138 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_L_SHIFT (16U) 7139 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_L_WIDTH (8U) 7140 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_8_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_8_SDUb_L_MASK) 7141 7142 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_H_MASK (0xFF000000U) 7143 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_H_SHIFT (24U) 7144 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_H_WIDTH (8U) 7145 #define CANXL_FILTER_BANK_SRFLT1_8_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_8_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_8_SDUb_H_MASK) 7146 /*! @} */ 7147 7148 /*! @name SRFLT1_10 - SDU Rejection Filter */ 7149 /*! @{ */ 7150 7151 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_L_MASK (0xFFU) 7152 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_L_SHIFT (0U) 7153 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_L_WIDTH (8U) 7154 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_10_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_10_SDUa_L_MASK) 7155 7156 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_H_MASK (0xFF00U) 7157 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_H_SHIFT (8U) 7158 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_H_WIDTH (8U) 7159 #define CANXL_FILTER_BANK_SRFLT1_10_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_10_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_10_SDUa_H_MASK) 7160 7161 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_L_MASK (0xFF0000U) 7162 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_L_SHIFT (16U) 7163 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_L_WIDTH (8U) 7164 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_10_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_10_SDUb_L_MASK) 7165 7166 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_H_MASK (0xFF000000U) 7167 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_H_SHIFT (24U) 7168 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_H_WIDTH (8U) 7169 #define CANXL_FILTER_BANK_SRFLT1_10_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_10_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_10_SDUb_H_MASK) 7170 /*! @} */ 7171 7172 /*! @name SRFLT1_12 - SDU Rejection Filter */ 7173 /*! @{ */ 7174 7175 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_L_MASK (0xFFU) 7176 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_L_SHIFT (0U) 7177 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_L_WIDTH (8U) 7178 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_12_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_12_SDUa_L_MASK) 7179 7180 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_H_MASK (0xFF00U) 7181 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_H_SHIFT (8U) 7182 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_H_WIDTH (8U) 7183 #define CANXL_FILTER_BANK_SRFLT1_12_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_12_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_12_SDUa_H_MASK) 7184 7185 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_L_MASK (0xFF0000U) 7186 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_L_SHIFT (16U) 7187 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_L_WIDTH (8U) 7188 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_12_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_12_SDUb_L_MASK) 7189 7190 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_H_MASK (0xFF000000U) 7191 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_H_SHIFT (24U) 7192 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_H_WIDTH (8U) 7193 #define CANXL_FILTER_BANK_SRFLT1_12_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_12_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_12_SDUb_H_MASK) 7194 /*! @} */ 7195 7196 /*! @name SRFLT1_14 - SDU Rejection Filter */ 7197 /*! @{ */ 7198 7199 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_L_MASK (0xFFU) 7200 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_L_SHIFT (0U) 7201 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_L_WIDTH (8U) 7202 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_14_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_14_SDUa_L_MASK) 7203 7204 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_H_MASK (0xFF00U) 7205 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_H_SHIFT (8U) 7206 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_H_WIDTH (8U) 7207 #define CANXL_FILTER_BANK_SRFLT1_14_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_14_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_14_SDUa_H_MASK) 7208 7209 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_L_MASK (0xFF0000U) 7210 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_L_SHIFT (16U) 7211 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_L_WIDTH (8U) 7212 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_14_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_14_SDUb_L_MASK) 7213 7214 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_H_MASK (0xFF000000U) 7215 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_H_SHIFT (24U) 7216 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_H_WIDTH (8U) 7217 #define CANXL_FILTER_BANK_SRFLT1_14_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_14_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_14_SDUb_H_MASK) 7218 /*! @} */ 7219 7220 /*! @name SRFLT1_16 - SDU Rejection Filter */ 7221 /*! @{ */ 7222 7223 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_L_MASK (0xFFU) 7224 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_L_SHIFT (0U) 7225 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_L_WIDTH (8U) 7226 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_16_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_16_SDUa_L_MASK) 7227 7228 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_H_MASK (0xFF00U) 7229 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_H_SHIFT (8U) 7230 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_H_WIDTH (8U) 7231 #define CANXL_FILTER_BANK_SRFLT1_16_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_16_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_16_SDUa_H_MASK) 7232 7233 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_L_MASK (0xFF0000U) 7234 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_L_SHIFT (16U) 7235 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_L_WIDTH (8U) 7236 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_16_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_16_SDUb_L_MASK) 7237 7238 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_H_MASK (0xFF000000U) 7239 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_H_SHIFT (24U) 7240 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_H_WIDTH (8U) 7241 #define CANXL_FILTER_BANK_SRFLT1_16_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_16_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_16_SDUb_H_MASK) 7242 /*! @} */ 7243 7244 /*! @name SRFLT1_18 - SDU Rejection Filter */ 7245 /*! @{ */ 7246 7247 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_L_MASK (0xFFU) 7248 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_L_SHIFT (0U) 7249 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_L_WIDTH (8U) 7250 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_18_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_18_SDUa_L_MASK) 7251 7252 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_H_MASK (0xFF00U) 7253 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_H_SHIFT (8U) 7254 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_H_WIDTH (8U) 7255 #define CANXL_FILTER_BANK_SRFLT1_18_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_18_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_18_SDUa_H_MASK) 7256 7257 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_L_MASK (0xFF0000U) 7258 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_L_SHIFT (16U) 7259 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_L_WIDTH (8U) 7260 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_18_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_18_SDUb_L_MASK) 7261 7262 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_H_MASK (0xFF000000U) 7263 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_H_SHIFT (24U) 7264 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_H_WIDTH (8U) 7265 #define CANXL_FILTER_BANK_SRFLT1_18_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_18_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_18_SDUb_H_MASK) 7266 /*! @} */ 7267 7268 /*! @name SRFLT1_20 - SDU Rejection Filter */ 7269 /*! @{ */ 7270 7271 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_L_MASK (0xFFU) 7272 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_L_SHIFT (0U) 7273 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_L_WIDTH (8U) 7274 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_20_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_20_SDUa_L_MASK) 7275 7276 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_H_MASK (0xFF00U) 7277 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_H_SHIFT (8U) 7278 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_H_WIDTH (8U) 7279 #define CANXL_FILTER_BANK_SRFLT1_20_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_20_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_20_SDUa_H_MASK) 7280 7281 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_L_MASK (0xFF0000U) 7282 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_L_SHIFT (16U) 7283 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_L_WIDTH (8U) 7284 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_20_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_20_SDUb_L_MASK) 7285 7286 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_H_MASK (0xFF000000U) 7287 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_H_SHIFT (24U) 7288 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_H_WIDTH (8U) 7289 #define CANXL_FILTER_BANK_SRFLT1_20_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_20_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_20_SDUb_H_MASK) 7290 /*! @} */ 7291 7292 /*! @name SRFLT1_22 - SDU Rejection Filter */ 7293 /*! @{ */ 7294 7295 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_L_MASK (0xFFU) 7296 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_L_SHIFT (0U) 7297 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_L_WIDTH (8U) 7298 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_22_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_22_SDUa_L_MASK) 7299 7300 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_H_MASK (0xFF00U) 7301 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_H_SHIFT (8U) 7302 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_H_WIDTH (8U) 7303 #define CANXL_FILTER_BANK_SRFLT1_22_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_22_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_22_SDUa_H_MASK) 7304 7305 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_L_MASK (0xFF0000U) 7306 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_L_SHIFT (16U) 7307 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_L_WIDTH (8U) 7308 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_22_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_22_SDUb_L_MASK) 7309 7310 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_H_MASK (0xFF000000U) 7311 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_H_SHIFT (24U) 7312 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_H_WIDTH (8U) 7313 #define CANXL_FILTER_BANK_SRFLT1_22_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_22_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_22_SDUb_H_MASK) 7314 /*! @} */ 7315 7316 /*! @name SRFLT1_24 - SDU Rejection Filter */ 7317 /*! @{ */ 7318 7319 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_L_MASK (0xFFU) 7320 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_L_SHIFT (0U) 7321 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_L_WIDTH (8U) 7322 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_24_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_24_SDUa_L_MASK) 7323 7324 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_H_MASK (0xFF00U) 7325 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_H_SHIFT (8U) 7326 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_H_WIDTH (8U) 7327 #define CANXL_FILTER_BANK_SRFLT1_24_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_24_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_24_SDUa_H_MASK) 7328 7329 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_L_MASK (0xFF0000U) 7330 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_L_SHIFT (16U) 7331 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_L_WIDTH (8U) 7332 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_24_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_24_SDUb_L_MASK) 7333 7334 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_H_MASK (0xFF000000U) 7335 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_H_SHIFT (24U) 7336 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_H_WIDTH (8U) 7337 #define CANXL_FILTER_BANK_SRFLT1_24_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_24_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_24_SDUb_H_MASK) 7338 /*! @} */ 7339 7340 /*! @name SRFLT1_26 - SDU Rejection Filter */ 7341 /*! @{ */ 7342 7343 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_L_MASK (0xFFU) 7344 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_L_SHIFT (0U) 7345 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_L_WIDTH (8U) 7346 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_26_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_26_SDUa_L_MASK) 7347 7348 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_H_MASK (0xFF00U) 7349 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_H_SHIFT (8U) 7350 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_H_WIDTH (8U) 7351 #define CANXL_FILTER_BANK_SRFLT1_26_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_26_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_26_SDUa_H_MASK) 7352 7353 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_L_MASK (0xFF0000U) 7354 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_L_SHIFT (16U) 7355 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_L_WIDTH (8U) 7356 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_26_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_26_SDUb_L_MASK) 7357 7358 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_H_MASK (0xFF000000U) 7359 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_H_SHIFT (24U) 7360 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_H_WIDTH (8U) 7361 #define CANXL_FILTER_BANK_SRFLT1_26_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_26_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_26_SDUb_H_MASK) 7362 /*! @} */ 7363 7364 /*! @name SRFLT1_28 - SDU Rejection Filter */ 7365 /*! @{ */ 7366 7367 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_L_MASK (0xFFU) 7368 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_L_SHIFT (0U) 7369 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_L_WIDTH (8U) 7370 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_28_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_28_SDUa_L_MASK) 7371 7372 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_H_MASK (0xFF00U) 7373 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_H_SHIFT (8U) 7374 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_H_WIDTH (8U) 7375 #define CANXL_FILTER_BANK_SRFLT1_28_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_28_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_28_SDUa_H_MASK) 7376 7377 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_L_MASK (0xFF0000U) 7378 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_L_SHIFT (16U) 7379 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_L_WIDTH (8U) 7380 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_28_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_28_SDUb_L_MASK) 7381 7382 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_H_MASK (0xFF000000U) 7383 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_H_SHIFT (24U) 7384 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_H_WIDTH (8U) 7385 #define CANXL_FILTER_BANK_SRFLT1_28_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_28_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_28_SDUb_H_MASK) 7386 /*! @} */ 7387 7388 /*! @name SRFLT1_30 - SDU Rejection Filter */ 7389 /*! @{ */ 7390 7391 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_L_MASK (0xFFU) 7392 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_L_SHIFT (0U) 7393 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_L_WIDTH (8U) 7394 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_30_SDUa_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_30_SDUa_L_MASK) 7395 7396 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_H_MASK (0xFF00U) 7397 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_H_SHIFT (8U) 7398 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_H_WIDTH (8U) 7399 #define CANXL_FILTER_BANK_SRFLT1_30_SDUa_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_30_SDUa_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_30_SDUa_H_MASK) 7400 7401 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_L_MASK (0xFF0000U) 7402 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_L_SHIFT (16U) 7403 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_L_WIDTH (8U) 7404 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_30_SDUb_L_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_30_SDUb_L_MASK) 7405 7406 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_H_MASK (0xFF000000U) 7407 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_H_SHIFT (24U) 7408 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_H_WIDTH (8U) 7409 #define CANXL_FILTER_BANK_SRFLT1_30_SDUb_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_SRFLT1_30_SDUb_H_SHIFT)) & CANXL_FILTER_BANK_SRFLT1_30_SDUb_H_MASK) 7410 /*! @} */ 7411 7412 /*! @name ARFLT1_0L - ADDR Rejection Filter Low */ 7413 /*! @{ */ 7414 7415 #define CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L_MASK (0xFFFFFFFFU) 7416 #define CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L_SHIFT (0U) 7417 #define CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L_WIDTH (32U) 7418 #define CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_0L_ADDRn_L_MASK) 7419 /*! @} */ 7420 7421 /*! @name ARFLT1_0H - ADDR Rejection Filter High */ 7422 /*! @{ */ 7423 7424 #define CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H_MASK (0xFFFFFFFFU) 7425 #define CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H_SHIFT (0U) 7426 #define CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H_WIDTH (32U) 7427 #define CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_0H_ADDRn_H_MASK) 7428 /*! @} */ 7429 7430 /*! @name ARFLT1_1L - ADDR Rejection Filter Low */ 7431 /*! @{ */ 7432 7433 #define CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L_MASK (0xFFFFFFFFU) 7434 #define CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L_SHIFT (0U) 7435 #define CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L_WIDTH (32U) 7436 #define CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_1L_ADDRn_L_MASK) 7437 /*! @} */ 7438 7439 /*! @name ARFLT1_1H - ADDR Rejection Filter High */ 7440 /*! @{ */ 7441 7442 #define CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H_MASK (0xFFFFFFFFU) 7443 #define CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H_SHIFT (0U) 7444 #define CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H_WIDTH (32U) 7445 #define CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_1H_ADDRn_H_MASK) 7446 /*! @} */ 7447 7448 /*! @name ARFLT1_2L - ADDR Rejection Filter Low */ 7449 /*! @{ */ 7450 7451 #define CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L_MASK (0xFFFFFFFFU) 7452 #define CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L_SHIFT (0U) 7453 #define CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L_WIDTH (32U) 7454 #define CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_2L_ADDRn_L_MASK) 7455 /*! @} */ 7456 7457 /*! @name ARFLT1_2H - ADDR Rejection Filter High */ 7458 /*! @{ */ 7459 7460 #define CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H_MASK (0xFFFFFFFFU) 7461 #define CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H_SHIFT (0U) 7462 #define CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H_WIDTH (32U) 7463 #define CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_2H_ADDRn_H_MASK) 7464 /*! @} */ 7465 7466 /*! @name ARFLT1_3L - ADDR Rejection Filter Low */ 7467 /*! @{ */ 7468 7469 #define CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L_MASK (0xFFFFFFFFU) 7470 #define CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L_SHIFT (0U) 7471 #define CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L_WIDTH (32U) 7472 #define CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_3L_ADDRn_L_MASK) 7473 /*! @} */ 7474 7475 /*! @name ARFLT1_3H - ADDR Rejection Filter High */ 7476 /*! @{ */ 7477 7478 #define CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H_MASK (0xFFFFFFFFU) 7479 #define CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H_SHIFT (0U) 7480 #define CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H_WIDTH (32U) 7481 #define CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_3H_ADDRn_H_MASK) 7482 /*! @} */ 7483 7484 /*! @name ARFLT1_4L - ADDR Rejection Filter Low */ 7485 /*! @{ */ 7486 7487 #define CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L_MASK (0xFFFFFFFFU) 7488 #define CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L_SHIFT (0U) 7489 #define CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L_WIDTH (32U) 7490 #define CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_4L_ADDRn_L_MASK) 7491 /*! @} */ 7492 7493 /*! @name ARFLT1_4H - ADDR Rejection Filter High */ 7494 /*! @{ */ 7495 7496 #define CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H_MASK (0xFFFFFFFFU) 7497 #define CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H_SHIFT (0U) 7498 #define CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H_WIDTH (32U) 7499 #define CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_4H_ADDRn_H_MASK) 7500 /*! @} */ 7501 7502 /*! @name ARFLT1_5L - ADDR Rejection Filter Low */ 7503 /*! @{ */ 7504 7505 #define CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L_MASK (0xFFFFFFFFU) 7506 #define CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L_SHIFT (0U) 7507 #define CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L_WIDTH (32U) 7508 #define CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_5L_ADDRn_L_MASK) 7509 /*! @} */ 7510 7511 /*! @name ARFLT1_5H - ADDR Rejection Filter High */ 7512 /*! @{ */ 7513 7514 #define CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H_MASK (0xFFFFFFFFU) 7515 #define CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H_SHIFT (0U) 7516 #define CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H_WIDTH (32U) 7517 #define CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_5H_ADDRn_H_MASK) 7518 /*! @} */ 7519 7520 /*! @name ARFLT1_6L - ADDR Rejection Filter Low */ 7521 /*! @{ */ 7522 7523 #define CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L_MASK (0xFFFFFFFFU) 7524 #define CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L_SHIFT (0U) 7525 #define CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L_WIDTH (32U) 7526 #define CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_6L_ADDRn_L_MASK) 7527 /*! @} */ 7528 7529 /*! @name ARFLT1_6H - ADDR Rejection Filter High */ 7530 /*! @{ */ 7531 7532 #define CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H_MASK (0xFFFFFFFFU) 7533 #define CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H_SHIFT (0U) 7534 #define CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H_WIDTH (32U) 7535 #define CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_6H_ADDRn_H_MASK) 7536 /*! @} */ 7537 7538 /*! @name ARFLT1_7L - ADDR Rejection Filter Low */ 7539 /*! @{ */ 7540 7541 #define CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L_MASK (0xFFFFFFFFU) 7542 #define CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L_SHIFT (0U) 7543 #define CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L_WIDTH (32U) 7544 #define CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_7L_ADDRn_L_MASK) 7545 /*! @} */ 7546 7547 /*! @name ARFLT1_7H - ADDR Rejection Filter High */ 7548 /*! @{ */ 7549 7550 #define CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H_MASK (0xFFFFFFFFU) 7551 #define CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H_SHIFT (0U) 7552 #define CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H_WIDTH (32U) 7553 #define CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_7H_ADDRn_H_MASK) 7554 /*! @} */ 7555 7556 /*! @name ARFLT1_8L - ADDR Rejection Filter Low */ 7557 /*! @{ */ 7558 7559 #define CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L_MASK (0xFFFFFFFFU) 7560 #define CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L_SHIFT (0U) 7561 #define CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L_WIDTH (32U) 7562 #define CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_8L_ADDRn_L_MASK) 7563 /*! @} */ 7564 7565 /*! @name ARFLT1_8H - ADDR Rejection Filter High */ 7566 /*! @{ */ 7567 7568 #define CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H_MASK (0xFFFFFFFFU) 7569 #define CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H_SHIFT (0U) 7570 #define CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H_WIDTH (32U) 7571 #define CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_8H_ADDRn_H_MASK) 7572 /*! @} */ 7573 7574 /*! @name ARFLT1_9L - ADDR Rejection Filter Low */ 7575 /*! @{ */ 7576 7577 #define CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L_MASK (0xFFFFFFFFU) 7578 #define CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L_SHIFT (0U) 7579 #define CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L_WIDTH (32U) 7580 #define CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_9L_ADDRn_L_MASK) 7581 /*! @} */ 7582 7583 /*! @name ARFLT1_9H - ADDR Rejection Filter High */ 7584 /*! @{ */ 7585 7586 #define CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H_MASK (0xFFFFFFFFU) 7587 #define CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H_SHIFT (0U) 7588 #define CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H_WIDTH (32U) 7589 #define CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_9H_ADDRn_H_MASK) 7590 /*! @} */ 7591 7592 /*! @name ARFLT1_10L - ADDR Rejection Filter Low */ 7593 /*! @{ */ 7594 7595 #define CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L_MASK (0xFFFFFFFFU) 7596 #define CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L_SHIFT (0U) 7597 #define CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L_WIDTH (32U) 7598 #define CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_10L_ADDRn_L_MASK) 7599 /*! @} */ 7600 7601 /*! @name ARFLT1_10H - ADDR Rejection Filter High */ 7602 /*! @{ */ 7603 7604 #define CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H_MASK (0xFFFFFFFFU) 7605 #define CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H_SHIFT (0U) 7606 #define CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H_WIDTH (32U) 7607 #define CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_10H_ADDRn_H_MASK) 7608 /*! @} */ 7609 7610 /*! @name ARFLT1_11L - ADDR Rejection Filter Low */ 7611 /*! @{ */ 7612 7613 #define CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L_MASK (0xFFFFFFFFU) 7614 #define CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L_SHIFT (0U) 7615 #define CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L_WIDTH (32U) 7616 #define CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_11L_ADDRn_L_MASK) 7617 /*! @} */ 7618 7619 /*! @name ARFLT1_11H - ADDR Rejection Filter High */ 7620 /*! @{ */ 7621 7622 #define CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H_MASK (0xFFFFFFFFU) 7623 #define CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H_SHIFT (0U) 7624 #define CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H_WIDTH (32U) 7625 #define CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_11H_ADDRn_H_MASK) 7626 /*! @} */ 7627 7628 /*! @name ARFLT1_12L - ADDR Rejection Filter Low */ 7629 /*! @{ */ 7630 7631 #define CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L_MASK (0xFFFFFFFFU) 7632 #define CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L_SHIFT (0U) 7633 #define CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L_WIDTH (32U) 7634 #define CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_12L_ADDRn_L_MASK) 7635 /*! @} */ 7636 7637 /*! @name ARFLT1_12H - ADDR Rejection Filter High */ 7638 /*! @{ */ 7639 7640 #define CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H_MASK (0xFFFFFFFFU) 7641 #define CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H_SHIFT (0U) 7642 #define CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H_WIDTH (32U) 7643 #define CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_12H_ADDRn_H_MASK) 7644 /*! @} */ 7645 7646 /*! @name ARFLT1_13L - ADDR Rejection Filter Low */ 7647 /*! @{ */ 7648 7649 #define CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L_MASK (0xFFFFFFFFU) 7650 #define CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L_SHIFT (0U) 7651 #define CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L_WIDTH (32U) 7652 #define CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_13L_ADDRn_L_MASK) 7653 /*! @} */ 7654 7655 /*! @name ARFLT1_13H - ADDR Rejection Filter High */ 7656 /*! @{ */ 7657 7658 #define CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H_MASK (0xFFFFFFFFU) 7659 #define CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H_SHIFT (0U) 7660 #define CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H_WIDTH (32U) 7661 #define CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_13H_ADDRn_H_MASK) 7662 /*! @} */ 7663 7664 /*! @name ARFLT1_14L - ADDR Rejection Filter Low */ 7665 /*! @{ */ 7666 7667 #define CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L_MASK (0xFFFFFFFFU) 7668 #define CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L_SHIFT (0U) 7669 #define CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L_WIDTH (32U) 7670 #define CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_14L_ADDRn_L_MASK) 7671 /*! @} */ 7672 7673 /*! @name ARFLT1_14H - ADDR Rejection Filter High */ 7674 /*! @{ */ 7675 7676 #define CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H_MASK (0xFFFFFFFFU) 7677 #define CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H_SHIFT (0U) 7678 #define CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H_WIDTH (32U) 7679 #define CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_14H_ADDRn_H_MASK) 7680 /*! @} */ 7681 7682 /*! @name ARFLT1_15L - ADDR Rejection Filter Low */ 7683 /*! @{ */ 7684 7685 #define CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L_MASK (0xFFFFFFFFU) 7686 #define CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L_SHIFT (0U) 7687 #define CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L_WIDTH (32U) 7688 #define CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_15L_ADDRn_L_MASK) 7689 /*! @} */ 7690 7691 /*! @name ARFLT1_15H - ADDR Rejection Filter High */ 7692 /*! @{ */ 7693 7694 #define CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H_MASK (0xFFFFFFFFU) 7695 #define CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H_SHIFT (0U) 7696 #define CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H_WIDTH (32U) 7697 #define CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_15H_ADDRn_H_MASK) 7698 /*! @} */ 7699 7700 /*! @name ARFLT1_16L - ADDR Rejection Filter Low */ 7701 /*! @{ */ 7702 7703 #define CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L_MASK (0xFFFFFFFFU) 7704 #define CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L_SHIFT (0U) 7705 #define CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L_WIDTH (32U) 7706 #define CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_16L_ADDRn_L_MASK) 7707 /*! @} */ 7708 7709 /*! @name ARFLT1_16H - ADDR Rejection Filter High */ 7710 /*! @{ */ 7711 7712 #define CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H_MASK (0xFFFFFFFFU) 7713 #define CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H_SHIFT (0U) 7714 #define CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H_WIDTH (32U) 7715 #define CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_16H_ADDRn_H_MASK) 7716 /*! @} */ 7717 7718 /*! @name ARFLT1_17L - ADDR Rejection Filter Low */ 7719 /*! @{ */ 7720 7721 #define CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L_MASK (0xFFFFFFFFU) 7722 #define CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L_SHIFT (0U) 7723 #define CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L_WIDTH (32U) 7724 #define CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_17L_ADDRn_L_MASK) 7725 /*! @} */ 7726 7727 /*! @name ARFLT1_17H - ADDR Rejection Filter High */ 7728 /*! @{ */ 7729 7730 #define CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H_MASK (0xFFFFFFFFU) 7731 #define CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H_SHIFT (0U) 7732 #define CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H_WIDTH (32U) 7733 #define CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_17H_ADDRn_H_MASK) 7734 /*! @} */ 7735 7736 /*! @name ARFLT1_18L - ADDR Rejection Filter Low */ 7737 /*! @{ */ 7738 7739 #define CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L_MASK (0xFFFFFFFFU) 7740 #define CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L_SHIFT (0U) 7741 #define CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L_WIDTH (32U) 7742 #define CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_18L_ADDRn_L_MASK) 7743 /*! @} */ 7744 7745 /*! @name ARFLT1_18H - ADDR Rejection Filter High */ 7746 /*! @{ */ 7747 7748 #define CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H_MASK (0xFFFFFFFFU) 7749 #define CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H_SHIFT (0U) 7750 #define CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H_WIDTH (32U) 7751 #define CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_18H_ADDRn_H_MASK) 7752 /*! @} */ 7753 7754 /*! @name ARFLT1_19L - ADDR Rejection Filter Low */ 7755 /*! @{ */ 7756 7757 #define CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L_MASK (0xFFFFFFFFU) 7758 #define CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L_SHIFT (0U) 7759 #define CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L_WIDTH (32U) 7760 #define CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_19L_ADDRn_L_MASK) 7761 /*! @} */ 7762 7763 /*! @name ARFLT1_19H - ADDR Rejection Filter High */ 7764 /*! @{ */ 7765 7766 #define CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H_MASK (0xFFFFFFFFU) 7767 #define CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H_SHIFT (0U) 7768 #define CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H_WIDTH (32U) 7769 #define CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_19H_ADDRn_H_MASK) 7770 /*! @} */ 7771 7772 /*! @name ARFLT1_20L - ADDR Rejection Filter Low */ 7773 /*! @{ */ 7774 7775 #define CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L_MASK (0xFFFFFFFFU) 7776 #define CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L_SHIFT (0U) 7777 #define CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L_WIDTH (32U) 7778 #define CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_20L_ADDRn_L_MASK) 7779 /*! @} */ 7780 7781 /*! @name ARFLT1_20H - ADDR Rejection Filter High */ 7782 /*! @{ */ 7783 7784 #define CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H_MASK (0xFFFFFFFFU) 7785 #define CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H_SHIFT (0U) 7786 #define CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H_WIDTH (32U) 7787 #define CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_20H_ADDRn_H_MASK) 7788 /*! @} */ 7789 7790 /*! @name ARFLT1_21L - ADDR Rejection Filter Low */ 7791 /*! @{ */ 7792 7793 #define CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L_MASK (0xFFFFFFFFU) 7794 #define CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L_SHIFT (0U) 7795 #define CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L_WIDTH (32U) 7796 #define CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_21L_ADDRn_L_MASK) 7797 /*! @} */ 7798 7799 /*! @name ARFLT1_21H - ADDR Rejection Filter High */ 7800 /*! @{ */ 7801 7802 #define CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H_MASK (0xFFFFFFFFU) 7803 #define CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H_SHIFT (0U) 7804 #define CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H_WIDTH (32U) 7805 #define CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_21H_ADDRn_H_MASK) 7806 /*! @} */ 7807 7808 /*! @name ARFLT1_22L - ADDR Rejection Filter Low */ 7809 /*! @{ */ 7810 7811 #define CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L_MASK (0xFFFFFFFFU) 7812 #define CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L_SHIFT (0U) 7813 #define CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L_WIDTH (32U) 7814 #define CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_22L_ADDRn_L_MASK) 7815 /*! @} */ 7816 7817 /*! @name ARFLT1_22H - ADDR Rejection Filter High */ 7818 /*! @{ */ 7819 7820 #define CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H_MASK (0xFFFFFFFFU) 7821 #define CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H_SHIFT (0U) 7822 #define CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H_WIDTH (32U) 7823 #define CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_22H_ADDRn_H_MASK) 7824 /*! @} */ 7825 7826 /*! @name ARFLT1_23L - ADDR Rejection Filter Low */ 7827 /*! @{ */ 7828 7829 #define CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L_MASK (0xFFFFFFFFU) 7830 #define CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L_SHIFT (0U) 7831 #define CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L_WIDTH (32U) 7832 #define CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_23L_ADDRn_L_MASK) 7833 /*! @} */ 7834 7835 /*! @name ARFLT1_23H - ADDR Rejection Filter High */ 7836 /*! @{ */ 7837 7838 #define CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H_MASK (0xFFFFFFFFU) 7839 #define CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H_SHIFT (0U) 7840 #define CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H_WIDTH (32U) 7841 #define CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_23H_ADDRn_H_MASK) 7842 /*! @} */ 7843 7844 /*! @name ARFLT1_24L - ADDR Rejection Filter Low */ 7845 /*! @{ */ 7846 7847 #define CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L_MASK (0xFFFFFFFFU) 7848 #define CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L_SHIFT (0U) 7849 #define CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L_WIDTH (32U) 7850 #define CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_24L_ADDRn_L_MASK) 7851 /*! @} */ 7852 7853 /*! @name ARFLT1_24H - ADDR Rejection Filter High */ 7854 /*! @{ */ 7855 7856 #define CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H_MASK (0xFFFFFFFFU) 7857 #define CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H_SHIFT (0U) 7858 #define CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H_WIDTH (32U) 7859 #define CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_24H_ADDRn_H_MASK) 7860 /*! @} */ 7861 7862 /*! @name ARFLT1_25L - ADDR Rejection Filter Low */ 7863 /*! @{ */ 7864 7865 #define CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L_MASK (0xFFFFFFFFU) 7866 #define CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L_SHIFT (0U) 7867 #define CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L_WIDTH (32U) 7868 #define CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_25L_ADDRn_L_MASK) 7869 /*! @} */ 7870 7871 /*! @name ARFLT1_25H - ADDR Rejection Filter High */ 7872 /*! @{ */ 7873 7874 #define CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H_MASK (0xFFFFFFFFU) 7875 #define CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H_SHIFT (0U) 7876 #define CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H_WIDTH (32U) 7877 #define CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_25H_ADDRn_H_MASK) 7878 /*! @} */ 7879 7880 /*! @name ARFLT1_26L - ADDR Rejection Filter Low */ 7881 /*! @{ */ 7882 7883 #define CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L_MASK (0xFFFFFFFFU) 7884 #define CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L_SHIFT (0U) 7885 #define CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L_WIDTH (32U) 7886 #define CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_26L_ADDRn_L_MASK) 7887 /*! @} */ 7888 7889 /*! @name ARFLT1_26H - ADDR Rejection Filter High */ 7890 /*! @{ */ 7891 7892 #define CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H_MASK (0xFFFFFFFFU) 7893 #define CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H_SHIFT (0U) 7894 #define CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H_WIDTH (32U) 7895 #define CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_26H_ADDRn_H_MASK) 7896 /*! @} */ 7897 7898 /*! @name ARFLT1_27L - ADDR Rejection Filter Low */ 7899 /*! @{ */ 7900 7901 #define CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L_MASK (0xFFFFFFFFU) 7902 #define CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L_SHIFT (0U) 7903 #define CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L_WIDTH (32U) 7904 #define CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_27L_ADDRn_L_MASK) 7905 /*! @} */ 7906 7907 /*! @name ARFLT1_27H - ADDR Rejection Filter High */ 7908 /*! @{ */ 7909 7910 #define CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H_MASK (0xFFFFFFFFU) 7911 #define CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H_SHIFT (0U) 7912 #define CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H_WIDTH (32U) 7913 #define CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_27H_ADDRn_H_MASK) 7914 /*! @} */ 7915 7916 /*! @name ARFLT1_28L - ADDR Rejection Filter Low */ 7917 /*! @{ */ 7918 7919 #define CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L_MASK (0xFFFFFFFFU) 7920 #define CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L_SHIFT (0U) 7921 #define CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L_WIDTH (32U) 7922 #define CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_28L_ADDRn_L_MASK) 7923 /*! @} */ 7924 7925 /*! @name ARFLT1_28H - ADDR Rejection Filter High */ 7926 /*! @{ */ 7927 7928 #define CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H_MASK (0xFFFFFFFFU) 7929 #define CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H_SHIFT (0U) 7930 #define CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H_WIDTH (32U) 7931 #define CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_28H_ADDRn_H_MASK) 7932 /*! @} */ 7933 7934 /*! @name ARFLT1_29L - ADDR Rejection Filter Low */ 7935 /*! @{ */ 7936 7937 #define CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L_MASK (0xFFFFFFFFU) 7938 #define CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L_SHIFT (0U) 7939 #define CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L_WIDTH (32U) 7940 #define CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_29L_ADDRn_L_MASK) 7941 /*! @} */ 7942 7943 /*! @name ARFLT1_29H - ADDR Rejection Filter High */ 7944 /*! @{ */ 7945 7946 #define CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H_MASK (0xFFFFFFFFU) 7947 #define CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H_SHIFT (0U) 7948 #define CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H_WIDTH (32U) 7949 #define CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_29H_ADDRn_H_MASK) 7950 /*! @} */ 7951 7952 /*! @name ARFLT1_30L - ADDR Rejection Filter Low */ 7953 /*! @{ */ 7954 7955 #define CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L_MASK (0xFFFFFFFFU) 7956 #define CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L_SHIFT (0U) 7957 #define CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L_WIDTH (32U) 7958 #define CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_30L_ADDRn_L_MASK) 7959 /*! @} */ 7960 7961 /*! @name ARFLT1_30H - ADDR Rejection Filter High */ 7962 /*! @{ */ 7963 7964 #define CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H_MASK (0xFFFFFFFFU) 7965 #define CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H_SHIFT (0U) 7966 #define CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H_WIDTH (32U) 7967 #define CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_30H_ADDRn_H_MASK) 7968 /*! @} */ 7969 7970 /*! @name ARFLT1_31L - ADDR Rejection Filter Low */ 7971 /*! @{ */ 7972 7973 #define CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L_MASK (0xFFFFFFFFU) 7974 #define CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L_SHIFT (0U) 7975 #define CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L_WIDTH (32U) 7976 #define CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_31L_ADDRn_L_MASK) 7977 /*! @} */ 7978 7979 /*! @name ARFLT1_31H - ADDR Rejection Filter High */ 7980 /*! @{ */ 7981 7982 #define CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H_MASK (0xFFFFFFFFU) 7983 #define CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H_SHIFT (0U) 7984 #define CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H_WIDTH (32U) 7985 #define CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H(x) (((uint32_t)(((uint32_t)(x)) << CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H_SHIFT)) & CANXL_FILTER_BANK_ARFLT1_31H_ADDRn_H_MASK) 7986 /*! @} */ 7987 7988 /*! 7989 * @} 7990 */ /* end of group CANXL_FILTER_BANK_Register_Masks */ 7991 7992 /*! 7993 * @} 7994 */ /* end of group CANXL_FILTER_BANK_Peripheral_Access_Layer */ 7995 7996 #endif /* #if !defined(S32Z2_CANXL_FILTER_BANK_H_) */ 7997
