1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_spi.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F1xx_HAL_SPI_H 21 #define STM32F1xx_HAL_SPI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f1xx_hal_def.h" 29 30 /** @addtogroup STM32F1xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SPI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SPI_Exported_Types SPI Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief SPI Configuration Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t Mode; /*!< Specifies the SPI operating mode. 49 This parameter can be a value of @ref SPI_Mode */ 50 51 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. 52 This parameter can be a value of @ref SPI_Direction */ 53 54 uint32_t DataSize; /*!< Specifies the SPI data size. 55 This parameter can be a value of @ref SPI_Data_Size */ 56 57 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. 58 This parameter can be a value of @ref SPI_Clock_Polarity */ 59 60 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. 61 This parameter can be a value of @ref SPI_Clock_Phase */ 62 63 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by 64 hardware (NSS pin) or by software using the SSI bit. 65 This parameter can be a value of @ref SPI_Slave_Select_management */ 66 67 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be 68 used to configure the transmit and receive SCK clock. 69 This parameter can be a value of @ref SPI_BaudRate_Prescaler 70 @note The communication clock is derived from the master 71 clock. The slave clock does not need to be set. */ 72 73 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 74 This parameter can be a value of @ref SPI_MSB_LSB_transmission */ 75 76 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. 77 This parameter can be a value of @ref SPI_TI_mode */ 78 79 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. 80 This parameter can be a value of @ref SPI_CRC_Calculation */ 81 82 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. 83 This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ 84 } SPI_InitTypeDef; 85 86 /** 87 * @brief HAL SPI State structure definition 88 */ 89 typedef enum 90 { 91 HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ 92 HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 93 HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 94 HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 95 HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 96 HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 97 HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ 98 HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ 99 } HAL_SPI_StateTypeDef; 100 101 /** 102 * @brief SPI handle Structure definition 103 */ 104 typedef struct __SPI_HandleTypeDef 105 { 106 SPI_TypeDef *Instance; /*!< SPI registers base address */ 107 108 SPI_InitTypeDef Init; /*!< SPI communication parameters */ 109 110 const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ 111 112 uint16_t TxXferSize; /*!< SPI Tx Transfer size */ 113 114 __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ 115 116 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ 117 118 uint16_t RxXferSize; /*!< SPI Rx Transfer size */ 119 120 __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ 121 122 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ 123 124 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ 125 126 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ 127 128 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ 129 130 HAL_LockTypeDef Lock; /*!< Locking object */ 131 132 __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ 133 134 __IO uint32_t ErrorCode; /*!< SPI Error code */ 135 136 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 137 void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ 138 void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ 139 void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ 140 void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ 141 void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ 142 void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ 143 void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ 144 void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ 145 void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ 146 void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ 147 148 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 149 } SPI_HandleTypeDef; 150 151 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 152 /** 153 * @brief HAL SPI Callback ID enumeration definition 154 */ 155 typedef enum 156 { 157 HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ 158 HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ 159 HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ 160 HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ 161 HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ 162 HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ 163 HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ 164 HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ 165 HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ 166 HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ 167 168 } HAL_SPI_CallbackIDTypeDef; 169 170 /** 171 * @brief HAL SPI Callback pointer definition 172 */ 173 typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ 174 175 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 176 /** 177 * @} 178 */ 179 180 /* Exported constants --------------------------------------------------------*/ 181 /** @defgroup SPI_Exported_Constants SPI Exported Constants 182 * @{ 183 */ 184 185 /** @defgroup SPI_Error_Code SPI Error Code 186 * @{ 187 */ 188 #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ 189 #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ 190 #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ 191 #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ 192 #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 193 #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ 194 #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ 195 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 196 #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ 197 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 198 /** 199 * @} 200 */ 201 202 /** @defgroup SPI_Mode SPI Mode 203 * @{ 204 */ 205 #define SPI_MODE_SLAVE (0x00000000U) 206 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) 207 /** 208 * @} 209 */ 210 211 /** @defgroup SPI_Direction SPI Direction Mode 212 * @{ 213 */ 214 #define SPI_DIRECTION_2LINES (0x00000000U) 215 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY 216 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE 217 /** 218 * @} 219 */ 220 221 /** @defgroup SPI_Data_Size SPI Data Size 222 * @{ 223 */ 224 #define SPI_DATASIZE_8BIT (0x00000000U) 225 #define SPI_DATASIZE_16BIT SPI_CR1_DFF 226 /** 227 * @} 228 */ 229 230 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity 231 * @{ 232 */ 233 #define SPI_POLARITY_LOW (0x00000000U) 234 #define SPI_POLARITY_HIGH SPI_CR1_CPOL 235 /** 236 * @} 237 */ 238 239 /** @defgroup SPI_Clock_Phase SPI Clock Phase 240 * @{ 241 */ 242 #define SPI_PHASE_1EDGE (0x00000000U) 243 #define SPI_PHASE_2EDGE SPI_CR1_CPHA 244 /** 245 * @} 246 */ 247 248 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management 249 * @{ 250 */ 251 #define SPI_NSS_SOFT SPI_CR1_SSM 252 #define SPI_NSS_HARD_INPUT (0x00000000U) 253 #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) 254 /** 255 * @} 256 */ 257 258 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler 259 * @{ 260 */ 261 #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) 262 #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) 263 #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) 264 #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) 265 #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) 266 #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) 267 #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) 268 #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) 269 /** 270 * @} 271 */ 272 273 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission 274 * @{ 275 */ 276 #define SPI_FIRSTBIT_MSB (0x00000000U) 277 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST 278 /** 279 * @} 280 */ 281 282 /** @defgroup SPI_TI_mode SPI TI Mode 283 * @{ 284 */ 285 #define SPI_TIMODE_DISABLE (0x00000000U) 286 /** 287 * @} 288 */ 289 290 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation 291 * @{ 292 */ 293 #define SPI_CRCCALCULATION_DISABLE (0x00000000U) 294 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN 295 /** 296 * @} 297 */ 298 299 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition 300 * @{ 301 */ 302 #define SPI_IT_TXE SPI_CR2_TXEIE 303 #define SPI_IT_RXNE SPI_CR2_RXNEIE 304 #define SPI_IT_ERR SPI_CR2_ERRIE 305 /** 306 * @} 307 */ 308 309 /** @defgroup SPI_Flags_definition SPI Flags Definition 310 * @{ 311 */ 312 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ 313 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ 314 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ 315 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ 316 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ 317 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ 318 #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\ 319 | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR) 320 /** 321 * @} 322 */ 323 324 /** 325 * @} 326 */ 327 328 /* Exported macros -----------------------------------------------------------*/ 329 /** @defgroup SPI_Exported_Macros SPI Exported Macros 330 * @{ 331 */ 332 333 /** @brief Reset SPI handle state. 334 * @param __HANDLE__ specifies the SPI Handle. 335 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 336 * @retval None 337 */ 338 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 339 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \ 340 do{ \ 341 (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ 342 (__HANDLE__)->MspInitCallback = NULL; \ 343 (__HANDLE__)->MspDeInitCallback = NULL; \ 344 } while(0) 345 #else 346 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) 347 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 348 349 /** @brief Enable the specified SPI interrupts. 350 * @param __HANDLE__ specifies the SPI Handle. 351 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 352 * @param __INTERRUPT__ specifies the interrupt source to enable. 353 * This parameter can be one of the following values: 354 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 355 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 356 * @arg SPI_IT_ERR: Error interrupt enable 357 * @retval None 358 */ 359 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 360 361 /** @brief Disable the specified SPI interrupts. 362 * @param __HANDLE__ specifies the SPI handle. 363 * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. 364 * @param __INTERRUPT__ specifies the interrupt source to disable. 365 * This parameter can be one of the following values: 366 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 367 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 368 * @arg SPI_IT_ERR: Error interrupt enable 369 * @retval None 370 */ 371 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) 372 373 /** @brief Check whether the specified SPI interrupt source is enabled or not. 374 * @param __HANDLE__ specifies the SPI Handle. 375 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 376 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 377 * This parameter can be one of the following values: 378 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 379 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 380 * @arg SPI_IT_ERR: Error interrupt enable 381 * @retval The new state of __IT__ (TRUE or FALSE). 382 */ 383 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 384 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 385 386 /** @brief Check whether the specified SPI flag is set or not. 387 * @param __HANDLE__ specifies the SPI Handle. 388 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 389 * @param __FLAG__ specifies the flag to check. 390 * This parameter can be one of the following values: 391 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 392 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 393 * @arg SPI_FLAG_CRCERR: CRC error flag 394 * @arg SPI_FLAG_MODF: Mode fault flag 395 * @arg SPI_FLAG_OVR: Overrun flag 396 * @arg SPI_FLAG_BSY: Busy flag 397 * @retval The new state of __FLAG__ (TRUE or FALSE). 398 */ 399 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 400 401 /** @brief Clear the SPI CRCERR pending flag. 402 * @param __HANDLE__ specifies the SPI Handle. 403 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 404 * @retval None 405 */ 406 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) 407 408 /** @brief Clear the SPI MODF pending flag. 409 * @param __HANDLE__ specifies the SPI Handle. 410 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 411 * @retval None 412 */ 413 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ 414 do{ \ 415 __IO uint32_t tmpreg_modf = 0x00U; \ 416 tmpreg_modf = (__HANDLE__)->Instance->SR; \ 417 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ 418 UNUSED(tmpreg_modf); \ 419 } while(0U) 420 421 /** @brief Clear the SPI OVR pending flag. 422 * @param __HANDLE__ specifies the SPI Handle. 423 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 424 * @retval None 425 */ 426 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ 427 do{ \ 428 __IO uint32_t tmpreg_ovr = 0x00U; \ 429 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 430 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 431 UNUSED(tmpreg_ovr); \ 432 } while(0U) 433 434 /** @brief Enable the SPI peripheral. 435 * @param __HANDLE__ specifies the SPI Handle. 436 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 437 * @retval None 438 */ 439 #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 440 441 /** @brief Disable the SPI peripheral. 442 * @param __HANDLE__ specifies the SPI Handle. 443 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 444 * @retval None 445 */ 446 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) 447 448 /** 449 * @} 450 */ 451 452 /* Private constants ---------------------------------------------------------*/ 453 /** @defgroup SPI_Private_Constants SPI Private Constants 454 * @{ 455 */ 456 #define SPI_INVALID_CRC_ERROR 0U /* CRC error wrongly detected */ 457 #define SPI_VALID_CRC_ERROR 1U /* CRC error is true */ 458 /** 459 * @} 460 */ 461 462 /* Private macros ------------------------------------------------------------*/ 463 /** @defgroup SPI_Private_Macros SPI Private Macros 464 * @{ 465 */ 466 467 /** @brief Set the SPI transmit-only mode. 468 * @param __HANDLE__ specifies the SPI Handle. 469 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 470 * @retval None 471 */ 472 #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 473 474 /** @brief Set the SPI receive-only mode. 475 * @param __HANDLE__ specifies the SPI Handle. 476 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 477 * @retval None 478 */ 479 #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) 480 481 /** @brief Reset the CRC calculation of the SPI. 482 * @param __HANDLE__ specifies the SPI Handle. 483 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. 484 * @retval None 485 */ 486 #define SPI_RESET_CRC(__HANDLE__) \ 487 do{ \ 488 CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ 489 SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \ 490 } while(0U) 491 492 /** @brief Check whether the specified SPI flag is set or not. 493 * @param __SR__ copy of SPI SR register. 494 * @param __FLAG__ specifies the flag to check. 495 * This parameter can be one of the following values: 496 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag 497 * @arg SPI_FLAG_TXE: Transmit buffer empty flag 498 * @arg SPI_FLAG_CRCERR: CRC error flag 499 * @arg SPI_FLAG_MODF: Mode fault flag 500 * @arg SPI_FLAG_OVR: Overrun flag 501 * @arg SPI_FLAG_BSY: Busy flag 502 * @retval SET or RESET. 503 */ 504 #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ 505 ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) 506 507 /** @brief Check whether the specified SPI Interrupt is set or not. 508 * @param __CR2__ copy of SPI CR2 register. 509 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 510 * This parameter can be one of the following values: 511 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable 512 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable 513 * @arg SPI_IT_ERR: Error interrupt enable 514 * @retval SET or RESET. 515 */ 516 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ 517 (__INTERRUPT__)) ? SET : RESET) 518 519 /** @brief Checks if SPI Mode parameter is in allowed range. 520 * @param __MODE__ specifies the SPI Mode. 521 * This parameter can be a value of @ref SPI_Mode 522 * @retval None 523 */ 524 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ 525 ((__MODE__) == SPI_MODE_MASTER)) 526 527 /** @brief Checks if SPI Direction Mode parameter is in allowed range. 528 * @param __MODE__ specifies the SPI Direction Mode. 529 * This parameter can be a value of @ref SPI_Direction 530 * @retval None 531 */ 532 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 533 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ 534 ((__MODE__) == SPI_DIRECTION_1LINE)) 535 536 /** @brief Checks if SPI Direction Mode parameter is 2 lines. 537 * @param __MODE__ specifies the SPI Direction Mode. 538 * @retval None 539 */ 540 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) 541 542 /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. 543 * @param __MODE__ specifies the SPI Direction Mode. 544 * @retval None 545 */ 546 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ 547 ((__MODE__) == SPI_DIRECTION_1LINE)) 548 549 /** @brief Checks if SPI Data Size parameter is in allowed range. 550 * @param __DATASIZE__ specifies the SPI Data Size. 551 * This parameter can be a value of @ref SPI_Data_Size 552 * @retval None 553 */ 554 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ 555 ((__DATASIZE__) == SPI_DATASIZE_8BIT)) 556 557 /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. 558 * @param __CPOL__ specifies the SPI serial clock steady state. 559 * This parameter can be a value of @ref SPI_Clock_Polarity 560 * @retval None 561 */ 562 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ 563 ((__CPOL__) == SPI_POLARITY_HIGH)) 564 565 /** @brief Checks if SPI Clock Phase parameter is in allowed range. 566 * @param __CPHA__ specifies the SPI Clock Phase. 567 * This parameter can be a value of @ref SPI_Clock_Phase 568 * @retval None 569 */ 570 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ 571 ((__CPHA__) == SPI_PHASE_2EDGE)) 572 573 /** @brief Checks if SPI Slave Select parameter is in allowed range. 574 * @param __NSS__ specifies the SPI Slave Select management parameter. 575 * This parameter can be a value of @ref SPI_Slave_Select_management 576 * @retval None 577 */ 578 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ 579 ((__NSS__) == SPI_NSS_HARD_INPUT) || \ 580 ((__NSS__) == SPI_NSS_HARD_OUTPUT)) 581 582 /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. 583 * @param __PRESCALER__ specifies the SPI Baudrate prescaler. 584 * This parameter can be a value of @ref SPI_BaudRate_Prescaler 585 * @retval None 586 */ 587 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ 588 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ 589 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ 590 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ 591 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ 592 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ 593 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ 594 ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) 595 596 /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. 597 * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). 598 * This parameter can be a value of @ref SPI_MSB_LSB_transmission 599 * @retval None 600 */ 601 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ 602 ((__BIT__) == SPI_FIRSTBIT_LSB)) 603 604 /** @brief Checks if SPI TI mode parameter is disabled. 605 * @param __MODE__ SPI_TIMODE_DISABLE. Device not support Ti Mode. 606 * This parameter can be a value of @ref SPI_TI_mode 607 * @retval None 608 */ 609 #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) 610 611 /** @brief Checks if SPI CRC calculation enabled state is in allowed range. 612 * @param __CALCULATION__ specifies the SPI CRC calculation enable state. 613 * This parameter can be a value of @ref SPI_CRC_Calculation 614 * @retval None 615 */ 616 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ 617 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) 618 619 /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. 620 * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. 621 * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 622 * @retval None 623 */ 624 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ 625 ((__POLYNOMIAL__) <= 0xFFFFU) && \ 626 (((__POLYNOMIAL__)&0x1U) != 0U)) 627 628 /** @brief Checks if DMA handle is valid. 629 * @param __HANDLE__ specifies a DMA Handle. 630 * @retval None 631 */ 632 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) 633 634 /** 635 * @} 636 */ 637 638 /* Private functions ---------------------------------------------------------*/ 639 /** @defgroup SPI_Private_Functions SPI Private Functions 640 * @{ 641 */ 642 uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi); 643 /** 644 * @} 645 */ 646 647 /* Exported functions --------------------------------------------------------*/ 648 /** @addtogroup SPI_Exported_Functions 649 * @{ 650 */ 651 652 /** @addtogroup SPI_Exported_Functions_Group1 653 * @{ 654 */ 655 /* Initialization/de-initialization functions ********************************/ 656 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); 657 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); 658 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); 659 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); 660 661 /* Callbacks Register/UnRegister functions ***********************************/ 662 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) 663 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, 664 pSPI_CallbackTypeDef pCallback); 665 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); 666 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ 667 /** 668 * @} 669 */ 670 671 /** @addtogroup SPI_Exported_Functions_Group2 672 * @{ 673 */ 674 /* I/O operation functions ***************************************************/ 675 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 676 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); 677 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 678 uint16_t Size, uint32_t Timeout); 679 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); 680 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 681 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 682 uint16_t Size); 683 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size); 684 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); 685 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, 686 uint16_t Size); 687 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); 688 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); 689 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); 690 /* Transfer Abort functions */ 691 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); 692 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); 693 694 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); 695 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); 696 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); 697 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); 698 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); 699 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); 700 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); 701 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); 702 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); 703 /** 704 * @} 705 */ 706 707 /** @addtogroup SPI_Exported_Functions_Group3 708 * @{ 709 */ 710 /* Peripheral State and Error functions ***************************************/ 711 HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi); 712 uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi); 713 /** 714 * @} 715 */ 716 717 /** 718 * @} 719 */ 720 721 /** 722 * @} 723 */ 724 725 /** 726 * @} 727 */ 728 729 #ifdef __cplusplus 730 } 731 #endif 732 733 #endif /* STM32F1xx_HAL_SPI_H */ 734 735
