1 /* 2 * Copyright 2022-2023 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_ 7 #define ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_ 8 9 #include <zephyr/drivers/spi.h> 10 #include <zephyr/logging/log.h> 11 12 #define LOG_LEVEL CONFIG_SPI_LOG_LEVEL 13 LOG_MODULE_REGISTER(spi_nxp_s32); 14 15 #include "spi_context.h" 16 17 #include <Spi_Ip.h> 18 19 #define SPI_NXP_S32_NUM_PRESCALER 4U 20 #define SPI_NXP_S32_NUM_SCALER 16U 21 22 /* Modified SPI transfer format is not supported, 23 * the maximum baudrate is 25Mhz. 24 */ 25 #define SPI_NXP_S32_MIN_FREQ 100000U 26 #define SPI_NXP_S32_MAX_FREQ 25000000U 27 28 #define SPI_NXP_S32_BYTE_PER_FRAME(frame_size) \ 29 (frame_size <= 8U) ? 1U : ((frame_size <= 16U) ? 2U : 4U) 30 31 #define SPI_NXP_S32_MAX_BYTES_PER_PACKAGE(bytes_per_frame) \ 32 ((UINT16_MAX / bytes_per_frame) * bytes_per_frame) 33 34 struct spi_nxp_s32_baudrate_param { 35 uint8_t scaler; 36 uint8_t prescaler; 37 uint32_t frequency; 38 }; 39 40 struct spi_nxp_s32_data { 41 uint8_t bytes_per_frame; 42 uint32_t transfer_len; 43 struct spi_context ctx; 44 45 Spi_Ip_ExternalDeviceType transfer_cfg; 46 Spi_Ip_DeviceParamsType transfer_params; 47 }; 48 49 struct spi_nxp_s32_config { 50 uint8_t num_cs; 51 const struct device *clock_dev; 52 clock_control_subsys_t clock_subsys; 53 uint32_t sck_cs_delay; 54 uint32_t cs_sck_delay; 55 uint32_t cs_cs_delay; 56 57 Spi_Ip_ConfigType *spi_hw_cfg; 58 const struct pinctrl_dev_config *pincfg; 59 60 #ifdef CONFIG_NXP_S32_SPI_INTERRUPT 61 Spi_Ip_CallbackType cb; 62 void (*irq_config_func)(const struct device *dev); 63 #endif /* CONFIG_NXP_S32_SPI_INTERRUPT */ 64 }; 65 66 #endif /* ZEPHYR_DRIVERS_SPI_SPI_NXP_S32_H_ */ 67
