1 /* 2 * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #pragma once 8 9 #include <stdint.h> 10 #include "esp_attr.h" 11 #include "esp_bit_defs.h" 12 #include "soc/clk_tree_defs.h" 13 #include "soc/soc_caps.h" 14 #include "sdkconfig.h" 15 16 /** 17 * @brief Enum with the three SPI peripherals that are software-accessible in it 18 */ 19 typedef enum { 20 //SPI1 can be used as GPSPI only on ESP32 21 SPI1_HOST=0, ///< SPI1 22 SPI2_HOST=1, ///< SPI2 23 #if SOC_SPI_PERIPH_NUM > 2 24 SPI3_HOST=2, ///< SPI3 25 #endif 26 SPI_HOST_MAX, ///< invalid host value 27 } spi_host_device_t; 28 29 /** 30 * @brief Type of SPI clock source. 31 */ 32 typedef soc_periph_spi_clk_src_t spi_clock_source_t; 33 34 /// SPI Events 35 typedef enum { 36 /* Slave HD Only */ 37 SPI_EV_BUF_TX = BIT(0), ///< The buffer has sent data to master. 38 SPI_EV_BUF_RX = BIT(1), ///< The buffer has received data from master. 39 SPI_EV_SEND_DMA_READY = BIT(2), ///< Slave has loaded its TX data buffer to the hardware (DMA). 40 SPI_EV_SEND = BIT(3), ///< Master has received certain number of the data, the number is determined by Master. 41 SPI_EV_RECV_DMA_READY = BIT(4), ///< Slave has loaded its RX data buffer to the hardware (DMA). 42 SPI_EV_RECV = BIT(5), ///< Slave has received certain number of data from master, the number is determined by Master. 43 SPI_EV_CMD9 = BIT(6), ///< Received CMD9 from master. 44 SPI_EV_CMDA = BIT(7), ///< Received CMDA from master. 45 /* Common Event */ 46 SPI_EV_TRANS = BIT(8), ///< A transaction has done 47 } spi_event_t; 48 FLAG_ATTR(spi_event_t) 49 50 /** 51 * @brief Line mode of SPI transaction phases: CMD, ADDR, DOUT/DIN. 52 */ 53 typedef struct { 54 uint8_t cmd_lines; ///< The line width of command phase, e.g. 2-line-cmd-phase. 55 uint8_t addr_lines; ///< The line width of address phase, e.g. 1-line-addr-phase. 56 uint8_t data_lines; ///< The line width of data phase, e.g. 4-line-data-phase. 57 } spi_line_mode_t; 58 59 /** 60 * @brief SPI command. 61 */ 62 typedef enum { 63 /* Slave HD Only */ 64 SPI_CMD_HD_WRBUF = BIT(0), 65 SPI_CMD_HD_RDBUF = BIT(1), 66 SPI_CMD_HD_WRDMA = BIT(2), 67 SPI_CMD_HD_RDDMA = BIT(3), 68 SPI_CMD_HD_SEG_END = BIT(4), 69 SPI_CMD_HD_EN_QPI = BIT(5), 70 SPI_CMD_HD_WR_END = BIT(6), 71 SPI_CMD_HD_INT0 = BIT(7), 72 SPI_CMD_HD_INT1 = BIT(8), 73 SPI_CMD_HD_INT2 = BIT(9), 74 } spi_command_t; 75 76 /** @cond */ //Doxy command to hide preprocessor definitions from docs */ 77 78 //alias for different chips, deprecated for the chips after esp32s2 79 #ifdef CONFIG_IDF_TARGET_ESP32 80 #define SPI_HOST SPI1_HOST 81 #define HSPI_HOST SPI2_HOST 82 #define VSPI_HOST SPI3_HOST 83 #elif CONFIG_IDF_TARGET_ESP32S2 84 // SPI_HOST (SPI1_HOST) is not supported by the SPI Master and SPI Slave driver on ESP32-S2 and later 85 #define SPI_HOST SPI1_HOST 86 #define FSPI_HOST SPI2_HOST 87 #define HSPI_HOST SPI3_HOST 88 #endif 89 90 /** @endcond */ 91