1 /*
2 * Copyright 2017-2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13 /* clang-format off */
14 /*
15 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16 !!GlobalInfo
17 product: Pins v8.0
18 processor: LPC55S16
19 package_id: LPC55S16JBD100
20 mcu_data: ksdk2_0
21 processor_version: 0.8.6
22 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
23 */
24 /* clang-format on */
25
26 #include "fsl_common.h"
27 #include "fsl_iocon.h"
28 #include "pin_mux.h"
29 #include "fsl_power.h"
30
31 /* FUNCTION ************************************************************************************************************
32 *
33 * Function Name : BOARD_InitBootPins
34 * Description : Calls initialization functions.
35 *
36 * END ****************************************************************************************************************/
BOARD_InitBootPins(void)37 void BOARD_InitBootPins(void)
38 {
39 BOARD_InitPins();
40 }
41
42 /* clang-format off */
43 /*
44 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
45 BOARD_InitPins:
46 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
47 - pin_list:
48 - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
49 slew_rate: standard, invert: disabled, open_drain: disabled}
50 - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
51 mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
52 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
53 */
54 /* clang-format on */
55
56 /* FUNCTION ************************************************************************************************************
57 *
58 * Function Name : BOARD_InitPins
59 * Description : Configures pin routing and optionally pin electrical features.
60 *
61 * END ****************************************************************************************************************/
62 /* Function assigned for the Cortex-M33 */
BOARD_InitPins(void)63 void BOARD_InitPins(void)
64 {
65 /* set BOD VBAT level to 1.65V */
66 POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
67
68 /* Enables the clock for the I/O controller.: Enable Clock. */
69 CLOCK_EnableClock(kCLOCK_Iocon);
70
71 const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
72 IOCON_PIO_FUNC1 |
73 /* No addition pin function */
74 IOCON_PIO_MODE_INACT |
75 /* Standard mode, output slew rate control is enabled */
76 IOCON_PIO_SLEW_STANDARD |
77 /* Input function is not inverted */
78 IOCON_PIO_INV_DI |
79 /* Enables digital function */
80 IOCON_PIO_DIGITAL_EN |
81 /* Open drain is disabled */
82 IOCON_PIO_OPENDRAIN_DI);
83 /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
84 IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
85
86 const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
87 IOCON_PIO_FUNC1 |
88 /* No addition pin function */
89 IOCON_PIO_MODE_INACT |
90 /* Standard mode, output slew rate control is enabled */
91 IOCON_PIO_SLEW_STANDARD |
92 /* Input function is not inverted */
93 IOCON_PIO_INV_DI |
94 /* Enables digital function */
95 IOCON_PIO_DIGITAL_EN |
96 /* Open drain is disabled */
97 IOCON_PIO_OPENDRAIN_DI);
98 /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
99 IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
100
101 const uint32_t port0_pin15_config = (/* Pin is configured as PIO1_18 */
102 IOCON_PIO_FUNC1 |
103 /* No addition pin function */
104 IOCON_PIO_MODE_INACT |
105 /* Standard mode, output slew rate control is enabled */
106 IOCON_PIO_SLEW_STANDARD |
107 /* Input function is not inverted */
108 IOCON_PIO_INV_DI |
109 /* Enables digital function */
110 IOCON_PIO_DIGITAL_EN |
111 /* Open drain is disabled */
112 IOCON_PIO_OPENDRAIN_DI);
113 /* PORT0 PIN15 (coords: 64) is configured as PIO0_15 */
114 IOCON_PinMuxSet(IOCON, 0U, 15U, port0_pin15_config);
115 }
116
117 /* clang-format off */
118 /*
119 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
120 I2C4_InitPins:
121 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
122 - pin_list:
123 - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
124 slew_rate: standard, invert: disabled, open_drain: enabled}
125 - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
126 invert: disabled, open_drain: enabled}
127 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
128 */
129 /* clang-format on */
130
131 /* FUNCTION ************************************************************************************************************
132 *
133 * Function Name : I2C4_InitPins
134 * Description : Configures pin routing and optionally pin electrical features.
135 *
136 * END ****************************************************************************************************************/
137 /* Function assigned for the Cortex-M33 */
I2C4_InitPins(void)138 void I2C4_InitPins(void)
139 {
140 /* Enables the clock for the I/O controller.: Enable Clock. */
141 CLOCK_EnableClock(kCLOCK_Iocon);
142
143 const uint32_t port1_pin20_config = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
144 IOCON_PIO_FUNC5 |
145 /* Selects pull-up function */
146 IOCON_PIO_MODE_PULLUP |
147 /* Standard mode, output slew rate control is enabled */
148 IOCON_PIO_SLEW_STANDARD |
149 /* Input function is not inverted */
150 IOCON_PIO_INV_DI |
151 /* Enables digital function */
152 IOCON_PIO_DIGITAL_EN |
153 /* Open drain is enabled */
154 IOCON_PIO_OPENDRAIN_EN);
155 /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
156 IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
157
158 const uint32_t port1_pin21_config = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
159 IOCON_PIO_FUNC5 |
160 /* Selects pull-up function */
161 IOCON_PIO_MODE_PULLUP |
162 /* Standard mode, output slew rate control is enabled */
163 IOCON_PIO_SLEW_STANDARD |
164 /* Input function is not inverted */
165 IOCON_PIO_INV_DI |
166 /* Enables digital function */
167 IOCON_PIO_DIGITAL_EN |
168 /* Open drain is enabled */
169 IOCON_PIO_OPENDRAIN_EN);
170 /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
171 IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
172 }
173
174 /* clang-format off */
175 /*
176 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
177 I2C4_DeinitPins:
178 - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
179 - pin_list:
180 - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: inactive, slew_rate: standard,
181 invert: disabled, open_drain: disabled}
182 - {pin_num: '30', peripheral: GPIO, signal: 'PIO1, 21', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: inactive, slew_rate: standard,
183 invert: disabled, open_drain: disabled}
184 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
185 */
186 /* clang-format on */
187
188 /* FUNCTION ************************************************************************************************************
189 *
190 * Function Name : I2C4_DeinitPins
191 * Description : Configures pin routing and optionally pin electrical features.
192 *
193 * END ****************************************************************************************************************/
194 /* Function assigned for the Cortex-M33 */
I2C4_DeinitPins(void)195 void I2C4_DeinitPins(void)
196 {
197 /* Enables the clock for the I/O controller.: Enable Clock. */
198 CLOCK_EnableClock(kCLOCK_Iocon);
199
200 const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
201 IOCON_PIO_FUNC0 |
202 /* No addition pin function */
203 IOCON_PIO_MODE_INACT |
204 /* Standard mode, output slew rate control is enabled */
205 IOCON_PIO_SLEW_STANDARD |
206 /* Input function is not inverted */
207 IOCON_PIO_INV_DI |
208 /* Enables digital function */
209 IOCON_PIO_DIGITAL_EN |
210 /* Open drain is disabled */
211 IOCON_PIO_OPENDRAIN_DI);
212 /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
213 IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
214
215 const uint32_t port1_pin21_config = (/* Pin is configured as PIO1_21 */
216 IOCON_PIO_FUNC0 |
217 /* No addition pin function */
218 IOCON_PIO_MODE_INACT |
219 /* Standard mode, output slew rate control is enabled */
220 IOCON_PIO_SLEW_STANDARD |
221 /* Input function is not inverted */
222 IOCON_PIO_INV_DI |
223 /* Enables digital function */
224 IOCON_PIO_DIGITAL_EN |
225 /* Open drain is disabled */
226 IOCON_PIO_OPENDRAIN_DI);
227 /* PORT1 PIN21 (coords: 30) is configured as PIO1_21 */
228 IOCON_PinMuxSet(IOCON, 1U, 21U, port1_pin21_config);
229 }
230
231 /* clang-format off */
232 /*
233 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
234 USART0_InitPins:
235 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
236 - pin_list:
237 - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
238 slew_rate: standard, invert: disabled, open_drain: disabled}
239 - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
240 mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
241 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
242 */
243 /* clang-format on */
244
245 /* FUNCTION ************************************************************************************************************
246 *
247 * Function Name : USART0_InitPins
248 * Description : Configures pin routing and optionally pin electrical features.
249 *
250 * END ****************************************************************************************************************/
251 /* Function assigned for the Cortex-M33 */
USART0_InitPins(void)252 void USART0_InitPins(void)
253 {
254 /* Enables the clock for the I/O controller.: Enable Clock. */
255 CLOCK_EnableClock(kCLOCK_Iocon);
256
257 const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
258 IOCON_PIO_FUNC1 |
259 /* No addition pin function */
260 IOCON_PIO_MODE_INACT |
261 /* Standard mode, output slew rate control is enabled */
262 IOCON_PIO_SLEW_STANDARD |
263 /* Input function is not inverted */
264 IOCON_PIO_INV_DI |
265 /* Enables digital function */
266 IOCON_PIO_DIGITAL_EN |
267 /* Open drain is disabled */
268 IOCON_PIO_OPENDRAIN_DI);
269 /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
270 IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
271
272 const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
273 IOCON_PIO_FUNC1 |
274 /* No addition pin function */
275 IOCON_PIO_MODE_INACT |
276 /* Standard mode, output slew rate control is enabled */
277 IOCON_PIO_SLEW_STANDARD |
278 /* Input function is not inverted */
279 IOCON_PIO_INV_DI |
280 /* Enables digital function */
281 IOCON_PIO_DIGITAL_EN |
282 /* Open drain is disabled */
283 IOCON_PIO_OPENDRAIN_DI);
284 /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
285 IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
286 }
287
288 /* clang-format off */
289 /*
290 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
291 USART0_DeinitPins:
292 - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
293 - pin_list:
294 - {pin_num: '92', peripheral: GPIO, signal: 'PIO0, 29', pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29, mode: inactive,
295 slew_rate: standard, invert: disabled, open_drain: disabled}
296 - {pin_num: '94', peripheral: GPIO, signal: 'PIO0, 30', pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard,
297 invert: disabled, open_drain: disabled}
298 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
299 */
300 /* clang-format on */
301
302 /* FUNCTION ************************************************************************************************************
303 *
304 * Function Name : USART0_DeinitPins
305 * Description : Configures pin routing and optionally pin electrical features.
306 *
307 * END ****************************************************************************************************************/
308 /* Function assigned for the Cortex-M33 */
USART0_DeinitPins(void)309 void USART0_DeinitPins(void)
310 {
311 /* Enables the clock for the I/O controller.: Enable Clock. */
312 CLOCK_EnableClock(kCLOCK_Iocon);
313
314 const uint32_t port0_pin29_config = (/* Pin is configured as PIO0_29 */
315 IOCON_PIO_FUNC0 |
316 /* No addition pin function */
317 IOCON_PIO_MODE_INACT |
318 /* Standard mode, output slew rate control is enabled */
319 IOCON_PIO_SLEW_STANDARD |
320 /* Input function is not inverted */
321 IOCON_PIO_INV_DI |
322 /* Enables digital function */
323 IOCON_PIO_DIGITAL_EN |
324 /* Open drain is disabled */
325 IOCON_PIO_OPENDRAIN_DI);
326 /* PORT0 PIN29 (coords: 92) is configured as PIO0_29 */
327 IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config);
328
329 const uint32_t port0_pin30_config = (/* Pin is configured as PIO0_30 */
330 IOCON_PIO_FUNC0 |
331 /* No addition pin function */
332 IOCON_PIO_MODE_INACT |
333 /* Standard mode, output slew rate control is enabled */
334 IOCON_PIO_SLEW_STANDARD |
335 /* Input function is not inverted */
336 IOCON_PIO_INV_DI |
337 /* Enables digital function */
338 IOCON_PIO_DIGITAL_EN |
339 /* Open drain is disabled */
340 IOCON_PIO_OPENDRAIN_DI);
341 /* PORT0 PIN30 (coords: 94) is configured as PIO0_30 */
342 IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config);
343 }
344
345 /* clang-format off */
346 /*
347 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
348 SPI8_InitPins:
349 - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
350 - pin_list:
351 - {pin_num: '61', peripheral: FLEXCOMM8, signal: HS_SPI_SCK, pin_signal: PIO1_2/CAN0_TD/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5, mode: pullUp, slew_rate: standard,
352 invert: disabled, open_drain: disabled}
353 - {pin_num: '60', peripheral: FLEXCOMM8, signal: HS_SPI_MOSI, pin_signal: PIO0_26/FC2_RXD_SDA_MOSI_DATA/CLKOUT/CT_INP14/SCT0_OUT5/USB0_IDVALUE/FC0_SCK/HS_SPI_MOSI/SECURE_GPIO0_26,
354 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
355 - {pin_num: '62', peripheral: FLEXCOMM8, signal: HS_SPI_MISO, pin_signal: PIO1_3/CAN0_RD/SCT0_OUT4/HS_SPI_MISO/USB0_PORTPWRN/PLU_OUT6, mode: pullUp, slew_rate: standard,
356 invert: disabled, open_drain: disabled}
357 - {pin_num: '59', peripheral: FLEXCOMM8, signal: HS_SPI_SSEL1, pin_signal: PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4,
358 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
359 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
360 */
361 /* clang-format on */
362
363 /* FUNCTION ************************************************************************************************************
364 *
365 * Function Name : SPI8_InitPins
366 * Description : Configures pin routing and optionally pin electrical features.
367 *
368 * END ****************************************************************************************************************/
369 /* Function assigned for the Cortex-M33 */
SPI8_InitPins(void)370 void SPI8_InitPins(void)
371 {
372 /* Enables the clock for the I/O controller.: Enable Clock. */
373 CLOCK_EnableClock(kCLOCK_Iocon);
374
375 const uint32_t port0_pin26_config = (/* Pin is configured as HS_SPI_MOSI */
376 IOCON_PIO_FUNC9 |
377 /* Selects pull-up function */
378 IOCON_PIO_MODE_PULLUP |
379 /* Standard mode, output slew rate control is enabled */
380 IOCON_PIO_SLEW_STANDARD |
381 /* Input function is not inverted */
382 IOCON_PIO_INV_DI |
383 /* Enables digital function */
384 IOCON_PIO_DIGITAL_EN |
385 /* Open drain is disabled */
386 IOCON_PIO_OPENDRAIN_DI);
387 /* PORT0 PIN26 (coords: 60) is configured as HS_SPI_MOSI */
388 IOCON_PinMuxSet(IOCON, 0U, 26U, port0_pin26_config);
389
390 const uint32_t port1_pin1_config = (/* Pin is configured as HS_SPI_SSEL1 */
391 IOCON_PIO_FUNC5 |
392 /* Selects pull-up function */
393 IOCON_PIO_MODE_PULLUP |
394 /* Standard mode, output slew rate control is enabled */
395 IOCON_PIO_SLEW_STANDARD |
396 /* Input function is not inverted */
397 IOCON_PIO_INV_DI |
398 /* Enables digital function */
399 IOCON_PIO_DIGITAL_EN |
400 /* Open drain is disabled */
401 IOCON_PIO_OPENDRAIN_DI);
402 /* PORT1 PIN1 (coords: 59) is configured as HS_SPI_SSEL1 */
403 IOCON_PinMuxSet(IOCON, 1U, 1U, port1_pin1_config);
404
405 const uint32_t port1_pin2_config = (/* Pin is configured as HS_SPI_SCK */
406 IOCON_PIO_FUNC6 |
407 /* Selects pull-up function */
408 IOCON_PIO_MODE_PULLUP |
409 /* Standard mode, output slew rate control is enabled */
410 IOCON_PIO_SLEW_STANDARD |
411 /* Input function is not inverted */
412 IOCON_PIO_INV_DI |
413 /* Enables digital function */
414 IOCON_PIO_DIGITAL_EN |
415 /* Open drain is disabled */
416 IOCON_PIO_OPENDRAIN_DI);
417 /* PORT1 PIN2 (coords: 61) is configured as HS_SPI_SCK */
418 IOCON_PinMuxSet(IOCON, 1U, 2U, port1_pin2_config);
419
420 const uint32_t port1_pin3_config = (/* Pin is configured as HS_SPI_MISO */
421 IOCON_PIO_FUNC6 |
422 /* Selects pull-up function */
423 IOCON_PIO_MODE_PULLUP |
424 /* Standard mode, output slew rate control is enabled */
425 IOCON_PIO_SLEW_STANDARD |
426 /* Input function is not inverted */
427 IOCON_PIO_INV_DI |
428 /* Enables digital function */
429 IOCON_PIO_DIGITAL_EN |
430 /* Open drain is disabled */
431 IOCON_PIO_OPENDRAIN_DI);
432 /* PORT1 PIN3 (coords: 62) is configured as HS_SPI_MISO */
433 IOCON_PinMuxSet(IOCON, 1U, 3U, port1_pin3_config);
434 }
435
436 /* clang-format off */
437 /*
438 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
439 SPI8_DeinitPins:
440 - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
441 - pin_list: []
442 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
443 */
444 /* clang-format on */
445
446 /* FUNCTION ************************************************************************************************************
447 *
448 * Function Name : SPI8_DeinitPins
449 * Description : Configures pin routing and optionally pin electrical features.
450 *
451 * END ****************************************************************************************************************/
452 /* Function assigned for the Cortex-M33 */
SPI8_DeinitPins(void)453 void SPI8_DeinitPins(void)
454 {
455 }
456
457 /* clang-format off */
458 /*
459 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
460 SPI7_InitPins:
461 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
462 - pin_list:
463 - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
464 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
465 - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
466 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
467 - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/HS_SPI_SSEL3/PLU_CLKIN/SECURE_GPIO0_21,
468 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
469 - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
470 invert: disabled, open_drain: disabled}
471 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
472 */
473 /* clang-format on */
474
475 /* FUNCTION ************************************************************************************************************
476 *
477 * Function Name : SPI7_InitPins
478 * Description : Configures pin routing and optionally pin electrical features.
479 *
480 * END ****************************************************************************************************************/
481 /* Function assigned for the Cortex-M33 */
SPI7_InitPins(void)482 void SPI7_InitPins(void)
483 {
484 /* Enables the clock for the I/O controller.: Enable Clock. */
485 CLOCK_EnableClock(kCLOCK_Iocon);
486
487 const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
488 IOCON_PIO_FUNC7 |
489 /* Selects pull-up function */
490 IOCON_PIO_MODE_PULLUP |
491 /* Standard mode, output slew rate control is enabled */
492 IOCON_PIO_SLEW_STANDARD |
493 /* Input function is not inverted */
494 IOCON_PIO_INV_DI |
495 /* Enables digital function */
496 IOCON_PIO_DIGITAL_EN |
497 /* Open drain is disabled */
498 IOCON_PIO_OPENDRAIN_DI);
499 /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
500 IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
501
502 const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
503 IOCON_PIO_FUNC7 |
504 /* Selects pull-up function */
505 IOCON_PIO_MODE_PULLUP |
506 /* Standard mode, output slew rate control is enabled */
507 IOCON_PIO_SLEW_STANDARD |
508 /* Input function is not inverted */
509 IOCON_PIO_INV_DI |
510 /* Enables digital function */
511 IOCON_PIO_DIGITAL_EN |
512 /* Open drain is disabled */
513 IOCON_PIO_OPENDRAIN_DI);
514 /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
515 IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
516
517 const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */
518 IOCON_PIO_FUNC7 |
519 /* Selects pull-up function */
520 IOCON_PIO_MODE_PULLUP |
521 /* Standard mode, output slew rate control is enabled */
522 IOCON_PIO_SLEW_STANDARD |
523 /* Input function is not inverted */
524 IOCON_PIO_INV_DI |
525 /* Enables digital function */
526 IOCON_PIO_DIGITAL_EN |
527 /* Open drain is disabled */
528 IOCON_PIO_OPENDRAIN_DI);
529 /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
530 IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
531
532 const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */
533 IOCON_PIO_FUNC1 |
534 /* Selects pull-up function */
535 IOCON_PIO_MODE_PULLUP |
536 /* Standard mode, output slew rate control is enabled */
537 IOCON_PIO_SLEW_STANDARD |
538 /* Input function is not inverted */
539 IOCON_PIO_INV_DI |
540 /* Enables digital function */
541 IOCON_PIO_DIGITAL_EN |
542 /* Open drain is disabled */
543 IOCON_PIO_OPENDRAIN_DI);
544 /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */
545 IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
546 }
547
548 /* clang-format off */
549 /*
550 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
551 SPI7_DeinitPins:
552 - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
553 - pin_list:
554 - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
555 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
556 - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
557 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
558 - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/HS_SPI_SSEL3/PLU_CLKIN/SECURE_GPIO0_21,
559 mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
560 - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
561 invert: disabled, open_drain: disabled}
562 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
563 */
564 /* clang-format on */
565
566 /* FUNCTION ************************************************************************************************************
567 *
568 * Function Name : SPI7_DeinitPins
569 * Description : Configures pin routing and optionally pin electrical features.
570 *
571 * END ****************************************************************************************************************/
572 /* Function assigned for the Cortex-M33 */
SPI7_DeinitPins(void)573 void SPI7_DeinitPins(void)
574 {
575 /* Enables the clock for the I/O controller.: Enable Clock. */
576 CLOCK_EnableClock(kCLOCK_Iocon);
577
578 const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */
579 IOCON_PIO_FUNC0 |
580 /* Selects pull-up function */
581 IOCON_PIO_MODE_PULLUP |
582 /* Standard mode, output slew rate control is enabled */
583 IOCON_PIO_SLEW_STANDARD |
584 /* Input function is not inverted */
585 IOCON_PIO_INV_DI |
586 /* Enables digital function */
587 IOCON_PIO_DIGITAL_EN |
588 /* Open drain is disabled */
589 IOCON_PIO_OPENDRAIN_DI);
590 /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */
591 IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config);
592
593 const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */
594 IOCON_PIO_FUNC0 |
595 /* Selects pull-up function */
596 IOCON_PIO_MODE_PULLUP |
597 /* Standard mode, output slew rate control is enabled */
598 IOCON_PIO_SLEW_STANDARD |
599 /* Input function is not inverted */
600 IOCON_PIO_INV_DI |
601 /* Enables digital function */
602 IOCON_PIO_DIGITAL_EN |
603 /* Open drain is disabled */
604 IOCON_PIO_OPENDRAIN_DI);
605 /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */
606 IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config);
607
608 const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */
609 IOCON_PIO_FUNC0 |
610 /* Selects pull-up function */
611 IOCON_PIO_MODE_PULLUP |
612 /* Standard mode, output slew rate control is enabled */
613 IOCON_PIO_SLEW_STANDARD |
614 /* Input function is not inverted */
615 IOCON_PIO_INV_DI |
616 /* Enables digital function */
617 IOCON_PIO_DIGITAL_EN |
618 /* Open drain is disabled */
619 IOCON_PIO_OPENDRAIN_DI);
620 /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */
621 IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config);
622
623 const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */
624 IOCON_PIO_FUNC0 |
625 /* Selects pull-up function */
626 IOCON_PIO_MODE_PULLUP |
627 /* Standard mode, output slew rate control is enabled */
628 IOCON_PIO_SLEW_STANDARD |
629 /* Input function is not inverted */
630 IOCON_PIO_INV_DI |
631 /* Enables digital function */
632 IOCON_PIO_DIGITAL_EN |
633 /* Open drain is disabled */
634 IOCON_PIO_OPENDRAIN_DI);
635 /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */
636 IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config);
637 }
638 /***********************************************************************************************************************
639 * EOF
640 **********************************************************************************************************************/
641
