1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 /*
10 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
11 PinsProfile:
12 - !!product 'Pins v2.0'
13 - !!processor 'LPC54114J256'
14 - !!package 'LPC54114J256BD64'
15 - !!mcu_data 'ksdk2_0'
16 - !!processor_version '1.1.0'
17 - !!board 'LPCXpresso54114'
18 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
19 */
20
21 #include "fsl_common.h"
22 #include "fsl_iocon.h"
23 #include "fsl_inputmux.h"
24 #include "pin_mux.h"
25
26 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
27 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
28 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
29 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
30 #define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
31 #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
32 #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
33 #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port 0 */
34 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port 0 */
35 #define PORT0_IDX 0u /*!< Port index */
36
37 /*
38 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
39 BOARD_InitPins:
40 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
41 - pin_list:
42 - {pin_num: '31', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, mode: inactive, invert: disabled,
43 glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
44 - {pin_num: '32', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, mode: inactive, invert: disabled,
45 glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
46 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
47 */
48
49 /*FUNCTION**********************************************************************
50 *
51 * Function Name : BOARD_InitPins
52 * Description : Configures pin routing and optionally pin electrical features.
53 *
54 *END**************************************************************************/
BOARD_InitPins(void)55 void BOARD_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
56 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
57
58 const uint32_t port0_pin0_config = (
59 IOCON_PIO_FUNC1 | /* Pin is configured as FC0_RXD_SDA_MOSI */
60 IOCON_PIO_MODE_INACT | /* No addition pin function */
61 IOCON_PIO_INV_DI | /* Input function is not inverted */
62 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
63 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
64 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
65 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
66 );
67 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN0_IDX, port0_pin0_config); /* PORT0 PIN0 (coords: 31) is configured as FC0_RXD_SDA_MOSI */
68 const uint32_t port0_pin1_config = (
69 IOCON_PIO_FUNC1 | /* Pin is configured as FC0_TXD_SCL_MISO */
70 IOCON_PIO_MODE_INACT | /* No addition pin function */
71 IOCON_PIO_INV_DI | /* Input function is not inverted */
72 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
73 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
74 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
75 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
76 );
77 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN1_IDX, port0_pin1_config); /* PORT0 PIN1 (coords: 32) is configured as FC0_TXD_SCL_MISO */
78 }
79
80
81 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
82 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
83 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
84 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
85 #define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
86 #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
87 #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
88 #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port 0 */
89 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port 0 */
90 #define PORT0_IDX 0u /*!< Port index */
91
92 /*
93 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
94 USART0_InitPins:
95 - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
96 - pin_list:
97 - {pin_num: '31', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3, mode: inactive, invert: disabled,
98 glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
99 - {pin_num: '32', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1, mode: inactive, invert: disabled,
100 glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
101 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
102 */
103
104 /*FUNCTION**********************************************************************
105 *
106 * Function Name : USART0_InitPins
107 * Description : Configures pin routing and optionally pin electrical features.
108 *
109 *END**************************************************************************/
USART0_InitPins(void)110 void USART0_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
111 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
112
113 const uint32_t port0_pin0_config = (
114 IOCON_PIO_FUNC1 | /* Pin is configured as FC0_RXD_SDA_MOSI */
115 IOCON_PIO_MODE_INACT | /* No addition pin function */
116 IOCON_PIO_INV_DI | /* Input function is not inverted */
117 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
118 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
119 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
120 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
121 );
122 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN0_IDX, port0_pin0_config); /* PORT0 PIN0 (coords: 31) is configured as FC0_RXD_SDA_MOSI */
123 const uint32_t port0_pin1_config = (
124 IOCON_PIO_FUNC1 | /* Pin is configured as FC0_TXD_SCL_MISO */
125 IOCON_PIO_MODE_INACT | /* No addition pin function */
126 IOCON_PIO_INV_DI | /* Input function is not inverted */
127 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
128 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
129 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
130 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
131 );
132 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN1_IDX, port0_pin1_config); /* PORT0 PIN1 (coords: 32) is configured as FC0_TXD_SCL_MISO */
133 }
134
135
136 #define PIO00_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
137 #define PIO00_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
138 #define PIO01_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
139 #define PIO01_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
140
141 /*
142 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
143 USART0_DeinitPins:
144 - options: {coreID: core0, enableClock: 'true'}
145 - pin_list:
146 - {pin_num: '31', peripheral: GPIO, signal: 'PIO0, 0', pin_signal: PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3}
147 - {pin_num: '32', peripheral: GPIO, signal: 'PIO0, 1', pin_signal: PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1}
148 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
149 */
150
151 /*FUNCTION**********************************************************************
152 *
153 * Function Name : USART0_DeinitPins
154 * Description : Configures pin routing and optionally pin electrical features.
155 *
156 *END**************************************************************************/
USART0_DeinitPins(void)157 void USART0_DeinitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
158 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
159
160 IOCON->PIO[0][0] = ((IOCON->PIO[0][0] &
161 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
162 | IOCON_PIO_FUNC(PIO00_FUNC_ALT0) /* Selects pin function.: PORT00 (pin 31) is configured as PIO0_0 */
163 | IOCON_PIO_DIGIMODE(PIO00_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
164 );
165 IOCON->PIO[0][1] = ((IOCON->PIO[0][1] &
166 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
167 | IOCON_PIO_FUNC(PIO01_FUNC_ALT0) /* Selects pin function.: PORT01 (pin 32) is configured as PIO0_1 */
168 | IOCON_PIO_DIGIMODE(PIO01_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
169 );
170 }
171
172
173 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
174 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
175 #define IOCON_PIO_I2CDRIVE_LOW 0x00u /*!< Low drive: 4 mA */
176 #define IOCON_PIO_I2CFILTER_EN 0x00u /*!< I2C 50 ns glitch filter enabled */
177 #define IOCON_PIO_I2CSLEW_I2C 0x00u /*!< I2C mode */
178 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
179 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
180 #define PIN25_IDX 25u /*!< Pin number for pin 25 in a port 0 */
181 #define PIN26_IDX 26u /*!< Pin number for pin 26 in a port 0 */
182 #define PORT0_IDX 0u /*!< Port index */
183
184 /*
185 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
186 I2C4_InitPins:
187 - options: {coreID: core0, enableClock: 'true'}
188 - pin_list:
189 - {pin_num: '4', peripheral: FLEXCOMM4, signal: CTS_SDA_SSEL0, pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3, invert: disabled, glitch_filter: disabled, i2c_slew: i2c,
190 i2c_drive: low, i2c_filter: enabled}
191 - {pin_num: '3', peripheral: FLEXCOMM4, signal: RTS_SCL_SSEL1, pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1, invert: disabled,
192 glitch_filter: disabled, i2c_slew: i2c, i2c_drive: low, i2c_filter: enabled}
193 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
194 */
195
196 /*FUNCTION**********************************************************************
197 *
198 * Function Name : I2C4_InitPins
199 * Description : Configures pin routing and optionally pin electrical features.
200 *
201 *END**************************************************************************/
I2C4_InitPins(void)202 void I2C4_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
203 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
204
205 const uint32_t port0_pin25_config = (
206 IOCON_PIO_FUNC1 | /* Pin is configured as FC4_RTS_SCL_SSEL1 */
207 IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
208 IOCON_PIO_INV_DI | /* Input function is not inverted */
209 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
210 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
211 IOCON_PIO_I2CDRIVE_LOW | /* Low drive: 4 mA */
212 IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
213 );
214 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN25_IDX, port0_pin25_config); /* PORT0 PIN25 (coords: 3) is configured as FC4_RTS_SCL_SSEL1 */
215 const uint32_t port0_pin26_config = (
216 IOCON_PIO_FUNC1 | /* Pin is configured as FC4_CTS_SDA_SSEL0 */
217 IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
218 IOCON_PIO_INV_DI | /* Input function is not inverted */
219 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
220 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
221 IOCON_PIO_I2CDRIVE_LOW | /* Low drive: 4 mA */
222 IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
223 );
224 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN26_IDX, port0_pin26_config); /* PORT0 PIN26 (coords: 4) is configured as FC4_CTS_SDA_SSEL0 */
225 }
226
227
228 #define PIO025_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
229 #define PIO025_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
230 #define PIO026_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
231 #define PIO026_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
232
233 /*
234 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
235 I2C4_DeinitPins:
236 - options: {coreID: core0, enableClock: 'true'}
237 - pin_list:
238 - {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 26', pin_signal: PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3}
239 - {pin_num: '3', peripheral: GPIO, signal: 'PIO0, 25', pin_signal: PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1}
240 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
241 */
242
243 /*FUNCTION**********************************************************************
244 *
245 * Function Name : I2C4_DeinitPins
246 * Description : Configures pin routing and optionally pin electrical features.
247 *
248 *END**************************************************************************/
I2C4_DeinitPins(void)249 void I2C4_DeinitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
250 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
251
252 IOCON->PIO[0][25] = ((IOCON->PIO[0][25] &
253 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
254 | IOCON_PIO_FUNC(PIO025_FUNC_ALT0) /* Selects pin function.: PORT025 (pin 3) is configured as PIO0_25 */
255 | IOCON_PIO_DIGIMODE(PIO025_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
256 );
257 IOCON->PIO[0][26] = ((IOCON->PIO[0][26] &
258 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
259 | IOCON_PIO_FUNC(PIO026_FUNC_ALT0) /* Selects pin function.: PORT026 (pin 4) is configured as PIO0_26 */
260 | IOCON_PIO_DIGIMODE(PIO026_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
261 );
262 }
263
264
265 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
266 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
267 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
268 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
269 #define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
270 #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
271 #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
272 #define PIN18_IDX 18u /*!< Pin number for pin 18 in a port 0 */
273 #define PIN20_IDX 20u /*!< Pin number for pin 20 in a port 0 */
274 #define PORT0_IDX 0u /*!< Port index */
275
276 /*
277 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
278 I2C5_InitPins:
279 - options: {coreID: core0, enableClock: 'true'}
280 - pin_list:
281 - {pin_num: '58', peripheral: FLEXCOMM5, signal: TXD_SCL_MISO, pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, mode: inactive, invert: disabled, glitch_filter: disabled,
282 slew_rate: standard, open_drain: disabled}
283 - {pin_num: '60', peripheral: FLEXCOMM5, signal: RXD_SDA_MOSI, pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0, mode: inactive, invert: disabled, glitch_filter: disabled,
284 slew_rate: standard, open_drain: disabled}
285 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
286 */
287
288 /*FUNCTION**********************************************************************
289 *
290 * Function Name : I2C5_InitPins
291 * Description : Configures pin routing and optionally pin electrical features.
292 *
293 *END**************************************************************************/
I2C5_InitPins(void)294 void I2C5_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
295 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
296
297 const uint32_t port0_pin18_config = (
298 IOCON_PIO_FUNC1 | /* Pin is configured as FC5_TXD_SCL_MISO */
299 IOCON_PIO_MODE_INACT | /* No addition pin function */
300 IOCON_PIO_INV_DI | /* Input function is not inverted */
301 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
302 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
303 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
304 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
305 );
306 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN18_IDX, port0_pin18_config); /* PORT0 PIN18 (coords: 58) is configured as FC5_TXD_SCL_MISO */
307 const uint32_t port0_pin20_config = (
308 IOCON_PIO_FUNC1 | /* Pin is configured as FC5_RXD_SDA_MOSI */
309 IOCON_PIO_MODE_INACT | /* No addition pin function */
310 IOCON_PIO_INV_DI | /* Input function is not inverted */
311 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
312 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
313 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
314 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
315 );
316 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN20_IDX, port0_pin20_config); /* PORT0 PIN20 (coords: 60) is configured as FC5_RXD_SDA_MOSI */
317 }
318
319
320 #define PIO018_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
321 #define PIO018_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
322 #define PIO020_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
323 #define PIO020_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
324
325 /*
326 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
327 I2C5_DeinitPins:
328 - options: {coreID: core0, enableClock: 'true'}
329 - pin_list:
330 - {pin_num: '60', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0}
331 - {pin_num: '58', peripheral: GPIO, signal: 'PIO0, 18', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0}
332 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
333 */
334
335 /*FUNCTION**********************************************************************
336 *
337 * Function Name : I2C5_DeinitPins
338 * Description : Configures pin routing and optionally pin electrical features.
339 *
340 *END**************************************************************************/
I2C5_DeinitPins(void)341 void I2C5_DeinitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
342 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
343
344 IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
345 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
346 | IOCON_PIO_FUNC(PIO018_FUNC_ALT0) /* Selects pin function.: PORT018 (pin 58) is configured as PIO0_18 */
347 | IOCON_PIO_DIGIMODE(PIO018_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
348 );
349 IOCON->PIO[0][20] = ((IOCON->PIO[0][20] &
350 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
351 | IOCON_PIO_FUNC(PIO020_FUNC_ALT0) /* Selects pin function.: PORT020 (pin 60) is configured as PIO0_20 */
352 | IOCON_PIO_DIGIMODE(PIO020_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
353 );
354 }
355
356
357 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
358 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
359 #define IOCON_PIO_FUNC2 0x02u /*!< Selects pin function 2 */
360 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
361 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
362 #define IOCON_PIO_MODE_PULLUP 0x10u /*!< Selects pull-up function */
363 #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
364 #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
365 #define PIN4_IDX 4u /*!< Pin number for pin 4 in a port 0 */
366 #define PIN11_IDX 11u /*!< Pin number for pin 11 in a port 0 */
367 #define PIN12_IDX 12u /*!< Pin number for pin 12 in a port 0 */
368 #define PIN13_IDX 13u /*!< Pin number for pin 13 in a port 0 */
369 #define PORT0_IDX 0u /*!< Port index */
370
371 /*
372 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
373 SPI3_InitPins:
374 - options: {coreID: core0, enableClock: 'true'}
375 - pin_list:
376 - {pin_num: '47', peripheral: FLEXCOMM3, signal: RXD_SDA_MOSI, pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, mode: pullUp, invert: disabled,
377 glitch_filter: disabled, slew_rate: standard, open_drain: disabled}
378 - {pin_num: '46', peripheral: FLEXCOMM3, signal: SCK, pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, mode: pullUp, invert: disabled, glitch_filter: disabled,
379 slew_rate: standard, open_drain: disabled}
380 - {pin_num: '48', peripheral: FLEXCOMM3, signal: TXD_SCL_MISO, pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, mode: pullUp, invert: disabled, glitch_filter: disabled,
381 slew_rate: standard, open_drain: disabled}
382 - {pin_num: '38', peripheral: FLEXCOMM3, signal: SSEL2, pin_signal: PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2, mode: pullUp, invert: disabled, glitch_filter: disabled,
383 slew_rate: standard, open_drain: disabled}
384 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
385 */
386
387 /*FUNCTION**********************************************************************
388 *
389 * Function Name : SPI3_InitPins
390 * Description : Configures pin routing and optionally pin electrical features.
391 *
392 *END**************************************************************************/
SPI3_InitPins(void)393 void SPI3_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
394 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
395
396 const uint32_t port0_pin11_config = (
397 IOCON_PIO_FUNC1 | /* Pin is configured as FC3_SCK */
398 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
399 IOCON_PIO_INV_DI | /* Input function is not inverted */
400 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
401 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
402 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
403 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
404 );
405 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN11_IDX, port0_pin11_config); /* PORT0 PIN11 (coords: 46) is configured as FC3_SCK */
406 const uint32_t port0_pin12_config = (
407 IOCON_PIO_FUNC1 | /* Pin is configured as FC3_RXD_SDA_MOSI */
408 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
409 IOCON_PIO_INV_DI | /* Input function is not inverted */
410 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
411 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
412 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
413 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
414 );
415 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN12_IDX, port0_pin12_config); /* PORT0 PIN12 (coords: 47) is configured as FC3_RXD_SDA_MOSI */
416 const uint32_t port0_pin13_config = (
417 IOCON_PIO_FUNC1 | /* Pin is configured as FC3_TXD_SCL_MISO */
418 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
419 IOCON_PIO_INV_DI | /* Input function is not inverted */
420 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
421 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
422 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
423 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
424 );
425 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN13_IDX, port0_pin13_config); /* PORT0 PIN13 (coords: 48) is configured as FC3_TXD_SCL_MISO */
426 const uint32_t port0_pin4_config = (
427 IOCON_PIO_FUNC2 | /* Pin is configured as FC3_SSEL2 */
428 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
429 IOCON_PIO_INV_DI | /* Input function is not inverted */
430 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
431 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
432 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
433 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
434 );
435 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN4_IDX, port0_pin4_config); /* PORT0 PIN4 (coords: 38) is configured as FC3_SSEL2 */
436 }
437
438
439 #define DMA_ITRIG_INMUX0_IDX 0u /*!< Inputmux DMA_ITRIG_INMUX register index 0 */
440 #define DMA_ITRIG_INMUX1_IDX 1u /*!< Inputmux DMA_ITRIG_INMUX register index 1 */
441 #define PINTSEL0_IDX 0u /*!< Inputmux PINTSEL register index 0 */
442 #define PINTSEL1_IDX 1u /*!< Inputmux PINTSEL register index 1 */
443 #define PINTSEL2_IDX 2u /*!< Inputmux PINTSEL register index 2 */
444 #define PINTSEL3_IDX 3u /*!< Inputmux PINTSEL register index 3 */
445 #define PIO011_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
446 #define PIO011_FILTEROFF_DISABLED 0x01u /*!< Controls input glitch filter.: Filter disabled. No input filtering is done. */
447 #define PIO011_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
448 #define PIO011_INVERT_DISABLED 0x00u /*!< Input polarity.: Disabled. Input function is not inverted. */
449 #define PIO011_OD_NORMAL 0x00u /*!< Controls open-drain mode.: Normal. Normal push-pull output */
450 #define PIO012_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
451 #define PIO012_FILTEROFF_DISABLED 0x01u /*!< Controls input glitch filter.: Filter disabled. No input filtering is done. */
452 #define PIO012_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
453 #define PIO012_INVERT_DISABLED 0x00u /*!< Input polarity.: Disabled. Input function is not inverted. */
454 #define PIO012_OD_NORMAL 0x00u /*!< Controls open-drain mode.: Normal. Normal push-pull output */
455 #define PIO013_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
456 #define PIO013_FILTEROFF_DISABLED 0x01u /*!< Controls input glitch filter.: Filter disabled. No input filtering is done. */
457 #define PIO013_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
458 #define PIO013_INVERT_DISABLED 0x00u /*!< Input polarity.: Disabled. Input function is not inverted. */
459 #define PIO013_OD_NORMAL 0x00u /*!< Controls open-drain mode.: Normal. Normal push-pull output */
460 #define PIO04_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
461 #define PIO04_FILTEROFF_DISABLED 0x01u /*!< Controls input glitch filter.: Filter disabled. No input filtering is done. */
462 #define PIO04_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
463 #define PIO04_INVERT_DISABLED 0x00u /*!< Input polarity.: Disabled. Input function is not inverted. */
464 #define PIO04_OD_NORMAL 0x00u /*!< Controls open-drain mode.: Normal. Normal push-pull output */
465
466 /*
467 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
468 SPI3_DeinitPins:
469 - options: {coreID: core0, enableClock: 'true'}
470 - pin_list:
471 - {pin_num: '46', peripheral: ADC0, signal: 'TRIG, 0', pin_signal: PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT1, mode: no_init, invert: disabled, glitch_filter: disabled,
472 slew_rate: no_init, open_drain: disabled}
473 - {pin_num: '47', peripheral: ADC0, signal: 'TRIG, 1', pin_signal: PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS/CTIMER2_MAT3, mode: no_init, invert: disabled, glitch_filter: disabled,
474 slew_rate: no_init, open_drain: disabled}
475 - {pin_num: '48', peripheral: DMA0, signal: 'TRIG, 0', pin_signal: PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4/CTIMER2_MAT0, mode: no_init, invert: disabled, glitch_filter: disabled,
476 slew_rate: no_init, open_drain: disabled}
477 - {pin_num: '38', peripheral: DMA0, signal: 'TRIG, 1', pin_signal: PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2, mode: no_init, invert: disabled, glitch_filter: disabled,
478 slew_rate: no_init, open_drain: disabled}
479 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
480 */
481
482 /*FUNCTION**********************************************************************
483 *
484 * Function Name : SPI3_DeinitPins
485 * Description : Configures pin routing and optionally pin electrical features.
486 *
487 *END**************************************************************************/
SPI3_DeinitPins(void)488 void SPI3_DeinitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
489 CLOCK_EnableClock(kCLOCK_InputMux); /* Enables the clock for the input muxes. 0 = Disable; 1 = Enable.: 0x01u */
490 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
491
492 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX0_IDX,kINPUTMUX_PinInt2ToDma); /* Pin interrupt 2 is selected as trigger input for DMA channel 0 */
493 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX1_IDX,kINPUTMUX_PinInt3ToDma); /* Pin interrupt 3 is selected as trigger input for DMA channel 1 */
494 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL0_IDX,kINPUTMUX_GpioPort0Pin11ToPintsel); /* PIO0_11 is selected for PINT input 0 */
495 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL1_IDX,kINPUTMUX_GpioPort0Pin12ToPintsel); /* PIO0_12 is selected for PINT input 1 */
496 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL2_IDX,kINPUTMUX_GpioPort0Pin13ToPintsel); /* PIO0_13 is selected for PINT input 2 */
497 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL3_IDX,kINPUTMUX_GpioPort0Pin4ToPintsel); /* PIO0_4 is selected for PINT input 3 */
498 IOCON->PIO[0][11] = ((IOCON->PIO[0][11] &
499 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_INVERT_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_FILTEROFF_MASK | IOCON_PIO_OD_MASK))) /* Mask bits to zero which are setting */
500 | IOCON_PIO_FUNC(PIO011_FUNC_ALT0) /* Selects pin function.: PORT011 (pin 46) is configured as PIO0_11 */
501 | IOCON_PIO_INVERT(PIO011_INVERT_DISABLED) /* Input polarity.: Disabled. Input function is not inverted. */
502 | IOCON_PIO_DIGIMODE(PIO011_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
503 | IOCON_PIO_FILTEROFF(PIO011_FILTEROFF_DISABLED) /* Controls input glitch filter.: Filter disabled. No input filtering is done. */
504 | IOCON_PIO_OD(PIO011_OD_NORMAL) /* Controls open-drain mode.: Normal. Normal push-pull output */
505 );
506 IOCON->PIO[0][12] = ((IOCON->PIO[0][12] &
507 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_INVERT_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_FILTEROFF_MASK | IOCON_PIO_OD_MASK))) /* Mask bits to zero which are setting */
508 | IOCON_PIO_FUNC(PIO012_FUNC_ALT0) /* Selects pin function.: PORT012 (pin 47) is configured as PIO0_12 */
509 | IOCON_PIO_INVERT(PIO012_INVERT_DISABLED) /* Input polarity.: Disabled. Input function is not inverted. */
510 | IOCON_PIO_DIGIMODE(PIO012_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
511 | IOCON_PIO_FILTEROFF(PIO012_FILTEROFF_DISABLED) /* Controls input glitch filter.: Filter disabled. No input filtering is done. */
512 | IOCON_PIO_OD(PIO012_OD_NORMAL) /* Controls open-drain mode.: Normal. Normal push-pull output */
513 );
514 IOCON->PIO[0][13] = ((IOCON->PIO[0][13] &
515 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_INVERT_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_FILTEROFF_MASK | IOCON_PIO_OD_MASK))) /* Mask bits to zero which are setting */
516 | IOCON_PIO_FUNC(PIO013_FUNC_ALT0) /* Selects pin function.: PORT013 (pin 48) is configured as PIO0_13 */
517 | IOCON_PIO_INVERT(PIO013_INVERT_DISABLED) /* Input polarity.: Disabled. Input function is not inverted. */
518 | IOCON_PIO_DIGIMODE(PIO013_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
519 | IOCON_PIO_FILTEROFF(PIO013_FILTEROFF_DISABLED) /* Controls input glitch filter.: Filter disabled. No input filtering is done. */
520 | IOCON_PIO_OD(PIO013_OD_NORMAL) /* Controls open-drain mode.: Normal. Normal push-pull output */
521 );
522 IOCON->PIO[0][4] = ((IOCON->PIO[0][4] &
523 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_INVERT_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_FILTEROFF_MASK | IOCON_PIO_OD_MASK))) /* Mask bits to zero which are setting */
524 | IOCON_PIO_FUNC(PIO04_FUNC_ALT0) /* Selects pin function.: PORT04 (pin 38) is configured as PIO0_4 */
525 | IOCON_PIO_INVERT(PIO04_INVERT_DISABLED) /* Input polarity.: Disabled. Input function is not inverted. */
526 | IOCON_PIO_DIGIMODE(PIO04_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
527 | IOCON_PIO_FILTEROFF(PIO04_FILTEROFF_DISABLED) /* Controls input glitch filter.: Filter disabled. No input filtering is done. */
528 | IOCON_PIO_OD(PIO04_OD_NORMAL) /* Controls open-drain mode.: Normal. Normal push-pull output */
529 );
530 }
531
532
533 #define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
534 #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
535 #define IOCON_PIO_FUNC4 0x04u /*!< Selects pin function 4 */
536 #define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
537 #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
538 #define IOCON_PIO_MODE_PULLUP 0x10u /*!< Selects pull-up function */
539 #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
540 #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
541 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port 1 */
542 #define PIN18_IDX 18u /*!< Pin number for pin 18 in a port 0 */
543 #define PIN19_IDX 19u /*!< Pin number for pin 19 in a port 0 */
544 #define PIN20_IDX 20u /*!< Pin number for pin 20 in a port 0 */
545 #define PORT0_IDX 0u /*!< Port index */
546 #define PORT1_IDX 1u /*!< Port index */
547
548 /*
549 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
550 SPI5_InitPins:
551 - options: {coreID: core0, enableClock: 'true'}
552 - pin_list:
553 - {pin_num: '15', peripheral: FLEXCOMM5, signal: SSEL2, pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4, mode: pullUp, invert: disabled, glitch_filter: disabled,
554 open_drain: disabled}
555 - {pin_num: '58', peripheral: FLEXCOMM5, signal: TXD_SCL_MISO, pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, mode: pullUp, invert: disabled, glitch_filter: disabled,
556 slew_rate: standard, open_drain: disabled}
557 - {pin_num: '59', peripheral: FLEXCOMM5, signal: SCK, pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, mode: pullUp, invert: disabled, glitch_filter: disabled,
558 slew_rate: standard, open_drain: disabled}
559 - {pin_num: '60', peripheral: FLEXCOMM5, signal: RXD_SDA_MOSI, pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0, mode: pullUp, invert: disabled, glitch_filter: disabled,
560 slew_rate: standard, open_drain: disabled}
561 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
562 */
563
564 /*FUNCTION**********************************************************************
565 *
566 * Function Name : SPI5_InitPins
567 * Description : Configures pin routing and optionally pin electrical features.
568 *
569 *END**************************************************************************/
SPI5_InitPins(void)570 void SPI5_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
571 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
572
573 const uint32_t port0_pin18_config = (
574 IOCON_PIO_FUNC1 | /* Pin is configured as FC5_TXD_SCL_MISO */
575 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
576 IOCON_PIO_INV_DI | /* Input function is not inverted */
577 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
578 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
579 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
580 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
581 );
582 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN18_IDX, port0_pin18_config); /* PORT0 PIN18 (coords: 58) is configured as FC5_TXD_SCL_MISO */
583 const uint32_t port0_pin19_config = (
584 IOCON_PIO_FUNC1 | /* Pin is configured as FC5_SCK */
585 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
586 IOCON_PIO_INV_DI | /* Input function is not inverted */
587 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
588 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
589 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
590 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
591 );
592 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN19_IDX, port0_pin19_config); /* PORT0 PIN19 (coords: 59) is configured as FC5_SCK */
593 const uint32_t port0_pin20_config = (
594 IOCON_PIO_FUNC1 | /* Pin is configured as FC5_RXD_SDA_MOSI */
595 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
596 IOCON_PIO_INV_DI | /* Input function is not inverted */
597 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
598 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
599 IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
600 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
601 );
602 IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN20_IDX, port0_pin20_config); /* PORT0 PIN20 (coords: 60) is configured as FC5_RXD_SDA_MOSI */
603 const uint32_t port1_pin1_config = (
604 IOCON_PIO_FUNC4 | /* Pin is configured as FC5_SSEL2 */
605 IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
606 IOCON_PIO_INV_DI | /* Input function is not inverted */
607 IOCON_PIO_DIGITAL_EN | /* Enables digital function */
608 IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
609 IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
610 );
611 IOCON_PinMuxSet(IOCON, PORT1_IDX, PIN1_IDX, port1_pin1_config); /* PORT1 PIN1 (coords: 15) is configured as FC5_SSEL2 */
612 }
613
614
615 #define DMA_ITRIG_INMUX10_IDX 10u /*!< Inputmux DMA_ITRIG_INMUX register index 10 */
616 #define DMA_ITRIG_INMUX11_IDX 11u /*!< Inputmux DMA_ITRIG_INMUX register index 11 */
617 #define DMA_ITRIG_INMUX12_IDX 12u /*!< Inputmux DMA_ITRIG_INMUX register index 12 */
618 #define DMA_ITRIG_INMUX13_IDX 13u /*!< Inputmux DMA_ITRIG_INMUX register index 13 */
619 #define PINTSEL0_IDX 0u /*!< Inputmux PINTSEL register index 0 */
620 #define PINTSEL1_IDX 1u /*!< Inputmux PINTSEL register index 1 */
621 #define PINTSEL2_IDX 2u /*!< Inputmux PINTSEL register index 2 */
622 #define PINTSEL3_IDX 3u /*!< Inputmux PINTSEL register index 3 */
623 #define PIO018_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
624 #define PIO018_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
625 #define PIO019_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
626 #define PIO019_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
627 #define PIO020_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
628 #define PIO020_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
629 #define PIO11_DIGIMODE_DIGITAL 0x01u /*!< Select Analog/Digital mode.: Digital mode. */
630 #define PIO11_FUNC_ALT0 0x00u /*!< Selects pin function.: Alternative connection 0. */
631
632 /*
633 * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
634 SPI5_DeinitPins:
635 - options: {coreID: core0, enableClock: 'true'}
636 - pin_list:
637 - {pin_num: '15', peripheral: DMA0, signal: 'TRIG, 10', pin_signal: PIO1_1/SWO/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4, mode: no_init, invert: no_init, glitch_filter: no_init,
638 open_drain: no_init}
639 - {pin_num: '58', peripheral: DMA0, signal: 'TRIG, 11', pin_signal: PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0, mode: no_init, invert: no_init, glitch_filter: no_init,
640 slew_rate: no_init, open_drain: no_init}
641 - {pin_num: '59', peripheral: DMA0, signal: 'TRIG, 12', pin_signal: PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1, mode: no_init, invert: no_init, glitch_filter: no_init,
642 slew_rate: no_init, open_drain: no_init}
643 - {pin_num: '60', peripheral: DMA0, signal: 'TRIG, 13', pin_signal: PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0, mode: no_init, invert: no_init, glitch_filter: no_init,
644 slew_rate: no_init, open_drain: no_init}
645 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
646 */
647
648 /*FUNCTION**********************************************************************
649 *
650 * Function Name : SPI5_DeinitPins
651 * Description : Configures pin routing and optionally pin electrical features.
652 *
653 *END**************************************************************************/
SPI5_DeinitPins(void)654 void SPI5_DeinitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */
655 CLOCK_EnableClock(kCLOCK_InputMux); /* Enables the clock for the input muxes. 0 = Disable; 1 = Enable.: 0x01u */
656 CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */
657
658 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX10_IDX,kINPUTMUX_PinInt1ToDma); /* Pin interrupt 1 is selected as trigger input for DMA channel 10 */
659 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX11_IDX,kINPUTMUX_PinInt2ToDma); /* Pin interrupt 2 is selected as trigger input for DMA channel 11 */
660 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX12_IDX,kINPUTMUX_PinInt3ToDma); /* Pin interrupt 3 is selected as trigger input for DMA channel 12 */
661 INPUTMUX_AttachSignal(INPUTMUX,DMA_ITRIG_INMUX13_IDX,kINPUTMUX_PinInt0ToDma); /* Pin interrupt 0 is selected as trigger input for DMA channel 13 */
662 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL0_IDX,kINPUTMUX_GpioPort0Pin20ToPintsel); /* PIO0_20 is selected for PINT input 0 */
663 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL1_IDX,kINPUTMUX_GpioPort1Pin1ToPintsel); /* PIO1_1 is selected for PINT input 1 */
664 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL2_IDX,kINPUTMUX_GpioPort0Pin18ToPintsel); /* PIO0_18 is selected for PINT input 2 */
665 INPUTMUX_AttachSignal(INPUTMUX,PINTSEL3_IDX,kINPUTMUX_GpioPort0Pin19ToPintsel); /* PIO0_19 is selected for PINT input 3 */
666 IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
667 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
668 | IOCON_PIO_FUNC(PIO018_FUNC_ALT0) /* Selects pin function.: PORT018 (pin 58) is configured as PIO0_18 */
669 | IOCON_PIO_DIGIMODE(PIO018_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
670 );
671 IOCON->PIO[0][19] = ((IOCON->PIO[0][19] &
672 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
673 | IOCON_PIO_FUNC(PIO019_FUNC_ALT0) /* Selects pin function.: PORT019 (pin 59) is configured as PIO0_19 */
674 | IOCON_PIO_DIGIMODE(PIO019_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
675 );
676 IOCON->PIO[0][20] = ((IOCON->PIO[0][20] &
677 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
678 | IOCON_PIO_FUNC(PIO020_FUNC_ALT0) /* Selects pin function.: PORT020 (pin 60) is configured as PIO0_20 */
679 | IOCON_PIO_DIGIMODE(PIO020_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
680 );
681 IOCON->PIO[1][1] = ((IOCON->PIO[1][1] &
682 (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) /* Mask bits to zero which are setting */
683 | IOCON_PIO_FUNC(PIO11_FUNC_ALT0) /* Selects pin function.: PORT11 (pin 15) is configured as PIO1_1 */
684 | IOCON_PIO_DIGIMODE(PIO11_DIGIMODE_DIGITAL) /* Select Analog/Digital mode.: Digital mode. */
685 );
686 }
687
688 /*******************************************************************************
689 * EOF
690 ******************************************************************************/
691
