1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright(c) 2018 Intel Corporation. All rights reserved.
4  *
5  * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
6  *         Keyon Jie <yang.jie@linux.intel.com>
7  */
8 
9 /**
10  * \file include/ipc/dai.h
11  * \brief IPC DAI definitions
12  * \author Liam Girdwood <liam.r.girdwood@linux.intel.com>
13  * \author Keyon Jie <yang.jie@linux.intel.com>
14  */
15 
16 #ifndef __IPC_DAI_H__
17 #define __IPC_DAI_H__
18 
19 #include <ipc/dai-intel.h>
20 #include <ipc/dai-imx.h>
21 #include <ipc/header.h>
22 #include <stdint.h>
23 
24 /*
25  * DAI Configuration.
26  *
27  * Each different DAI type will have it's own structure and IPC cmd.
28  */
29 
30 #define SOF_DAI_FMT_I2S		1 /**< I2S mode */
31 #define SOF_DAI_FMT_RIGHT_J	2 /**< Right Justified mode */
32 #define SOF_DAI_FMT_LEFT_J	3 /**< Left Justified mode */
33 #define SOF_DAI_FMT_DSP_A	4 /**< L data MSB after FRM LRC */
34 #define SOF_DAI_FMT_DSP_B	5 /**< L data MSB during FRM LRC */
35 #define SOF_DAI_FMT_PDM		6 /**< Pulse density modulation */
36 
37 #define SOF_DAI_FMT_CONT	(1 << 4) /**< continuous clock */
38 #define SOF_DAI_FMT_GATED	(0 << 4) /**< clock is gated */
39 
40 #define SOF_DAI_FMT_NB_NF	(0 << 8) /**< normal bit clock + frame */
41 #define SOF_DAI_FMT_NB_IF	(2 << 8) /**< normal BCLK + inv FRM */
42 #define SOF_DAI_FMT_IB_NF	(3 << 8) /**< invert BCLK + nor FRM */
43 #define SOF_DAI_FMT_IB_IF	(4 << 8) /**< invert BCLK + FRM */
44 
45 #define SOF_DAI_FMT_CBP_CFP	(0 << 12) /**< codec bclk provider & frame provider */
46 #define SOF_DAI_FMT_CBC_CFP	(2 << 12) /**< codec bclk consumer & frame provider */
47 #define SOF_DAI_FMT_CBP_CFC	(3 << 12) /**< codec bclk provider & frame consumer */
48 #define SOF_DAI_FMT_CBC_CFC	(4 << 12) /**< codec bclk consumer & frame consumer */
49 
50 #define SOF_DAI_FMT_FORMAT_MASK		0x000f
51 #define SOF_DAI_FMT_CLOCK_MASK		0x00f0
52 #define SOF_DAI_FMT_INV_MASK		0x0f00
53 #define SOF_DAI_FMT_CLOCK_PROVIDER_MASK	0xf000
54 
55 /* DAI_CONFIG flags */
56 #define SOF_DAI_CONFIG_FLAGS_MASK	0x3
57 #define SOF_DAI_CONFIG_FLAGS_NONE	(0 << 0) /**< DAI_CONFIG sent without stage information */
58 #define SOF_DAI_CONFIG_FLAGS_HW_PARAMS	(1 << 0) /**< DAI_CONFIG sent during hw_params stage */
59 #define SOF_DAI_CONFIG_FLAGS_HW_FREE	(2 << 0) /**< DAI_CONFIG sent during hw_free stage */
60 #define SOF_DAI_CONFIG_FLAGS_RFU	(3 << 0) /**< not used, reserved for future use */
61 
62 /** \brief Types of DAI */
63 enum sof_ipc_dai_type {
64 	SOF_DAI_INTEL_NONE = 0,		/**< None */
65 	SOF_DAI_INTEL_SSP,		/**< Intel SSP */
66 	SOF_DAI_INTEL_DMIC,		/**< Intel DMIC */
67 	SOF_DAI_INTEL_HDA,		/**< Intel HD/A */
68 	SOF_DAI_INTEL_ALH,		/**< Intel ALH */
69 	SOF_DAI_IMX_SAI,                /**< i.MX SAI */
70 	SOF_DAI_IMX_ESAI,               /**< i.MX ESAI */
71 	SOF_DAI_AMD_BT,			/**< Amd BT */
72 	SOF_DAI_AMD_SP,			/**< Amd SP */
73 	SOF_DAI_AMD_DMIC		/**< Amd DMIC */
74 };
75 
76 /* general purpose DAI configuration */
77 struct sof_ipc_dai_config {
78 	struct sof_ipc_cmd_hdr hdr;
79 	uint32_t type;		/**< DAI type - enum sof_ipc_dai_type */
80 	uint32_t dai_index;	/**< index of this type dai */
81 
82 	/* physical protocol and clocking */
83 	uint16_t format;	/**< SOF_DAI_FMT_ */
84 	uint8_t group_id;	/**< group ID, 0 means no group (ABI 3.17) */
85 	uint8_t flags;		/**< SOF_DAI_CONFIG_FLAGS_ (ABI 3.19) */
86 
87 	/* reserved for future use */
88 	uint32_t reserved[8];
89 
90 	/* HW specific data */
91 	union {
92 		struct sof_ipc_dai_ssp_params ssp;
93 		struct sof_ipc_dai_dmic_params dmic;
94 		struct sof_ipc_dai_hda_params hda;
95 		struct sof_ipc_dai_alh_params alh;
96 		struct sof_ipc_dai_esai_params esai;
97 		struct sof_ipc_dai_sai_params sai;
98 	};
99 } __attribute__((packed, aligned(4)));
100 
101 #endif /* __IPC_DAI_H__ */
102