1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2018 Intel Corporation. All rights reserved. 4 * 5 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 6 * Keyon Jie <yang.jie@linux.intel.com> 7 */ 8 9 /** 10 * \file include/ipc/dai.h 11 * \brief IPC DAI definitions 12 * \author Liam Girdwood <liam.r.girdwood@linux.intel.com> 13 * \author Keyon Jie <yang.jie@linux.intel.com> 14 */ 15 16 #ifndef __IPC_DAI_H__ 17 #define __IPC_DAI_H__ 18 19 #include <ipc/dai-intel.h> 20 #include <ipc/dai-imx.h> 21 #include <ipc/dai-mediatek.h> 22 #include <ipc/dai-amd.h> 23 #include <ipc/header.h> 24 #include <stdint.h> 25 26 /* 27 * DAI Configuration. 28 * 29 * Each different DAI type will have it's own structure and IPC cmd. 30 */ 31 32 #define SOF_DAI_FMT_I2S 1 /**< I2S mode */ 33 #define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */ 34 #define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */ 35 #define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */ 36 #define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */ 37 #define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */ 38 39 #define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */ 40 #define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */ 41 42 #define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */ 43 #define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */ 44 #define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */ 45 #define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */ 46 47 #define SOF_DAI_FMT_CBP_CFP (0 << 12) /**< codec bclk provider & frame provider */ 48 #define SOF_DAI_FMT_CBC_CFP (2 << 12) /**< codec bclk consumer & frame provider */ 49 #define SOF_DAI_FMT_CBP_CFC (3 << 12) /**< codec bclk provider & frame consumer */ 50 #define SOF_DAI_FMT_CBC_CFC (4 << 12) /**< codec bclk consumer & frame consumer */ 51 52 #define SOF_DAI_FMT_FORMAT_MASK 0x000f 53 #define SOF_DAI_FMT_CLOCK_MASK 0x00f0 54 #define SOF_DAI_FMT_INV_MASK 0x0f00 55 #define SOF_DAI_FMT_CLOCK_PROVIDER_MASK 0xf000 56 57 /* 58 * DAI_CONFIG flags. The 4 LSB bits are used for the commands, HW_PARAMS, HW_FREE and PAUSE 59 * representing when the IPC is sent. The 4 MSB bits are used to add quirks along with the above 60 * commands. 61 */ 62 #define SOF_DAI_CONFIG_FLAGS_CMD_MASK 0xF 63 #define SOF_DAI_CONFIG_FLAGS_NONE 0 /**< DAI_CONFIG sent without stage information */ 64 #define SOF_DAI_CONFIG_FLAGS_HW_PARAMS BIT(0) /**< DAI_CONFIG sent during hw_params stage */ 65 #define SOF_DAI_CONFIG_FLAGS_HW_FREE BIT(1) /**< DAI_CONFIG sent during hw_free stage */ 66 /**< DAI_CONFIG sent during pause trigger. Only available ABI 3.20 onwards */ 67 #define SOF_DAI_CONFIG_FLAGS_PAUSE BIT(2) 68 #define SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT 4 69 #define SOF_DAI_CONFIG_FLAGS_QUIRK_MASK (0xF << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT) 70 /* 71 * This should be used along with the SOF_DAI_CONFIG_FLAGS_HW_PARAMS to indicate that pipeline 72 * stop/pause and DAI DMA stop/pause should happen in two steps. This change is only available 73 * ABI 3.20 onwards. 74 */ 75 #define SOF_DAI_CONFIG_FLAGS_2_STEP_STOP BIT(0) 76 77 #define SOF_DAI_QUIRK_IS_SET(flags, quirk) \ 78 (((flags & SOF_DAI_CONFIG_FLAGS_QUIRK_MASK) >> SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT) & quirk) 79 80 /** \brief Types of DAI */ 81 enum sof_ipc_dai_type { 82 SOF_DAI_INTEL_NONE = 0, /**< None */ 83 SOF_DAI_INTEL_SSP, /**< Intel SSP */ 84 SOF_DAI_INTEL_DMIC, /**< Intel DMIC */ 85 SOF_DAI_INTEL_HDA, /**< Intel HD/A */ 86 SOF_DAI_INTEL_ALH, /**< Intel ALH */ 87 SOF_DAI_IMX_SAI, /**< i.MX SAI */ 88 SOF_DAI_IMX_ESAI, /**< i.MX ESAI */ 89 SOF_DAI_AMD_BT, /**< Amd BT */ 90 SOF_DAI_AMD_SP, /**< Amd SP */ 91 SOF_DAI_AMD_DMIC, /**< Amd DMIC */ 92 SOF_DAI_MEDIATEK_AFE, /**< Mtk AFE */ 93 SOF_DAI_AMD_HS, /**< Amd HS */ 94 SOF_DAI_AMD_SP_VIRTUAL, /**<Amd SP VIRTUAL */ 95 SOF_DAI_AMD_HS_VIRTUAL /**<Amd HS VIRTUAL */ 96 }; 97 98 /* general purpose DAI configuration */ 99 struct sof_ipc_dai_config { 100 struct sof_ipc_cmd_hdr hdr; 101 uint32_t type; /**< DAI type - enum sof_ipc_dai_type */ 102 uint32_t dai_index; /**< index of this type dai */ 103 104 /* physical protocol and clocking */ 105 uint16_t format; /**< SOF_DAI_FMT_ */ 106 uint8_t group_id; /**< group ID, 0 means no group (ABI 3.17) */ 107 uint8_t flags; /**< SOF_DAI_CONFIG_FLAGS_ (ABI 3.19) */ 108 109 /* reserved for future use */ 110 uint32_t reserved[8]; 111 112 /* HW specific data */ 113 union { 114 struct sof_ipc_dai_ssp_params ssp; 115 struct sof_ipc_dai_dmic_params dmic; 116 struct sof_ipc_dai_hda_params hda; 117 struct sof_ipc_dai_alh_params alh; 118 struct sof_ipc_dai_esai_params esai; 119 struct sof_ipc_dai_sai_params sai; 120 struct sof_ipc_dai_acp_params acpbt; 121 struct sof_ipc_dai_acp_params acpsp; 122 struct sof_ipc_dai_acpdmic_params acpdmic; 123 struct sof_ipc_dai_acp_params acphs; 124 struct sof_ipc_dai_afe_params afe; 125 }; 126 } __attribute__((packed, aligned(4))); 127 128 #endif /* __IPC_DAI_H__ */ 129
