1 /* 2 * Copyright (c) 2024, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __SMMU_V3_MEMORY_MAP_H__ 8 #define __SMMU_V3_MEMORY_MAP_H__ 9 10 /* SMMU Section Map relative to SMMU base */ 11 12 /* SMMU TCU base */ 13 #define SMMU_TCU_BASE 0x0000000ULL 14 /* SMMU TCU limit */ 15 #define SMMU_TCU_LIMIT 0x00AFFFCULL 16 17 /* SMMU TCU Page Bases relative to TCU base */ 18 19 /* TCU SMMU root control registers page base */ 20 #define SMMU_ROOT_CONTROL_REGISTERS_PAGE_BASE 0xA0000U 21 /* TCU SMMU root control registers page base */ 22 #define SMMU_ROOT_CONTROL_REGISTERS_PAGE_LIMIT 0xAFFFFU 23 24 #endif /* __SMMU_V3_MEMORY_MAP_H__ */ 25
