1  /*******************************************************************************
2  * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Register bit offsets and masks definitions for PolarFire SoC Microprocessor
7  * Subsystem I2C bare metal software driver.
8  *
9  */
10 #ifndef MSS_I2C_REGS_H_
11 #define MSS_I2C_REGS_H_
12 
13 #ifdef __cplusplus
14 extern "C" {
15 #endif
16 
17 /*******************************************************************************
18  Register Bit definitions
19  */
20 #define CR0                         (uint8_t)0u
21 #define CR1                         (uint8_t)1u
22 #define AA                          (uint8_t)2u
23 #define SI                          (uint8_t)3u
24 #define STO                         (uint8_t)4u
25 #define STA                         (uint8_t)5u
26 #define ENS1                        (uint8_t)6u
27 #define CR2                         (uint8_t)7u
28 
29 #define CR0_MASK                    (uint8_t)(0x01)
30 #define CR1_MASK                    (uint8_t)(0x02)
31 #define AA_MASK                     (uint8_t)(0x04)
32 #define SI_MASK                     (uint8_t)(0x08)
33 #define STO_MASK                    (uint8_t)(0x10)
34 #define STA_MASK                    (uint8_t)(0x20)
35 
36 #define ENS1_MASK                   (uint8_t)(0x40)
37 #define CR2_MASK                    (uint8_t)(0x80)
38 #define DATA_DIR                    (uint8_t)0u
39 #define DATA_DIR_MASK               (uint8_t)(0x01)
40 
41 #define ADDR_GC                     (uint8_t)0u
42 
43 #define ADDR_GC_MASK                (uint8_t)0x01
44 
45 #define SMBALERT_IE                 (uint8_t)0u
46 #define SMBSUS_IE                   (uint8_t)1u
47 #define SMB_IPMI_EN                 (uint8_t)2u
48 #define SMBALERT_NI                 (uint8_t)3u
49 #define SMBALERT_NO                 (uint8_t)4u
50 #define SMBSUS_NI                   (uint8_t)5u
51 #define SMBSUS_NO                   (uint8_t)6u
52 #define SMBUS_RESET                 (uint8_t)7u
53 
54 #define SMBALERT_IE_MASK            (uint8_t)(0x01)
55 #define SMBSUS_IE_MASK              (uint8_t)(0x02)
56 #define SMB_IPMI_EN_MASK            (0x01 << SMB_IPMI_EN)
57 #define SMBALERT_NI_MASK            (0x01 << SMBALERT_NI)
58 #define SMBALERT_NO_MASK            (uint8_t)(0x10)
59 #define SMBSUS_NI_MASK              (0x01 << SMBSUS_NI)
60 #define SMBSUS_NO_MASK              (uint8_t)(0x40)
61 #define SMBUS_RESET_MASK            (uint8_t)(0x80)
62 
63 #ifdef __cplusplus
64 }
65 #endif
66 
67 #endif /* MSS_I2C_REGS_H_ */
68