1 /***************************************************************************/ /** 2 * @file 3 * @brief 4 ******************************************************************************* 5 * # License 6 * <b>Copyright 2019 Silicon Laboratories Inc. www.silabs.com</b> 7 ******************************************************************************* 8 * 9 * SPDX-License-Identifier: Zlib 10 * 11 * The licensor of this software is Silicon Laboratories Inc. 12 * 13 * This software is provided 'as-is', without any express or implied 14 * warranty. In no event will the authors be held liable for any damages 15 * arising from the use of this software. 16 * 17 * Permission is granted to anyone to use this software for any purpose, 18 * including commercial applications, and to alter it and redistribute it 19 * freely, subject to the following restrictions: 20 * 21 * 1. The origin of this software must not be misrepresented; you must not 22 * claim that you wrote the original software. If you use this software 23 * in a product, an acknowledgment in the product documentation would be 24 * appreciated but is not required. 25 * 2. Altered source versions must be plainly marked as such, and must not be 26 * misrepresented as being the original software. 27 * 3. This notice may not be removed or altered from any source distribution. 28 * 29 ******************************************************************************/ 30 #pragma once 31 32 #include "sl_si91x_status.h" 33 #include "sl_si91x_types.h" 34 #include "sl_si91x_protocol_types.h" 35 #include "sl_bit.h" 36 #include "sl_wifi_types.h" 37 #include <stdint.h> 38 #include <stddef.h> 39 40 //! @cond Doxygen_Suppress 41 #ifndef BIT 42 #define BIT(a) ((uint32_t)1U << a) 43 #endif 44 45 #define NETWORK_INTERFACE_VALID(x) (x == SL_NET_WIFI_CLIENT_INTERFACE) || (x == SL_NET_WIFI_AP_INTERFACE) 46 47 // NOTE: The value for SL_SI91X_SI917_RAM_MEM_CONFIG will be fetched from respective si91x_mem_config_1/2/3.slcc 48 #ifdef SLI_SI91X_MCU_INTERFACE 49 #if SL_SI91X_SI917_RAM_MEM_CONFIG == 1 50 #define MEMORY_CONFIG SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC 51 #elif SL_SI91X_SI917_RAM_MEM_CONFIG == 2 52 #define MEMORY_CONFIG SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM 53 #elif SL_SI91X_SI917_RAM_MEM_CONFIG == 3 54 #define MEMORY_CONFIG SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV 55 #endif 56 #else 57 #define MEMORY_CONFIG SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE 58 #endif 59 60 //! @endcond 61 62 /** \addtogroup SI91X_FEATURE_BITMAP 63 * @{ */ 64 /*=========================================================================*/ 65 // feature bit map parameters description !// 66 /*=========================================================================*/ 67 /** 68 * @def SL_SI91X_FEAT_SECURITY_OPEN 69 * @brief Security type: Open. 70 * @details 71 * This feature supports open security type in client mode. 72 * 73 * @note It is recommended to enable this macro when configuring the security type as open mode. 74 */ 75 #define SL_SI91X_FEAT_SECURITY_OPEN BIT(0) 76 77 /** 78 * @def SL_SI91X_FEAT_SECURITY_PSK 79 * @brief Security type: WPA/WPA2. 80 * @details 81 * This feature supports WPA/WPA2 security type in client mode. 82 * 83 * @note It is recommended to enable this macro when configuring the security type as WPA, WPA2, or any other security modes. 84 */ 85 #define SL_SI91X_FEAT_SECURITY_PSK BIT(1) 86 87 /** 88 * @def SL_SI91X_FEAT_AGGREGATION 89 * @brief Aggregation support. 90 * @details 91 * Enables support for packet aggregation. 92 * 93 * @note Supports AMPDU for both TX and RX. 94 */ 95 #define SL_SI91X_FEAT_AGGREGATION BIT(2) 96 97 /** 98 * @def SL_SI91X_FEAT_LP_GPIO_BASED_HANDSHAKE 99 * @brief Low Power (LP) mode GPIO handshake. 100 * @details 101 * Enables GPIO-based handshake for low power mode. 102 * 103 * @note Not applicable for SI917. 104 */ 105 #define SL_SI91X_FEAT_LP_GPIO_BASED_HANDSHAKE BIT(3) 106 107 /** 108 * @def SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE 109 * @brief Ultra Low Power (ULP) mode GPIO handshake. 110 * @details 111 * Enables GPIO-based handshake for ultra low power mode. 112 * 113 * @note Not applicable for SoC 114 */ 115 #define SL_SI91X_FEAT_ULP_GPIO_BASED_HANDSHAKE BIT(4) 116 117 /** 118 * @def SL_SI91X_FEAT_DEV_TO_HOST_ULP_GPIO_1 119 * @brief ULP GPIO 1 wake-up indication. 120 * @details 121 * Configures ULP GPIO 1 for wake-up indication. 122 */ 123 #define SL_SI91X_FEAT_DEV_TO_HOST_ULP_GPIO_1 BIT(5) 124 125 /** 126 * @def SL_SI91X_FEAT_RF_SUPPLY_VOL_3_3_VOLT 127 * @brief 3.3V RF supply. 128 * @details 129 * Configures the device to use a 3.3V power supply for RF. 130 * 131 * @note Not applicable for SI917. 132 */ 133 #define SL_SI91X_FEAT_RF_SUPPLY_VOL_3_3_VOLT BIT(6) 134 135 /** 136 * @def SL_SI91X_FEAT_WPS_DISABLE 137 * @brief Disable WPS in AP mode. 138 * @details 139 * Disables Wi-Fi Protected Setup (WPS) functionality in Client and Access Point (AP) mode. 140 */ 141 #define SL_SI91X_FEAT_WPS_DISABLE BIT(7) 142 143 /** 144 * @def SL_SI91X_FEAT_EAP_LEAP_IN_COEX 145 * @brief Enable EAP-LEAP mode. 146 * @details 147 * Enables Extensible Authentication Protocol - Lightweight Extensible Authentication Protocol (EAP-LEAP) in coexistence mode. 148 */ 149 #define SL_SI91X_FEAT_EAP_LEAP_IN_COEX BIT(8) 150 151 /** 152 * @def SL_SI91X_FEAT_HIDE_PSK_CREDENTIALS 153 * @brief Hide sensitive credentials. 154 * @details 155 * Hides sensitive information such as Pre-Shared Key (PSK), Pairwise Master Key (PMK), and EAP credentials. 156 */ 157 #define SL_SI91X_FEAT_HIDE_PSK_CREDENTIALS BIT(9) 158 159 /** 160 * @def SL_SI91X_FEAT_SSL_HIGH_STREAMING_BIT 161 * @brief High SSL streaming throughput. 162 * @details 163 * Enables high throughput for Secure Sockets Layer (SSL) streaming. 164 */ 165 #define SL_SI91X_FEAT_SSL_HIGH_STREAMING_BIT BIT(10) 166 167 /** 168 * @def SL_SI91X_FEAT_LONG_ICMP_PACKET 169 * @brief Support for long-sized ICMP packets. 170 * @details 171 * Enables support for long-sized Internet Control Message Protocol (ICMP) packets. Maximum 1472 bytes for IPv4 and 1452 bytes for IPv6. 172 * 173 * @note Bit 11 are reserved. 174 */ 175 #define SL_SI91X_FEAT_LONG_ICMP_PACKET BIT(12) 176 177 /** 178 * @def SL_SI91X_FEAT_TRANSCEIVER_MAC_PEER_DS_SUPPORT 179 * @brief MAC layer peer information storage. 180 * @details 181 * Enables support to store peer information in the MAC layer in Transceiver mode of operation. 182 */ 183 #define SL_SI91X_FEAT_TRANSCEIVER_MAC_PEER_DS_SUPPORT BIT(13) 184 185 /** 186 * @def SL_SI91X_FEAT_LONG_HTTP_URL 187 * @brief Support for long HTTP GET URLs. 188 * @details 189 * Enables support for long HTTP GET URLs. The maximum URL length supported is 2048 bytes. 190 */ 191 #define SL_SI91X_FEAT_LONG_HTTP_URL BIT(14) 192 193 /** 194 * @def SL_SI91X_FEAT_DISABLE_11AX_SUPPORT 195 * @brief Disable 11ax connections. 196 * @details 197 * Force DUT connection (in station mode) to use 11n, disabling 11ax connections. 198 */ 199 #define SL_SI91X_FEAT_DISABLE_11AX_SUPPORT BIT(15) 200 /** @} */ 201 202 /** 203 * @def SLI_SI91X_FEAT_FW_UPDATE_NEW_CODE 204 * @brief Indicates support for a new set of firmware update result codes. This bit is used for internal purpose. 205 * @details 206 * This bit in the feature bitmap is used to inform the NWP firmware whether 207 * the host supports a new set of result codes to differentiate firmware update 208 * results from other non-firmware-related results. If this bit is set, 209 * the NWP firmware will send result codes from the new set after a firmware update. 210 * If the bit is not set, the legacy result codes will be used. 211 */ 212 #define SLI_SI91X_FEAT_FW_UPDATE_NEW_CODE BIT(16) 213 214 /** \addtogroup SI91X_FEATURE_BITMAP 215 * @{ */ 216 /** 217 * @def SL_SI91X_FEAT_SECURE_ATTESTATION 218 * @brief Secure attestation. 219 * @details 220 * Enables secure attestation functionality. 221 * 222 * @note Bit(16) is used internally by SDK. Bit 17-29 and Bit 31 is reserved. 223 */ 224 #define SL_SI91X_FEAT_SECURE_ATTESTATION BIT(30) 225 /** @} */ 226 227 /** \addtogroup SI91X_TCP_IP_FEATURE_BITMAP 228 * @{ */ 229 /*=========================================================================*/ 230 // TCP/IP feature bit map parameters description !// 231 /*=========================================================================*/ 232 /** 233 * @def SL_SI91X_TCP_IP_FEAT_BYPASS 234 * @brief Enables the TCP/IP bypass feature. 235 * 236 * @details 237 * When this feature is enabled, the TCP/IP stack processing is bypassed, 238 * allowing raw Ethernet frames to be sent and received. This is useful 239 * for applications that require direct control over Ethernet frames or 240 * for implementing custom network protocols. 241 * 242 * This is defined as a bit flag that can be set in the feature configuration 243 * to enable the TCP/IP bypass. 244 */ 245 246 #define SL_SI91X_TCP_IP_FEAT_BYPASS BIT(0) 247 248 /// @note Bit 1 is reserved 249 250 /** 251 * @def SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT 252 * @brief Enables the DHCPv4 client feature. 253 * 254 * @details 255 * This feature allows the device to obtain an IPv4 address, 256 * subnet mask, default gateway, and DNS server from a DHCP server. 257 */ 258 #define SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT BIT(2) 259 260 /** 261 * @def SL_SI91X_TCP_IP_FEAT_DHCPV6_CLIENT 262 * @brief Enables the DHCPv6 client feature. 263 * 264 * @details 265 * This feature allows the device to obtain an IPv6 address 266 * and other network configuration details from a DHCPv6 server. 267 */ 268 #define SL_SI91X_TCP_IP_FEAT_DHCPV6_CLIENT BIT(3) 269 270 /** 271 * @def SL_SI91X_TCP_IP_FEAT_DHCPV4_SERVER 272 * @brief Enables the DHCPv4 server feature. 273 * 274 * @details 275 * This feature allows the device to act as a DHCPv4 server, providing IPv4 276 * addresses and network configuration to DHCPv4 clients on the network. 277 */ 278 #define SL_SI91X_TCP_IP_FEAT_DHCPV4_SERVER BIT(4) 279 280 /** 281 * @def SL_SI91X_TCP_IP_FEAT_DHCPV6_SERVER 282 * @brief Enables the DHCPv6 server feature. 283 * 284 * @details 285 * This feature allows the device to act as a DHCPv6 server, providing IPv6 286 * addresses and network configuration to DHCPv6 clients on the network. 287 */ 288 #define SL_SI91X_TCP_IP_FEAT_DHCPV6_SERVER BIT(5) 289 290 /** 291 * @def SL_SI91X_TCP_IP_FEAT_JSON_OBJECTS 292 * @brief Enables support for JSON objects. 293 * 294 * @details 295 * This feature allows the device to handle JSON (JavaScript Object Notation) 296 * objects, which can be used for data interchange in web applications. 297 */ 298 #define SL_SI91X_TCP_IP_FEAT_JSON_OBJECTS BIT(6) 299 300 /** 301 * @def SL_SI91X_TCP_IP_FEAT_HTTP_CLIENT 302 * @brief Enables the HTTP client feature. 303 * 304 * @details 305 * This feature allows the device to send HTTP requests and receive HTTP 306 * responses from web servers, enabling web-based communication. 307 */ 308 #define SL_SI91X_TCP_IP_FEAT_HTTP_CLIENT BIT(7) 309 310 /** 311 * @def SL_SI91X_TCP_IP_FEAT_DNS_CLIENT 312 * @brief Enables the DNS client feature. 313 * 314 * @details 315 * This feature allows the device to resolve domain names to IP addresses 316 * using the Domain Name System (DNS), enabling communication with servers 317 * by hostname. 318 */ 319 #define SL_SI91X_TCP_IP_FEAT_DNS_CLIENT BIT(8) 320 321 /** 322 * @def SL_SI91X_TCP_IP_FEAT_SNMP_AGENT 323 * @brief Enables the SNMP agent feature. 324 * 325 * @details 326 * This feature allows the device to act as an SNMP (Simple Network Management 327 * Protocol) agent, enabling network management and monitoring. 328 */ 329 #define SL_SI91X_TCP_IP_FEAT_SNMP_AGENT BIT(9) 330 331 /** 332 * @def SL_SI91X_TCP_IP_FEAT_SSL 333 * @brief Enables the SSL feature. 334 * 335 * @details 336 * This feature allows the device to use SSL (Secure Sockets Layer) for secure 337 * communication over the network, providing encryption and authentication. 338 */ 339 #define SL_SI91X_TCP_IP_FEAT_SSL BIT(10) 340 341 /** 342 * @def SL_SI91X_TCP_IP_FEAT_ICMP 343 * @brief Enables the ICMP feature (ping). 344 * 345 * @details 346 * This feature allows the device to use ICMP (Internet Control Message 347 * Protocol) for network diagnostics, such as sending ping requests. 348 */ 349 #define SL_SI91X_TCP_IP_FEAT_ICMP BIT(11) 350 351 /// @note Bit 12 is reserved 352 353 /// @note Bit 13 is reserved 354 355 /** 356 * @def SL_SI91X_TCP_IP_FEAT_SEND_CONFIGS_TO_HOST 357 * @brief Enables sending configuration data to the host. 358 * 359 * @details 360 * This feature allows the device to send web page configuration data to the 361 * host system from the wireless configuration page. 362 */ 363 #define SL_SI91X_TCP_IP_FEAT_SEND_CONFIGS_TO_HOST BIT(14) 364 365 /** 366 * @def SL_SI91X_TCP_IP_FEAT_FTP_CLIENT 367 * @brief Enables the FTP client feature. 368 * 369 * @details 370 * This feature allows the device to act as an FTP (File Transfer Protocol) 371 * client, enabling file transfers to and from FTP servers. 372 */ 373 #define SL_SI91X_TCP_IP_FEAT_FTP_CLIENT BIT(15) 374 375 /** 376 * @def SL_SI91X_TCP_IP_FEAT_SNTP_CLIENT 377 * @brief Enables the SNTP client feature. 378 * 379 * @details 380 * This feature allows the device to synchronize its clock with an SNTP 381 * (Simple Network Time Protocol) server, ensuring accurate timekeeping. 382 */ 383 #define SL_SI91X_TCP_IP_FEAT_SNTP_CLIENT BIT(16) 384 385 /** 386 * @def SL_SI91X_TCP_IP_FEAT_IPV6 387 * @brief Enables IPv6 support. 388 * 389 * @details 390 * This feature allows the device to use IPv6 (Internet Protocol version 6), 391 * providing a larger address space and improved routing capabilities. 392 * 393 * @note IPv6 will also be enabled if the DHCPv6 client or DHCPv6 server 394 * feature is enabled, regardless of the tcp_ip_feature_bit_map[17] setting. 395 */ 396 #define SL_SI91X_TCP_IP_FEAT_IPV6 BIT(17) 397 398 /** 399 * @def SL_SI91X_TCP_IP_FEAT_RAW_DATA 400 * @brief Enables raw data support. 401 * 402 * @details 403 * This feature allows the device to handle raw data frames, bypassing the 404 * TCP/IP stack. It is supported only in AP mode and requires the TCP_BYPASS 405 * feature to be disabled. If any packet from the host with frame type 0x1 406 * is received by the firmware, the packet will be sent on air without 407 * TCP/IP stack processing. ARP and broadcast packets (other than DHCP 408 * packets) received on air will be sent to the host. 409 */ 410 #define SL_SI91X_TCP_IP_FEAT_RAW_DATA BIT(18) 411 412 /** 413 * @def SL_SI91X_TCP_IP_FEAT_MDNSD 414 * @brief Enables the MDNSD feature. 415 * 416 * @details 417 * This feature allows the device to use Multicast DNS (mDNS) for local 418 * network service discovery, enabling devices to find each other without 419 * a central DNS server. 420 * 421 * @note This feature is not supported in AP mode. 422 */ 423 #define SL_SI91X_TCP_IP_FEAT_MDNSD BIT(19) 424 425 /** 426 * @def SL_SI91X_TCP_IP_FEAT_SMTP_CLIENT 427 * @brief Enables the SMTP client feature. 428 * 429 * @details 430 * This feature allows the device to act as an SMTP (Simple Mail Transfer 431 * Protocol) client, enabling it to send emails. 432 */ 433 #define SL_SI91X_TCP_IP_FEAT_SMTP_CLIENT BIT(20) 434 435 /** 436 * @def SL_SI91X_TCP_IP_TOTAL_SOCKETS 437 * @brief Selects the number of sockets. 438 * 439 * @details 440 * This macro allows the configuration of the total number of sockets 441 * available. A maximum of 10 sockets are allowed. Bits 21-24 are used 442 * to set the TOTAL_SOCKETS. 443 * @param total_sockets The total number of sockets to be configured. 444 */ 445 #define SL_SI91X_TCP_IP_TOTAL_SOCKETS(total_sockets) (total_sockets << 21) 446 447 /** 448 * @def SL_SI91X_TCP_IP_FEAT_SINGLE_SSL_SOCKET 449 * @brief Enables a single SSL socket. 450 * 451 * @details 452 * This feature allows the device to use a single SSL socket for secure 453 * communication. 454 */ 455 #define SL_SI91X_TCP_IP_FEAT_SINGLE_SSL_SOCKET BIT(25) 456 457 /** 458 * @def SL_SI91X_TCP_IP_FEAT_LOAD_PUBLIC_PRIVATE_CERTS 459 * @brief Enables loading of public and private keys for TLS/SSL handshake. 460 * 461 * @details 462 * This feature allows the device to load public and private keys for use 463 * in TLS/SSL handshakes. 464 * 465 * @note If a secure handshake is to be done using only 466 * a CA-certificate, then loading of private and public keys can be 467 * disabled, and these certificates can be erased from the flash using 468 * the load_cert API. If secure handshake verification of private and 469 * public keys is needed, then loading of these keys must be enabled. 470 */ 471 #define SL_SI91X_TCP_IP_FEAT_LOAD_PUBLIC_PRIVATE_CERTS BIT(26) 472 473 /** 474 * @def SL_SI91X_TCP_IP_FEAT_LOAD_CERTS_INTO_RAM 475 * @brief Enables loading of SSL certificates into RAM. 476 * 477 * @details 478 * This feature allows the device to load SSL certificates into RAM for 479 * faster access during secure communications. 480 */ 481 #define SL_SI91X_TCP_IP_FEAT_LOAD_CERTS_INTO_RAM BIT(27) 482 483 /// @note Bit 28 is reserved 484 485 /** 486 * @def SL_SI91X_TCP_IP_FEAT_POP3_CLIENT 487 * @brief Enables the POP3 client feature. 488 * 489 * @details 490 * This feature allows the device to act as a POP3 (Post Office Protocol 491 * version 3) client, enabling it to retrieve emails from a POP3 server. 492 */ 493 #define SL_SI91X_TCP_IP_FEAT_POP3_CLIENT BIT(29) 494 495 /** 496 * @def SL_SI91X_TCP_IP_FEAT_OTAF 497 * @brief Enables the OTAF client feature. 498 * 499 * @details 500 * This feature allows the device to perform over-the-air firmware (OTAF) 501 * updates, enabling it to download and install firmware updates remotely. 502 */ 503 #define SL_SI91X_TCP_IP_FEAT_OTAF BIT(30) 504 505 /** 506 * @def SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID 507 * @brief Enables TCP/IP extension support. 508 * 509 * @details 510 * This feature allows the device to use extended TCP/IP features, 511 * If this bit is enabled then only, the features present in the ext_tcp ip feature bitmap can be used. 512 */ 513 #define SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID BIT(31) 514 /** @} */ 515 516 /** \addtogroup SI91X_CUSTOM_FEATURE_BITMAP 517 * @{ */ 518 /*=========================================================================*/ 519 // Custom feature bit map parameters description !// 520 /*=========================================================================*/ 521 /** 522 * @def SL_SI91X_CUSTOM_FEAT_DISABLE_GATEWAY_IN_RSI_AP 523 * @brief Disables gateway configuration sent to STA from RSI AP. 524 * @details If this bit is set to 1, the DHCP server behavior changes when the device is in Access Point (AP) mode. 525 * The DHCP server will assign IP addresses to client nodes without sending out a Gateway address, providing only the assigned IP and Subnet values. 526 * It is highly recommended to keep this value at '0' for standard AP functionality, 527 * as disabling the gateway address is typically needed only for very specialized use cases. The default value of this bit is '0' 528 * 529 * @note Bits 0 - 1 are reserved. 530 */ 531 #define SL_SI91X_CUSTOM_FEAT_DISABLE_GATEWAY_IN_RSI_AP BIT(2) 532 533 /** 534 * @def SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_160MHZ 535 * @brief Configures the clock for NWP SOC to 160 MHz. 536 * @details If higher performance, such as increased throughput, is required this configuration sets the System-on-Chip (SoC) clock to 160 MHz. 537 * 538 * @note Ensure to set `pll_mode` to 1 in the feature frame command for this configuration to take effect. 539 * @note Bit 3 is reserved. 540 */ 541 #define SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_160MHZ BIT(4) 542 543 /** 544 * @def SL_SI91X_CUSTOM_FEAT_AP_IN_HIDDEN_MODE 545 * @brief Configures the Access Point (AP) to operate in hidden mode. 546 * @details If this bit is set, the AP is created in a hidden mode where its SSID is not broadcasted, making the AP less visible to clients. 547 * This feature is valid only when the device is in AP mode. 548 */ 549 #define SL_SI91X_CUSTOM_FEAT_AP_IN_HIDDEN_MODE BIT(5) 550 551 /** 552 * @def SL_SI91X_CUSTOM_FEAT_DNS_SERVER_IN_DHCP_OFFER 553 * @brief Includes DNS server IP address in DHCP offer response when in AP mode. 554 * @details When this bit is set, the DHCP server running in AP mode will include the DNS server IP address in the DHCP offer response sent to clients. 555 */ 556 #define SL_SI91X_CUSTOM_FEAT_DNS_SERVER_IN_DHCP_OFFER BIT(6) 557 558 /** 559 * @def SL_SI91X_CUSTOM_FEAT_DFS_CHANNEL_SUPPORT 560 * @brief Enables scanning of DFS channels in the 5 GHz band. 561 * @details This bit enables the support for scanning Dynamic Frequency Selection (DFS) channels in the 5 GHz band. 562 * It is valid only in Wi-Fi client mode. Ensure to set the region configuration before scanning DFS channels. 563 * 564 * @note Bit 7 is reserved. 565 * @note 5Gz is not supported in SI917. 566 */ 567 #define SL_SI91X_CUSTOM_FEAT_DFS_CHANNEL_SUPPORT BIT(8) 568 569 /** 570 * @def SL_SI91X_CUSTOM_FEAT_LED_FEATURE 571 * @brief Enables LED blinking feature to indicate network activity. 572 * @details When this bit is set, the LED (GPIO_16) will blink to indicate network activity. 573 * The LED blinks when a TX packet is sent or when a unicast packet addressed to the device’s MAC is received. 574 * 575 * @note Not applicable for SI917. 576 */ 577 #define SL_SI91X_CUSTOM_FEAT_LED_FEATURE BIT(9) 578 579 /** 580 * @def SL_SI91X_CUSTOM_FEAT_ASYNC_CONNECTION_STATUS 581 * @brief Enables asynchronous WLAN connection status indication to the host. 582 * @details If this bit is enabled, the module will asynchronously notify the host of WLAN connection status changes. 583 * This feature is valid only in Wi-Fi client mode. 584 */ 585 #define SL_SI91X_CUSTOM_FEAT_ASYNC_CONNECTION_STATUS BIT(10) 586 587 /** 588 * @def SL_SI91X_CUSTOM_FEAT_WAKE_ON_WIRELESS 589 * @brief Enables wake-on-wireless functionality in UART mode. 590 * @details This bit enables the wake-on-wireless feature when operating in UART mode, allowing the module to wake up in response to wireless events. 591 * 592 * @note applicable only for NCP. 593 */ 594 #define SL_SI91X_CUSTOM_FEAT_WAKE_ON_WIRELESS BIT(11) 595 596 /** 597 * @def SL_SI91X_CUSTOM_FEAT_ENABLE_AP_BLACKLIST 598 * @brief Enables AP blacklisting in Station (STA) mode. 599 * @details By default, the client maintains an AP blacklist to avoid specific access points. 600 * Enabling this feature allows the client to bypass the AP blacklist during roaming or rejoin, if needed. 601 */ 602 #define SL_SI91X_CUSTOM_FEAT_ENABLE_AP_BLACKLIST BIT(12) 603 604 /** 605 * @def SL_SI91X_CUSTOM_FEAT_MAX_NUM_OF_CLIENTS 606 * @brief Sets the maximum number of clients supported in AP mode. 607 * @details This bit field sets the maximum number of clients that can be supported in Access Point (AP) mode. 608 * The value for this field should be provided in the range specified by bits 13 - 16. 609 * @param max_num_of_clients Number of clients to be supported (1 to 15). 610 */ 611 #define SL_SI91X_CUSTOM_FEAT_MAX_NUM_OF_CLIENTS(max_num_of_clients) (max_num_of_clients << 13) 612 613 /** 614 * @def SL_SI91X_CUSTOM_FEAT_ROAM_WITH_DEAUTH_OR_NULL_DATA 615 * @brief Selects between de-authentication or null data (with power management bit set) for roaming. 616 * @details If this bit is enabled then roam through DEAUTH, or roam through NULL. 617 */ 618 #define SL_SI91X_CUSTOM_FEAT_ROAM_WITH_DEAUTH_OR_NULL_DATA BIT(17) 619 620 /** 621 * @def SL_SI91X_CUSTOM_FEAT_TRIGGER_AUTO_CONFIG 622 * @brief Triggers automatic configuration. 623 * @details This bit enables the auto-configuration feature, which allows the module to automatically configure itself based on predefined parameters. 624 * 625 * @note Bits 18 - 19 are reserved. 626 * @note Not applicable for SI917. 627 */ 628 #define SL_SI91X_CUSTOM_FEAT_TRIGGER_AUTO_CONFIG BIT(20) 629 630 /** 631 * @def SL_SI91X_CUSTOM_FEAT_LIMIT_PACKETS_PER_STA 632 * @brief Limits the number of packets buffered per STA in AP mode. 633 * @details In Access Point (AP) mode, if this bit is set, only two packets per Station (STA) will be buffered when the STA is in Power Save (PS) mode. 634 * This helps manage buffer usage and ensures efficient packet handling. 635 * 636 * @note Bit 21 is reserved. 637 */ 638 #define SL_SI91X_CUSTOM_FEAT_LIMIT_PACKETS_PER_STA BIT(22) 639 640 /** 641 * @def SL_SI91X_CUSTOM_FEAT_HTTP_HTTPS_AUTH 642 * @brief Enables HTTP/HTTPS authentication. 643 * @details This bit enables authentication for HTTP and HTTPS connections, adding an extra layer of security for web-based communications. 644 */ 645 #define SL_SI91X_CUSTOM_FEAT_HTTP_HTTPS_AUTH BIT(23) 646 647 /** 648 * @def SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_120MHZ 649 * @brief Configures the clock for NWP SOC to 120 MHz. 650 * @details This configuration sets the System-on-Chip (SoC) clock to 120 MHz. This may be required for certain performance needs. 651 * Ensure to set `pll_mode` to 1 in the feature frame command for this configuration to take effect. 652 * 653 * @note This configuration is necessary for high throughput scenarios. 654 */ 655 #define SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_120MHZ BIT(24) 656 657 /** 658 * @def SL_SI91X_CUSTOM_FEAT_REJECT_CONNECT_REQ_IMMEDIATELY 659 * @brief Rejects new LTCP connection requests immediately when maximum clients are connected. 660 * @details When this bit is set, any new connection request for an LTCP socket will be rejected immediately if the maximum number of clients is already connected. 661 * By default, such requests are maintained in a pending list until an existing client disconnects. 662 * 663 * @note When BIT[26] = 0: New connection requests are held in a pending list. When BIT[26] = 1: New connection requests are immediately rejected. 664 */ 665 #define SL_SI91X_CUSTOM_FEAT_REJECT_CONNECT_REQ_IMMEDIATELY BIT(26) 666 667 /** 668 * @def SL_SI91X_CUSTOM_FEAT_DUAL_BAND_ROAM_VCSAFD 669 * @brief Enables dual-band roaming and VCSAFD feature (currently not supported). 670 * @details This bit enables support for dual-band roaming and VCSAFD (Virtual Channel Scan and Frequency Avoidance Detection), 671 * which enhances the module’s ability to switch between different frequency bands and avoid interference. 672 */ 673 #define SL_SI91X_CUSTOM_FEAT_DUAL_BAND_ROAM_VCSAFD BIT(27) 674 675 /** 676 * @def SL_SI91X_CUSTOM_FEAT_RTC_FROM_HOST 677 * @brief Enables Real-Time Clock (RTC) synchronization from the host. 678 * @details When this bit is set, the module will use the Real-Time Clock (RTC) provided by the host system for timekeeping. 679 * 680 * @note 681 * Ensure that the Real-Time Clock (RTC) timer is configured to enable certificate validation. 682 */ 683 #define SL_SI91X_CUSTOM_FEAT_RTC_FROM_HOST BIT(28) 684 685 /** 686 * @def SL_SI91X_CUSTOM_FEAT_BT_IAP 687 * @brief Enables Bluetooth In-App Programming (IAP) feature. 688 * @details This bit enables the Bluetooth In-App Programming (IAP) feature, allowing the module to support Bluetooth-related in-app programming functionalities. 689 */ 690 #define SL_SI91X_CUSTOM_FEAT_BT_IAP BIT(29) 691 692 /** 693 * @def SL_SI91X_CUSTOM_FEAT_EXTENTION_VALID 694 * @brief Validates the use of extended custom feature bitmap. 695 * @details This bit indicates that the extended custom feature bitmap is valid. 696 * If this bit is enabled then only, the features present in the extended custom feature bitmap can be used. 697 */ 698 #define SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID BIT(31) 699 /** @} */ 700 701 /** \addtogroup SI91X_EXTENDED_CUSTOM_FEATURE_BITMAP 702 * @{ */ 703 /*=========================================================================*/ 704 705 // Extended custom feature bitmap !// 706 /*=========================================================================*/ 707 708 /** 709 * @def SL_SI91X_EXT_FEAT_RSA_KEY_WITH_4096_SUPPORT 710 * @brief Supports 4096 size RSA KEY certificate. 711 * @details Enabling this bit allows the device to support 4096-bit RSA keys. Recommended only if 4096-bit keys are required. 712 * 713 * @note Bit 0 is reserved. 714 */ 715 #define SL_SI91X_EXT_FEAT_RSA_KEY_WITH_4096_SUPPORT BIT(1) 716 717 /** 718 * @def SL_SI91X_EXT_FEAT_SSL_CERT_WITH_4096_KEY_SUPPORT 719 * @brief Supports 4096 size KEY SSL certificate. 720 * @details Enabling this bit allows the device to support SSL certificates with 4096-bit keys. Recommended only if 4096-bit keys are required. 721 * 722 * @note Bit 2 is reserved. 723 */ 724 #define SL_SI91X_EXT_FEAT_SSL_CERT_WITH_4096_KEY_SUPPORT BIT(3) 725 726 /** 727 * @def SL_SI91X_EXT_FEAT_AP_BROADCAST_PKT_SND_B4_DTIM 728 * @brief Extended custom bitmap for AP Broadcast customization. 729 * @details Enabling this bit configures the Access Point to send broadcast packets before the DTIM (Delivery Traffic Indication Message) interval. 730 * 731 * @note If this bit is enabled, connected clients in power save mode may miss the packet. 732 */ 733 #define SL_SI91X_EXT_FEAT_AP_BROADCAST_PKT_SND_B4_DTIM BIT(4) 734 735 /** 736 * @def SL_SI91X_EXT_FEAT_FCC_LOW_PWR 737 * @brief Extended custom bitmap to support FCC (currently not supported). 738 * @details Enabling this bit allows the device to operate in a mode that complies with FCC (Federal Communications Commission) regulations for low power operation. 739 */ 740 #define SL_SI91X_EXT_FEAT_FCC_LOW_PWR BIT(5) 741 742 /** 743 * @def SL_SI91X_EXT_FEAT_PUF 744 * @brief To enable PUF (Physical Unclonable Function). 745 * @details Enabling this bit activates the Physical Unclonable Function feature, which provides a unique identifier for each device based on its physical characteristics. 746 * 747 * @note Bit 6 is reserved. 748 * @note Currently this feature is not supported for SI917. 749 */ 750 #define SL_SI91X_EXT_FEAT_PUF BIT(7) 751 752 /** 753 * @def SL_SI91X_EXT_FEAT_SPECTRAL_MASK_NOKIA 754 * @brief Nokia Spectral mask extended custom bitmap (currently not supported). 755 * @details Enabling this bit allows the device to support the Nokia Spectral mask for extended custom bitmap configurations. 756 */ 757 #define SL_SI91X_EXT_FEAT_SPECTRAL_MASK_NOKIA BIT(8) 758 759 /** 760 * @def SL_SI91X_EXT_HTTP_SKIP_DEFAULT_LEADING_CHARACTER 761 * @brief Extended feature bitmap to skip default leading character '\' in HTTP header. 762 * @details Enabling this bit configures the device to omit the default leading character '\' in HTTP headers, allowing for custom header formatting. 763 */ 764 #define SL_SI91X_EXT_HTTP_SKIP_DEFAULT_LEADING_CHARACTER BIT(9) 765 766 /** 767 * @def SL_SI91X_EXT_FEAT_PUF_PRIVATE_KEY 768 * @brief To enable PUF (Physical Unclonable Function) private key. 769 * @details Enabling this bit activates the use of a private key associated with the Physical Unclonable Function feature for enhanced security. 770 * 771 * @note Currently this feature is not supported for SI917. 772 */ 773 #define SL_SI91X_EXT_FEAT_PUF_PRIVATE_KEY BIT(10) 774 775 /** 776 * @def SL_SI91X_EXT_FEAT_ENABLE_11R_OTA 777 * @brief To enable 802.11R Over The Air Roaming (currently not supported). 778 * @details Enabling this bit activates support for 802.11R (Fast BSS Transition) Over The Air Roaming, which improves the handoff experience between access points. 779 * 780 * @note Resource Request Support is not present. 781 * @note If both BIT[11] and BIT[16] are not enabled, the device will default to Legacy Roaming. 782 */ 783 #define SL_SI91X_EXT_FEAT_ENABLE_11R_OTA BIT(11) 784 785 /** 786 * @def SL_SI91X_EXT_FEAT_IEEE_80211J 787 * @brief To enable 802.11J protocol (currently not supported). 788 * @details Enabling this bit activates support for the 802.11J protocol, which is used for wireless communication in Japan. 789 * 790 * @note If this bit is enabled, the set region command is mandatory with the region set to Japan and the band value must be 1. 791 */ 792 #define SL_SI91X_EXT_FEAT_IEEE_80211J BIT(12) 793 794 /** 795 * @def SL_SI91X_EXT_FEAT_IEEE_80211W 796 * @brief To enable 802.11W protocol. 797 * @details Enabling this bit activates support for the 802.11W protocol, which provides management frame protection. 798 * 799 * @note This bit must be set to enable WPA3 Personal Mode and WPA3 Personal Transition mode. 800 */ 801 #define SL_SI91X_EXT_FEAT_IEEE_80211W BIT(13) 802 803 /** 804 * @def SL_SI91X_EXT_FEAT_SSL_VERSIONS_SUPPORT 805 * @brief To enable the Multi-version TCP over SSL support. 806 * @details Enabling this bit allows the device to support multiple versions of SSL/TLS over TCP, providing flexibility in handling different SSL/TLS versions. 807 */ 808 #define SL_SI91X_EXT_FEAT_SSL_VERSIONS_SUPPORT BIT(14) 809 810 /** 811 * @def SL_SI91X_EXT_FEAT_16th_STATION_IN_AP_MODE 812 * @brief To enable 16 client support in Access Point (AP) mode. 813 * @details Enabling this bit allows up to 16 stations to connect to the device when it is operating in AP mode. 814 * 815 * @note If this bit is enabled, up to 16 stations can connect; otherwise, a maximum of 8 stations can connect. 816 */ 817 #define SL_SI91X_EXT_FEAT_16th_STATION_IN_AP_MODE BIT(15) 818 819 /** 820 * @def SL_SI91X_EXT_FEAT_ENABLE_11R_ODS 821 * @brief To enable 802.11R Over the Distribution System Roaming. 822 * @details Enabling this bit activates support for 802.11R (Fast BSS Transition) Over the Distribution System Roaming, which enhances roaming performance across different access points in the distribution system. 823 * 824 * @note 1. Resource Request Support is not present. 825 * @note 2. If both BIT[11] and BIT[16] are not enabled, the device will default to Legacy Roaming. 826 */ 827 #define SL_SI91X_EXT_FEAT_ENABLE_11R_ODS BIT(16) 828 829 /** 830 * @def SL_SI91X_EXT_FEAT_WOWLAN_DISABLE 831 * @brief To disable the WoWLAN (Wake-on-Wireless-LAN) feature. 832 * @details Enabling this bit disables the WoWLAN feature, which is used for waking the device from a low-power state through wireless network activity. 833 * By default WOW LAN Is enabled to maintain backward compatibility. So given option to disable this feature. 834 * 835 * @note This only valid in NCP mode. 836 */ 837 #define SL_SI91X_EXT_FEAT_WOWLAN_DISABLE BIT(17) 838 839 /** 840 * @def SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION 841 * @brief To disable auto correction of XTAL (40MHz crystal) 842 * @details Enabling this bit will disable the automatic compensation for frequency offsets, ensuring error-free calibration. 843 * 844 * @note This bit should be enabled in the following cases: 845 * @note 1. Always enable it in the Calibration application. 846 * @note 2. Enable it for all applications for the customer hardware with an XTAL part number other than 8Y40070013. 847 */ 848 #define SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION BIT(18) 849 850 /** 851 * @def SL_SI91X_EXT_FEAT_LOW_POWER_MODE 852 * @brief To enable low power mode in WLAN. 853 * @details Enabling this bit activates low power mode for WLAN, Active current will also be reduced. 854 * As most of the code which is needed to maintain connection is kept in RAM. 855 * There will be minimal execution of code from Flash which in turn results in low average current. 856 */ 857 #define SL_SI91X_EXT_FEAT_LOW_POWER_MODE BIT(19) 858 859 #if defined(SLI_SI917) || defined(DOXYGEN) || defined(SLI_SI915) 860 861 // For SoC 862 #if defined(SLI_SI91X_MCU_INTERFACE) || defined(DOXYGEN) 863 /** 864 * @def SL_SI91X_EXT_FEAT_352K_M4SS_320K 865 * @brief To enable 352K memory for NWP and 320K memory for M4. 866 * @details This configuration allocates 352K memory to the Network Processor (NWP) and 320K memory to the M4 core. 867 */ 868 #define SL_SI91X_EXT_FEAT_352K_M4SS_320K 0 869 870 /** 871 * @def SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV 872 * @brief To enable basic NWP and advanced MCU RAM level configuration. 873 * @details This setting configures the NWP with a basic memory level while providing the MCU with an advanced memory configuration. 874 * 875 * @note This configuration uses SL_SI91X_EXT_FEAT_352K_M4SS_320K. 876 */ 877 #define SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV SL_SI91X_EXT_FEAT_352K_M4SS_320K 878 879 /** 880 * @def SL_SI91X_EXT_FEAT_416K_M4SS_256K 881 * @brief To enable 416K memory for NWP and 256K memory for M4. 882 * @details This configuration allocates 416K memory to the Network Processor (NWP) and 256K memory to the M4 core. 883 */ 884 #define SL_SI91X_EXT_FEAT_416K_M4SS_256K BIT(21) 885 886 /** 887 * @def SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM 888 * @brief To enable medium NWP and medium MCU RAM level configuration. 889 * @details This setting configures both the NWP and the MCU with medium memory levels. 890 * 891 * @note This configuration uses SL_SI91X_EXT_FEAT_416K_M4SS_256K. 892 */ 893 #define SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM SL_SI91X_EXT_FEAT_416K_M4SS_256K 894 895 /** 896 * @def SL_SI91X_EXT_FEAT_480K_M4SS_192K 897 * @brief To enable 480K memory for NWP and 192K memory for M4. 898 * @details This configuration allocates 480K memory to the Network Processor (NWP) and 192K memory to the M4 core. 899 */ 900 #define SL_SI91X_EXT_FEAT_480K_M4SS_192K BIT(20) 901 902 /** 903 * @def SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC 904 * @brief To enable advanced NWP and basic MCU RAM level configuration. 905 * @details This setting configures the NWP with an advanced memory level while providing the MCU with a basic memory configuration. 906 * 907 * @note This configuration uses SL_SI91X_EXT_FEAT_480K_M4SS_192K. 908 */ 909 #define SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC SL_SI91X_EXT_FEAT_480K_M4SS_192K 910 #endif 911 912 // For NCP 913 #if (!defined(SLI_SI91X_MCU_INTERFACE)) || defined(DOXYGEN) 914 /** 915 * @def SL_SI91X_EXT_FEAT_352K 916 * @brief To enable 352K memory for NWP. 917 */ 918 #define SL_SI91X_EXT_FEAT_352K 0 919 920 /** 921 * @def SL_SI91X_RAM_LEVEL_NWP_BASIC 922 * @brief To enable basic NWP RAM level configuration. 923 * @details This setting configures the Network Processor (NWP) with 352K of memory. 924 */ 925 #define SL_SI91X_RAM_LEVEL_NWP_BASIC SL_SI91X_EXT_FEAT_352K 926 927 /** 928 * @def SL_SI91X_EXT_FEAT_672K 929 * @brief To enable 672K memory for NWP. 930 */ 931 #define SL_SI91X_EXT_FEAT_672K (BIT(20) | BIT(21)) 932 933 /** 934 * @def SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE 935 * @brief To enable full NWP RAM level configuration. 936 * @details This setting configures the Network Processor (NWP) with 672K of memory. 937 */ 938 #define SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE SL_SI91X_EXT_FEAT_672K 939 940 /** 941 * @def SL_SI91X_EXT_FEAT_352K_M4SS_320K 942 * @brief To enable 352K memory for NWP (For NCP mode ONLY, to be deprecated soon). 943 * @details This setting is soon to be deprecated and should only be used for NCP mode. 944 * 945 * @note For NCP mode ONLY, to be deprecated soon. 946 */ 947 #define SL_SI91X_EXT_FEAT_352K_M4SS_320K SL_SI91X_EXT_FEAT_352K 948 949 /** 950 * @def SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV 951 * @brief To enable basic NWP RAM level configuration (For NCP mode ONLY, to be deprecated soon). 952 * @details This setting configures the Network Processor (NWP) with 352K of memory in NCP mode. 953 * 954 * @note For NCP mode ONLY, to be deprecated soon. 955 */ 956 #define SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV SL_SI91X_EXT_FEAT_352K 957 958 /** 959 * @def SL_SI91X_EXT_FEAT_672K_M4SS_0K 960 * @brief To enable 672K memory for NWP and 0K memory for M4 (For NCP mode ONLY, to be deprecated soon). 961 * @details This setting configures the Network Processor (NWP) with 672K of memory and allocates no memory to the M4 core in NCP mode. 962 * 963 * @note For NCP mode ONLY, to be deprecated soon. 964 */ 965 #define SL_SI91X_EXT_FEAT_672K_M4SS_0K SL_SI91X_EXT_FEAT_672K 966 967 /** 968 * @def SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO 969 * @brief To enable full NWP RAM level configuration (For NCP mode ONLY, to be deprecated soon). 970 * @details This setting configures the Network Processor (NWP) with 672K of memory and allocates no memory to the M4 core in NCP mode. 971 * 972 * @note For NCP mode ONLY, to be deprecated soon. 973 */ 974 #define SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO SL_SI91X_EXT_FEAT_672K 975 976 #endif 977 978 #elif defined(SLI_SI917) || defined(SLI_SI915) 979 980 #define SL_SI91X_EXT_FEAT_384K_M4SS_320K 0 981 #define SL_SI91X_RAM_LEVEL_NWP_BASIC_MCU_ADV SL_SI91X_EXT_FEAT_384K_M4SS_320K 982 983 /// To enable 448K memory for NWP 984 /// To enable 448K memory for NWP 985 #define SL_SI91X_EXT_FEAT_448K_M4SS_256K BIT(21) 986 #define SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM SL_SI91X_EXT_FEAT_448K_M4SS_256K 987 988 /// To enable 512K memory for NWP 989 #define SL_SI91X_EXT_FEAT_512K_M4SS_192K BIT(20) 990 #define SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC SL_SI91X_EXT_FEAT_512K_M4SS_192K 991 992 #ifndef SLI_SI91X_MCU_INTERFACE 993 // To enable 704K memory for NWP; only supported in NCP 994 #define SL_SI91X_EXT_FEAT_704K_M4SS_0K (BIT(20) | BIT(21)) 995 #define SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO SL_SI91X_EXT_FEAT_704K_M4SS_0K 996 #define SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO 997 #endif 998 999 #endif // SLI_SI917 1000 1001 /// For 9116 chipsets 1002 #if !(defined(SLI_SI917) || defined(SLI_SI915)) // defaults 1003 1004 /** 1005 * @def SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM 1006 * @brief RAM level configuration: Medium NWP and Medium MCU memory. 1007 * @details This macro sets the RAM level to Medium for both NWP (Network Processor) and MCU (Microcontroller) memory. 1008 */ 1009 #define SL_SI91X_RAM_LEVEL_NWP_MEDIUM_MCU_MEDIUM SL_SI91X_EXT_FEAT_256K_MODE 1010 1011 /** 1012 * @def SL_SI91X_EXT_FEAT_320K_MODE 1013 * @brief To enable 320K memory for NWP. 1014 * @details Enabling this bit sets the memory configuration to 320KB for the NWP. 1015 */ 1016 #define SL_SI91X_EXT_FEAT_320K_MODE BIT(20) 1017 1018 /** 1019 * @def SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC 1020 * @brief RAM level configuration: Advanced NWP and Basic MCU memory. 1021 * @details This macro sets the RAM level to Advanced for NWP (Network Processor) and Basic for MCU (Microcontroller) memory, equivalent to enabling 320KB memory. 1022 */ 1023 #define SL_SI91X_RAM_LEVEL_NWP_ADV_MCU_BASIC SL_SI91X_EXT_FEAT_320K_MODE 1024 1025 /** 1026 * @def SL_SI91X_EXT_FEAT_256K_MODE 1027 * @brief To enable 256K memory for NWP. 1028 * @details Enabling this bit sets the memory configuration to 256KB for the NWP. The default memory configuration is 192KB. The memory configuration can be changed as follows: 1029 * 1030 * | Mode(KB) | BIT[20] | BIT[21] | 1031 * |:---------|:--------|:--------| 1032 * | 192 | 0 | 0 | 1033 * | 256 | 0 | 1 | 1034 * | 320 | 1 | 0 | 1035 * | 384 | 1 | 1 | 1036 * 1037 * @note Default memory configuration (RAM) is 192KB. User can set these bits to change the memory configuration as described. 1038 */ 1039 #define SL_SI91X_EXT_FEAT_256K_MODE BIT(21) 1040 1041 /** 1042 * @def SL_SI91X_EXT_FEAT_384K_MODE 1043 * @brief To enable 384K memory. 1044 * @details Enabling this bit sets the memory configuration to 384KB. This configuration is achieved by setting both BIT(20) and BIT(21). 1045 */ 1046 #define SL_SI91X_EXT_FEAT_384K_MODE (BIT(20) | BIT(21)) 1047 1048 /** 1049 * @def SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO 1050 * @brief RAM level configuration: All NWP and Zero MCU memory. 1051 * @details This macro sets the RAM level to 384KB for NWP (Network Processor) memory with zero configuration for MCU (Microcontroller) memory, equivalent to enabling 384KB memory. 1052 */ 1053 #define SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO SL_SI91X_EXT_FEAT_384K_MODE 1054 1055 /** 1056 * @def SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE 1057 * @brief RAM level configuration: All available NWP memory. 1058 * @details This macro sets the RAM level to the maximum available memory configuration for NWP (Network Processor), which is equivalent to the configuration set by `SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO`. 1059 */ 1060 #define SL_SI91X_RAM_LEVEL_NWP_ALL_AVAILABLE SL_SI91X_RAM_LEVEL_NWP_ALL_MCU_ZERO 1061 1062 #endif // defaults 1063 1064 /** 1065 * @def SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE 1066 * @brief To enable crystal clock for NWP. 1067 * @details This macro configures the sleep clock source selection for the NWP. The options are as follows: 1068 * 1069 * | Selection | BIT[23] | BIT[22] | 1070 * |:----------------------------------------------|:--------|:--------| 1071 * | Use RC clock as sleep clock | 0 | 0 | 1072 * | Use 32KHz clock from external XTAL OSCILLATOR | 0 | 1 | 1073 * | Use 32KHz bypass clock on UULP_GPIO_3 | 1 | 0 | 1074 * | Use 32KHz bypass clock on UULP_GPIO_4 | 1 | 1 | 1075 * 1076 * @note For 917 radio boards, set `SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE` to 1. For other variants, a value of 2 is recommended. 1077 */ 1078 1079 #ifdef SI91X_32kHz_EXTERNAL_OSCILLATOR 1080 #define SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(xtal_clk_enable) (xtal_clk_enable << 23) 1081 #else 1082 #define SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(xtal_clk_enable) (xtal_clk_enable << 22) 1083 #endif 1084 1085 // Determine the XTAL clock enable value 1086 #if defined(SLI_SI917) || defined(SLI_SI915) && defined(SLI_SI91X_MCU_CONFIG_RADIO_BOARD_VER2) 1087 /// To enable crystal clock for NWP 1088 #define SL_SI91X_EXT_FEAT_XTAL_CLK SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(1) 1089 #else 1090 /** 1091 * @def SL_SI91X_EXT_FEAT_XTAL_CLK 1092 * @brief Define to enable 32KHz crystal clock using the external XTAL OSCILLATOR. 1093 * @details This macro sets the `SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE` with a value of 2, which configures the sleep clock source to use the 32KHz clock from the external XTAL OSCILLATOR. 1094 */ 1095 #define SL_SI91X_EXT_FEAT_XTAL_CLK SL_SI91X_EXT_FEAT_XTAL_CLK_ENABLE(2) 1096 #endif 1097 1098 /** 1099 * @def SL_SI91X_EXT_FEAT_HOMEKIT_WAC_ENABLED 1100 * @brief To inform firmware not to modify mDNS text records. 1101 * @details Enabling this bit indicates that the firmware should not alter mDNS (Multicast DNS) text records. 1102 */ 1103 #define SL_SI91X_EXT_FEAT_HOMEKIT_WAC_ENABLED BIT(24) 1104 1105 /** 1106 * @def SL_SI91X_EXT_FEAT_1P8V_SUPPORT 1107 * @brief To enable 1.8V support for NWP. 1108 * @details Enabling this bit activates support for 1.8V operation. 1109 */ 1110 #define SL_SI91X_EXT_FEAT_1P8V_SUPPORT BIT(25) 1111 1112 /** 1113 * @def SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS 1114 * @brief To select UART for debug prints pin selection. 1115 * @details If BIT(27) is enabled, debug prints are supported on UART1. If BIT(27) is disabled, debug prints are supported on UART2. 1116 * 1117 * @note Bit 26 is reserved. 1118 * @note By default, all debug prints from the device network processor will be sent to UART2 if this bit is not enabled. UART1 pins are mapped as follows: 1119 * - UART1-TX: GPIO_9 1120 * - UART1-RX: GPIO_8 1121 * - UART2-TX: GPIO_6 1122 * - UART2-RX: GPIO_10 1123 * 1124 * Ensure these pins are not used in MCU applications in SoC mode to avoid pin usage conflicts. This bit is valid only if BIT[28] in the ext_custom_feature_bit_map is set to 0. There is no functionality on RX pins for debug prints. 1125 */ 1126 #define SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS BIT(27) 1127 1128 /** 1129 * @def SL_SI91X_EXT_FEAT_DISABLE_DEBUG_PRINTS 1130 * @brief To disable debug prints support in NWP (Network Processor). 1131 * @details By default the prints will be coming on UART2. If this bit is enabled, disable debug prints. 1132 * To enable prints on UART 1 @ref SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS bit needs to set. 1133 */ 1134 #define SL_SI91X_EXT_FEAT_DISABLE_DEBUG_PRINTS BIT(28) 1135 1136 #if defined(SLI_SI917) || defined(DOXYGEN) || defined(SLI_SI915) 1137 /** 1138 * @def SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 1139 * @brief To configure frontend with selection BIT[30:29] for 917B0. 1140 * @details This bit configures the frontend switch pins based on the following table: 1141 * 1142 * | Bit[30] | BIT[29] | ANT_SEL_1 (VC3) | ANT_SEL_2 (VC2) | ANT_SEL_3 (VC1) | 1143 * |:--------|:--------|:-----------------|:-----------------|:-----------------| 1144 * | 0 | 0 | Reserved | Reserved | Reserved | 1145 * | 0 | 1 | ULP_GPIO 4 | ULP_GPIO 5 | ULP_GPIO 0 | 1146 * | 1 | 0 | Internal Switch | Internal Switch | Internal Switch | 1147 * | 1 | 1 | Reserved | Reserved | Reserved | 1148 * 1149 * @note SiWx917 has an integrated on-chip transmit/receive (T/R) switch. This internal RF switch configuration uses internal logic present in the IC, and GPIOs are not needed. RF_BLE_TX (8dBm) mode is not supported in this configuration. 1150 * @note VC1, VC2, and VC3 are control voltage pins of the RF switch. 1151 */ 1152 #define SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 BIT(29) 1153 1154 /** 1155 * @def SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH 1156 * @brief To enable the internal front-end switch configuration. 1157 * @details Enabling this bit selects the internal front-end switch configuration for the frontend. This configuration uses internal logic present in the IC, eliminating the need for external GPIOs. 1158 */ 1159 #define SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH BIT(30) 1160 1161 #else 1162 /** 1163 * @brief For 917A0 1164 * 1165 * | Bit[30] | BIT[29] | ANT_SEL_1(VC3) | ANT_SEL_2(VC2) | ANT_SEL_3(VC1) | 1166 * |:--------|:--------|:---------------|:---------------|:---------------| 1167 * | 0 | 0 | GPIO 46 | GPIO 47 | GPIO 48 | 1168 * | 0 | 1 | Reserved | Reserved | Reserved | 1169 * | 1 | 0 | UILP_GPIO 4 | ULP_GPIO 5 | ULP_GPIO 0 | 1170 * | 1 | 1 | UILP_GPIO 4 | ULP_GPIO 5 | ULP_GPIO 7 | 1171 */ 1172 #define SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_GPIO_46_47_48 0 1173 #define SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 BIT(30) 1174 #define SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_7 (BIT(30) | BIT(29)) 1175 #endif 1176 1177 /** 1178 * @def SL_SI91X_EXT_FEAT_BT_CUSTOM_FEAT_ENABLE 1179 * @brief To enable Bluetooth custom features. 1180 * @details Enabling this bit activates Bluetooth custom features. 1181 * If this bit is enabled then only, the features present in the Bluetooth custom feature can be used. 1182 */ 1183 #define SL_SI91X_EXT_FEAT_BT_CUSTOM_FEAT_ENABLE BIT(31) 1184 /** @} */ 1185 1186 /** \addtogroup SI91X_EXTENDED_TCP_IP_FEATURE_BITMAP 1187 * @{ */ 1188 /*=========================================================================*/ 1189 // Extended TCP/IP feature bit map parameters description !// 1190 /*=========================================================================*/ 1191 /** 1192 * @def SL_SI91X_EXT_TCP_FEAT_DHCP_OPT77 1193 * @brief DHCP USER CLASS. 1194 * @details 1195 * This feature enables DHCP Option 77, which allows the device to specify user class information in DHCP requests. 1196 * 1197 * @note Bit 0 is reserved. 1198 */ 1199 #define SL_SI91X_EXT_TCP_FEAT_DHCP_OPT77 BIT(1) 1200 1201 /** 1202 * @def SL_SI91X_EXT_TCP_IP_BI_DIR_ACK_UPDATE 1203 * @brief TCP bi-directional acknowledgment update. 1204 * @details 1205 * This feature enables bi-directional data transfer by updating TCP acknowledgment handling. 1206 * 1207 * @note Need to enable this bit if user wants to run the bi-directional data transfer. 1208 * @note Bit 2 is reserved. 1209 */ 1210 #define SL_SI91X_EXT_TCP_IP_BI_DIR_ACK_UPDATE BIT(3) 1211 1212 /** 1213 * @def SL_SI91X_EXT_TCP_IP_WINDOW_DIV 1214 * @brief TCP RX window division. 1215 * @details 1216 * This feature allows the division of the TCP receive window, enabling 1217 * more granular control over the window size. 1218 */ 1219 #define SL_SI91X_EXT_TCP_IP_WINDOW_DIV BIT(4) 1220 1221 /** 1222 * @def SL_SI91X_EXT_TCP_IP_CERT_BYPASS 1223 * @brief SSL server certificate bypass. 1224 * @details 1225 * This feature allows the device to bypass SSL server certificate 1226 * validation, with validation being performed by the host instead. 1227 */ 1228 #define SL_SI91X_EXT_TCP_IP_CERT_BYPASS BIT(5) 1229 1230 /** 1231 * @def SL_SI91X_EXT_TCP_IP_SSL_16K_RECORD 1232 * @brief SSL 16K record size support. 1233 * @details 1234 * This feature enables support for 16K SSL record sizes, improving 1235 * performance for SSL connections that use larger record sizes. 1236 */ 1237 #define SL_SI91X_EXT_TCP_IP_SSL_16K_RECORD BIT(6) 1238 1239 /** 1240 * @def SL_SI91X_EXT_TCP_IP_DNS_CLIENT_BYPASS 1241 * @brief Enable DNS client bypass. 1242 * @details 1243 * This feature allows the device to bypass the internal DNS client, 1244 * using the host for DNS resolution instead. 1245 */ 1246 #define SL_SI91X_EXT_TCP_IP_DNS_CLIENT_BYPASS BIT(7) 1247 1248 /** 1249 * @def SL_SI91X_EXT_TCP_IP_WINDOW_SCALING 1250 * @brief Enable TCP window scaling feature. 1251 * @details 1252 * This feature enables TCP window scaling, allowing the device to use 1253 * receive window sizes larger than 64 KB. 1254 * 1255 * @note If this feature is not enabled, then the maximum possible RX window size is 64 KB. 1256 * If user wants to use more than 64KB window size, tcp_rx_window_size_cap in socket configuration is used to increase the window size. 1257 */ 1258 #define SL_SI91X_EXT_TCP_IP_WINDOW_SCALING BIT(8) 1259 1260 /** 1261 * @def SL_SI91X_EXT_TCP_IP_DUAL_MODE_ENABLE 1262 * @brief Enable both TCP/IP bypass mode and embedded modes. 1263 * @details 1264 * This feature allows the device to use both bypass and non-bypass modes 1265 * simultaneously, providing flexibility in network communication. 1266 * 1267 * @note Enabling this feature allows to use both bypass and non-bypass modes simultaneously. 1268 */ 1269 #define SL_SI91X_EXT_TCP_IP_DUAL_MODE_ENABLE BIT(9) 1270 1271 /** 1272 * @def SL_SI91X_EXT_TCP_IP_ETH_WIFI_BRIDGE 1273 * @brief Enable Ethernet to WiFi bridge. 1274 * @details 1275 * This feature enables the device to act as a bridge between Ethernet and 1276 * WiFi networks, facilitating communication between the two. 1277 */ 1278 #define SL_SI91X_EXT_TCP_IP_ETH_WIFI_BRIDGE BIT(10) 1279 1280 /** 1281 * @def SL_SI91X_EXT_DYNAMIC_COEX_MEMORY 1282 * @brief Enable dynamic coexistence memory. 1283 * @details 1284 * This feature dynamically adjusts the TCP receive window size based on 1285 * coexistence requirements, improving network performance in coexistence 1286 * scenarios. 1287 * 1288 * @note To enable or disable the coexistence and update TCP RX window accordingly. 1289 */ 1290 #define SL_SI91X_EXT_DYNAMIC_COEX_MEMORY BIT(11) 1291 1292 /** 1293 * @def SL_SI91X_EXT_TCP_IP_TOTAL_SELECTS 1294 * @brief Configure the number of selects. 1295 * @details 1296 * This feature configures the number of select operations the device can 1297 * handle, with a maximum value of 10. 1298 * 1299 * @note Bits 12 - 15 are used for TOTAL_SELECTS. 1300 */ 1301 #define SL_SI91X_EXT_TCP_IP_TOTAL_SELECTS(total_selects) (total_selects << 12) 1302 1303 /** 1304 * @def SL_SI91X_EXT_TCP_IP_WAIT_FOR_SOCKET_CLOSE 1305 * @brief Enable socket wait close. 1306 * @details 1307 * This feature ensures that a socket is not closed until close() is called 1308 * from the host, which is recommended for use with TCP sockets. 1309 * 1310 * @note If it is set socket will not be closed until close() is called from host. It is recommended to enable this bit when using TCP sockets. 1311 * @note This is always set internally for Si91x chips. 1312 */ 1313 #define SL_SI91X_EXT_TCP_IP_WAIT_FOR_SOCKET_CLOSE BIT(16) 1314 1315 /** 1316 * @def SL_SI91X_EXT_EMB_MQTT_ENABLE 1317 * @brief Enable embedded/internal MQTT. 1318 * @details 1319 * This feature enables support for embedded MQTT (Message Queuing 1320 * Telemetry Transport) functionality, allowing the device to use MQTT 1321 * without external libraries. 1322 * 1323 * @note If user wants to use AT command for MQTT, enable this bit in the Opermode Command. 1324 */ 1325 #define SL_SI91X_EXT_EMB_MQTT_ENABLE BIT(17) 1326 1327 /** 1328 * @def SL_SI91X_EXT_FEAT_HTTP_OTAF_SUPPORT 1329 * @brief Enable HTTP OTAF support. 1330 * @details 1331 * This feature enables support for HTTP-based over-the-air firmware (OTAF) 1332 * updates, allowing the device to download and install firmware updates 1333 * via HTTP. 1334 * 1335 * @note To do firmware upgrade with HTTP this bit should be enabled. 1336 */ 1337 #define SL_SI91X_EXT_FEAT_HTTP_OTAF_SUPPORT BIT(18) 1338 1339 /** 1340 * @def SL_SI91X_EXT_TCP_DYNAMIC_WINDOW_UPDATE_FROM_HOST 1341 * @brief Enable to update TCP window from host. 1342 * @details 1343 * This feature allows the TCP window size to be dynamically updated from 1344 * the host, providing more control over TCP flow management. 1345 */ 1346 #define SL_SI91X_EXT_TCP_DYNAMIC_WINDOW_UPDATE_FROM_HOST BIT(19) 1347 1348 /** 1349 * @def SL_SI91X_EXT_TCP_MAX_RECV_LENGTH 1350 * @brief Enable to update max receive length for TCP. 1351 * @details 1352 * This feature allows the maximum receive length for TCP connections to be 1353 * updated, accommodating different application requirements. 1354 */ 1355 #define SL_SI91X_EXT_TCP_MAX_RECV_LENGTH BIT(20) 1356 1357 /** 1358 * @def SL_SI91X_EXT_TCP_IP_FEAT_SSL_THREE_SOCKETS 1359 * @brief Enable three SSL/TLS sockets. 1360 * @details 1361 * This feature allows the device to support up to three simultaneous 1362 * SSL/TLS connections. 1363 * 1364 * @note Set tcp_ip_feature_bit_map[31] and ext_tcp_ip_feature_bit_map[29] to open 3 TLS sockets. 1365 * @note Bits 21-28 are reserved. 1366 */ 1367 #define SL_SI91X_EXT_TCP_IP_FEAT_SSL_THREE_SOCKETS BIT(29) 1368 1369 /** 1370 * @def SL_SI91X_EXT_TCP_IP_FEAT_SSL_MEMORY_CLOUD 1371 * @brief Configure additional memory for SSL/TLS connections to cloud servers. 1372 * @details 1373 * This feature allocates additional memory for SSL/TLS connections, 1374 * typically required for connections to cloud servers, to avoid 0xD2 error. 1375 * 1376 * @note If user connects to a cloud server using two SSL/TLS connections then it is required to set this bit to avoid 0xD2 error. 1377 */ 1378 #define SL_SI91X_EXT_TCP_IP_FEAT_SSL_MEMORY_CLOUD BIT(30) 1379 1380 /** 1381 * @def SL_SI91X_CONFIG_FEAT_EXTENTION_VALID 1382 * @brief Config feature bit map validity. 1383 * @details 1384 * This feature validates the configuration feature bit map. 1385 * If this bit is enabled then only, the features present in the configuration feature bitmap can be used. 1386 */ 1387 #define SL_SI91X_CONFIG_FEAT_EXTENSION_VALID BIT(31) 1388 /** @} */ 1389 1390 /** \addtogroup SI91X_BT_FEATURE_BITMAP 1391 * @{ */ 1392 /*=========================================================================*/ 1393 // BT feature bit map parameters description !// 1394 /*=========================================================================*/ 1395 /** 1396 * @def SL_SI91X_BT_RF_TYPE 1397 * @brief Macro to specify the BT RF type for the SI91X wireless device. 1398 * 1399 * This macro is used to specify the BT RF type for the SI91X wireless device. 1400 * It is defined as BIT(30). 1401 * 0 - RF_TYPE_EXTERNAL 1402 * 1 - RF_TYPE_INTERNAL 1403 */ 1404 #define SL_SI91X_BT_RF_TYPE BIT(30) 1405 /** 1406 * @def SL_SI91X_ENABLE_BLE_PROTOCOL 1407 * @brief Macro to enable the BLE protocol. 1408 * 1409 * This macro is used to enable the BLE (Bluetooth Low Energy) protocol. 1410 * The BLE protocol can be enabled by setting the bit 31 of the corresponding register. 1411 * 1412 */ 1413 #define SL_SI91X_ENABLE_BLE_PROTOCOL BIT(31) 1414 /** @} */ 1415 1416 /** \addtogroup SI91X_BLE_FEATURE_BITMAP 1417 * @{ */ 1418 /*=========================================================================*/ 1419 // BLE feature bit map 1420 /*=========================================================================*/ 1421 /** 1422 * @def SL_SI91X_BLE_MAX_NBR_ATT_REC 1423 * @brief BLE number of attributes. 1424 * @details 1425 * Sets the maximum number of BLE attributes. 1426 1427 * @note Maximum number of BLE attributes is 124. 1428 * @note Bits 0 - 7 are used to set MAX_NBR_ATT_REC. 1429 */ 1430 #define SL_SI91X_BLE_MAX_NBR_ATT_REC(max_num_of_att_rec) (max_num_of_att_rec << 0) 1431 /** 1432 * @def SL_SI91X_BLE_MAX_NBR_ATT_SERV 1433 * @brief BLE number of GATT services. 1434 * @details 1435 * Sets the maximum number of BLE GATT services. 1436 1437 * @note Maximum number of services is 10. 1438 * @note Bits 8 - 11 are used to set MAX_NBR_ATT_SERV. 1439 */ 1440 #define SL_SI91X_BLE_MAX_NBR_ATT_SERV(max_num_of_att_serv) (max_num_of_att_serv << 8) 1441 /** 1442 * @def SL_SI91X_BLE_MAX_NBR_PERIPHERALS 1443 * @brief BLE number of peripherals. 1444 * @details 1445 * Sets the maximum number of BLE peripherals. 1446 1447 * @note Maximum number of BLE peripherals is 8. 1448 * @note Bits 12 - 15 are used to set MAX_NBR_PERIPHERALS. 1449 */ 1450 #define SL_SI91X_BLE_MAX_NBR_PERIPHERALS(max_num_of_peripherals) (max_num_of_peripherals << 12) 1451 /** 1452 * @def SL_SI91X_BLE_PWR_INX 1453 * @brief BLE Tx power index. 1454 * @details 1455 * Sets the BLE Tx power index value. 1456 * - Default value for BLE Tx Power Index is 31. 1457 * - Range for the BLE Tx Power Index is 1 to 127 (0, 32 index is invalid). 1458 * - 1 - 31: BLE - 0dBm Mode 1459 * - 33 - 63: BLE - 10dBm Mode 1460 * - 64 - 127: BLE - HP Mode 1461 1462 * @note Bits 16 - 23 are used to set PWR_INX. 1463 */ 1464 #define SL_SI91X_BLE_PWR_INX(power_index) (power_index << 16) 1465 /** 1466 * @def SL_SI91X_BLE_PWR_SAVE_OPTIONS 1467 * @brief BLE power save options. 1468 * @details 1469 * Configures BLE power save options. 1470 * - Bit 24: BLE_DUTY_CYCLING 1471 * - Bit 25: BLR_DUTY_CYCLING 1472 * - Bit 26: BLE_4X_PWR_SAVE_MODE 1473 * - For BLE_DISABLE_DUTY_CYCLING, bits 24-26 are set to zero. 1474 1475 * @note This feature is not supported in the current release. 1476 */ 1477 #define SL_SI91X_BLE_PWR_SAVE_OPTIONS(duty_cycle) (duty_cycle << 24) 1478 /** 1479 * @def SL_SI91X_BLE_MAX_NBR_CENTRALS 1480 * @brief Number of Centrals. 1481 * @details 1482 * Sets the maximum number of BLE Central devices. 1483 1484 * @note Maximum number of BLE Centrals is 2. 1485 * @note Bits 27 - 28 are used to set BLE_PWR_INX. 1486 */ 1487 #define SL_SI91X_BLE_MAX_NBR_CENTRALS(max_num_of_centrals) (max_num_of_centrals << 27) 1488 /** 1489 * @def SL_SI91X_BLE_GATT_ASYNC_ENABLE 1490 * @brief GATT ASYNC BIT. 1491 * @details 1492 * Enables asynchronous GATT operations. 1493 1494 * @note Default is disabled. When enabled, the response structure will be filled in the Event, which will come later, not in sync with the response for the query command. 1495 */ 1496 #define SL_SI91X_BLE_GATT_ASYNC_ENABLE BIT(29) 1497 /** 1498 * @def SL_SI91X_916_BLE_COMPATIBLE_FEAT_ENABLE 1499 * @brief BLE feature compatibility. 1500 * @details 1501 * Enables new feature compatible. 1502 * 1503 * @note This bit should be enable to get the set of events from controller for the new features. 1504 */ 1505 #define SL_SI91X_916_BLE_COMPATIBLE_FEAT_ENABLE BIT(30) 1506 /** 1507 * @def SL_SI91X_FEAT_BLE_CUSTOM_FEAT_EXTENTION_VALID 1508 * @brief Extension validity for custom feature bitmap. 1509 * @details 1510 * Validates the use of an extended custom feature bitmap for BLE. 1511 */ 1512 #define SL_SI91X_FEAT_BLE_CUSTOM_FEAT_EXTENSION_VALID BIT(31) 1513 /** @} */ 1514 1515 /** \addtogroup SI91X_EXTENDED_BLE_CUSTOM_FEATURE_BITMAP 1516 * @{ */ 1517 /*=========================================================================*/ 1518 // Extended BLE custom feature bit map parameters description !// 1519 /*=========================================================================*/ 1520 /** 1521 * @def SL_SI91X_BLE_NUM_CONN_EVENTS 1522 * @brief BLE number of connection events. 1523 * @details 1524 * Describes the number of buffers that need to be allocated for BLE on the opermode. 1525 * - By default, each role (central/peripheral) will be allocated with 1 buffer for the notify/write command. 1526 * - Increasing the buffer capacity for the notify/write commands helps achieve the best throughput. 1527 * - See rsi_ble_set_wo_resp_notify_buf_info() to set more buffers for the notify/write commands. 1528 1529 * @note Bits 0 - 4 are used to set NUM_CONN_EVENTS. 1530 */ 1531 #define SL_SI91X_BLE_NUM_CONN_EVENTS(num_conn_events) (num_conn_events << 0) 1532 /** 1533 * @def SL_SI91X_BLE_NUM_REC_BYTES 1534 * @brief BLE number of record size in bytes. 1535 * @details 1536 * Specifies the number of record bytes in multiples of 16. 1537 * - n*16 : (n=60, Default 1024 bytes (1K)). 1538 1539 * @note Bits 5 - 12 are used to set NUM_REC_BYTES. 1540 */ 1541 #define SL_SI91X_BLE_NUM_REC_BYTES(num_rec_bytes) (num_rec_bytes << 5) 1542 /** 1543 * @def SL_SI91X_BLE_GATT_INIT 1544 * @brief GATT initialization mode. 1545 * @details 1546 * Specifies whether the GATT is initialized in firmware or by the host. 1547 * - 0: GATT Init in Firmware. Both the GAP service and GATT service will be maintained by the firmware. 1548 * - 1: GATT Init in Host. The GAP service and GATT service should be created by the APP/Host/User, and the ATT transactions like read, write, notify, and indicate shall be handled by the APP/Host/User. 1549 * - Default: GATT Init in Firmware. 1550 */ 1551 #define SL_SI91X_BLE_GATT_INIT BIT(13) 1552 /** 1553 * @def SL_SI91X_BLE_INDICATE_CONFIRMATION_FROM_HOST 1554 * @brief Acknowlegment of the indication from the client. 1555 * @details 1556 * As per the ATT protocol, every indication received from the server should be acknowledged (indication response) by the client. 1557 * - If this bit is disabled, the firmware will send the acknowledgment (indication response). 1558 * - If this bit is enabled, the APP/Host/User needs to send the acknowledgment (indication response). 1559 */ 1560 #define SL_SI91X_BLE_INDICATE_CONFIRMATION_FROM_HOST BIT(14) 1561 /** 1562 * @def SL_SI91X_BLE_MTU_EXCHANGE_FROM_HOST 1563 * @brief MTU exchange request initiation from APP. 1564 * @details 1565 * - If this bit is disabled, the firmware will initiate the MTU request to the remote device on a successful connection. 1566 * - If the peer initiates an MTU exchange request, the firmware will send an Exchange MTU Response in reply to the received Exchange MTU Request. 1567 * - If this bit is enabled, the APP/Host/User needs to initiate the MTU request using the rsi_ble_mtu_exchange_event API. 1568 * - If the peer initiates an MTU exchange request, the APP/Host/User shall send an Exchange MTU Response using the rsi_ble_mtu_exchange_resp API. 1569 */ 1570 #define SL_SI91X_BLE_MTU_EXCHANGE_FROM_HOST BIT(15) 1571 /** 1572 * @def SL_SI91X_BLE_SET_SCAN_RESP_DATA_FROM_HOST 1573 * @brief Set scan response data from host. 1574 * @details 1575 * The device will maintain some default scan response data to be used in the scan_response controller frame. 1576 * - Enabling this bit will make the default data Null (empty). 1577 */ 1578 #define SL_SI91X_BLE_SET_SCAN_RESP_DATA_FROM_HOST BIT(16) 1579 /** 1580 * @def SL_SI91X_BLE_DISABLE_CODED_PHY_FROM_HOST 1581 * @brief Disable coded PHY from APP. 1582 * @details 1583 * The device supports the LE-coded PHY feature (i.e., LR - 125kbps and 500kbps) by default. 1584 * - If this bit is enabled, the device will not support the LE-coded PHY rates. 1585 */ 1586 #define SL_SI91X_BLE_DISABLE_CODED_PHY_FROM_HOST BIT(17) 1587 /** 1588 * @def SL_SI91X_BLE_ENABLE_ADV_EXTN 1589 * @brief Enable advertising extensions. 1590 * @details 1591 * Enables or disables advertising extensions. 1592 1593 * @note Bit 19 is used for enabling advertising extensions. 1594 */ 1595 #define SL_SI91X_BLE_ENABLE_ADV_EXTN BIT(19) 1596 /** 1597 * @def SL_SI91X_BLE_AE_MAX_ADV_SETS 1598 * @brief Maximum number of AE advertising sets. 1599 * @details 1600 * Configures the maximum number of AE advertising sets. 1601 * - Maximum number of AE advertising sets is 2. 1602 1603 * @note Bits 20 - 23 are used to set the number of AE advertising sets. 1604 */ 1605 #define SL_SI91X_BLE_AE_MAX_ADV_SETS(num_adv_sets) (num_adv_sets << 20) 1606 1607 /// @note Bits 24 -31 are reserved 1608 /** @} */ 1609 1610 /** \addtogroup SI91X_CONFIG_FEATURE_BITMAP 1611 * @{ */ 1612 /*=========================================================================*/ 1613 // Config feature bitmap parameters description !// 1614 /*=========================================================================*/ 1615 /** 1616 * @def SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP 1617 * @brief Selects the GPIO for wakeup indication to the host. 1618 * @details When this bit is disabled, UULP_GPIO_3 is used as the wakeup indication. When enabled, UULP_GPIO_0 is used instead. 1619 * 1620 * @note Bit 1 is reserved and should not be used. 1621 */ 1622 #define SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP BIT(0) 1623 1624 /** 1625 * @def SL_SI91X_FEAT_DVS_SEL_CONFIG_1 1626 * @brief Enables Dynamic Voltage Selection (DVS) Configuration 1. 1627 * @details This bit configures the dynamic voltage selection for the system. 1628 * 1629 * @note Not applicable for SI917. 1630 */ 1631 #define SL_SI91X_FEAT_DVS_SEL_CONFIG_1 BIT(2) 1632 1633 /** 1634 * @def SL_SI91X_FEAT_DVS_SEL_CONFIG_2 1635 * @brief Enables Dynamic Voltage Selection (DVS) Configuration 2. 1636 * @details This bit configures the dynamic voltage selection for the system. 1637 * 1638 * @note Not applicable for SI917. 1639 */ 1640 #define SL_SI91X_FEAT_DVS_SEL_CONFIG_2 BIT(3) 1641 1642 /** 1643 * @def SL_SI91X_FEAT_DVS_SEL_CONFIG_3 1644 * @brief Enables Dynamic Voltage Selection (DVS) Configuration 3. 1645 * @details This bit configures the dynamic voltage selection for the system. 1646 * 1647 * @note Not applicable for SI917. 1648 */ 1649 #define SL_SI91X_FEAT_DVS_SEL_CONFIG_3 BIT(4) 1650 1651 /** 1652 * @def SL_SI91X_FEAT_DVS_SEL_CONFIG_4 1653 * @brief Enables Dynamic Voltage Selection (DVS) Configuration 4. 1654 * @details This bit configures the dynamic voltage selection for the system. 1655 * 1656 * @note Not applicable for SI917. 1657 */ 1658 #define SL_SI91X_FEAT_DVS_SEL_CONFIG_4 BIT(5) 1659 1660 /** 1661 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_100us 1662 * @brief Configures External PMU good time to 100 µs. 1663 * @details This bit selects an external PMU good time of 100 microseconds. 1664 * 1665 * @note These bits are used to select external PMU good time. 1 to 15 means 100 usec to 1500 usec (in 100 usec granularity) 1666 * @note Not applicable for SI917. 1667 */ 1668 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_100us BIT(6) 1669 1670 /** 1671 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_200us 1672 * @brief Configures External PMU good time to 200 µs. 1673 * @details This bit selects an external PMU good time of 200 microseconds. 1674 * 1675 * @note Not applicable for SI917. 1676 */ 1677 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_200us BIT(7) 1678 1679 /** 1680 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_300us 1681 * @brief Configures External PMU good time to 300 µs. 1682 * @details This is a combination of 100 µs and 200 µs good times, totaling 300 microseconds. 1683 * 1684 * @note Not applicable for SI917. 1685 */ 1686 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_300us (BIT(6) | BIT(7)) 1687 1688 /** 1689 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_400us 1690 * @brief Configures External PMU good time to 400 µs. 1691 * @details This bit selects an external PMU good time of 400 microseconds. 1692 * 1693 * @note Not applicable for SI917. 1694 */ 1695 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_400us BIT(8) 1696 1697 /** 1698 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_500us 1699 * @brief Configures External PMU good time to 500 µs. 1700 * @details This is a combination of 100 µs and 400 µs good times, totaling 500 microseconds. 1701 * 1702 * @note Not applicable for SI917. 1703 */ 1704 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_500us (BIT(6) | BIT(8)) 1705 1706 /** 1707 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_600us 1708 * @brief Configures External PMU good time to 600 µs. 1709 * @details This is a combination of 200 µs and 400 µs good times, totaling 600 microseconds. 1710 * 1711 * @note Not applicable for SI917. 1712 */ 1713 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_600us (BIT(7) | BIT(8)) 1714 1715 /** 1716 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_700us 1717 * @brief Configures External PMU good time to 700 µs. 1718 * @details This is a combination of 100 µs, 200 µs, and 400 µs good times, totaling 700 microseconds. 1719 * 1720 * @note Not applicable for SI917. 1721 */ 1722 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_700us (BIT(6) | BIT(7) | BIT(8)) 1723 1724 /** 1725 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_800us 1726 * @brief Configures External PMU good time to 800 µs. 1727 * @details This bit selects an external PMU good time of 800 microseconds. 1728 * 1729 * @note Not applicable for SI917. 1730 */ 1731 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_800us BIT(9) 1732 1733 /** 1734 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_900us 1735 * @brief Configures External PMU good time to 900 µs. 1736 * @details This is a combination of 100 µs and 800 µs good times, totaling 900 microseconds. 1737 * 1738 * @note Not applicable for SI917. 1739 */ 1740 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_900us (BIT(6) | BIT(9)) 1741 1742 /** 1743 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1000us 1744 * @brief Configures External PMU good time to 1000 µs. 1745 * @details This is a combination of 200 µs and 800 µs good times, totaling 1000 microseconds. 1746 * 1747 * @note Not applicable for SI917. 1748 */ 1749 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1000us (BIT(7) | BIT(9)) 1750 1751 /** 1752 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1100us 1753 * @brief Configures External PMU good time to 1100 µs. 1754 * @details This is a combination of 100 µs, 200 µs, and 800 µs good times, totaling 1100 microseconds. 1755 * 1756 * @note Not applicable for SI917. 1757 */ 1758 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1100us (BIT(6) | BIT(7) | BIT(9)) 1759 1760 /** 1761 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1200us 1762 * @brief Configures External PMU good time to 1200 µs. 1763 * @details This is a combination of 400 µs and 800 µs good times, totaling 1200 microseconds. 1764 * 1765 * @note Not applicable for SI917. 1766 */ 1767 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1200us (BIT(8) | BIT(9)) 1768 1769 /** 1770 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1300us 1771 * @brief Configures External PMU good time to 1300 µs. 1772 * @details This is a combination of 100 µs, 400 µs, and 800 µs good times, totaling 1300 microseconds. 1773 * 1774 * @note Not applicable for SI917. 1775 */ 1776 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1300us (BIT(6) | BIT(8) | BIT(9)) 1777 1778 /** 1779 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1400us 1780 * @brief Configures External PMU good time to 1400 µs. 1781 * @details This is a combination of 200 µs, 400 µs, and 800 µs good times, totaling 1400 microseconds. 1782 * 1783 * @note Not applicable for SI917. 1784 */ 1785 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1400us (BIT(7) | BIT(8) | BIT(9)) 1786 1787 /** 1788 * @def SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1500us 1789 * @brief Configures External PMU good time to 1500 µs. 1790 * @details This is a combination of 100 µs, 200 µs, 400 µs, and 800 µs good times, totaling 1500 microseconds. 1791 * 1792 * @note Not applicable for SI917. 1793 */ 1794 #define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1500us (BIT(6) | BIT(7) | BIT(8) | BIT(9)) 1795 1796 /** 1797 * @def SL_SI91X_FEAT_EXTERNAL_LDO_SEL 1798 * @brief Enables selection of external LDO voltage. 1799 * @details When enabled, this bit allows the selection between using an external LDO or an internal PMU. 1800 * If both the external LDO selection and the LDO voltage are configured, the system uses the external LDO. 1801 * If this bit is cleared, the internal PMU is used. 1802 * 1803 * @note These bits are used for External LDO selection External PMU: 1804 * 1. Incase of External PMU, User has to set EXTERNAL_PMU_GOOD_TIME_CONFIGURATION value to external PMU good time, If this is zero then it indicates using Internal PMU. 1805 * 2. Incase of External PMU 1.0v or 1.05v, User has to set both the bits config_feature_bit_map[11] & config_feature_bit_map[10]. 1806 * 1807 * @note Not applicable for SI917. 1808 */ 1809 #define SL_SI91X_FEAT_EXTERNAL_LDO_SEL BIT(10) 1810 1811 /** 1812 * @def SL_SI91X_FEAT_EXTERNAL_LDO_VOL 1813 * @brief Selects the external LDO voltage. 1814 * @details This field is relevant only if SL_SI91X_FEAT_EXTERNAL_LDO_SEL is enabled (i.e., BIT(10) is set). 1815 * If this bit is set, the LDO voltage is configured to 1.0V; if cleared, it is set to 1.1V. 1816 * 1817 * @note Not applicable for SI917. 1818 */ 1819 #define SL_SI91X_FEAT_EXTERNAL_LDO_VOL BIT(11) 1820 1821 /** 1822 * @def SL_SI91X_FEAT_EAP_TLS_V1P0 1823 * @brief Enables TLS version 1.0 for enterprise security. 1824 * 1825 * @note Bit 12 -13 are reserved 1826 */ 1827 #define SL_SI91X_FEAT_EAP_TLS_V1P0 BIT(14) 1828 1829 /** 1830 * @def SL_SI91X_FEAT_EAP_TLS_V1P2 1831 * @brief Enables TLS version 1.2 for enterprise security. 1832 */ 1833 #define SL_SI91X_FEAT_EAP_TLS_V1P2 BIT(15) 1834 1835 /** 1836 * @def SL_SI91X_FEAT_CONC_STA_AP_DYN_SWITCH_SEL 1837 * @brief Configures dynamic switching between STA and AP modes. 1838 * @details This bit enables or disables dynamic switching between Station (STA) and Access Point (AP) modes. 1839 * When enabled, the system can dynamically switch between STA and AP modes based on operational requirements or network conditions. 1840 * This feature is useful for applications requiring flexible mode changes to optimize performance or power consumption. 1841 * 1842 * @note Enabling this feature allows the system to switch modes dynamically, which can improve adaptability in varying network scenarios. 1843 * Make sure to configure the system appropriately for the desired switching behavior. 1844 * @note Bit 16 is reserved 1845 */ 1846 #define SL_SI91X_FEAT_CONC_STA_AP_DYN_SWITCH_SEL BIT(17) 1847 1848 /** 1849 * @def SL_SI91X_ULP_GPIO9_FOR_UART2_TX 1850 * @brief Selects ULP_GPIO_9 to enable firmware debug prints. 1851 * @details If this bit is not set, the default UART2-TX pin GPIO_6 is used. 1852 * 1853 * @note SI917 supports prints only on ULP_GPIO_9. 1854 */ 1855 #define SL_SI91X_ULP_GPIO9_FOR_UART2_TX BIT(18) 1856 1857 /** 1858 * @def SL_SI91X_FEAT_DISABLE_MCS_5_6_7_DATARATES 1859 * @brief Disables MCS-5, 6, and 7 data rates. 1860 * @details This bit is used to disable the higher MCS data rates (5, 6, and 7) for reduced data rate requirements. 1861 */ 1862 #define SL_SI91X_FEAT_DISABLE_MCS_5_6_7_DATARATES BIT(19) 1863 1864 /** 1865 * @def SL_SI91X_FEAT_DISABLE_SHORT_GI 1866 * @brief Disables Short Guard Interval (Short-GI). 1867 * @details This bit disables the use of Short-GI, which may affect the timing and performance of the system. 1868 */ 1869 #define SL_SI91X_FEAT_DISABLE_SHORT_GI BIT(20) 1870 1871 /** 1872 * @def SL_SI91X_PTA_3WIRE_EN 1873 * @brief Enable PTA 3-Wire feature. 1874 * @details It has three different configurations, which can be chosen in SL_SI91X_PTA_3WIRE_CONFIG_SEL(config_sel)). 1875 */ 1876 #define SL_SI91X_PTA_3WIRE_EN BIT(21) 1877 1878 /** 1879 * @def SL_SI91X_PTA_3WIRE_CONFIG_SEL 1880 * @brief Option to choose PTA 3-Wire configuration. 1881 * @details It has three different configurations, which can be chosen by enabling or disabling the Bit [23:22]. 1882 * Each of these configurations changes the behavior of how GRANT is asserted in response to REQUEST and PRIORITY signals. 1883 * 1884 * | Configuration | BIT[23] | BIT[22] | 1885 * |:--------------|:--------|:--------| 1886 * | Reserved | 0 | 0 | 1887 * | config1 | 0 | 1 | 1888 * | config2 | 1 | 0 | 1889 * | config3 | 1 | 1 | 1890 * 1891 * | Configuration | Description | 1892 * |:-------------------------|:------------------------------------| 1893 * | Configuration 1 | PTA Main will aggressively assert GRANT if the REQUEST is asserted irrespective of PRIORITY being asserted or not. This will mean any ongoing Wi-Fi transmission will be aborted, and GRANT will be provided to the PTA secondary. | 1894 * | Configuration 2 | PTA Main will aggressively assert GRANT if the REQUEST is asserted irrespective of PRIORITY being asserted or not, with only one exception of an ongoing ACK/Block ACK Transmission in response to a Wi-Fi reception. If there is an ongoing ACK/Block ACK transmission in response to a Wi-Fi Reception, PTA MAIN will GRANT access if PRIORITY is asserted along with REQUEST. | 1895 * | Configuration 3 | If there is an ongoing Wi-Fi Transmission (Including ACK/BLOCK ACK), then PTA MAIN will not assert GRANT to an asserted REQUEST. However, if PRIORITY and REQUEST are asserted, PTA MAIN will assert GRANT. | 1896 * 1897 * The below configuration describes the pin connections between the EFR32MG21 and the SiW91x device that involves the GRANT, REQUEST, and PRIORITY signal. 1898 * 0 kept reserved for future. 3-Wire used at DUT are GPIO_7(Grant pin driven by DUT), ULP_GPIO_1(Request i/p pin for DUT) and ULP_GPIO_6(Priority i/p pin for DUT). 1899 * 1900 * | Pin Description | GPIO | 4338A Radio board | 4002A EFR board | 1901 * |:----------------|:-------------|:-------------------|:----------------| 1902 * | Request | ULP_GPIO_1 | WSTK_P16 | Pin7 | 1903 * | Priority | ULP_GPIO_6 | EXP_HEADER16 | Pin11 | 1904 * | Grant | GPIO_7 | WSTK_P20 | Pin9 | 1905 */ 1906 #define SL_SI91X_PTA_3WIRE_CONFIG_SEL(config_sel) (config_sel << 22) 1907 1908 /** 1909 * @def SL_SI91X_XTAL_GOODTIME_1000us 1910 * @brief Configures XTAL good time to 1000 µs. 1911 * @details This bit selects a default XTAL good time of 1000 microseconds. This setting is applicable from Release 2.3.0 onward. 1912 * Prior releases have reserved config_feature_bitmap[31:17]. This setting is intended for chip users and not applicable for device users. 1913 * 1914 * @note Not applicable for SI917. 1915 */ 1916 #define SL_SI91X_XTAL_GOODTIME_1000us 0 1917 1918 /** 1919 * @def SL_SI91X_XTAL_GOODTIME_2000us 1920 * @brief Configures XTAL good time to 2000 µs. 1921 * @details This bit selects an XTAL good time of 2000 microseconds. 1922 * 1923 * @note Not applicable for SI917. 1924 */ 1925 #define SL_SI91X_XTAL_GOODTIME_2000us BIT(24) 1926 1927 /** 1928 * @def SL_SI91X_XTAL_GOODTIME_3000us 1929 * @brief Configures XTAL good time to 3000 µs. 1930 * @details This bit selects an XTAL good time of 3000 microseconds. 1931 * 1932 * @note Not applicable for SI917. 1933 */ 1934 #define SL_SI91X_XTAL_GOODTIME_3000us BIT(25) 1935 1936 /** 1937 * @def SL_SI91X_XTAL_GOODTIME_600us 1938 * @brief Configures XTAL good time to 600 µs. 1939 * @details This is a combination of 2000 µs and 3000 µs XTAL good times, totaling 600 microseconds. 1940 * 1941 * @note Not applicable for SI917. 1942 */ 1943 #define SL_SI91X_XTAL_GOODTIME_600us (BIT(24) | BIT(25)) 1944 1945 /** 1946 * @def SL_SI91X_ENABLE_ENHANCED_MAX_PSP 1947 * @brief Enables Enhanced Max PSP. 1948 * @details Set this bit to enable the Enhanced Max PSP feature for improved performance. 1949 */ 1950 #define SL_SI91X_ENABLE_ENHANCED_MAX_PSP BIT(26) 1951 1952 /** 1953 * @def SL_SI91X_ENABLE_DEBUG_BBP_TEST_PINS 1954 * @brief Enables BBP Test Pins. 1955 * @details Set this bit to enable the use of BBP test pins for debugging and testing purposes. 1956 * 1957 * @note Bits 28 - 31 are reserved for future use. 1958 */ 1959 #define SL_SI91X_ENABLE_DEBUG_BBP_TEST_PINS BIT(27) 1960 /** @} */ 1961 1962 /** \addtogroup SL_SI91X_CONSTANTS 1963 * @{ */ 1964 /// Si91x operating mode 1965 typedef enum { 1966 SL_SI91X_CLIENT_MODE = 0, ///< Wi-Fi personal client mode 1967 SL_SI91X_ENTERPRISE_CLIENT_MODE = 2, ///< Wi-Fi enterprise client mode 1968 SL_SI91X_ACCESS_POINT_MODE = 6, ///< Wi-Fi access point mode 1969 SL_SI91X_TRANSCEIVER_MODE = 7, ///< Wi-Fi transceiver mode 1970 SL_SI91X_TRANSMIT_TEST_MODE = 8, ///< Wi-Fi transmit test mode 1971 SL_SI91X_CONCURRENT_MODE = 9, ///< Wi-Fi concurrent mode 1972 __FORCE_OPERATION_ENUM_16BIT = 0xFFFF ///< Force the enumeration to be 16-bit 1973 } sl_si91x_operation_mode_t; 1974 1975 /// Si91x wireless co-existence mode 1976 /// @note Only BLE, WLAN, and WLAN + BLE modes are supported. 1977 typedef enum { 1978 SL_SI91X_WLAN_ONLY_MODE = 0, ///< Wireless local area network (WLAN) only mode 1979 SL_SI91X_WLAN_MODE = 1, ///< WLAN mode (not currently supported) 1980 SL_SI91X_BLUETOOTH_MODE = 4, ///< Bluetooth only mode (not currently supported) 1981 SL_SI91X_WLAN_BLUETOOTH_MODE = 5, ///< WLAN and Bluetooth mode (not currently supported) 1982 SL_SI91X_DUAL_MODE = 8, ///< Dual mode (not currently supported) 1983 SL_SI91X_WLAN_DUAL_MODE = 9, ///< WLAN dual mode (not currently supported) 1984 SL_SI91X_BLE_MODE = 12, ///< Bluetooth Low Energy (BLE) only mode, used when power save mode is not needed. 1985 SL_SI91X_WLAN_BLE_MODE = 13, ///< WLAN and BLE mode 1986 __FORCE_COEX_ENUM_16BIT = 0xFFFF ///< Force the enumeration to be 16-bit 1987 } sl_si91x_coex_mode_t; 1988 1989 /// Si91x efuse data index 1990 typedef enum { 1991 SL_SI91X_EFUSE_MFG_SW_VERSION = 0, ///< Efuse data index for manufacturing software version 1992 SL_SI91X_EFUSE_PTE_CRC = 1, ///< Efuse data index for PTE CRC 1993 } sl_si91x_efuse_data_type_t; 1994 /** @} */ 1995 1996 /** \addtogroup SI91X_BURN_TARGET_OPTIONS 1997 * @{ */ 1998 /*=========================================================================*/ 1999 // Burn target options parameters description !// 2000 // This group defines the target options for burning data into different memory types. 2001 //=========================================================================*/ 2002 2003 /** 2004 * @def SL_SI91X_BURN_INTO_EFUSE 2005 * @brief Option to burn data into EFUSE. 2006 * 2007 * @details This option specifies that the data should be burned into the EFUSE memory. 2008 * EFUSE memory is used for storing critical calibration or configuration data that should not be modified after programming. 2009 * Use this option when permanent storage of data is required. 2010 */ 2011 #define SL_SI91X_BURN_INTO_EFUSE 0 2012 2013 /** 2014 * @def SL_SI91X_BURN_INTO_FLASH 2015 * @brief Option to burn data into Flash. 2016 * 2017 * @details This option specifies that the data should be burned into Flash memory. 2018 * Flash memory provides non-volatile storage that can be reprogrammed. 2019 * This is suitable for data that might need to be updated or modified over time. 2020 */ 2021 #define SL_SI91X_BURN_INTO_FLASH 1 2022 /** @} */ 2023 2024 /** \addtogroup SI91X_CALIBRATION_FLAGS 2025 * @{ */ 2026 /** 2027 * @def SL_SI91X_BURN_GAIN_OFFSET 2028 * @brief Burn gain offset into the device. 2029 * 2030 * @details 2031 * This macro defines the bit for burning the gain offset into the device. 2032 */ 2033 #define SL_SI91X_BURN_GAIN_OFFSET BIT(0) 2034 2035 /** 2036 * @def SL_SI91X_BURN_FREQ_OFFSET 2037 * @brief Burn frequency offset into the device. 2038 * 2039 * @details 2040 * This macro defines the bit for burning the frequency offset into the device. 2041 */ 2042 #define SL_SI91X_BURN_FREQ_OFFSET BIT(1) 2043 2044 /** 2045 * @def SL_SI91X_SW_XO_CTUNE_VALID 2046 * @brief Indicates if the software XO CTUNE is valid. 2047 * 2048 * @details 2049 * This macro defines the bit to indicate that the software XO CTUNE (crystal tuning) value is valid. 2050 */ 2051 #define SL_SI91X_SW_XO_CTUNE_VALID BIT(2) 2052 2053 /** 2054 * @def SL_SI91X_BURN_XO_FAST_DISABLE 2055 * @brief Burn bit to disable XO fast into the device. 2056 * 2057 * @details 2058 * This macro defines the bit for burning a setting to disable the fast XO (crystal oscillator) into the device. 2059 * 2060 * @note Not applicable for SI917. 2061 */ 2062 #define SL_SI91X_BURN_XO_FAST_DISABLE BIT(3) 2063 2064 /** @} */ 2065 2066 /** \addtogroup SI91X_DTIM_ALIGNMENT_TYPES 2067 * @{ */ 2068 /// Module wakes up at beacon which is just before or equal to listen_interval 2069 #define SL_SI91X_ALIGN_WITH_BEACON 0 2070 /// Module wakes up at DTIM beacon which is just before or equal to listen_interval 2071 #define SL_SI91X_ALIGN_WITH_DTIM_BEACON 1 2072 /** @} */ 2073 2074 /** \addtogroup SL_SI91X_TYPES Types 2075 * @{ 2076 * */ 2077 // Device configuration for 911x. This should be in the 911x driver folder 2078 /// Device configuration for Si91x device 2079 typedef struct { 2080 uint8_t boot_option; ///< Boot option. One of the values from @ref SI91X_LOAD_IMAGE_TYPES 2081 sl_mac_address_t * 2082 mac_address; ///< MAC address of type [sl_mac_address_t](../wiseconnect-api-reference-guide-nwk-mgmt/sl-net-types#sl-mac-address-t). 2083 sl_si91x_band_mode_t band; ///< Si91x Wi-Fi band of type @ref sl_si91x_band_mode_t. 2084 sl_si91x_region_code_t region_code; ///< Si91x region code of type @ref sl_si91x_region_code_t. 2085 sl_si91x_boot_configuration_t boot_config; ///< Si91x boot configuration. Refer to @ref SL_SI91X_BOOT_CONFIGURATION. 2086 sl_si91x_dynamic_pool ta_pool; ///< TA buffer allocation command parameters of type @ref sl_si91x_dynamic_pool. 2087 uint8_t efuse_data_type; ///<Type of eFuse data need to be read from flash. Refer to @ref sl_si91x_efuse_data_type_t. 2088 } sl_wifi_device_configuration_t; 2089 2090 /// Wi-Fi device context 2091 typedef struct { 2092 void *device_context; ///< Reserved for future use 2093 } sl_wifi_device_context_t; 2094 /** @} */ 2095 2096 /// Si91x calibration data structure 2097 typedef struct { 2098 uint8_t burn_target; ///< Burn into efuse or flash, @ref SI91X_BURN_TARGET_OPTIONS 2099 uint8_t reserved0[3]; ///< Reserved bits 2100 uint32_t flags; ///< Calibration Flags, @ref SI91X_CALIBRATION_FLAGS 2101 int8_t gain_offset; ///< gain offset 2102 int8_t xo_ctune; ///< xo ctune 2103 uint8_t reserved1[2]; ///< Reserved bits 2104 } si91x_calibration_data_t; 2105 2106 /** \addtogroup SL_SI91X_CONSTANTS 2107 * @{ 2108 * */ 2109 2110 /// Si91x performance profile 2111 typedef enum { 2112 HIGH_PERFORMANCE, ///< Power save is disabled and throughput is maximum. 2113 ASSOCIATED_POWER_SAVE, ///< Low power profile when the device is associated with an AP (MAX PSP). 2114 ASSOCIATED_POWER_SAVE_LOW_LATENCY, ///< Low power profile when the device is associated with an AP (FAST PSP). 2115 DEEP_SLEEP_WITHOUT_RAM_RETENTION, ///< Deep Sleep without RAM Retention when the device is not associated with AP. 2116 DEEP_SLEEP_WITH_RAM_RETENTION ///< Deep Sleep with RAM Retention when the device is not associated with AP. 2117 } sl_si91x_performance_profile_t; 2118 /** @} */ 2119 2120 /** \addtogroup SL_SI91X_TYPES 2121 * @{ 2122 * */ 2123 /// Bluetooth performance profile 2124 typedef struct { 2125 sl_si91x_performance_profile_t profile; ///< Performance profile of type @ref sl_si91x_performance_profile_t. 2126 } sl_bt_performance_profile_t; 2127 2128 /// Wi-Fi performance profile 2129 typedef struct { 2130 sl_si91x_performance_profile_t profile; ///< Performance profile of type @ref sl_si91x_performance_profile_t. 2131 uint8_t dtim_aligned_type; ///< Set DTIM alignment required. One of the values from @ref SI91X_DTIM_ALIGNMENT_TYPES. 2132 uint8_t num_of_dtim_skip; ///< Number of DTIM intervals to skip. Default value is 0. 2133 uint16_t listen_interval; ///< Listen interval in beacon intervals. 2134 uint16_t 2135 monitor_interval; ///< Monitor interval in milliseconds. Default interval 50 milliseconds is used if monitor_interval is set to 0. This is only valid when performance profile is set to ASSOCIATED_POWER_SAVE_LOW_LATENCY. 2136 sl_wifi_twt_request_t twt_request; ///< Target Wake Time (TWT) request settings. 2137 sl_wifi_twt_selection_t twt_selection; ///< Target Wake Time (TWT) selection request settings. 2138 } sl_wifi_performance_profile_t; 2139 /** @} */ 2140 2141 /** \addtogroup SL_SI91X_DEFAULT_DEVICE_CONFIGURATION 2142 * @{ */ 2143 /// Default Wi-Fi client configuration 2144 static const sl_wifi_device_configuration_t sl_wifi_default_client_configuration = { 2145 .boot_option = LOAD_NWP_FW, 2146 .mac_address = NULL, 2147 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2148 .region_code = US, 2149 .boot_config = { .oper_mode = SL_SI91X_CLIENT_MODE, 2150 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2151 .feature_bit_map = 2152 #ifdef SLI_SI91X_MCU_INTERFACE 2153 (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_WPS_DISABLE), 2154 #else 2155 (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_AGGREGATION), 2156 #endif 2157 .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_DNS_CLIENT 2158 | SL_SI91X_TCP_IP_FEAT_SSL | SL_SI91X_TCP_IP_FEAT_MDNSD 2159 #ifdef SLI_SI91X_ENABLE_IPV6 2160 | SL_SI91X_TCP_IP_FEAT_DHCPV6_CLIENT | SL_SI91X_TCP_IP_FEAT_IPV6 2161 #endif 2162 | SL_SI91X_TCP_IP_FEAT_ICMP | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), 2163 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2164 .ext_custom_feature_bit_map = 2165 (SL_SI91X_EXT_FEAT_XTAL_CLK | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS | MEMORY_CONFIG 2166 #if defined(SLI_SI917) || defined(SLI_SI915) 2167 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2168 #endif 2169 ), 2170 .bt_feature_bit_map = 0, 2171 .ext_tcp_ip_feature_bit_map = 2172 (SL_SI91X_EXT_TCP_IP_WINDOW_SCALING | SL_SI91X_EXT_TCP_IP_TOTAL_SELECTS(10)), 2173 .ble_feature_bit_map = 0, 2174 .ble_ext_feature_bit_map = 0, 2175 .config_feature_bit_map = 0 } 2176 }; 2177 2178 /// Default Wi-Fi enterprise client configuration 2179 static const sl_wifi_device_configuration_t sl_wifi_default_enterprise_client_configuration = { 2180 .boot_option = LOAD_NWP_FW, 2181 .mac_address = NULL, 2182 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2183 .region_code = US, 2184 .boot_config = { .oper_mode = SL_SI91X_ENTERPRISE_CLIENT_MODE, 2185 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2186 .feature_bit_map = (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_AGGREGATION), 2187 .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_ICMP 2188 | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), 2189 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2190 .ext_custom_feature_bit_map = 2191 (SL_SI91X_EXT_FEAT_XTAL_CLK | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS | MEMORY_CONFIG 2192 #if defined(SLI_SI917) || defined(SLI_SI915) 2193 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2194 #endif 2195 ), 2196 .bt_feature_bit_map = 0, 2197 .ext_tcp_ip_feature_bit_map = 2198 (SL_SI91X_EXT_TCP_IP_WINDOW_SCALING | SL_SI91X_EXT_TCP_IP_TOTAL_SELECTS(10)), 2199 .ble_feature_bit_map = 0, 2200 .ble_ext_feature_bit_map = 0, 2201 .config_feature_bit_map = 0 } 2202 }; 2203 2204 /// Default Wi-Fi ap configuration 2205 static const sl_wifi_device_configuration_t sl_wifi_default_ap_configuration = { 2206 .boot_option = LOAD_NWP_FW, 2207 .mac_address = NULL, 2208 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2209 .region_code = US, 2210 .boot_config = { .oper_mode = SL_SI91X_ACCESS_POINT_MODE, 2211 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2212 .feature_bit_map = SL_SI91X_FEAT_SECURITY_OPEN, 2213 .tcp_ip_feature_bit_map = 2214 (SL_SI91X_TCP_IP_FEAT_DHCPV4_SERVER | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), 2215 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2216 .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_XTAL_CLK | MEMORY_CONFIG 2217 #if defined(SLI_SI917) || defined(SLI_SI915) 2218 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2219 #endif 2220 ), 2221 .bt_feature_bit_map = 0, 2222 .ext_tcp_ip_feature_bit_map = 0, 2223 .ble_feature_bit_map = 0, 2224 .ble_ext_feature_bit_map = 0, 2225 .config_feature_bit_map = 0 } 2226 }; 2227 2228 /// Default Wi-Fi concurrent (AP + STATION) configuration 2229 static const sl_wifi_device_configuration_t sl_wifi_default_concurrent_configuration = { 2230 .boot_option = LOAD_NWP_FW, 2231 .mac_address = NULL, 2232 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2233 .region_code = US, 2234 .boot_config = { .oper_mode = SL_SI91X_CONCURRENT_MODE, 2235 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2236 .feature_bit_map = SL_SI91X_FEAT_AGGREGATION, 2237 .tcp_ip_feature_bit_map = (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_DHCPV4_SERVER 2238 | SL_SI91X_TCP_IP_FEAT_ICMP | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), 2239 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2240 .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_XTAL_CLK | MEMORY_CONFIG 2241 #if defined(SLI_SI917) || defined(SLI_SI915) 2242 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2243 #endif 2244 ), 2245 .bt_feature_bit_map = 0, 2246 .ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENSION_VALID, 2247 .ble_feature_bit_map = 0, 2248 .ble_ext_feature_bit_map = 0, 2249 .config_feature_bit_map = SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP } 2250 }; 2251 2252 /// Default Wi-Fi concurrent (AP + STATION) configuration 2253 static const sl_wifi_device_configuration_t sl_wifi_default_concurrent_v6_configuration = { 2254 .boot_option = LOAD_NWP_FW, 2255 .mac_address = NULL, 2256 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2257 .region_code = US, 2258 .boot_config = { .oper_mode = SL_SI91X_CONCURRENT_MODE, 2259 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2260 .feature_bit_map = (SL_SI91X_FEAT_AGGREGATION | SL_SI91X_FEAT_DISABLE_11AX_SUPPORT), 2261 .tcp_ip_feature_bit_map = 2262 (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_DHCPV4_SERVER 2263 | SL_SI91X_TCP_IP_FEAT_DHCPV6_CLIENT | SL_SI91X_TCP_IP_FEAT_DHCPV6_SERVER 2264 | SL_SI91X_TCP_IP_FEAT_IPV6 | SL_SI91X_TCP_IP_FEAT_ICMP | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID 2265 | SL_SI91X_TCP_IP_FEAT_HTTP_CLIENT), 2266 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2267 .ext_custom_feature_bit_map = (SL_SI91X_EXT_FEAT_XTAL_CLK | MEMORY_CONFIG 2268 #if defined(SLI_SI917) || defined(SLI_SI915) 2269 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2270 #endif 2271 ), 2272 .bt_feature_bit_map = 0, 2273 .ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENSION_VALID, 2274 .ble_feature_bit_map = 0, 2275 .ble_ext_feature_bit_map = 0, 2276 .config_feature_bit_map = SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP } 2277 }; 2278 2279 /// Default Wi-Fi transmit configuration 2280 static const sl_wifi_device_configuration_t sl_wifi_default_transmit_test_configuration = { 2281 .boot_option = LOAD_NWP_FW, 2282 .mac_address = NULL, 2283 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2284 .region_code = WORLD_DOMAIN, 2285 .boot_config = { .oper_mode = SL_SI91X_TRANSMIT_TEST_MODE, 2286 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2287 .feature_bit_map = 2288 #ifdef SLI_SI91X_MCU_INTERFACE 2289 (SL_SI91X_FEAT_SECURITY_OPEN | SL_SI91X_FEAT_WPS_DISABLE), 2290 #else 2291 (SL_SI91X_FEAT_SECURITY_OPEN), 2292 #endif 2293 .tcp_ip_feature_bit_map = 2294 (SL_SI91X_TCP_IP_FEAT_DHCPV4_CLIENT | SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID), 2295 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2296 .ext_custom_feature_bit_map = (MEMORY_CONFIG 2297 #if defined(SLI_SI917) || defined(SLI_SI915) 2298 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2299 #endif 2300 ), 2301 .bt_feature_bit_map = SL_SI91X_BT_RF_TYPE, 2302 .ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENSION_VALID, 2303 .ble_feature_bit_map = 0, 2304 .ble_ext_feature_bit_map = 0, 2305 .config_feature_bit_map = SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP } 2306 }; 2307 2308 /// Default Wi-Fi transceiver mode configuration 2309 static const sl_wifi_device_configuration_t sl_wifi_default_transceiver_configuration = { 2310 .boot_option = LOAD_NWP_FW, 2311 .mac_address = NULL, 2312 .band = SL_SI91X_WIFI_BAND_2_4GHZ, 2313 .region_code = JP, 2314 .boot_config = { .oper_mode = SL_SI91X_TRANSCEIVER_MODE, 2315 .coex_mode = SL_SI91X_WLAN_ONLY_MODE, 2316 #ifdef TRANSCEIVER_MAC_PEER_DS_SUPPORT 2317 .feature_bit_map = (SL_SI91X_FEAT_TRANSCEIVER_MAC_PEER_DS_SUPPORT | SL_SI91X_FEAT_SECURITY_OPEN), 2318 #else 2319 .feature_bit_map = SL_SI91X_FEAT_SECURITY_OPEN, 2320 #endif 2321 .tcp_ip_feature_bit_map = SL_SI91X_TCP_IP_FEAT_BYPASS, 2322 .custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID, 2323 .ext_custom_feature_bit_map = 2324 (SL_SI91X_EXT_FEAT_XTAL_CLK | SL_SI91X_EXT_FEAT_UART_SEL_FOR_DEBUG_PRINTS 2325 #if defined(SLI_SI917) || defined(SLI_SI915) 2326 | SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 2327 #endif 2328 ), 2329 .bt_feature_bit_map = 0, 2330 .ext_tcp_ip_feature_bit_map = (SL_SI91X_CONFIG_FEAT_EXTENSION_VALID), 2331 .ble_feature_bit_map = 0, 2332 .ble_ext_feature_bit_map = 0, 2333 .config_feature_bit_map = 0 } 2334 }; 2335 2336 /** @} */ 2337
