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Searched defs:SIRCCSR (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h16190 …__IO uint32_t SIRCCSR; /**< Slow IRC Control Status Register, offset: 0x… member
DRV32M1_zero_riscy.h17018 …__IO uint32_t SIRCCSR; /**< Slow IRC Control Status Register, offset: 0x… member