1 /* 2 * Copyright (c) 2025 Silicon Laboratories Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_SILABS_LDMA_H_ 8 #define ZEPHYR_INCLUDE_DRIVERS_DMA_SILABS_LDMA_H_ 9 10 #include <zephyr/drivers/dma.h> 11 12 #define SILABS_LDMA_SOURCE_MASK GENMASK(21, 16) 13 #define SILABS_LDMA_SIG_MASK GENMASK(3, 0) 14 15 #define SILABS_DMA_SLOT_SOURCE_MASK GENMASK(7, 3) 16 #define SILABS_DMA_SLOT_SIG_MASK GENMASK(2, 0) 17 18 #define SILABS_LDMA_REQSEL_TO_SLOT(signal) \ 19 FIELD_PREP(SILABS_DMA_SLOT_SOURCE_MASK, FIELD_GET(SILABS_LDMA_SOURCE_MASK, signal)) | \ 20 FIELD_PREP(SILABS_DMA_SLOT_SIG_MASK, FIELD_GET(SILABS_LDMA_SIG_MASK, signal)) 21 22 #define SILABS_LDMA_SLOT_TO_REQSEL(slot) \ 23 FIELD_PREP(SILABS_LDMA_SOURCE_MASK, FIELD_GET(SILABS_DMA_SLOT_SOURCE_MASK, slot)) | \ 24 FIELD_PREP(SILABS_LDMA_SIG_MASK, FIELD_GET(SILABS_DMA_SLOT_SIG_MASK, slot)) 25 26 /** 27 * @brief Append a new block to the current channel 28 * 29 * This function allows to append a block to the current DMA transfer. It allows a user/driver 30 * to register the next DMA transfer while a transfer in being held without stopping or restarting 31 * DMA engine. It is very suitable for Zephyr Uart API where user gives buffers while the DMA engine 32 * is running. Because this function changes dynamically the link to the block that DMA engine would 33 * load as the next transfer, it is only working with channel that didn't have linked block list. 34 * 35 * In the case that the DMA engine naturally stopped because the previous transfer is finished, this 36 * function simply restart the DMA engine with the given block. If the DMA engine stopped while 37 * reconfiguring the next transfer, the DMA engine will restart too. 38 * 39 * @param dev: dma device 40 * @param channel: channel 41 * @param config: configuration of the channel with the block to append as the head_block. 42 */ 43 int silabs_ldma_append_block(const struct device *dev, uint32_t channel, 44 struct dma_config *config); 45 46 #endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_SILABS_LDMA_H_*/ 47
