1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_sema42.h"
10
11 /******************************************************************************
12 * Definitions
13 *****************************************************************************/
14 /* The first number write to RSTGDP when reset SEMA42 gate. */
15 #define SEMA42_GATE_RESET_PATTERN_1 (0xE2U)
16 /* The second number write to RSTGDP when reset SEMA42 gate. */
17 #define SEMA42_GATE_RESET_PATTERN_2 (0x1DU)
18
19 /*******************************************************************************
20 * Prototypes
21 ******************************************************************************/
22
23 /*!
24 * @brief Get instance number for SEMA42 module.
25 *
26 * @param base SEMA42 peripheral base address.
27 */
28 uint32_t SEMA42_GetInstance(SEMA42_Type *base);
29
30 /*******************************************************************************
31 * Variables
32 ******************************************************************************/
33
34 /*! @brief Pointers to sema42 bases for each instance. */
35 static SEMA42_Type *const s_sema42Bases[] = SEMA42_BASE_PTRS;
36
37 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
38 /*! @brief Pointers to sema42 clocks for each instance. */
39 static const clock_ip_name_t s_sema42Clocks[] = SEMA42_CLOCKS;
40 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
41
42 /******************************************************************************
43 * CODE
44 *****************************************************************************/
45
SEMA42_GetInstance(SEMA42_Type * base)46 uint32_t SEMA42_GetInstance(SEMA42_Type *base)
47 {
48 uint32_t instance;
49
50 /* Find the instance index from base address mappings. */
51 for (instance = 0; instance < ARRAY_SIZE(s_sema42Bases); instance++)
52 {
53 if (s_sema42Bases[instance] == base)
54 {
55 break;
56 }
57 }
58
59 assert(instance < ARRAY_SIZE(s_sema42Bases));
60
61 return instance;
62 }
63
SEMA42_Init(SEMA42_Type * base)64 void SEMA42_Init(SEMA42_Type *base)
65 {
66 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
67 CLOCK_EnableClock(s_sema42Clocks[SEMA42_GetInstance(base)]);
68 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
69 }
70
SEMA42_Deinit(SEMA42_Type * base)71 void SEMA42_Deinit(SEMA42_Type *base)
72 {
73 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
74 CLOCK_DisableClock(s_sema42Clocks[SEMA42_GetInstance(base)]);
75 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
76 }
77
SEMA42_TryLock(SEMA42_Type * base,uint8_t gateNum,uint8_t procNum)78 status_t SEMA42_TryLock(SEMA42_Type *base, uint8_t gateNum, uint8_t procNum)
79 {
80 assert(gateNum < FSL_FEATURE_SEMA42_GATE_COUNT);
81
82 ++procNum;
83
84 /* Try to lock. */
85 SEMA42_GATEn(base, gateNum) = procNum;
86
87 /* Check locked or not. */
88 if (procNum != SEMA42_GATEn(base, gateNum))
89 {
90 return kStatus_SEMA42_Busy;
91 }
92
93 return kStatus_Success;
94 }
95
SEMA42_Lock(SEMA42_Type * base,uint8_t gateNum,uint8_t procNum)96 void SEMA42_Lock(SEMA42_Type *base, uint8_t gateNum, uint8_t procNum)
97 {
98 assert(gateNum < FSL_FEATURE_SEMA42_GATE_COUNT);
99
100 ++procNum;
101
102 while (procNum != SEMA42_GATEn(base, gateNum))
103 {
104 /* Wait for unlocked status. */
105 while (SEMA42_GATEn(base, gateNum))
106 {
107 }
108
109 /* Lock the gate. */
110 SEMA42_GATEn(base, gateNum) = procNum;
111 }
112 }
113
SEMA42_ResetGate(SEMA42_Type * base,uint8_t gateNum)114 status_t SEMA42_ResetGate(SEMA42_Type *base, uint8_t gateNum)
115 {
116 /*
117 * Reset all gates if gateNum >= SEMA42_GATE_NUM_RESET_ALL
118 * Reset specific gate if gateNum < FSL_FEATURE_SEMA42_GATE_COUNT
119 */
120 assert(!((gateNum < SEMA42_GATE_NUM_RESET_ALL) && (gateNum >= FSL_FEATURE_SEMA42_GATE_COUNT)));
121
122 /* Check whether some reset is ongoing. */
123 if (base->RSTGT_R & SEMA42_RSTGT_R_RSTGSM_MASK)
124 {
125 return kStatus_SEMA42_Reseting;
126 }
127
128 /* First step. */
129 base->RSTGT_W = SEMA42_RSTGT_W_RSTGDP(SEMA42_GATE_RESET_PATTERN_1);
130 /* Second step. */
131 base->RSTGT_W = SEMA42_RSTGT_W_RSTGDP(SEMA42_GATE_RESET_PATTERN_2) | SEMA42_RSTGT_W_RSTGTN(gateNum);
132
133 return kStatus_Success;
134 }
135
