1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020, 2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef FSL_SEMA42_H_
10 #define FSL_SEMA42_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup sema42
16 * @{
17 */
18
19 /******************************************************************************
20 * Definitions
21 *****************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief SEMA42 driver version */
26 #define FSL_SEMA42_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
27 /*@}*/
28
29 /*!
30 * @brief SEMA42 status return codes.
31 */
32 enum
33 {
34 kStatus_SEMA42_Busy = MAKE_STATUS(kStatusGroup_SEMA42, 0), /*!< SEMA42 gate has been locked by other processor. */
35 kStatus_SEMA42_Reseting = MAKE_STATUS(kStatusGroup_SEMA42, 1) /*!< SEMA42 gate reseting is ongoing. */
36 };
37
38 /*!
39 * @brief SEMA42 gate lock status.
40 */
41 typedef enum _sema42_gate_status
42 {
43 kSEMA42_Unlocked = 0U, /*!< The gate is unlocked. */
44 kSEMA42_LockedByProc0 = 1U, /*!< The gate is locked by processor 0. */
45 kSEMA42_LockedByProc1 = 2U, /*!< The gate is locked by processor 1. */
46 kSEMA42_LockedByProc2 = 3U, /*!< The gate is locked by processor 2. */
47 kSEMA42_LockedByProc3 = 4U, /*!< The gate is locked by processor 3. */
48 kSEMA42_LockedByProc4 = 5U, /*!< The gate is locked by processor 4. */
49 kSEMA42_LockedByProc5 = 6U, /*!< The gate is locked by processor 5. */
50 kSEMA42_LockedByProc6 = 7U, /*!< The gate is locked by processor 6. */
51 kSEMA42_LockedByProc7 = 8U, /*!< The gate is locked by processor 7. */
52 kSEMA42_LockedByProc8 = 9U, /*!< The gate is locked by processor 8. */
53 kSEMA42_LockedByProc9 = 10U, /*!< The gate is locked by processor 9. */
54 kSEMA42_LockedByProc10 = 11U, /*!< The gate is locked by processor 10. */
55 kSEMA42_LockedByProc11 = 12U, /*!< The gate is locked by processor 11. */
56 kSEMA42_LockedByProc12 = 13U, /*!< The gate is locked by processor 12. */
57 kSEMA42_LockedByProc13 = 14U, /*!< The gate is locked by processor 13. */
58 kSEMA42_LockedByProc14 = 15U /*!< The gate is locked by processor 14. */
59 } sema42_gate_status_t;
60
61 /*! @brief The number to reset all SEMA42 gates. */
62 #define SEMA42_GATE_NUM_RESET_ALL (64U)
63
64 /*! @brief SEMA42 gate n register address.
65 *
66 * The SEMA42 gates are sorted in the order 3, 2, 1, 0, 7, 6, 5, 4, ... not in the order
67 * 0, 1, 2, 3, 4, 5, 6, 7, ... The macro SEMA42_GATEn gets the SEMA42 gate based on the gate
68 * index.
69 *
70 * The input gate index is XOR'ed with 3U:
71 * 0 ^ 3 = 3
72 * 1 ^ 3 = 2
73 * 2 ^ 3 = 1
74 * 3 ^ 3 = 0
75 * 4 ^ 3 = 7
76 * 5 ^ 3 = 6
77 * 6 ^ 3 = 5
78 * 7 ^ 3 = 4
79 * ...
80 */
81 #define SEMA42_GATEn(base, n) (((volatile uint8_t *)(&((base)->GATE3)))[(n) ^ 3U])
82
83 /*******************************************************************************
84 * API
85 ******************************************************************************/
86
87 #if defined(__cplusplus)
88 extern "C" {
89 #endif
90
91 /*!
92 * @brief Initializes the SEMA42 module.
93 *
94 * This function initializes the SEMA42 module. It only enables the clock but does
95 * not reset the gates because the module might be used by other processors
96 * at the same time. To reset the gates, call either SEMA42_ResetGate or
97 * SEMA42_ResetAllGates function.
98 *
99 * @param base SEMA42 peripheral base address.
100 */
101 void SEMA42_Init(SEMA42_Type *base);
102
103 /*!
104 * @brief De-initializes the SEMA42 module.
105 *
106 * This function de-initializes the SEMA42 module. It only disables the clock.
107 *
108 * @param base SEMA42 peripheral base address.
109 */
110 void SEMA42_Deinit(SEMA42_Type *base);
111
112 /*!
113 * @brief Tries to lock the SEMA42 gate.
114 *
115 * This function tries to lock the specific SEMA42 gate. If the gate has been
116 * locked by another processor, this function returns an error code.
117 *
118 * @param base SEMA42 peripheral base address.
119 * @param gateNum Gate number to lock.
120 * @param procNum Current processor number.
121 *
122 * @retval kStatus_Success Lock the sema42 gate successfully.
123 * @retval kStatus_SEMA42_Busy Sema42 gate has been locked by another processor.
124 */
125 status_t SEMA42_TryLock(SEMA42_Type *base, uint8_t gateNum, uint8_t procNum);
126
127 /*!
128 * @brief Locks the SEMA42 gate.
129 *
130 * This function locks the specific SEMA42 gate. If the gate has been
131 * locked by other processors, this function waits until it is unlocked and then
132 * lock it.
133 *
134 * @param base SEMA42 peripheral base address.
135 * @param gateNum Gate number to lock.
136 * @param procNum Current processor number.
137 */
138 void SEMA42_Lock(SEMA42_Type *base, uint8_t gateNum, uint8_t procNum);
139
140 /*!
141 * @brief Unlocks the SEMA42 gate.
142 *
143 * This function unlocks the specific SEMA42 gate. It only writes unlock value
144 * to the SEMA42 gate register. However, it does not check whether the SEMA42 gate is locked
145 * by the current processor or not. As a result, if the SEMA42 gate is not locked by the current
146 * processor, this function has no effect.
147 *
148 * @param base SEMA42 peripheral base address.
149 * @param gateNum Gate number to unlock.
150 */
SEMA42_Unlock(SEMA42_Type * base,uint8_t gateNum)151 static inline void SEMA42_Unlock(SEMA42_Type *base, uint8_t gateNum)
152 {
153 assert(gateNum < (uint8_t)FSL_FEATURE_SEMA42_GATE_COUNT);
154
155 /* ^= 0x03U because SEMA42 gates are in the order 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 7, ...*/
156 SEMA42_GATEn(base, gateNum) = (uint8_t)kSEMA42_Unlocked;
157 }
158
159 /*!
160 * @brief Gets the status of the SEMA42 gate.
161 *
162 * This function checks the lock status of a specific SEMA42 gate.
163 *
164 * @param base SEMA42 peripheral base address.
165 * @param gateNum Gate number.
166 *
167 * @return status Current status.
168 */
SEMA42_GetGateStatus(SEMA42_Type * base,uint8_t gateNum)169 static inline sema42_gate_status_t SEMA42_GetGateStatus(SEMA42_Type *base, uint8_t gateNum)
170 {
171 assert(gateNum < (uint8_t)FSL_FEATURE_SEMA42_GATE_COUNT);
172
173 return (sema42_gate_status_t)(SEMA42_GATEn(base, gateNum));
174 }
175
176 /*!
177 * @brief Resets the SEMA42 gate to an unlocked status.
178 *
179 * This function resets a SEMA42 gate to an unlocked status.
180 *
181 * @param base SEMA42 peripheral base address.
182 * @param gateNum Gate number.
183 *
184 * @retval kStatus_Success SEMA42 gate is reset successfully.
185 * @retval kStatus_SEMA42_Reseting Some other reset process is ongoing.
186 */
187 status_t SEMA42_ResetGate(SEMA42_Type *base, uint8_t gateNum);
188
189 /*!
190 * @brief Resets all SEMA42 gates to an unlocked status.
191 *
192 * This function resets all SEMA42 gate to an unlocked status.
193 *
194 * @param base SEMA42 peripheral base address.
195 *
196 * @retval kStatus_Success SEMA42 is reset successfully.
197 * @retval kStatus_SEMA42_Reseting Some other reset process is ongoing.
198 */
SEMA42_ResetAllGates(SEMA42_Type * base)199 static inline status_t SEMA42_ResetAllGates(SEMA42_Type *base)
200 {
201 return SEMA42_ResetGate(base, SEMA42_GATE_NUM_RESET_ALL);
202 }
203
204 #if defined(__cplusplus)
205 }
206 #endif
207
208 /*!
209 * @}
210 */
211
212 #endif /* FSL_SEMA42_H_ */
213
